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Diffstat (limited to 'arch/mips/include/asm/asm.h')
-rw-r--r--arch/mips/include/asm/asm.h26
1 files changed, 24 insertions, 2 deletions
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index 2f8ce94ebaaf..336ac9b65235 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -19,6 +19,7 @@
#include <asm/sgidefs.h>
#include <asm/asm-eva.h>
+#include <asm/isa-rev.h>
#ifndef __VDSO__
/*
@@ -211,6 +212,8 @@ symbol = value
#define LONG_SUB sub
#define LONG_SUBU subu
#define LONG_L lw
+#define LONG_LL ll
+#define LONG_SC sc
#define LONG_S sw
#define LONG_SP swp
#define LONG_SLL sll
@@ -219,6 +222,8 @@ symbol = value
#define LONG_SRLV srlv
#define LONG_SRA sra
#define LONG_SRAV srav
+#define LONG_INS ins
+#define LONG_EXT ext
#ifdef __ASSEMBLY__
#define LONG .word
@@ -236,6 +241,8 @@ symbol = value
#define LONG_SUB dsub
#define LONG_SUBU dsubu
#define LONG_L ld
+#define LONG_LL lld
+#define LONG_SC scd
#define LONG_S sd
#define LONG_SP sdp
#define LONG_SLL dsll
@@ -244,6 +251,8 @@ symbol = value
#define LONG_SRLV dsrlv
#define LONG_SRA dsra
#define LONG_SRAV dsrav
+#define LONG_INS dins
+#define LONG_EXT dext
#ifdef __ASSEMBLY__
#define LONG .dword
@@ -276,7 +285,7 @@ symbol = value
#define PTR_SCALESHIFT 2
-#define PTR .word
+#define PTR_WD .word
#define PTRSIZE 4
#define PTRLOG 2
#endif
@@ -301,7 +310,7 @@ symbol = value
#define PTR_SCALESHIFT 3
-#define PTR .dword
+#define PTR_WD .dword
#define PTRSIZE 8
#define PTRLOG 3
#endif
@@ -320,6 +329,19 @@ symbol = value
#define SSNOP sll zero, zero, 1
+/*
+ * Using a branch-likely instruction to check the result of an sc instruction
+ * works around a bug present in R10000 CPUs prior to revision 3.0 that could
+ * cause ll-sc sequences to execute non-atomically.
+ */
+#ifdef CONFIG_WAR_R10000_LLSC
+# define SC_BEQZ beqzl
+#elif MIPS_ISA_REV >= 6
+# define SC_BEQZ beqzc
+#else
+# define SC_BEQZ beqz
+#endif
+
#ifdef CONFIG_SGI_IP28
/* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
#include <asm/cacheops.h>