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Diffstat (limited to 'arch/mips/include/asm/asmmacro.h')
-rw-r--r--arch/mips/include/asm/asmmacro.h67
1 files changed, 34 insertions, 33 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index feb069cbf44e..067a635d3bc8 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -44,17 +44,17 @@
.endm
#endif
-#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
- .macro local_irq_enable reg=t0
+#ifdef CONFIG_CPU_HAS_DIEI
+ .macro local_irq_enable
ei
irq_enable_hazard
.endm
- .macro local_irq_disable reg=t0
+ .macro local_irq_disable
di
irq_disable_hazard
.endm
-#else
+#else /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR5 && !CONFIG_CPU_MIPSR6 */
.macro local_irq_enable reg=t0
mfc0 \reg, CP0_STATUS
ori \reg, \reg, 1
@@ -63,7 +63,7 @@
.endm
.macro local_irq_disable reg=t0
-#ifdef CONFIG_PREEMPT
+#ifdef CONFIG_PREEMPTION
lw \reg, TI_PRE_COUNT($28)
addi \reg, \reg, 1
sw \reg, TI_PRE_COUNT($28)
@@ -73,17 +73,17 @@
xori \reg, \reg, 1
mtc0 \reg, CP0_STATUS
irq_disable_hazard
-#ifdef CONFIG_PREEMPT
+#ifdef CONFIG_PREEMPTION
lw \reg, TI_PRE_COUNT($28)
addi \reg, \reg, -1
sw \reg, TI_PRE_COUNT($28)
#endif
.endm
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR5 && !CONFIG_CPU_MIPSR6 */
.macro fpu_save_16even thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
cfc1 \tmp, fcr31
sdc1 $f0, THREAD_FPR0(\thread)
sdc1 $f2, THREAD_FPR2(\thread)
@@ -109,7 +109,7 @@
.set push
.set mips64r2
.set fp=64
- SET_HARDFLOAT
+ .set hardfloat
sdc1 $f1, THREAD_FPR1(\thread)
sdc1 $f3, THREAD_FPR3(\thread)
sdc1 $f5, THREAD_FPR5(\thread)
@@ -131,7 +131,7 @@
.macro fpu_save_double thread status tmp
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
- defined(CONFIG_CPU_MIPSR6)
+ defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
sll \tmp, \status, 5
bgez \tmp, 10f
fpu_save_16odd \thread
@@ -142,7 +142,7 @@
.macro fpu_restore_16even thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
lw \tmp, THREAD_FCR31(\thread)
ldc1 $f0, THREAD_FPR0(\thread)
ldc1 $f2, THREAD_FPR2(\thread)
@@ -168,7 +168,7 @@
.set push
.set mips64r2
.set fp=64
- SET_HARDFLOAT
+ .set hardfloat
ldc1 $f1, THREAD_FPR1(\thread)
ldc1 $f3, THREAD_FPR3(\thread)
ldc1 $f5, THREAD_FPR5(\thread)
@@ -190,7 +190,7 @@
.macro fpu_restore_double thread status tmp
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
- defined(CONFIG_CPU_MIPSR6)
+ defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
sll \tmp, \status, 5
bgez \tmp, 10f # 16 register mode?
@@ -200,16 +200,17 @@
fpu_restore_16even \thread \tmp
.endm
-#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) || \
+ defined(CONFIG_CPU_MIPSR6)
.macro _EXT rd, rs, p, s
ext \rd, \rs, \p, \s
.endm
-#else /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
+#else /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR5 && !CONFIG_CPU_MIPSR6 */
.macro _EXT rd, rs, p, s
srl \rd, \rs, \p
andi \rd, \rd, (1 << \s) - 1
.endm
-#endif /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
+#endif /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR5 && !CONFIG_CPU_MIPSR6 */
/*
* Temporary until all gas have MT ASE support
@@ -372,7 +373,7 @@
.macro _cfcmsa rd, cs
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x787e0059 | (\cs << 11)
insn32_if_mm 0x587e0056 | (\cs << 11)
move \rd, $1
@@ -382,7 +383,7 @@
.macro _ctcmsa cd, rs
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
move $1, \rs
insn_if_mips 0x783e0819 | (\cd << 6)
insn32_if_mm 0x583e0816 | (\cd << 6)
@@ -392,7 +393,7 @@
.macro ld_b wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000820 | (\wd << 6)
insn32_if_mm 0x58000807 | (\wd << 6)
@@ -402,7 +403,7 @@
.macro ld_h wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000821 | (\wd << 6)
insn32_if_mm 0x58000817 | (\wd << 6)
@@ -412,7 +413,7 @@
.macro ld_w wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000822 | (\wd << 6)
insn32_if_mm 0x58000827 | (\wd << 6)
@@ -422,7 +423,7 @@
.macro ld_d wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000823 | (\wd << 6)
insn32_if_mm 0x58000837 | (\wd << 6)
@@ -432,7 +433,7 @@
.macro st_b wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000824 | (\wd << 6)
insn32_if_mm 0x5800080f | (\wd << 6)
@@ -442,7 +443,7 @@
.macro st_h wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000825 | (\wd << 6)
insn32_if_mm 0x5800081f | (\wd << 6)
@@ -452,7 +453,7 @@
.macro st_w wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000826 | (\wd << 6)
insn32_if_mm 0x5800082f | (\wd << 6)
@@ -462,7 +463,7 @@
.macro st_d wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000827 | (\wd << 6)
insn32_if_mm 0x5800083f | (\wd << 6)
@@ -472,7 +473,7 @@
.macro copy_s_w ws, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x78b00059 | (\n << 16) | (\ws << 11)
insn32_if_mm 0x58b00056 | (\n << 16) | (\ws << 11)
.set pop
@@ -481,7 +482,7 @@
.macro copy_s_d ws, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x78b80059 | (\n << 16) | (\ws << 11)
insn32_if_mm 0x58b80056 | (\n << 16) | (\ws << 11)
.set pop
@@ -490,7 +491,7 @@
.macro insert_w wd, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x79300819 | (\n << 16) | (\wd << 6)
insn32_if_mm 0x59300816 | (\n << 16) | (\wd << 6)
.set pop
@@ -499,7 +500,7 @@
.macro insert_d wd, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x79380819 | (\n << 16) | (\wd << 6)
insn32_if_mm 0x59380816 | (\n << 16) | (\wd << 6)
.set pop
@@ -552,7 +553,7 @@
st_d 29, THREAD_FPR29 - FPR_BASE_OFFS, FPR_BASE
st_d 30, THREAD_FPR30 - FPR_BASE_OFFS, FPR_BASE
st_d 31, THREAD_FPR31 - FPR_BASE_OFFS, FPR_BASE
- SET_HARDFLOAT
+ .set hardfloat
_cfcmsa $1, MSA_CSR
sw $1, THREAD_MSA_CSR(\thread)
.set pop
@@ -561,7 +562,7 @@
.macro msa_restore_all thread
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
lw $1, THREAD_MSA_CSR(\thread)
_ctcmsa MSA_CSR, $1
#ifdef TOOLCHAIN_SUPPORTS_MSA
@@ -617,7 +618,7 @@
.macro msa_init_all_upper
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
not $1, zero
msa_init_upper 0
msa_init_upper 1