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Diffstat (limited to 'arch/mips/include/asm/pci.h')
-rw-r--r--arch/mips/include/asm/pci.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index d69ea743272b..b8e24fd4cbc5 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -12,7 +12,7 @@
/*
* This file essentially defines the interface between board
- * specific PCI code and MIPS common PCI code. Should potentially put
+ * specific PCI code and MIPS common PCI code. Should potentially put
* into include/asm/pci.h file.
*/
@@ -20,7 +20,7 @@
#include <linux/of.h>
/*
- * Each pci channel is a top-level PCI bus seem by CPU. A machine with
+ * Each pci channel is a top-level PCI bus seem by CPU. A machine with
* multiple PCI channels may have multiple PCI host controllers or a
* single controller supporting multiple channels.
*/
@@ -99,7 +99,7 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
struct pci_dev;
/*
- * The PCI address space does equal the physical memory address space. The
+ * The PCI address space does equal the physical memory address space. The
* networking and block device layers use this boolean for bounce buffer
* decisions. This is set if any hose does not have an IOMMU.
*/
@@ -144,8 +144,13 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
extern char * (*pcibios_plat_setup)(char *str);
+#ifdef CONFIG_OF
/* this function parses memory ranges from a device node */
extern void pci_load_of_ranges(struct pci_controller *hose,
struct device_node *node);
+#else
+static inline void pci_load_of_ranges(struct pci_controller *hose,
+ struct device_node *node) {}
+#endif
#endif /* _ASM_PCI_H */