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-rw-r--r--arch/mips/mti-malta/malta-int.c27
-rw-r--r--arch/mips/mti-malta/malta-memory.c40
2 files changed, 55 insertions, 12 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index ecc2785f7858..e4f43baa8f67 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -42,6 +42,10 @@ static unsigned int ipi_map[NR_CPUS];
static DEFINE_RAW_SPINLOCK(mips_irq_lock);
+#ifdef CONFIG_MIPS_GIC_IPI
+DECLARE_BITMAP(ipi_ints, GIC_NUM_INTRS);
+#endif
+
static inline int mips_pcibios_iack(void)
{
int irq;
@@ -125,16 +129,22 @@ static void malta_hw0_irqdispatch(void)
static void malta_ipi_irqdispatch(void)
{
- int irq;
+#ifdef CONFIG_MIPS_GIC_IPI
+ unsigned long irq;
+ DECLARE_BITMAP(pending, GIC_NUM_INTRS);
- if (gic_compare_int())
- do_IRQ(MIPS_GIC_IRQ_BASE);
+ gic_get_int_mask(pending, ipi_ints);
+
+ irq = find_first_bit(pending, GIC_NUM_INTRS);
- irq = gic_get_int();
- if (irq < 0)
- return; /* interrupt has already been cleared */
+ while (irq < GIC_NUM_INTRS) {
+ do_IRQ(MIPS_GIC_IRQ_BASE + irq);
- do_IRQ(MIPS_GIC_IRQ_BASE + irq);
+ irq = find_next_bit(pending, GIC_NUM_INTRS, irq + 1);
+ }
+#endif
+ if (gic_compare_int())
+ do_IRQ(MIPS_GIC_IRQ_BASE);
}
static void corehi_irqdispatch(void)
@@ -427,8 +437,9 @@ static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin)
gic_intr_map[intr].pin = cpupin;
gic_intr_map[intr].polarity = GIC_POL_POS;
gic_intr_map[intr].trigtype = GIC_TRIG_EDGE;
- gic_intr_map[intr].flags = GIC_FLAG_IPI;
+ gic_intr_map[intr].flags = 0;
ipi_map[cpu] |= (1 << (cpupin + 2));
+ bitmap_set(ipi_ints, intr, 1);
}
static void __init fill_ipi_map(void)
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 6d9773096750..8fddd2cdbff7 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -16,6 +16,7 @@
#include <linux/string.h>
#include <asm/bootinfo.h>
+#include <asm/maar.h>
#include <asm/sections.h>
#include <asm/fw/fw.h>
@@ -34,13 +35,19 @@ fw_memblock_t * __init fw_getmdesc(int eva)
/* otherwise look in the environment */
memsize_str = fw_getenv("memsize");
- if (memsize_str)
- tmp = kstrtol(memsize_str, 0, &memsize);
+ if (memsize_str) {
+ tmp = kstrtoul(memsize_str, 0, &memsize);
+ if (tmp)
+ pr_warn("Failed to read the 'memsize' env variable.\n");
+ }
if (eva) {
/* Look for ememsize for EVA */
ememsize_str = fw_getenv("ememsize");
- if (ememsize_str)
- tmp = kstrtol(ememsize_str, 0, &ememsize);
+ if (ememsize_str) {
+ tmp = kstrtoul(ememsize_str, 0, &ememsize);
+ if (tmp)
+ pr_warn("Failed to read the 'ememsize' env variable.\n");
+ }
}
if (!memsize && !ememsize) {
pr_warn("memsize not set in YAMON, set to default (32Mb)\n");
@@ -164,3 +171,28 @@ void __init prom_free_prom_memory(void)
addr, addr + boot_mem_map.map[i].size);
}
}
+
+unsigned platform_maar_init(unsigned num_pairs)
+{
+ phys_addr_t mem_end = (physical_memsize & ~0xffffull) - 1;
+ struct maar_config cfg[] = {
+ /* DRAM preceding I/O */
+ { 0x00000000, 0x0fffffff, MIPS_MAAR_S },
+
+ /* DRAM following I/O */
+ { 0x20000000, mem_end, MIPS_MAAR_S },
+
+ /* DRAM alias in upper half of physical */
+ { 0x80000000, 0x80000000 + mem_end, MIPS_MAAR_S },
+ };
+ unsigned i, num_cfg = ARRAY_SIZE(cfg);
+
+ /* If DRAM fits before I/O, drop the region following it */
+ if (physical_memsize <= 0x10000000) {
+ num_cfg--;
+ for (i = 1; i < num_cfg; i++)
+ cfg[i] = cfg[i + 1];
+ }
+
+ return maar_config(cfg, num_cfg, num_pairs);
+}