diff options
Diffstat (limited to 'arch/mips/pci/pci-mt7620.c')
| -rw-r--r-- | arch/mips/pci/pci-mt7620.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index 4e633c1e7ff3..407f155f0bb6 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -33,14 +33,13 @@ #define RALINK_GPIOMODE 0x60 #define PPLL_CFG1 0x9c -#define PDRV_SW_SET BIT(23) #define PPLL_DRV 0xa0 -#define PDRV_SW_SET (1<<31) -#define LC_CKDRVPD (1<<19) -#define LC_CKDRVOHZ (1<<18) -#define LC_CKDRVHZ (1<<17) -#define LC_CKTEST (1<<16) +#define PDRV_SW_SET BIT(31) +#define LC_CKDRVPD BIT(19) +#define LC_CKDRVOHZ BIT(18) +#define LC_CKDRVHZ BIT(17) +#define LC_CKTEST BIT(16) /* PCI Bridge registers */ #define RALINK_PCI_PCICFG_ADDR 0x00 @@ -66,7 +65,7 @@ #define PCIEPHY0_CFG 0x90 #define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7498 -#define RALINK_PCIE0_CLK_EN (1 << 26) +#define RALINK_PCIE0_CLK_EN BIT(26) #define BUSY 0x80000000 #define WAITRETRY_MAX 10 @@ -121,7 +120,7 @@ static int wait_pciephy_busy(void) else break; if (retry++ > WAITRETRY_MAX) { - printk(KERN_WARN "PCIE-PHY retry failed.\n"); + pr_warn("PCIE-PHY retry failed.\n"); return -1; } } @@ -361,7 +360,7 @@ static int mt7620_pci_probe(struct platform_device *pdev) return 0; } -int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { u16 cmd; u32 val; |