diff options
Diffstat (limited to 'arch/sh/mm/Kconfig')
| -rw-r--r-- | arch/sh/mm/Kconfig | 102 |
1 files changed, 33 insertions, 69 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 5c8a2ebfc720..f32a1963ff0c 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -4,6 +4,9 @@ menu "Memory management options" config MMU bool "Support for memory management hardware" depends on !CPU_SH2 + select HAVE_PAGE_SIZE_4KB + select HAVE_PAGE_SIZE_8KB if X2TLB + select HAVE_PAGE_SIZE_64KB if CPU_SH4 default y help Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to @@ -13,39 +16,43 @@ config MMU turning this off will boot the kernel on these machines with the MMU implicitly switched off. +config NOMMU + def_bool !MMU + select HAVE_PAGE_SIZE_4KB + select HAVE_PAGE_SIZE_8KB + select HAVE_PAGE_SIZE_16KB + select HAVE_PAGE_SIZE_64KB + help + On MMU-less systems, any of these page sizes can be selected + config PAGE_OFFSET hex - default "0x80000000" if MMU && SUPERH32 - default "0x20000000" if MMU && SUPERH64 + default "0x80000000" if MMU default "0x00000000" -config FORCE_MAX_ZONEORDER - int "Maximum zone order" - range 9 64 if PAGE_SIZE_16KB - default "9" if PAGE_SIZE_16KB - range 7 64 if PAGE_SIZE_64KB - default "7" if PAGE_SIZE_64KB - range 11 64 - default "14" if !MMU - default "11" +config ARCH_FORCE_MAX_ORDER + int "Order of maximal physically contiguous allocations" + default "8" if PAGE_SIZE_16KB + default "6" if PAGE_SIZE_64KB + default "13" if !MMU + default "10" help - The kernel memory allocator divides physically contiguous memory - blocks into "zones", where each zone is a power of two number of - pages. This option selects the largest power of two that the kernel - keeps in the memory allocator. If you need to allocate very large - blocks of physically contiguous memory, then you may need to - increase this value. - - This config option is actually maximum order plus one. For example, - a value of 11 means that the largest free memory block is 2^10 pages. + The kernel page allocator limits the size of maximal physically + contiguous allocations. The limit is called MAX_PAGE:_ORDER and it + defines the maximal power of two of number of pages that can be + allocated as a single contiguous block. This option allows + overriding the default setting when ability to allocate very + large blocks of physically contiguous memory is required. The page size is not necessarily 4KB. Keep this in mind when choosing a value for this option. + Don't change if unsure. + config MEMORY_START hex "Physical memory start address" default "0x08000000" - ---help--- + help Computers built with Hitachi SuperH processors always map the ROM starting at address zero. But the processor does not specify the range that RAM takes. @@ -72,12 +79,11 @@ config MEMORY_SIZE config 29BIT def_bool !32BIT - depends on SUPERH32 select UNCACHED_MAPPING config 32BIT bool - default y if CPU_SH5 || !MMU + default !MMU config PMB bool "Support 32-bit physical addressing through PMB" @@ -107,7 +113,7 @@ config VSYSCALL (the default value) say Y. config NUMA - bool "Non Uniform Memory Access (NUMA) Support" + bool "Non-Uniform Memory Access (NUMA) Support" depends on MMU && SYS_SUPPORTS_NUMA select ARCH_WANT_NUMA_VARIABLE_LOCALITY default n @@ -122,7 +128,7 @@ config NODES_SHIFT int default "3" if CPU_SUBTYPE_SHX3 default "1" - depends on NEED_MULTIPLE_NODES + depends on NUMA config ARCH_FLATMEM_ENABLE def_bool y @@ -138,21 +144,13 @@ config ARCH_SPARSEMEM_DEFAULT config ARCH_SELECT_MEMORY_MODEL def_bool y -config ARCH_ENABLE_MEMORY_HOTPLUG - def_bool y - depends on SPARSEMEM && MMU - -config ARCH_ENABLE_MEMORY_HOTREMOVE - def_bool y - depends on SPARSEMEM && MMU - config ARCH_MEMORY_PROBE def_bool y depends on MEMORY_HOTPLUG config IOREMAP_FIXED def_bool y - depends on X2TLB || SUPERH64 + depends on X2TLB config UNCACHED_MAPPING bool @@ -162,36 +160,6 @@ config HAVE_SRAM_POOL select GENERIC_ALLOCATOR choice - prompt "Kernel page size" - default PAGE_SIZE_4KB - -config PAGE_SIZE_4KB - bool "4kB" - help - This is the default page size used by all SuperH CPUs. - -config PAGE_SIZE_8KB - bool "8kB" - depends on !MMU || X2TLB - help - This enables 8kB pages as supported by SH-X2 and later MMUs. - -config PAGE_SIZE_16KB - bool "16kB" - depends on !MMU - help - This enables 16kB pages on MMU-less SH systems. - -config PAGE_SIZE_64KB - bool "64kB" - depends on !MMU || CPU_SH4 || CPU_SH5 - help - This enables support for 64kB pages, possible on all SH-4 - CPUs and later. - -endchoice - -choice prompt "HugeTLB page size" depends on HUGETLB_PAGE default HUGETLB_PAGE_SIZE_1MB if PAGE_SIZE_64KB @@ -216,10 +184,6 @@ config HUGETLB_PAGE_SIZE_64MB bool "64MB" depends on X2TLB -config HUGETLB_PAGE_SIZE_512MB - bool "512MB" - depends on CPU_SH5 - endchoice config SCHED_MC @@ -242,7 +206,7 @@ config SH7705_CACHE_32KB choice prompt "Cache mode" - default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5 + default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A) config CACHE_WRITEBACK |