diff options
Diffstat (limited to 'arch/xtensa/platforms/xtfpga/setup.c')
| -rw-r--r-- | arch/xtensa/platforms/xtfpga/setup.c | 34 |
1 files changed, 23 insertions, 11 deletions
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c index c79c1d09ea86..a2432f081710 100644 --- a/arch/xtensa/platforms/xtfpga/setup.c +++ b/arch/xtensa/platforms/xtfpga/setup.c @@ -33,23 +33,17 @@ #include <platform/lcd.h> #include <platform/hardware.h> -void platform_halt(void) -{ - lcd_disp_at_pos(" HALT ", 0); - local_irq_disable(); - while (1) - cpu_relax(); -} - -void platform_power_off(void) +static int xtfpga_power_off(struct sys_off_data *unused) { lcd_disp_at_pos("POWEROFF", 0); local_irq_disable(); while (1) cpu_relax(); + return NOTIFY_DONE; } -void platform_restart(void) +static int xtfpga_restart(struct notifier_block *this, + unsigned long event, void *ptr) { /* Try software reset first. */ WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead); @@ -58,9 +52,14 @@ void platform_restart(void) * simulate a processor reset, and jump to the reset vector. */ cpu_reset(); - /* control never gets here */ + + return NOTIFY_DONE; } +static struct notifier_block xtfpga_restart_block = { + .notifier_call = xtfpga_restart, +}; + #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT void __init platform_calibrate_ccount(void) @@ -70,6 +69,14 @@ void __init platform_calibrate_ccount(void) #endif +static void __init xtfpga_register_handlers(void) +{ + register_restart_handler(&xtfpga_restart_block); + register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, + SYS_OFF_PRIO_DEFAULT, + xtfpga_power_off, NULL); +} + #ifdef CONFIG_USE_OF static void __init xtfpga_clk_setup(struct device_node *np) @@ -134,6 +141,9 @@ static int __init machine_setup(void) if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) update_local_mac(eth); of_node_put(eth); + + xtfpga_register_handlers(); + return 0; } arch_initcall(machine_setup); @@ -281,6 +291,8 @@ static int __init xtavnet_init(void) pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR; + xtfpga_register_handlers(); + return 0; } |