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-rw-r--r--arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts4
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi13
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
index 95ae30d06554..3ee2508b20fb 100644
--- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
@@ -534,7 +534,7 @@
};
};
- sdhc_1: sdhci@f9824900 {
+ sdhci@f9824900 {
status = "okay";
vmmc-supply = <&pma8084_l20>;
@@ -547,7 +547,7 @@
pinctrl-0 = <&sdhc1_pin_a>;
};
- sdhc_2: sdhci@f9864900 {
+ sdhci@f9864900 {
status = "okay";
max-frequency = <100000000>;
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 636d68a6f603..49b22392fd5e 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -740,7 +740,7 @@
status = "disabled";
};
- sdhci@f9824900 {
+ sdhc_1: sdhci@f9824900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -751,10 +751,13 @@
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <8>;
+ non-removable;
+
status = "disabled";
};
- sdhci@f9864900 {
+ sdhc_3: sdhci@f9864900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -765,10 +768,12 @@
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <4>;
+
status = "disabled";
};
- sdhci@f98a4900 {
+ sdhc_2: sdhci@f98a4900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -779,6 +784,8 @@
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <4>;
+
status = "disabled";
};