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Diffstat (limited to 'drivers/clk/at91/clk-audio-pll.c')
-rw-r--r--drivers/clk/at91/clk-audio-pll.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c
index 3cc4a82f4e9f..a92da64c12e1 100644
--- a/drivers/clk/at91/clk-audio-pll.c
+++ b/drivers/clk/at91/clk-audio-pll.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2016 Atmel Corporation,
* Songjun Wu <songjun.wu@atmel.com>,
@@ -5,11 +6,6 @@
* Copyright (C) 2017 Free Electrons,
* Quentin Schulz <quentin.schulz@free-electrons.com>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
* The Sama5d2 SoC has two audio PLLs (PMC and PAD) that shares the same parent
* (FRAC). FRAC can output between 620 and 700MHz and only multiply the rate of
* its own parent. PMC and PAD can then divide the FRAC rate to best match the
@@ -32,7 +28,6 @@
* rate - rate is adjustable.
* clk->rate = parent->rate / (qdaudio * div))
* parent - fixed parent. No clk_set_parent support
- *
*/
#include <linux/clk.h>