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path: root/drivers/clk/st/clkgen-fsyn.c
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Diffstat (limited to 'drivers/clk/st/clkgen-fsyn.c')
-rw-r--r--drivers/clk/st/clkgen-fsyn.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index f1adc858b590..dd6062e043e0 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -172,10 +172,10 @@ static const struct clkgen_quadfs_data st_fs660c32_D = {
* ST quad channel frequency synthesizer block
*
* @hw: handle between common and hardware-specific interfaces.
- * @ndiv: regmap field for the ndiv control.
* @regs_base: base address of the configuration registers.
* @lock: spinlock.
- *
+ * @data: local driver data
+ * @ndiv: regmap field for the ndiv control.
*/
struct st_clk_quadfs_pll {
struct clk_hw hw;
@@ -426,7 +426,7 @@ static struct clk * __init st_clk_register_quadfs_pll(
* parent - fixed parent. No clk_set_parent support
*/
-/**
+/*
* struct st_clk_quadfs_fsynth - One clock output from a four channel digital
* frequency synthesizer (fsynth) block.
*