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path: root/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index 3e6f76096119..910c17fd4278 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -143,16 +143,18 @@ static void mpc3_power_on_ogam_lut(
{
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
- // Force power on
- REG_UPDATE(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_DIS, power_on == true ? 1:0);
- // Wait for confirmation when powering on
- if (power_on)
- REG_WAIT(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_STATE, 0, 10, 10);
- } else {
- REG_SET(MPCC_MEM_PWR_CTRL[mpcc_id], 0,
- MPCC_OGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
- }
+ /*
+ * Powering on: force memory active so the LUT can be updated.
+ * Powering off: allow entering memory low power mode
+ *
+ * Memory low power mode is controlled during MPC OGAM LUT init.
+ */
+ REG_UPDATE(MPCC_MEM_PWR_CTRL[mpcc_id],
+ MPCC_OGAM_MEM_PWR_DIS, power_on != 0);
+
+ /* Wait for memory to be powered on - we won't be able to write to it otherwise. */
+ if (power_on)
+ REG_WAIT(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_STATE, 0, 10, 10);
}
static void mpc3_configure_ogam_lut(
@@ -355,7 +357,7 @@ void mpc3_set_output_gamma(
next_mode = LUT_RAM_A;
mpc3_power_on_ogam_lut(mpc, mpcc_id, true);
- mpc3_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A ? true:false);
+ mpc3_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A);
if (next_mode == LUT_RAM_A)
mpc3_program_luta(mpc, mpcc_id, params);
@@ -1427,7 +1429,7 @@ const struct mpc_funcs dcn30_mpc_funcs = {
.acquire_rmu = mpcc3_acquire_rmu,
.program_3dlut = mpc3_program_3dlut,
.release_rmu = mpcc3_release_rmu,
- .power_on_mpc_mem_pwr = mpc20_power_on_ogam_lut,
+ .power_on_mpc_mem_pwr = mpc3_power_on_ogam_lut,
.get_mpc_out_mux = mpc1_get_mpc_out_mux,
};