diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c index d1249fe1e412..3b1c6603ae0c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c @@ -1218,3 +1218,35 @@ bool dcn32_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx) return true; return false; } + +void dcn32_update_phy_state(struct dc_state *state, struct pipe_ctx *pipe_ctx, + enum phy_state target_state) +{ + enum phy_state current_state = pipe_ctx->stream->link->phy_state; + + if (current_state == target_state) { + BREAK_TO_DEBUGGER(); + return; + } + + if (target_state == TX_OFF_SYMCLK_OFF) { + core_link_disable_stream(pipe_ctx); + pipe_ctx->stream->link->phy_state = TX_OFF_SYMCLK_OFF; + } else if (target_state == TX_ON_SYMCLK_ON) { + core_link_enable_stream(state, pipe_ctx); + pipe_ctx->stream->link->phy_state = TX_ON_SYMCLK_ON; + } else if (target_state == TX_OFF_SYMCLK_ON) { + if (current_state == TX_ON_SYMCLK_ON) { + core_link_disable_stream(pipe_ctx); + pipe_ctx->stream->link->phy_state = TX_OFF_SYMCLK_OFF; + } + + pipe_ctx->clock_source->funcs->program_pix_clk( + pipe_ctx->clock_source, + &pipe_ctx->stream_res.pix_clk_params, + dp_get_link_encoding_format(&pipe_ctx->link_config.dp_link_settings), + &pipe_ctx->pll_settings); + pipe_ctx->stream->link->phy_state = TX_OFF_SYMCLK_ON; + } else + BREAK_TO_DEBUGGER(); +} |