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path: root/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index ece806a63d8d..34737d60b965 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -648,18 +648,10 @@ bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)
// TODO: review other cases when idle optimization is allowed
- if (!enable) {
- // Tell PMFW to exit low power state
- if (dc->clk_mgr->funcs->exit_low_power_state)
- dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
-
- dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true);
- }
-
- dc_dmub_srv_notify_idle(dc, enable);
-
if (!enable)
- dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true);
+ dc_dmub_srv_exit_low_power_state(dc);
+ else
+ dc_dmub_srv_notify_idle(dc, enable);
return true;
}
@@ -1193,3 +1185,19 @@ void dcn35_optimize_bandwidth(
dc->hwss.root_clock_control(dc, &pg_update_state, false);
}
}
+
+void dcn35_set_idle_state(const struct dc *dc, bool allow_idle)
+{
+ // TODO: Find a more suitable communcation
+ if (dc->clk_mgr->funcs->set_idle_state)
+ dc->clk_mgr->funcs->set_idle_state(dc->clk_mgr, allow_idle);
+}
+
+uint32_t dcn35_get_idle_state(const struct dc *dc)
+{
+ // TODO: Find a more suitable communcation
+ if (dc->clk_mgr->funcs->get_idle_state)
+ return dc->clk_mgr->funcs->get_idle_state(dc->clk_mgr);
+
+ return 0;
+}