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path: root/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
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Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c60
1 files changed, 27 insertions, 33 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
index 2b0c53fe4c8d..ae2e9339dd6b 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
@@ -79,6 +79,11 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
bool enabled;
PHM_FUNC_CHECK(hwmgr);
+ if (smum_is_dpm_running(hwmgr)) {
+ pr_info("dpm has been enabled\n");
+ return 0;
+ }
+
if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable)
ret = hwmgr->hwmgr_func->dynamic_state_management_enable(hwmgr);
@@ -96,6 +101,11 @@ int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr)
PHM_FUNC_CHECK(hwmgr);
+ if (!smum_is_dpm_running(hwmgr)) {
+ pr_info("dpm has been disabled\n");
+ return 0;
+ }
+
if (hwmgr->hwmgr_func->dynamic_state_management_disable)
ret = hwmgr->hwmgr_func->dynamic_state_management_disable(hwmgr);
@@ -118,23 +128,6 @@ int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level
return ret;
}
-int phm_reset_power_profile_state(struct pp_hwmgr *hwmgr)
-{
- int ret = 0;
-
- if (hwmgr->hwmgr_func->set_power_profile_state) {
- if (hwmgr->current_power_profile == AMD_PP_GFX_PROFILE)
- ret = hwmgr->hwmgr_func->set_power_profile_state(
- hwmgr,
- &hwmgr->gfx_power_profile);
- else if (hwmgr->current_power_profile == AMD_PP_COMPUTE_PROFILE)
- ret = hwmgr->hwmgr_func->set_power_profile_state(
- hwmgr,
- &hwmgr->compute_power_profile);
- }
- return ret;
-}
-
int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
struct pp_power_state *adjusted_ps,
const struct pp_power_state *current_ps)
@@ -209,12 +202,12 @@ int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr)
return hwmgr->hwmgr_func->stop_thermal_controller(hwmgr);
}
-int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info)
+int phm_register_irq_handlers(struct pp_hwmgr *hwmgr)
{
PHM_FUNC_CHECK(hwmgr);
- if (hwmgr->hwmgr_func->register_internal_thermal_interrupt != NULL)
- return hwmgr->hwmgr_func->register_internal_thermal_interrupt(hwmgr, info);
+ if (hwmgr->hwmgr_func->register_irq_handlers != NULL)
+ return hwmgr->hwmgr_func->register_irq_handlers(hwmgr);
return 0;
}
@@ -223,26 +216,27 @@ int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info)
* Initializes the thermal controller subsystem.
*
* @param pHwMgr the address of the powerplay hardware manager.
-* @param pTemperatureRange the address of the structure holding the temperature range.
* @exception PP_Result_Failed if any of the paramters is NULL, otherwise the return value from the dispatcher.
*/
-int phm_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *temperature_range)
+int phm_start_thermal_controller(struct pp_hwmgr *hwmgr)
{
- struct PP_TemperatureRange range;
-
- if (temperature_range == NULL) {
- range.max = TEMP_RANGE_MAX;
- range.min = TEMP_RANGE_MIN;
- } else {
- range.max = temperature_range->max;
- range.min = temperature_range->min;
- }
+ int ret = 0;
+ struct PP_TemperatureRange range = {TEMP_RANGE_MIN, TEMP_RANGE_MAX};
+ struct amdgpu_device *adev = hwmgr->adev;
+
+ if (hwmgr->hwmgr_func->get_thermal_temperature_range)
+ hwmgr->hwmgr_func->get_thermal_temperature_range(
+ hwmgr, &range);
+
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_ThermalController)
&& hwmgr->hwmgr_func->start_thermal_controller != NULL)
- return hwmgr->hwmgr_func->start_thermal_controller(hwmgr, &range);
+ ret = hwmgr->hwmgr_func->start_thermal_controller(hwmgr, &range);
- return 0;
+ adev->pm.dpm.thermal.min_temp = range.min;
+ adev->pm.dpm.thermal.max_temp = range.max;
+
+ return ret;
}