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path: root/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
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Diffstat (limited to 'drivers/gpu/drm/etnaviv/etnaviv_gpu.h')
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gpu.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 197e0037732e..5cb46c84e03a 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -11,6 +11,7 @@
#include "etnaviv_mmu.h"
#include "etnaviv_drv.h"
#include "common.xml.h"
+#include "state.xml.h"
struct etnaviv_gem_submit;
struct etnaviv_vram_mapping;
@@ -92,6 +93,7 @@ struct etnaviv_event {
struct etnaviv_cmdbuf_suballoc;
struct regulator;
struct clk;
+struct reset_control;
#define ETNA_NR_EVENTS 30
@@ -143,6 +145,7 @@ struct etnaviv_gpu {
/* hang detection */
u32 hangcheck_dma_addr;
+ u32 hangcheck_primid;
u32 hangcheck_fence;
void __iomem *mmio;
@@ -156,6 +159,7 @@ struct etnaviv_gpu {
struct clk *clk_reg;
struct clk *clk_core;
struct clk *clk_shader;
+ struct reset_control *rst;
unsigned int freq_scale;
unsigned int fe_waitcycles;
@@ -170,6 +174,13 @@ static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data)
static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg)
{
+ /* On some variants, such as the GC7000r6009, some FE registers
+ * need two reads to be consistent. Do that extra read here and
+ * throw away the result.
+ */
+ if (reg >= VIVS_FE_DMA_STATUS && reg <= VIVS_FE_AUTO_FLUSH)
+ readl(gpu->mmio + reg);
+
return readl(gpu->mmio + reg);
}