diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 33 |
1 files changed, 20 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index 04e6810954b2..dd4796a61751 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -29,6 +29,10 @@ #include "intel_wakeref.h" +#define for_each_shared_dpll(__i915, __pll, __i) \ + for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \ + ((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++) + enum tc_port; struct drm_i915_private; struct intel_atomic_state; @@ -262,8 +266,7 @@ struct dpll_info { const struct intel_shared_dpll_funcs *funcs; /** - * @id: unique indentifier for this DPLL; should match the index in the - * dev_priv->shared_dplls array + * @id: unique indentifier for this DPLL */ enum intel_dpll_id id; @@ -291,6 +294,11 @@ struct intel_shared_dpll { struct intel_shared_dpll_state state; /** + * @index: index for atomic state + */ + u8 index; + + /** * @active_mask: mask of active pipes (i.e. DPMS on) using this DPLL */ u8 active_mask; @@ -319,9 +327,9 @@ struct intel_shared_dpll { /* shared dpll functions */ struct intel_shared_dpll * -intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv, +intel_get_shared_dpll_by_id(struct drm_i915_private *i915, enum intel_dpll_id id); -void assert_shared_dpll(struct drm_i915_private *dev_priv, +void assert_shared_dpll(struct drm_i915_private *i915, struct intel_shared_dpll *pll, bool state); #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true) @@ -351,19 +359,18 @@ bool intel_dpll_get_hw_state(struct drm_i915_private *i915, void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_shared_dpll_swap_state(struct intel_atomic_state *state); -void intel_shared_dpll_init(struct drm_i915_private *dev_priv); -void intel_dpll_update_ref_clks(struct drm_i915_private *dev_priv); -void intel_dpll_readout_hw_state(struct drm_i915_private *dev_priv); -void intel_dpll_sanitize_state(struct drm_i915_private *dev_priv); +void intel_shared_dpll_init(struct drm_i915_private *i915); +void intel_dpll_update_ref_clks(struct drm_i915_private *i915); +void intel_dpll_readout_hw_state(struct drm_i915_private *i915); +void intel_dpll_sanitize_state(struct drm_i915_private *i915); -void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv, +void intel_dpll_dump_hw_state(struct drm_i915_private *i915, const struct intel_dpll_hw_state *hw_state); enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port); bool intel_dpll_is_combophy(enum intel_dpll_id id); -void intel_shared_dpll_state_verify(struct intel_crtc *crtc, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state); -void intel_shared_dpll_verify_disabled(struct drm_i915_private *i915); +void intel_shared_dpll_state_verify(struct intel_atomic_state *state, + struct intel_crtc *crtc); +void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state); #endif /* _INTEL_DPLL_MGR_H_ */ |