diff options
Diffstat (limited to 'drivers/i2c')
22 files changed, 563 insertions, 191 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 8adc0f1d7ad0..144cbadc7c72 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -933,6 +933,7 @@ config I2C_TEGRA config I2C_TEGRA_BPMP tristate "NVIDIA Tegra BPMP I2C controller" depends on TEGRA_BPMP + default y help If you say yes to this option, support will be included for the I2C controller embedded in NVIDIA Tegra SoCs accessed via the BPMP. @@ -1021,7 +1022,7 @@ config I2C_XLR config I2C_XLP9XX tristate "XLP9XX I2C support" - depends on CPU_XLP || ARCH_VULCAN || COMPILE_TEST + depends on CPU_XLP || ARCH_THUNDER2 || COMPILE_TEST help This driver enables support for the on-chip I2C interface of the Broadcom XLP9xx/XLP5xx MIPS and Vulcan ARM64 processors. diff --git a/drivers/i2c/busses/i2c-designware-baytrail.c b/drivers/i2c/busses/i2c-designware-baytrail.c index 1590ad0a8081..1ac042972020 100644 --- a/drivers/i2c/busses/i2c-designware-baytrail.c +++ b/drivers/i2c/busses/i2c-designware-baytrail.c @@ -16,26 +16,37 @@ #include <linux/acpi.h> #include <linux/i2c.h> #include <linux/interrupt.h> +#include <linux/pm_qos.h> #include <asm/iosf_mbi.h> #include "i2c-designware-core.h" -#define SEMAPHORE_TIMEOUT 100 +#define SEMAPHORE_TIMEOUT 500 #define PUNIT_SEMAPHORE 0x7 +#define PUNIT_SEMAPHORE_CHT 0x10e #define PUNIT_SEMAPHORE_BIT BIT(0) #define PUNIT_SEMAPHORE_ACQUIRE BIT(1) static unsigned long acquired; -static int get_sem(struct device *dev, u32 *sem) +static u32 get_sem_addr(struct dw_i2c_dev *dev) { + if (dev->flags & MODEL_CHERRYTRAIL) + return PUNIT_SEMAPHORE_CHT; + else + return PUNIT_SEMAPHORE; +} + +static int get_sem(struct dw_i2c_dev *dev, u32 *sem) +{ + u32 addr = get_sem_addr(dev); u32 data; int ret; - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data); + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &data); if (ret) { - dev_err(dev, "iosf failed to read punit semaphore\n"); + dev_err(dev->dev, "iosf failed to read punit semaphore\n"); return ret; } @@ -44,22 +55,22 @@ static int get_sem(struct device *dev, u32 *sem) return 0; } -static void reset_semaphore(struct device *dev) +static void reset_semaphore(struct dw_i2c_dev *dev) { - u32 data; + if (iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, get_sem_addr(dev), + 0, PUNIT_SEMAPHORE_BIT)) + dev_err(dev->dev, "iosf failed to reset punit semaphore during write\n"); - if (iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data)) { - dev_err(dev, "iosf failed to reset punit semaphore during read\n"); - return; - } + pm_qos_update_request(&dev->pm_qos, PM_QOS_DEFAULT_VALUE); - data &= ~PUNIT_SEMAPHORE_BIT; - if (iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, data)) - dev_err(dev, "iosf failed to reset punit semaphore during write\n"); + iosf_mbi_call_pmic_bus_access_notifier_chain(MBI_PMIC_BUS_ACCESS_END, + NULL); + iosf_mbi_punit_release(); } static int baytrail_i2c_acquire(struct dw_i2c_dev *dev) { + u32 addr = get_sem_addr(dev); u32 sem = PUNIT_SEMAPHORE_ACQUIRE; int ret; unsigned long start, end; @@ -72,18 +83,29 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev) if (!dev->release_lock) return 0; + iosf_mbi_punit_acquire(); + iosf_mbi_call_pmic_bus_access_notifier_chain(MBI_PMIC_BUS_ACCESS_BEGIN, + NULL); + + /* + * Disallow the CPU to enter C6 or C7 state, entering these states + * requires the punit to talk to the pmic and if this happens while + * we're holding the semaphore, the SoC hangs. + */ + pm_qos_update_request(&dev->pm_qos, 0); + /* host driver writes to side band semaphore register */ - ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, sem); + ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, addr, sem); if (ret) { dev_err(dev->dev, "iosf punit semaphore request failed\n"); - return ret; + goto out; } /* host driver waits for bit 0 to be set in semaphore register */ start = jiffies; end = start + msecs_to_jiffies(SEMAPHORE_TIMEOUT); do { - ret = get_sem(dev->dev, &sem); + ret = get_sem(dev, &sem); if (!ret && sem) { acquired = jiffies; dev_dbg(dev->dev, "punit semaphore acquired after %ums\n", @@ -95,9 +117,10 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev) } while (time_before(jiffies, end)); dev_err(dev->dev, "punit semaphore timed out, resetting\n"); - reset_semaphore(dev->dev); +out: + reset_semaphore(dev); - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &sem); + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &sem); if (ret) dev_err(dev->dev, "iosf failed to read punit semaphore\n"); else @@ -116,12 +139,12 @@ static void baytrail_i2c_release(struct dw_i2c_dev *dev) if (!dev->acquire_lock) return; - reset_semaphore(dev->dev); + reset_semaphore(dev); dev_dbg(dev->dev, "punit semaphore held for %ums\n", jiffies_to_msecs(jiffies - acquired)); } -int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) +int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) { acpi_status status; unsigned long long shared_host = 0; @@ -138,15 +161,25 @@ int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) if (ACPI_FAILURE(status)) return 0; - if (shared_host) { - dev_info(dev->dev, "I2C bus managed by PUNIT\n"); - dev->acquire_lock = baytrail_i2c_acquire; - dev->release_lock = baytrail_i2c_release; - dev->pm_runtime_disabled = true; - } + if (!shared_host) + return 0; if (!iosf_mbi_available()) return -EPROBE_DEFER; + dev_info(dev->dev, "I2C bus managed by PUNIT\n"); + dev->acquire_lock = baytrail_i2c_acquire; + dev->release_lock = baytrail_i2c_release; + dev->pm_disabled = true; + + pm_qos_add_request(&dev->pm_qos, PM_QOS_CPU_DMA_LATENCY, + PM_QOS_DEFAULT_VALUE); + return 0; } + +void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev) +{ + if (dev->acquire_lock) + pm_qos_remove_request(&dev->pm_qos); +} diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 7a3faa551cf8..c453717b753b 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -177,13 +177,13 @@ static u32 dw_readl(struct dw_i2c_dev *dev, int offset) { u32 value; - if (dev->accessor_flags & ACCESS_16BIT) + if (dev->flags & ACCESS_16BIT) value = readw_relaxed(dev->base + offset) | (readw_relaxed(dev->base + offset + 2) << 16); else value = readl_relaxed(dev->base + offset); - if (dev->accessor_flags & ACCESS_SWAP) + if (dev->flags & ACCESS_SWAP) return swab32(value); else return value; @@ -191,10 +191,10 @@ static u32 dw_readl(struct dw_i2c_dev *dev, int offset) static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) { - if (dev->accessor_flags & ACCESS_SWAP) + if (dev->flags & ACCESS_SWAP) b = swab32(b); - if (dev->accessor_flags & ACCESS_16BIT) { + if (dev->flags & ACCESS_16BIT) { writew_relaxed((u16)b, dev->base + offset); writew_relaxed((u16)(b >> 16), dev->base + offset + 2); } else { @@ -339,10 +339,10 @@ int i2c_dw_init(struct dw_i2c_dev *dev) reg = dw_readl(dev, DW_IC_COMP_TYPE); if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { /* Configure register endianess access */ - dev->accessor_flags |= ACCESS_SWAP; + dev->flags |= ACCESS_SWAP; } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) { /* Configure register access mode 16bit */ - dev->accessor_flags |= ACCESS_16BIT; + dev->flags |= ACCESS_16BIT; } else if (reg != DW_IC_COMP_TYPE_VALUE) { dev_err(dev->dev, "Unknown Synopsys component type: " "0x%08x\n", reg); @@ -924,7 +924,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) tx_aborted: if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) complete(&dev->cmd_complete); - else if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) { + else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { /* workaround to trigger pending interrupt */ stat = dw_readl(dev, DW_IC_INTR_MASK); i2c_dw_disable_int(dev); @@ -960,6 +960,7 @@ EXPORT_SYMBOL_GPL(i2c_dw_read_comp_param); int i2c_dw_probe(struct dw_i2c_dev *dev) { struct i2c_adapter *adap = &dev->adapter; + unsigned long irq_flags; int r; init_completion(&dev->cmd_complete); @@ -975,9 +976,15 @@ int i2c_dw_probe(struct dw_i2c_dev *dev) adap->dev.parent = dev->dev; i2c_set_adapdata(adap, dev); + if (dev->pm_disabled) { + dev_pm_syscore_device(dev->dev, true); + irq_flags = IRQF_NO_SUSPEND; + } else { + irq_flags = IRQF_SHARED | IRQF_COND_SUSPEND; + } + i2c_dw_disable_int(dev); - r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, - IRQF_SHARED | IRQF_COND_SUSPEND, + r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags, dev_name(dev->dev), dev); if (r) { dev_err(dev->dev, "failure requesting irq %i: %d\n", diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index d9aaf1790e0e..a7cf429daf60 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -23,6 +23,7 @@ */ #include <linux/i2c.h> +#include <linux/pm_qos.h> #define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \ I2C_FUNC_SMBUS_BYTE | \ @@ -75,9 +76,10 @@ * @fp_lcnt: fast plus LCNT value * @hs_hcnt: high speed HCNT value * @hs_lcnt: high speed LCNT value + * @pm_qos: pm_qos_request used while holding a hardware lock on the bus * @acquire_lock: function to acquire a hardware lock on the bus * @release_lock: function to release a hardware lock on the bus - * @pm_runtime_disabled: true if pm runtime is disabled + * @pm_disabled: true if power-management should be disabled for this i2c-bus * * HCNT and LCNT parameters can be used if the platform knows more accurate * values than the one computed based only on the input clock frequency. @@ -104,7 +106,7 @@ struct dw_i2c_dev { unsigned int status; u32 abort_source; int irq; - u32 accessor_flags; + u32 flags; struct i2c_adapter adapter; u32 functionality; u32 master_cfg; @@ -123,15 +125,18 @@ struct dw_i2c_dev { u16 fp_lcnt; u16 hs_hcnt; u16 hs_lcnt; + struct pm_qos_request pm_qos; int (*acquire_lock)(struct dw_i2c_dev *dev); void (*release_lock)(struct dw_i2c_dev *dev); - bool pm_runtime_disabled; + bool pm_disabled; }; #define ACCESS_SWAP 0x00000001 #define ACCESS_16BIT 0x00000002 #define ACCESS_INTR_MASK 0x00000004 +#define MODEL_CHERRYTRAIL 0x00000100 + extern int i2c_dw_init(struct dw_i2c_dev *dev); extern void i2c_dw_disable(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); @@ -139,7 +144,9 @@ extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); extern int i2c_dw_probe(struct dw_i2c_dev *dev); #if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL) -extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev); +extern int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev); +extern void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev); #else -static inline int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) { return 0; } +static inline int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) { return 0; } +static inline void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev) {} #endif diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index d6423cfac588..ed485b69b449 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -45,6 +45,7 @@ enum dw_pci_ctl_id_t { medfield, merrifield, baytrail, + cherrytrail, haswell, }; @@ -63,6 +64,7 @@ struct dw_pci_controller { u32 rx_fifo_depth; u32 clk_khz; u32 functionality; + u32 flags; struct dw_scl_sda_cfg *scl_sda_cfg; int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); }; @@ -170,6 +172,15 @@ static struct dw_pci_controller dw_pci_controllers[] = { .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &hsw_config, }, + [cherrytrail] = { + .bus_num = -1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .functionality = I2C_FUNC_10BIT_ADDR, + .flags = MODEL_CHERRYTRAIL, + .scl_sda_cfg = &byt_config, + }, }; #ifdef CONFIG_PM @@ -237,6 +248,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, dev->base = pcim_iomap_table(pdev)[0]; dev->dev = &pdev->dev; dev->irq = pdev->irq; + dev->flags |= controller->flags; if (controller->setup) { r = controller->setup(pdev, controller); @@ -317,13 +329,13 @@ static const struct pci_device_id i2_designware_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x9c61), haswell }, { PCI_VDEVICE(INTEL, 0x9c62), haswell }, /* Braswell / Cherrytrail */ - { PCI_VDEVICE(INTEL, 0x22C1), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C2), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C3), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C4), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C5), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C6), baytrail }, - { PCI_VDEVICE(INTEL, 0x22C7), baytrail }, + { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail }, { 0,} }; MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 79c4b4ea0539..a597ba32de7e 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -95,7 +95,10 @@ static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], static int dw_i2c_acpi_configure(struct platform_device *pdev) { struct dw_i2c_dev *dev = platform_get_drvdata(pdev); + acpi_handle handle = ACPI_HANDLE(&pdev->dev); const struct acpi_device_id *id; + struct acpi_device *adev; + const char *uid; dev->adapter.nr = -1; dev->tx_fifo_depth = 32; @@ -113,7 +116,19 @@ static int dw_i2c_acpi_configure(struct platform_device *pdev) id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); if (id && id->driver_data) - dev->accessor_flags |= (u32)id->driver_data; + dev->flags |= (u32)id->driver_data; + + if (acpi_bus_get_device(handle, &adev)) + return -ENODEV; + + /* + * Cherrytrail I2C7 gets used for the PMIC which gets accessed + * through ACPI opregions during late suspend / early resume + * disable pm for it. + */ + uid = adev->pnp.unique_id; + if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7")) + dev->pm_disabled = true; return 0; } @@ -124,7 +139,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = { { "INT3432", 0 }, { "INT3433", 0 }, { "80860F41", 0 }, - { "808622C1", 0 }, + { "808622C1", MODEL_CHERRYTRAIL }, { "AMD0010", ACCESS_INTR_MASK }, { "AMDI0010", ACCESS_INTR_MASK }, { "AMDI0510", 0 }, @@ -248,7 +263,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) goto exit_reset; } - r = i2c_dw_eval_lock_support(dev); + r = i2c_dw_probe_lock_support(dev); if (r) goto exit_reset; @@ -286,7 +301,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); adap->dev.of_node = pdev->dev.of_node; - if (dev->pm_runtime_disabled) { + if (dev->pm_disabled) { pm_runtime_forbid(&pdev->dev); } else { pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); @@ -302,7 +317,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) return r; exit_probe: - if (!dev->pm_runtime_disabled) + if (!dev->pm_disabled) pm_runtime_disable(&pdev->dev); exit_reset: if (!IS_ERR_OR_NULL(dev->rst)) @@ -322,11 +337,13 @@ static int dw_i2c_plat_remove(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(&pdev->dev); pm_runtime_put_sync(&pdev->dev); - if (!dev->pm_runtime_disabled) + if (!dev->pm_disabled) pm_runtime_disable(&pdev->dev); if (!IS_ERR_OR_NULL(dev->rst)) reset_control_assert(dev->rst); + i2c_dw_remove_lock_support(dev); + return 0; } @@ -372,9 +389,7 @@ static int dw_i2c_plat_resume(struct device *dev) struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); i2c_dw_plat_prepare_clk(i_dev, true); - - if (!i_dev->pm_runtime_disabled) - i2c_dw_init(i_dev); + i2c_dw_init(i_dev); return 0; } diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index db8e8b40569d..84fb35f6837f 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -1362,9 +1362,8 @@ static int img_i2c_probe(struct platform_device *pdev) } /* Set up the exception check timer */ - init_timer(&i2c->check_timer); - i2c->check_timer.function = img_i2c_check_timer; - i2c->check_timer.data = (unsigned long)i2c; + setup_timer(&i2c->check_timer, img_i2c_check_timer, + (unsigned long)i2c); i2c->bitrate = timings[0].max_bitrate; if (!of_property_read_u32(node, "clock-frequency", &val)) diff --git a/drivers/i2c/busses/i2c-meson.c b/drivers/i2c/busses/i2c-meson.c index 73b97c71a484..88d15b92ec35 100644 --- a/drivers/i2c/busses/i2c-meson.c +++ b/drivers/i2c/busses/i2c-meson.c @@ -35,10 +35,11 @@ #define REG_CTRL_STATUS BIT(2) #define REG_CTRL_ERROR BIT(3) #define REG_CTRL_CLKDIV_SHIFT 12 -#define REG_CTRL_CLKDIV_MASK ((BIT(10) - 1) << REG_CTRL_CLKDIV_SHIFT) +#define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) +#define REG_CTRL_CLKDIVEXT_SHIFT 28 +#define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) #define I2C_TIMEOUT_MS 500 -#define DEFAULT_FREQ 100000 enum { TOKEN_END = 0, @@ -54,7 +55,6 @@ enum { STATE_IDLE, STATE_READ, STATE_WRITE, - STATE_STOP, }; /** @@ -73,7 +73,6 @@ enum { * @error: Flag set when an error is received * @lock: To avoid race conditions between irq handler and xfer code * @done: Completion used to wait for transfer termination - * @frequency: Operating frequency of I2C bus clock * @tokens: Sequence of tokens to be written to the device * @num_tokens: Number of tokens */ @@ -82,7 +81,6 @@ struct meson_i2c { struct device *dev; void __iomem *regs; struct clk *clk; - int irq; struct i2c_msg *msg; int state; @@ -93,7 +91,6 @@ struct meson_i2c { spinlock_t lock; struct completion done; - unsigned int frequency; u32 tokens[2]; int num_tokens; }; @@ -126,23 +123,27 @@ static void meson_i2c_add_token(struct meson_i2c *i2c, int token) i2c->num_tokens++; } -static void meson_i2c_write_tokens(struct meson_i2c *i2c) -{ - writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0); - writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1); -} - -static void meson_i2c_set_clk_div(struct meson_i2c *i2c) +static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq) { unsigned long clk_rate = clk_get_rate(i2c->clk); unsigned int div; - div = DIV_ROUND_UP(clk_rate, i2c->frequency * 4); + div = DIV_ROUND_UP(clk_rate, freq * 4); + + /* clock divider has 12 bits */ + if (div >= (1 << 12)) { + dev_err(i2c->dev, "requested bus frequency too low\n"); + div = (1 << 12) - 1; + } + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, - div << REG_CTRL_CLKDIV_SHIFT); + (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); + + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, + (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__, - clk_rate, i2c->frequency, div); + clk_rate, freq, div); } static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len) @@ -156,10 +157,10 @@ static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len) dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__, rdata0, rdata1, len); - for (i = 0; i < min_t(int, 4, len); i++) + for (i = 0; i < min(4, len); i++) *buf++ = (rdata0 >> i * 8) & 0xff; - for (i = 4; i < min_t(int, 8, len); i++) + for (i = 4; i < min(8, len); i++) *buf++ = (rdata1 >> (i - 4) * 8) & 0xff; } @@ -168,10 +169,10 @@ static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len) u32 wdata0 = 0, wdata1 = 0; int i; - for (i = 0; i < min_t(int, 4, len); i++) + for (i = 0; i < min(4, len); i++) wdata0 |= *buf++ << (i * 8); - for (i = 4; i < min_t(int, 8, len); i++) + for (i = 4; i < min(8, len); i++) wdata1 |= *buf++ << ((i - 4) * 8); writel(wdata0, i2c->regs + REG_TOK_WDATA0); @@ -186,7 +187,7 @@ static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) bool write = !(i2c->msg->flags & I2C_M_RD); int i; - i2c->count = min_t(int, i2c->msg->len - i2c->pos, 8); + i2c->count = min(i2c->msg->len - i2c->pos, 8); for (i = 0; i < i2c->count - 1; i++) meson_i2c_add_token(i2c, TOKEN_DATA); @@ -200,19 +201,12 @@ static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) if (write) meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); -} - -static void meson_i2c_stop(struct meson_i2c *i2c) -{ - dev_dbg(i2c->dev, "%s: last %d\n", __func__, i2c->last); - if (i2c->last) { - i2c->state = STATE_STOP; + if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) meson_i2c_add_token(i2c, TOKEN_STOP); - } else { - i2c->state = STATE_IDLE; - complete(&i2c->done); - } + + writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0); + writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1); } static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) @@ -223,12 +217,18 @@ static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) spin_lock(&i2c->lock); meson_i2c_reset_tokens(i2c); + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); ctrl = readl(i2c->regs + REG_CTRL); dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n", i2c->state, i2c->pos, i2c->count, ctrl); - if (ctrl & REG_CTRL_ERROR && i2c->state != STATE_IDLE) { + if (i2c->state == STATE_IDLE) { + spin_unlock(&i2c->lock); + return IRQ_NONE; + } + + if (ctrl & REG_CTRL_ERROR) { /* * The bit is set when the IGNORE_NAK bit is cleared * and the device didn't respond. In this case, the @@ -242,48 +242,21 @@ static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) goto out; } - switch (i2c->state) { - case STATE_READ: - if (i2c->count > 0) { - meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, - i2c->count); - i2c->pos += i2c->count; - } - - if (i2c->pos >= i2c->msg->len) { - meson_i2c_stop(i2c); - break; - } - - meson_i2c_prepare_xfer(i2c); - break; - case STATE_WRITE: - i2c->pos += i2c->count; + if (i2c->state == STATE_READ && i2c->count) + meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); - if (i2c->pos >= i2c->msg->len) { - meson_i2c_stop(i2c); - break; - } + i2c->pos += i2c->count; - meson_i2c_prepare_xfer(i2c); - break; - case STATE_STOP: + if (i2c->pos >= i2c->msg->len) { i2c->state = STATE_IDLE; complete(&i2c->done); - break; - case STATE_IDLE: - break; + goto out; } + /* Restart the processing */ + meson_i2c_prepare_xfer(i2c); + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); out: - if (i2c->state != STATE_IDLE) { - /* Restart the processing */ - meson_i2c_write_tokens(i2c); - meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); - meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, - REG_CTRL_START); - } - spin_unlock(&i2c->lock); return IRQ_HANDLED; @@ -323,7 +296,6 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; meson_i2c_prepare_xfer(i2c); - meson_i2c_write_tokens(i2c); reinit_completion(&i2c->done); /* Start the transfer */ @@ -359,21 +331,19 @@ static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { struct meson_i2c *i2c = adap->algo_data; - int i, ret = 0, count = 0; + int i, ret = 0; clk_enable(i2c->clk); - meson_i2c_set_clk_div(i2c); for (i = 0; i < num; i++) { ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1); if (ret) break; - count++; } clk_disable(i2c->clk); - return ret ? ret : count; + return ret ?: i; } static u32 meson_i2c_func(struct i2c_adapter *adap) @@ -391,15 +361,14 @@ static int meson_i2c_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct meson_i2c *i2c; struct resource *mem; - int ret = 0; + struct i2c_timings timings; + int irq, ret = 0; i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL); if (!i2c) return -ENOMEM; - if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", - &i2c->frequency)) - i2c->frequency = DEFAULT_FREQ; + i2c_parse_fw_timings(&pdev->dev, &timings, true); i2c->dev = &pdev->dev; platform_set_drvdata(pdev, i2c); @@ -418,14 +387,13 @@ static int meson_i2c_probe(struct platform_device *pdev) if (IS_ERR(i2c->regs)) return PTR_ERR(i2c->regs); - i2c->irq = platform_get_irq(pdev, 0); - if (i2c->irq < 0) { + irq = platform_get_irq(pdev, 0); + if (irq < 0) { dev_err(&pdev->dev, "can't find IRQ\n"); - return i2c->irq; + return irq; } - ret = devm_request_irq(&pdev->dev, i2c->irq, meson_i2c_irq, - 0, dev_name(&pdev->dev), i2c); + ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c); if (ret < 0) { dev_err(&pdev->dev, "can't request IRQ\n"); return ret; @@ -457,6 +425,8 @@ static int meson_i2c_probe(struct platform_device *pdev) return ret; } + meson_i2c_set_clk_div(i2c, timings.bus_freq_hz); + return 0; } diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index a50bd6891e27..cf737ec8563b 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -823,13 +823,10 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, drv_data->rstc = devm_reset_control_get_optional(dev, NULL); if (IS_ERR(drv_data->rstc)) { - if (PTR_ERR(drv_data->rstc) == -EPROBE_DEFER) { - rc = -EPROBE_DEFER; - goto out; - } - } else { - reset_control_deassert(drv_data->rstc); + rc = PTR_ERR(drv_data->rstc); + goto out; } + reset_control_deassert(drv_data->rstc); /* Its not yet defined how timeouts will be specified in device tree. * So hard code the value to 1 second. @@ -951,8 +948,7 @@ mv64xxx_i2c_probe(struct platform_device *pd) exit_free_irq: free_irq(drv_data->irq, drv_data); exit_reset: - if (!IS_ERR_OR_NULL(drv_data->rstc)) - reset_control_assert(drv_data->rstc); + reset_control_assert(drv_data->rstc); exit_clk: /* Not all platforms have a clk */ if (!IS_ERR(drv_data->clk)) @@ -968,8 +964,7 @@ mv64xxx_i2c_remove(struct platform_device *dev) i2c_del_adapter(&drv_data->adapter); free_irq(drv_data->irq, drv_data); - if (!IS_ERR_OR_NULL(drv_data->rstc)) - reset_control_assert(drv_data->rstc); + reset_control_assert(drv_data->rstc); /* Not all platforms have a clk */ if (!IS_ERR(drv_data->clk)) clk_disable_unprepare(drv_data->clk); diff --git a/drivers/i2c/busses/i2c-scmi.c b/drivers/i2c/busses/i2c-scmi.c index dfc98df7b1b6..7aa7b9cb6203 100644 --- a/drivers/i2c/busses/i2c-scmi.c +++ b/drivers/i2c/busses/i2c-scmi.c @@ -18,6 +18,9 @@ #define ACPI_SMBUS_HC_CLASS "smbus" #define ACPI_SMBUS_HC_DEVICE_NAME "cmi" +/* SMBUS HID definition as supported by Microsoft Windows */ +#define ACPI_SMBUS_MS_HID "SMB0001" + ACPI_MODULE_NAME("smbus_cmi"); struct smbus_methods_t { @@ -51,6 +54,7 @@ static const struct smbus_methods_t ibm_smbus_methods = { static const struct acpi_device_id acpi_smbus_cmi_ids[] = { {"SMBUS01", (kernel_ulong_t)&smbus_methods}, {ACPI_SMBUS_IBM_HID, (kernel_ulong_t)&ibm_smbus_methods}, + {ACPI_SMBUS_MS_HID, (kernel_ulong_t)&smbus_methods}, {"", 0} }; MODULE_DEVICE_TABLE(acpi, acpi_smbus_cmi_ids); diff --git a/drivers/i2c/busses/i2c-thunderx-pcidrv.c b/drivers/i2c/busses/i2c-thunderx-pcidrv.c index 1d4c2beacf2e..b4bc884cef93 100644 --- a/drivers/i2c/busses/i2c-thunderx-pcidrv.c +++ b/drivers/i2c/busses/i2c-thunderx-pcidrv.c @@ -85,17 +85,23 @@ static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c) { int ret; - i2c->clk = clk_get(dev, NULL); - if (IS_ERR(i2c->clk)) { - i2c->clk = NULL; - goto skip; + if (acpi_disabled) { + /* DT */ + i2c->clk = clk_get(dev, NULL); + if (IS_ERR(i2c->clk)) { + i2c->clk = NULL; + goto skip; + } + + ret = clk_prepare_enable(i2c->clk); + if (ret) + goto skip; + i2c->sys_freq = clk_get_rate(i2c->clk); + } else { + /* ACPI */ + device_property_read_u32(dev, "sclk", &i2c->sys_freq); } - ret = clk_prepare_enable(i2c->clk); - if (ret) - goto skip; - i2c->sys_freq = clk_get_rate(i2c->clk); - skip: if (!i2c->sys_freq) i2c->sys_freq = SYS_FREQ_DEFAULT; diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c index 66b464d52c9c..ae80228104e9 100644 --- a/drivers/i2c/busses/i2c-xlp9xx.c +++ b/drivers/i2c/busses/i2c-xlp9xx.c @@ -432,6 +432,7 @@ MODULE_DEVICE_TABLE(of, xlp9xx_i2c_of_match); #ifdef CONFIG_ACPI static const struct acpi_device_id xlp9xx_i2c_acpi_ids[] = { {"BRCM9007", 0}, + {"CAV9007", 0}, {} }; MODULE_DEVICE_TABLE(acpi, xlp9xx_i2c_acpi_ids); diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c index 2178266bca79..26f7237558ba 100644 --- a/drivers/i2c/i2c-mux.c +++ b/drivers/i2c/i2c-mux.c @@ -395,13 +395,16 @@ int i2c_mux_add_adapter(struct i2c_mux_core *muxc, if (force_nr) { priv->adap.nr = force_nr; ret = i2c_add_numbered_adapter(&priv->adap); + dev_err(&parent->dev, + "failed to add mux-adapter %u as bus %u (error=%d)\n", + chan_id, force_nr, ret); } else { ret = i2c_add_adapter(&priv->adap); + dev_err(&parent->dev, + "failed to add mux-adapter %u (error=%d)\n", + chan_id, ret); } if (ret < 0) { - dev_err(&parent->dev, - "failed to add mux-adapter (error=%d)\n", - ret); kfree(priv); return ret; } diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 10b3d17ae3ea..1e160fc37ecc 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -30,6 +30,17 @@ config I2C_MUX_GPIO This driver can also be built as a module. If so, the module will be called i2c-mux-gpio. +config I2C_MUX_LTC4306 + tristate "LTC LTC4306/5 I2C multiplexer" + select GPIOLIB + select REGMAP_I2C + help + If you say yes here you get support for the Analog Devices + LTC4306 or LTC4305 I2C mux/switch devices. + + This driver can also be built as a module. If so, the module + will be called i2c-mux-ltc4306. + config I2C_MUX_PCA9541 tristate "NXP PCA9541 I2C Master Selector" help diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile index 9948fa45037f..ff7618cd5312 100644 --- a/drivers/i2c/muxes/Makefile +++ b/drivers/i2c/muxes/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o obj-$(CONFIG_I2C_DEMUX_PINCTRL) += i2c-demux-pinctrl.o obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o +obj-$(CONFIG_I2C_MUX_LTC4306) += i2c-mux-ltc4306.o obj-$(CONFIG_I2C_MUX_MLXCPLD) += i2c-mux-mlxcpld.o obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c index 86fc2d4c081b..812b8cff265f 100644 --- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c +++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c @@ -202,10 +202,8 @@ static int i2c_arbitrator_probe(struct platform_device *pdev) /* Actually add the mux adapter */ ret = i2c_mux_add_adapter(muxc, 0, 0, 0); - if (ret) { - dev_err(dev, "Failed to add adapter\n"); + if (ret) i2c_put_adapter(muxc->parent); - } return ret; } diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c index 655684d621a4..1a9973ede443 100644 --- a/drivers/i2c/muxes/i2c-mux-gpio.c +++ b/drivers/i2c/muxes/i2c-mux-gpio.c @@ -245,10 +245,8 @@ static int i2c_mux_gpio_probe(struct platform_device *pdev) unsigned int class = mux->data.classes ? mux->data.classes[i] : 0; ret = i2c_mux_add_adapter(muxc, nr, mux->data.values[i], class); - if (ret) { - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + if (ret) goto add_adapter_failed; - } } dev_info(&pdev->dev, "%d port mux on %s adapter\n", diff --git a/drivers/i2c/muxes/i2c-mux-ltc4306.c b/drivers/i2c/muxes/i2c-mux-ltc4306.c new file mode 100644 index 000000000000..311b1cced0c0 --- /dev/null +++ b/drivers/i2c/muxes/i2c-mux-ltc4306.c @@ -0,0 +1,322 @@ +/* + * Linear Technology LTC4306 and LTC4305 I2C multiplexer/switch + * + * Copyright (C) 2017 Analog Devices Inc. + * + * Licensed under the GPL-2. + * + * Based on: i2c-mux-pca954x.c + * + * Datasheet: http://cds.linear.com/docs/en/datasheet/4306.pdf + */ + +#include <linux/gpio/consumer.h> +#include <linux/gpio/driver.h> +#include <linux/i2c-mux.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#define LTC4305_MAX_NCHANS 2 +#define LTC4306_MAX_NCHANS 4 + +#define LTC_REG_STATUS 0x0 +#define LTC_REG_CONFIG 0x1 +#define LTC_REG_MODE 0x2 +#define LTC_REG_SWITCH 0x3 + +#define LTC_DOWNSTREAM_ACCL_EN BIT(6) +#define LTC_UPSTREAM_ACCL_EN BIT(7) + +#define LTC_GPIO_ALL_INPUT 0xC0 +#define LTC_SWITCH_MASK 0xF0 + +enum ltc_type { + ltc_4305, + ltc_4306, +}; + +struct chip_desc { + u8 nchans; + u8 num_gpios; +}; + +struct ltc4306 { + struct regmap *regmap; + struct gpio_chip gpiochip; + const struct chip_desc *chip; +}; + +static const struct chip_desc chips[] = { + [ltc_4305] = { + .nchans = LTC4305_MAX_NCHANS, + }, + [ltc_4306] = { + .nchans = LTC4306_MAX_NCHANS, + .num_gpios = 2, + }, +}; + +static bool ltc4306_is_volatile_reg(struct device *dev, unsigned int reg) +{ + return (reg == LTC_REG_CONFIG) ? true : false; +} + +static const struct regmap_config ltc4306_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = LTC_REG_SWITCH, + .volatile_reg = ltc4306_is_volatile_reg, + .cache_type = REGCACHE_FLAT, +}; + +static int ltc4306_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + unsigned int val; + int ret; + + ret = regmap_read(data->regmap, LTC_REG_CONFIG, &val); + if (ret < 0) + return ret; + + return !!(val & BIT(1 - offset)); +} + +static void ltc4306_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + + regmap_update_bits(data->regmap, LTC_REG_CONFIG, BIT(5 - offset), + value ? BIT(5 - offset) : 0); +} + +static int ltc4306_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + unsigned int val; + int ret; + + ret = regmap_read(data->regmap, LTC_REG_MODE, &val); + if (ret < 0) + return ret; + + return !!(val & BIT(7 - offset)); +} + +static int ltc4306_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + + return regmap_update_bits(data->regmap, LTC_REG_MODE, + BIT(7 - offset), BIT(7 - offset)); +} + +static int ltc4306_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + + ltc4306_gpio_set(chip, offset, value); + return regmap_update_bits(data->regmap, LTC_REG_MODE, + BIT(7 - offset), 0); +} + +static int ltc4306_gpio_set_config(struct gpio_chip *chip, + unsigned int offset, unsigned long config) +{ + struct ltc4306 *data = gpiochip_get_data(chip); + unsigned int val; + + switch (pinconf_to_config_param(config)) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + val = 0; + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + val = BIT(4 - offset); + break; + default: + return -ENOTSUPP; + } + + return regmap_update_bits(data->regmap, LTC_REG_MODE, + BIT(4 - offset), val); +} + +static int ltc4306_gpio_init(struct ltc4306 *data) +{ + struct device *dev = regmap_get_device(data->regmap); + + if (!data->chip->num_gpios) + return 0; + + data->gpiochip.label = dev_name(dev); + data->gpiochip.base = -1; + data->gpiochip.ngpio = data->chip->num_gpios; + data->gpiochip.parent = dev; + data->gpiochip.can_sleep = true; + data->gpiochip.get_direction = ltc4306_gpio_get_direction; + data->gpiochip.direction_input = ltc4306_gpio_direction_input; + data->gpiochip.direction_output = ltc4306_gpio_direction_output; + data->gpiochip.get = ltc4306_gpio_get; + data->gpiochip.set = ltc4306_gpio_set; + data->gpiochip.set_config = ltc4306_gpio_set_config; + data->gpiochip.owner = THIS_MODULE; + + /* gpiolib assumes all GPIOs default input */ + regmap_write(data->regmap, LTC_REG_MODE, LTC_GPIO_ALL_INPUT); + + return devm_gpiochip_add_data(dev, &data->gpiochip, data); +} + +static int ltc4306_select_mux(struct i2c_mux_core *muxc, u32 chan) +{ + struct ltc4306 *data = i2c_mux_priv(muxc); + + return regmap_update_bits(data->regmap, LTC_REG_SWITCH, + LTC_SWITCH_MASK, BIT(7 - chan)); +} + +static int ltc4306_deselect_mux(struct i2c_mux_core *muxc, u32 chan) +{ + struct ltc4306 *data = i2c_mux_priv(muxc); + + return regmap_update_bits(data->regmap, LTC_REG_SWITCH, + LTC_SWITCH_MASK, 0); +} + +static const struct i2c_device_id ltc4306_id[] = { + { "ltc4305", ltc_4305 }, + { "ltc4306", ltc_4306 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ltc4306_id); + +static const struct of_device_id ltc4306_of_match[] = { + { .compatible = "lltc,ltc4305", .data = &chips[ltc_4305] }, + { .compatible = "lltc,ltc4306", .data = &chips[ltc_4306] }, + { } +}; +MODULE_DEVICE_TABLE(of, ltc4306_of_match); + +static int ltc4306_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + const struct chip_desc *chip; + struct i2c_mux_core *muxc; + struct ltc4306 *data; + struct gpio_desc *gpio; + bool idle_disc; + unsigned int val = 0; + int num, ret; + + chip = of_device_get_match_data(&client->dev); + + if (!chip) + chip = &chips[id->driver_data]; + + idle_disc = device_property_read_bool(&client->dev, + "i2c-mux-idle-disconnect"); + + muxc = i2c_mux_alloc(adap, &client->dev, + chip->nchans, sizeof(*data), + I2C_MUX_LOCKED, ltc4306_select_mux, + idle_disc ? ltc4306_deselect_mux : NULL); + if (!muxc) + return -ENOMEM; + data = i2c_mux_priv(muxc); + data->chip = chip; + + i2c_set_clientdata(client, muxc); + + data->regmap = devm_regmap_init_i2c(client, <c4306_regmap_config); + if (IS_ERR(data->regmap)) { + ret = PTR_ERR(data->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + /* Reset and enable the mux if an enable GPIO is specified. */ + gpio = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); + + if (gpio) { + udelay(1); + gpiod_set_value(gpio, 1); + } + + /* + * Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to disconnected state. + */ + if (regmap_write(data->regmap, LTC_REG_SWITCH, 0) < 0) { + dev_warn(&client->dev, "probe failed\n"); + return -ENODEV; + } + + if (device_property_read_bool(&client->dev, + "ltc,downstream-accelerators-enable")) + val |= LTC_DOWNSTREAM_ACCL_EN; + + if (device_property_read_bool(&client->dev, + "ltc,upstream-accelerators-enable")) + val |= LTC_UPSTREAM_ACCL_EN; + + if (regmap_write(data->regmap, LTC_REG_CONFIG, val) < 0) + return -ENODEV; + + ret = ltc4306_gpio_init(data); + if (ret < 0) + return ret; + + /* Now create an adapter for each channel */ + for (num = 0; num < chip->nchans; num++) { + ret = i2c_mux_add_adapter(muxc, 0, num, 0); + if (ret) { + i2c_mux_del_adapters(muxc); + return ret; + } + } + + dev_info(&client->dev, + "registered %d multiplexed busses for I2C switch %s\n", + num, client->name); + + return 0; +} + +static int ltc4306_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + i2c_mux_del_adapters(muxc); + + return 0; +} + +static struct i2c_driver ltc4306_driver = { + .driver = { + .name = "ltc4306", + .of_match_table = of_match_ptr(ltc4306_of_match), + }, + .probe = ltc4306_probe, + .remove = ltc4306_remove, + .id_table = ltc4306_id, +}; + +module_i2c_driver(ltc4306_driver); + +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); +MODULE_DESCRIPTION("Linear Technology LTC4306, LTC4305 I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c index 77840f7845a1..9e318c9516c7 100644 --- a/drivers/i2c/muxes/i2c-mux-pca9541.c +++ b/drivers/i2c/muxes/i2c-mux-pca9541.c @@ -369,10 +369,8 @@ static int pca9541_probe(struct i2c_client *client, i2c_set_clientdata(client, muxc); ret = i2c_mux_add_adapter(muxc, force, 0, 0); - if (ret) { - dev_err(&client->dev, "failed to register master selector\n"); + if (ret) return ret; - } dev_info(&client->dev, "registered master selector for I2C %s\n", client->name); diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c index dfc1c0e37c40..b2a85a2d00f7 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -85,7 +85,7 @@ struct pca954x { struct irq_domain *irq; unsigned int irq_mask; - spinlock_t lock; + raw_spinlock_t lock; }; /* Provide specs for the PCA954x types we know about */ @@ -264,13 +264,13 @@ static void pca954x_irq_mask(struct irq_data *idata) unsigned int pos = idata->hwirq; unsigned long flags; - spin_lock_irqsave(&data->lock, flags); + raw_spin_lock_irqsave(&data->lock, flags); data->irq_mask &= ~BIT(pos); if (!data->irq_mask) disable_irq(data->client->irq); - spin_unlock_irqrestore(&data->lock, flags); + raw_spin_unlock_irqrestore(&data->lock, flags); } static void pca954x_irq_unmask(struct irq_data *idata) @@ -279,13 +279,13 @@ static void pca954x_irq_unmask(struct irq_data *idata) unsigned int pos = idata->hwirq; unsigned long flags; - spin_lock_irqsave(&data->lock, flags); + raw_spin_lock_irqsave(&data->lock, flags); if (!data->irq_mask) enable_irq(data->client->irq); data->irq_mask |= BIT(pos); - spin_unlock_irqrestore(&data->lock, flags); + raw_spin_unlock_irqrestore(&data->lock, flags); } static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) @@ -311,7 +311,7 @@ static int pca954x_irq_setup(struct i2c_mux_core *muxc) if (!data->chip->has_irq || client->irq <= 0) return 0; - spin_lock_init(&data->lock); + raw_spin_lock_init(&data->lock); data->irq = irq_domain_add_linear(client->dev.of_node, data->chip->nchans, @@ -434,13 +434,8 @@ static int pca954x_probe(struct i2c_client *client, idle_disconnect_dt) << num; ret = i2c_mux_add_adapter(muxc, force, num, class); - - if (ret) { - dev_err(&client->dev, - "failed to register multiplexed adapter" - " %d as bus %d\n", num, force); + if (ret) goto fail_del_adapters; - } } dev_info(&client->dev, diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c index 35bb775e1b74..7c0c264b07bc 100644 --- a/drivers/i2c/muxes/i2c-mux-pinctrl.c +++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c @@ -245,10 +245,8 @@ static int i2c_mux_pinctrl_probe(struct platform_device *pdev) (mux->pdata->base_bus_num + i) : 0; ret = i2c_mux_add_adapter(muxc, bus, i, 0); - if (ret) { - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + if (ret) goto err_del_adapter; - } } return 0; diff --git a/drivers/i2c/muxes/i2c-mux-reg.c b/drivers/i2c/muxes/i2c-mux-reg.c index c6a90b4a9c62..406d5059072c 100644 --- a/drivers/i2c/muxes/i2c-mux-reg.c +++ b/drivers/i2c/muxes/i2c-mux-reg.c @@ -222,10 +222,8 @@ static int i2c_mux_reg_probe(struct platform_device *pdev) class = mux->data.classes ? mux->data.classes[i] : 0; ret = i2c_mux_add_adapter(muxc, nr, mux->data.values[i], class); - if (ret) { - dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + if (ret) goto add_adapter_failed; - } } dev_dbg(&pdev->dev, "%d port mux on %s adapter\n", |