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path: root/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
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Diffstat (limited to 'drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c')
-rw-r--r--drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
index ee0156921ebc..e00ed73c2355 100644
--- a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
+++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
@@ -64,6 +64,17 @@ static inline void ls_pcie_g4_pf_writel(struct ls_pcie_g4 *pcie,
iowrite32(val, pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off);
}
+static bool ls_pcie_g4_is_bridge(struct ls_pcie_g4 *pcie)
+{
+ struct mobiveil_pcie *mv_pci = &pcie->pci;
+ u32 header_type;
+
+ header_type = mobiveil_csr_readb(mv_pci, PCI_HEADER_TYPE);
+ header_type &= 0x7f;
+
+ return header_type == PCI_HEADER_TYPE_BRIDGE;
+}
+
static int ls_pcie_g4_link_up(struct mobiveil_pcie *pci)
{
struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci);
@@ -195,7 +206,7 @@ static void ls_pcie_g4_reset(struct work_struct *work)
ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
mobiveil_csr_writew(mv_pci, ctrl, PCI_BRIDGE_CONTROL);
- if (!ls_pcie_g4_reinit_hw(pcie))
+ if (ls_pcie_g4_reinit_hw(pcie))
return;
ls_pcie_g4_enable_interrupt(pcie);
@@ -245,6 +256,9 @@ static int __init ls_pcie_g4_probe(struct platform_device *pdev)
return ret;
}
+ if (!ls_pcie_g4_is_bridge(pcie))
+ return -ENODEV;
+
ls_pcie_g4_enable_interrupt(pcie);
return 0;