diff options
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/cirrus/pinctrl-cs42l43.c | 18 | ||||
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7981.c | 24 | ||||
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7986.c | 2 | ||||
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt8186.c | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt8192.c | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 2 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-mcp23s08.c | 15 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-st.c | 3 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-zynqmp.c | 8 | ||||
| -rw-r--r-- | drivers/pinctrl/qcom/Kconfig | 2 |
10 files changed, 50 insertions, 26 deletions
diff --git a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c index 012b0a3bad5a..628b60ccc2b0 100644 --- a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c +++ b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c @@ -5,10 +5,10 @@ // Copyright (c) 2023 Cirrus Logic, Inc. and // Cirrus Logic International Semiconductor Ltd. +#include <linux/array_size.h> #include <linux/bits.h> #include <linux/build_bug.h> #include <linux/err.h> -#include <linux/errno.h> #include <linux/gpio/driver.h> #include <linux/mfd/cs42l43.h> #include <linux/mfd/cs42l43-regs.h> @@ -17,7 +17,7 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> -#include <linux/string_helpers.h> +#include <linux/string_choices.h> #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/pinctrl.h> @@ -276,7 +276,7 @@ static const struct pinmux_ops cs42l43_pin_mux_ops = { static const unsigned int cs42l43_pin_drv_str_ma[] = { 1, 2, 4, 8, 9, 10, 12, 16 }; -static inline int cs42l43_pin_get_drv_str(struct cs42l43_pin *priv, unsigned int pin) +static int cs42l43_pin_get_drv_str(struct cs42l43_pin *priv, unsigned int pin) { const struct cs42l43_pin_data *pdat = cs42l43_pin_pins[pin].drv_data; unsigned int val; @@ -289,8 +289,8 @@ static inline int cs42l43_pin_get_drv_str(struct cs42l43_pin *priv, unsigned int return cs42l43_pin_drv_str_ma[(val & pdat->mask) >> pdat->shift]; } -static inline int cs42l43_pin_set_drv_str(struct cs42l43_pin *priv, unsigned int pin, - unsigned int ma) +static int cs42l43_pin_set_drv_str(struct cs42l43_pin *priv, unsigned int pin, + unsigned int ma) { const struct cs42l43_pin_data *pdat = cs42l43_pin_pins[pin].drv_data; int i; @@ -314,7 +314,7 @@ err: return -EINVAL; } -static inline int cs42l43_pin_get_db(struct cs42l43_pin *priv, unsigned int pin) +static int cs42l43_pin_get_db(struct cs42l43_pin *priv, unsigned int pin) { unsigned int val; int ret; @@ -332,8 +332,8 @@ static inline int cs42l43_pin_get_db(struct cs42l43_pin *priv, unsigned int pin) return 85; // Debounce is roughly 85uS } -static inline int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin, - unsigned int us) +static int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin, + unsigned int us) { if (pin >= CS42L43_NUM_GPIOS) return -ENOTSUPP; @@ -490,7 +490,7 @@ static void cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, int va int ret; dev_dbg(priv->dev, "Setting gpio%d to %s\n", - offset + 1, value ? "high" : "low"); + offset + 1, str_high_low(value)); ret = pm_runtime_resume_and_get(priv->dev); if (ret) { diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c index 7e59a4407859..ef6123765885 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -700,6 +700,15 @@ static int mt7981_drv_vbus_pins[] = { 14, }; static int mt7981_drv_vbus_funcs[] = { 1, }; /* EMMC */ +static int mt7981_emmc_reset_pins[] = { 15, }; +static int mt7981_emmc_reset_funcs[] = { 2, }; + +static int mt7981_emmc_4_pins[] = { 16, 17, 18, 19, 24, 25, }; +static int mt7981_emmc_4_funcs[] = { 2, 2, 2, 2, 2, 2, }; + +static int mt7981_emmc_8_pins[] = { 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, }; +static int mt7981_emmc_8_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; + static int mt7981_emmc_45_pins[] = { 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, }; static int mt7981_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; @@ -737,6 +746,9 @@ static int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, }; static int mt7981_uart1_2_pins[] = { 9, 10, }; static int mt7981_uart1_2_funcs[] = { 2, 2, }; +static int mt7981_uart1_3_pins[] = { 26, 27, }; +static int mt7981_uart1_3_funcs[] = { 2, 2, }; + /* UART2 */ static int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, }; static int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, }; @@ -851,6 +863,12 @@ static const struct group_desc mt7981_groups[] = { PINCTRL_PIN_GROUP("udi", mt7981_udi), /* @GPIO(14) DRV_VBUS(1) */ PINCTRL_PIN_GROUP("drv_vbus", mt7981_drv_vbus), + /* @GPIO(15): EMMC_RSTB(2) */ + PINCTRL_PIN_GROUP("emmc_reset", mt7981_emmc_reset), + /* @GPIO(16,17,18,19,24,25): EMMC_DATx, EMMC_CLK, EMMC_CMD */ + PINCTRL_PIN_GROUP("emmc_4", mt7981_emmc_4), + /* @GPIO(16,17,18,19,20,21,22,23,24,25): EMMC_DATx, EMMC_CLK, EMMC_CMD */ + PINCTRL_PIN_GROUP("emmc_8", mt7981_emmc_8), /* @GPIO(15,25): EMMC(2) */ PINCTRL_PIN_GROUP("emmc_45", mt7981_emmc_45), /* @GPIO(16,21): SNFI(3) */ @@ -871,6 +889,8 @@ static const struct group_desc mt7981_groups[] = { PINCTRL_PIN_GROUP("uart1_1", mt7981_uart1_1), /* @GPIO(9,10): UART1(2) */ PINCTRL_PIN_GROUP("uart1_2", mt7981_uart1_2), + /* @GPIO(26,27): UART1(2) */ + PINCTRL_PIN_GROUP("uart1_3", mt7981_uart1_3), /* @GPIO(22,25): UART1(3) */ PINCTRL_PIN_GROUP("uart2_1", mt7981_uart2_1), /* @GPIO(22,24) PTA_EXT(4) */ @@ -933,7 +953,7 @@ static const struct group_desc mt7981_groups[] = { static const char *mt7981_wa_aice_groups[] = { "wa_aice1", "wa_aice2", "wm_aice1_1", "wa_aice3", "wm_aice1_2", }; static const char *mt7981_uart_groups[] = { "net_wo0_uart_txd_0", "net_wo0_uart_txd_1", - "net_wo0_uart_txd_2", "uart0", "uart1_0", "uart1_1", "uart1_2", "uart2_0", + "net_wo0_uart_txd_2", "uart0", "uart1_0", "uart1_1", "uart1_2", "uart1_3", "uart2_0", "uart2_0_tx_rx", "uart2_1", "wm_uart_0", "wm_aurt_1", "wm_aurt_2", }; static const char *mt7981_dfd_groups[] = { "dfd", "dfd_ntrst", }; static const char *mt7981_wdt_groups[] = { "watchdog", "watchdog1", }; @@ -952,7 +972,7 @@ static const char *mt7981_i2c_groups[] = { "i2c0_0", "i2c0_1", "u2_phy_i2c", static const char *mt7981_pcm_groups[] = { "pcm", }; static const char *mt7981_udi_groups[] = { "udi", }; static const char *mt7981_usb_groups[] = { "drv_vbus", }; -static const char *mt7981_flash_groups[] = { "emmc_45", "snfi", }; +static const char *mt7981_flash_groups[] = { "emmc_reset", "emmc_4", "emmc_8", "emmc_45", "snfi", }; static const char *mt7981_ethernet_groups[] = { "smi_mdc_mdio", "gbe_ext_mdc_mdio", "wf0_mode1", "wf0_mode3", "mt7531_int", }; static const char *mt7981_ant_groups[] = { "ant_sel", }; diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/mediatek/pinctrl-mt7986.c index acaac9b38aa8..39e80fa644c1 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -16,7 +16,7 @@ PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ _x_bits, 32, 0) -/** +/* * enum - Locking variants of the iocfg bases * * MT7986 have multiple bases to program pin configuration listed as the below: diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8186.c b/drivers/pinctrl/mediatek/pinctrl-mt8186.c index 7be591591cce..dd19e74856a9 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8186.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8186.c @@ -1198,7 +1198,6 @@ static const struct mtk_pin_reg_calc mt8186_reg_cals[PINCTRL_PIN_REG_MAX] = { [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8186_pin_dir_range), [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8186_pin_di_range), [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8186_pin_do_range), - [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8186_pin_dir_range), [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8186_pin_smt_range), [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8186_pin_ies_range), [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8186_pin_pu_range), diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8192.c b/drivers/pinctrl/mediatek/pinctrl-mt8192.c index e3a76381f7f4..3f8a9dbcb704 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c @@ -1379,7 +1379,6 @@ static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = { [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8192_pin_dir_range), [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8192_pin_di_range), [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8192_pin_do_range), - [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8192_pin_dir_range), [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8192_pin_smt_range), [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8192_pin_ies_range), [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8192_pin_pu_range), diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c index 4589900244c7..cdad4ef11a2f 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c +++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c @@ -474,7 +474,7 @@ enum { #undef WPCM450_GRP }; -static struct pingroup wpcm450_groups[] = { +static const struct pingroup wpcm450_groups[] = { #define WPCM450_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) WPCM450_GRPS #undef WPCM450_GRP diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c index 4551575e4e7d..38c3a14c8b58 100644 --- a/drivers/pinctrl/pinctrl-mcp23s08.c +++ b/drivers/pinctrl/pinctrl-mcp23s08.c @@ -375,7 +375,8 @@ mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) static irqreturn_t mcp23s08_irq(int irq, void *data) { struct mcp23s08 *mcp = data; - int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval; + int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval, gpinten; + unsigned long int enabled_interrupts; unsigned int child_irq; bool intf_set, intcap_changed, gpio_bit_changed, defval_changed, gpio_set; @@ -395,6 +396,9 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) if (mcp_read(mcp, MCP_INTCON, &intcon)) goto unlock; + if (mcp_read(mcp, MCP_GPINTEN, &gpinten)) + goto unlock; + if (mcp_read(mcp, MCP_DEFVAL, &defval)) goto unlock; @@ -410,9 +414,12 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n", intcap, intf, gpio_orig, gpio); - for (i = 0; i < mcp->chip.ngpio; i++) { - /* We must check all of the inputs on the chip, - * otherwise we may not notice a change on >=2 pins. + enabled_interrupts = gpinten; + for_each_set_bit(i, &enabled_interrupts, mcp->chip.ngpio) { + /* + * We must check all of the inputs with enabled interrupts + * on the chip, otherwise we may not notice a change + * on more than one pin. * * On at least the mcp23s17, INTCAP is only updated * one byte at a time(INTCAPA and INTCAPB are diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index 1485573b523c..5d9abd6547d0 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c @@ -723,9 +723,8 @@ static int st_gpio_direction_output(struct gpio_chip *chip, struct st_gpio_bank *bank = gpiochip_get_data(chip); __st_gpio_set(bank, offset, value); - pinctrl_gpio_direction_output(chip, offset); - return 0; + return pinctrl_gpio_direction_output(chip, offset); } static int st_gpio_get_direction(struct gpio_chip *chip, unsigned offset) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index f2be341f73e1..5c46b7d7ebcb 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -562,7 +562,7 @@ static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, const char **fgroups; int ret, index, i; - fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL); + fgroups = devm_kcalloc(dev, func->ngroups, sizeof(*fgroups), GFP_KERNEL); if (!fgroups) return -ENOMEM; @@ -754,7 +754,7 @@ static int zynqmp_pinctrl_prepare_function_info(struct device *dev, if (ret) return ret; - funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL); + funcs = devm_kcalloc(dev, pctrl->nfuncs, sizeof(*funcs), GFP_KERNEL); if (!funcs) return -ENOMEM; @@ -768,7 +768,7 @@ static int zynqmp_pinctrl_prepare_function_info(struct device *dev, pctrl->ngroups += funcs[i].ngroups; } - groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL); + groups = devm_kcalloc(dev, pctrl->ngroups, sizeof(*groups), GFP_KERNEL); if (!groups) return -ENOMEM; @@ -830,7 +830,7 @@ static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, if (ret) return ret; - pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL); + pins = devm_kcalloc(dev, *npins, sizeof(*pins), GFP_KERNEL); if (!pins) return -ENOMEM; diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index e0f2829c15d6..24619e80b2cc 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -125,7 +125,7 @@ config PINCTRL_SM8550_LPASS_LPI platform. config PINCTRL_SM8650_LPASS_LPI - tristate "Qualcomm Technologies Inc SM8550 LPASS LPI pin controller driver" + tristate "Qualcomm Technologies Inc SM8650 LPASS LPI pin controller driver" depends on ARM64 || COMPILE_TEST depends on PINCTRL_LPASS_LPI help |