diff options
Diffstat (limited to 'drivers/platform/mellanox/mlxbf-pmc.c')
| -rw-r--r-- | drivers/platform/mellanox/mlxbf-pmc.c | 542 |
1 files changed, 401 insertions, 141 deletions
diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c index 1dd84c7a79de..900069eb186e 100644 --- a/drivers/platform/mellanox/mlxbf-pmc.c +++ b/drivers/platform/mellanox/mlxbf-pmc.c @@ -33,7 +33,7 @@ #define MLXBF_PMC_EVENT_SET_BF3 2 #define MLXBF_PMC_EVENT_INFO_LEN 100 -#define MLXBF_PMC_MAX_BLOCKS 30 +#define MLXBF_PMC_MAX_BLOCKS 40 #define MLXBF_PMC_MAX_ATTRS 70 #define MLXBF_PMC_INFO_SZ 4 #define MLXBF_PMC_REG_SIZE 8 @@ -88,6 +88,7 @@ #define MLXBF_PMC_CRSPACE_PERFMON_CTL(n) (n * MLXBF_PMC_CRSPACE_PERFMON_REG0_SZ) #define MLXBF_PMC_CRSPACE_PERFMON_EN BIT(30) #define MLXBF_PMC_CRSPACE_PERFMON_CLR BIT(28) +#define MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(n) (MLXBF_PMC_CRSPACE_PERFMON_CTL(n) + 0x4) #define MLXBF_PMC_CRSPACE_PERFMON_VAL0(n) (MLXBF_PMC_CRSPACE_PERFMON_CTL(n) + 0xc) /** @@ -99,8 +100,8 @@ */ struct mlxbf_pmc_attribute { struct device_attribute dev_attr; - int index; - int nr; + unsigned int index; + unsigned int nr; }; /** @@ -114,6 +115,7 @@ struct mlxbf_pmc_attribute { * @attr_event: Attributes for "event" sysfs files * @attr_event_list: Attributes for "event_list" sysfs files * @attr_enable: Attributes for "enable" sysfs files + * @attr_count_clock: Attributes for "count_clock" sysfs files * @block_attr: All attributes needed for the block * @block_attr_grp: Attribute group for the block */ @@ -121,11 +123,12 @@ struct mlxbf_pmc_block_info { void __iomem *mmio_base; size_t blk_size; size_t counters; - int type; + unsigned int type; struct mlxbf_pmc_attribute *attr_counter; struct mlxbf_pmc_attribute *attr_event; struct mlxbf_pmc_attribute attr_event_list; struct mlxbf_pmc_attribute attr_enable; + struct mlxbf_pmc_attribute attr_count_clock; struct attribute *block_attr[MLXBF_PMC_MAX_ATTRS]; struct attribute_group block_attr_grp; }; @@ -136,6 +139,7 @@ struct mlxbf_pmc_block_info { * @pdev: The kernel structure representing the device * @total_blocks: Total number of blocks * @tile_count: Number of tiles in the system + * @apt_enable: Info on enabled APTs * @llt_enable: Info on enabled LLTs * @mss_enable: Info on enabled MSSs * @group_num: Group number assigned to each valid block @@ -149,17 +153,18 @@ struct mlxbf_pmc_block_info { */ struct mlxbf_pmc_context { struct platform_device *pdev; - uint32_t total_blocks; - uint32_t tile_count; - uint8_t llt_enable; - uint8_t mss_enable; - uint32_t group_num; + u32 total_blocks; + u32 tile_count; + u8 apt_enable; + u8 llt_enable; + u8 mss_enable; + u32 group_num; struct device *hwmon_dev; const char *block_name[MLXBF_PMC_MAX_BLOCKS]; struct mlxbf_pmc_block_info block[MLXBF_PMC_MAX_BLOCKS]; const struct attribute_group *groups[MLXBF_PMC_MAX_BLOCKS]; bool svc_sreg_support; - uint32_t sreg_tbl_perf; + u32 sreg_tbl_perf; unsigned int event_set; }; @@ -169,7 +174,7 @@ struct mlxbf_pmc_context { * @evt_name: Name of the event */ struct mlxbf_pmc_events { - int evt_num; + u32 evt_num; char *evt_name; }; @@ -859,14 +864,145 @@ static const struct mlxbf_pmc_events mlxbf_pmc_llt_miss_events[] = { {75, "HISTOGRAM_HISTOGRAM_BIN9"}, }; +static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = { + { 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" }, + { 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" }, + { 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" }, + { 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" }, + { 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" }, + { 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" }, + { 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" }, + { 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" }, + { 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" }, + { 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" }, + { 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" }, + { 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" }, + { 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" }, + { 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" }, + { 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" }, + { 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" }, + { 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" }, + { 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" }, + { 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" }, + { 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" }, + { 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" }, + { 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" }, + { 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" }, + { 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" }, + { 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" }, + { 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" }, + { 0x68, "FMON_CLK_LAST_COUNT_REF_156" }, + { 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" }, +}; + +static const struct mlxbf_pmc_events mlxbf_pmc_gga_events[] = { + { 0, "GGA_PERF_DESC_WQE_STRB" }, + { 5, "GGA_PERF_DESC_CQE_STRB" }, + { 8, "GGA_PERF_DESC_TPT_REQUEST_STRB" }, + { 17, "GGA_PERF_DESC_TPT_RESPONSESTRB" }, + { 120, "GGA_PERF_DESC_ENGINE0_IN_DATA_STRB" }, + { 121, "GGA_PERF_DESC_ENGINE1_IN_DATA_STRB" }, + { 122, "GGA_PERF_DESC_ENGINE2_IN_DATA_STRB" }, + { 123, "GGA_PERF_DESC_ENGINE3_IN_DATA_STRB" }, + { 124, "GGA_PERF_DESC_ENGINE4_IN_DATA_STRB" }, + { 125, "GGA_PERF_DESC_ENGINE5_IN_DATA_STRB" }, + { 126, "GGA_PERF_DESC_ENGINE6_IN_DATA_STRB" }, + { 127, "GGA_PERF_DESC_ENGINE7_IN_DATA_STRB" }, + { 128, "GGA_PERF_DESC_ENGINE8_IN_DATA_STRB" }, + { 129, "GGA_PERF_DESC_ENGINE9_IN_DATA_STRB" }, + { 130, "GGA_PERF_DESC_ENGINE10_IN_DATA_STRB" }, + { 131, "GGA_PERF_DESC_ENGINE11_IN_DATA_STRB" }, + { 132, "GGA_PERF_DESC_ENGINE12_IN_DATA_STRB" }, + { 133, "GGA_PERF_DESC_ENGINE13_IN_DATA_STRB" }, + { 134, "GGA_PERF_DESC_ENGINE14_IN_DATA_STRB" }, + { 195, "GGA_PERF_DESC_ENGINE0_OUT_DATA_STRB" }, + { 196, "GGA_PERF_DESC_ENGINE1_OUT_DATA_STRB" }, + { 197, "GGA_PERF_DESC_ENGINE2_OUT_DATA_STRB" }, + { 198, "GGA_PERF_DESC_ENGINE3_OUT_DATA_STRB" }, + { 199, "GGA_PERF_DESC_ENGINE4_OUT_DATA_STRB" }, + { 200, "GGA_PERF_DESC_ENGINE5_OUT_DATA_STRB" }, + { 201, "GGA_PERF_DESC_ENGINE6_OUT_DATA_STRB" }, + { 202, "GGA_PERF_DESC_ENGINE7_OUT_DATA_STRB" }, + { 203, "GGA_PERF_DESC_ENGINE8_OUT_DATA_STRB" }, + { 204, "GGA_PERF_DESC_ENGINE9_OUT_DATA_STRB" }, + { 205, "GGA_PERF_DESC_ENGINE10_OUT_DATA_STRB" }, + { 206, "GGA_PERF_DESC_ENGINE11_OUT_DATA_STRB" }, + { 207, "GGA_PERF_DESC_ENGINE12_OUT_DATA_STRB" }, + { 208, "GGA_PERF_DESC_ENGINE13_OUT_DATA_STRB" }, + { 209, "GGA_PERF_DESC_ENGINE14_OUT_DATA_STRB" }, +}; + +static const struct mlxbf_pmc_events mlxbf_pmc_apt_events[] = { + { 0, "APT_DATA_0" }, + { 1, "APT_DATA_1" }, + { 2, "APT_DATA_2" }, + { 3, "APT_DATA_3" }, + { 4, "APT_DATA_4" }, + { 5, "APT_DATA_5" }, + { 6, "APT_DATA_6" }, + { 7, "APT_DATA_7" }, + { 8, "APT_DATA_8" }, + { 9, "APT_DATA_9" }, + { 10, "APT_DATA_10" }, + { 11, "APT_DATA_11" }, + { 12, "APT_DATA_12" }, + { 13, "APT_DATA_13" }, + { 14, "APT_DATA_14" }, + { 15, "APT_DATA_15" }, + { 16, "APT_DATA_16" }, + { 17, "APT_DATA_17" }, + { 18, "APT_DATA_18" }, + { 19, "APT_DATA_19" }, + { 20, "APT_DATA_20" }, + { 21, "APT_DATA_21" }, +}; + +static const struct mlxbf_pmc_events mlxbf_pmc_emi_events[] = { + { 0, "MCH_WR_IN_MCH_REQ_IN_STRB" }, + { 10, "MCH_RD_IN_MCH_REQ_IN_STRB" }, + { 20, "MCH_RD_RESP_DATA_MCH_RESP_OUT_STRB" }, + { 98, "EMI_ARBITER_EARB2CTRL_STRB" }, + { 99, "EMI_ARBITER_EARB2CTRL_RAS_STRB" }, + { 100, "EMI_ARBITER_EARB2CTRL_CAS_STRB" }, +}; + +static const struct mlxbf_pmc_events mlxbf_pmc_prnf_events[] = { + { 0, "PRNF_DMA_RD_TLP_REQ" }, + { 1, "PRNF_DMA_RD_ICMC_BYPASS_REQ" }, + { 8, "PRNF_DMA_RD_TLP_SENT_TO_CHI" }, + { 11, "PRNF_DMA_RD_CHI_RES" }, + { 17, "PRNF_DMA_RD_TLP_RES_SENT" }, + { 18, "PRNF_DMA_WR_WR0_SLICE_ALLOC_RO" }, + { 19, "PRNF_DMA_WR_WR0_SLICE_ALLOC_NRO" }, + { 24, "PRNF_DMA_WR_WR1_SLICE_ALLOC_RO" }, + { 25, "PRNF_DMA_WR_WR1_SLICE_ALLOC_NRO" }, + { 30, "PRNF_PIO_POSTED_REQ_PUSH" }, + { 31, "PRNF_PIO_POSTED_REQ_POP" }, + { 32, "PRNF_PIO_NP_REQ_PUSH" }, + { 33, "PRNF_PIO_NP_REQ_POP" }, + { 34, "PRNF_PIO_COMP_RO_PUSH" }, + { 35, "PRNF_PIO_COMP_RO_POP" }, + { 36, "PRNF_PIO_COMP_NRO_PUSH" }, + { 37, "PRNF_PIO_COMP_NRO_POP" }, +}; + +static const struct mlxbf_pmc_events mlxbf_pmc_msn_events[] = { + { 46, "MSN_CORE_MMA_WQE_DONE_PUSH_STRB" }, + { 116, "MSN_CORE_MSN2MMA_WQE_STRB" }, + { 164, "MSN_CORE_WQE_TOP_TILE_WQE_STRB" }, + { 168, "MSN_CORE_TPT_TOP_GGA_REQ_STRB" }, + { 171, "MSN_CORE_TPT_TOP_MMA_REQ_STRB" }, + { 174, "MSN_CORE_TPT_TOP_GGA_RES_STRB" }, + { 177, "MSN_CORE_TPT_TOP_MMA_RES_STRB" }, +}; + static struct mlxbf_pmc_context *pmc; /* UUID used to probe ATF service. */ static const char *mlxbf_pmc_svc_uuid_str = "89c036b4-e7d7-11e6-8797-001aca00bfc4"; /* Calls an SMC to access a performance register */ -static int mlxbf_pmc_secure_read(void __iomem *addr, uint32_t command, - uint64_t *result) +static int mlxbf_pmc_secure_read(void __iomem *addr, u32 command, u64 *result) { struct arm_smccc_res res; int status, err = 0; @@ -892,8 +1028,7 @@ static int mlxbf_pmc_secure_read(void __iomem *addr, uint32_t command, } /* Read from a performance counter */ -static int mlxbf_pmc_read(void __iomem *addr, uint32_t command, - uint64_t *result) +static int mlxbf_pmc_read(void __iomem *addr, u32 command, u64 *result) { if (pmc->svc_sreg_support) return mlxbf_pmc_secure_read(addr, command, result); @@ -907,22 +1042,21 @@ static int mlxbf_pmc_read(void __iomem *addr, uint32_t command, } /* Convenience function for 32-bit reads */ -static int mlxbf_pmc_readl(void __iomem *addr, uint32_t *result) +static int mlxbf_pmc_readl(void __iomem *addr, u32 *result) { - uint64_t read_out; + u64 read_out; int status; status = mlxbf_pmc_read(addr, MLXBF_PMC_READ_REG_32, &read_out); if (status) return status; - *result = (uint32_t)read_out; + *result = (u32)read_out; return 0; } /* Calls an SMC to access a performance register */ -static int mlxbf_pmc_secure_write(void __iomem *addr, uint32_t command, - uint64_t value) +static int mlxbf_pmc_secure_write(void __iomem *addr, u32 command, u64 value) { struct arm_smccc_res res; int status, err = 0; @@ -945,7 +1079,7 @@ static int mlxbf_pmc_secure_write(void __iomem *addr, uint32_t command, } /* Write to a performance counter */ -static int mlxbf_pmc_write(void __iomem *addr, int command, uint64_t value) +static int mlxbf_pmc_write(void __iomem *addr, int command, u64 value) { if (pmc->svc_sreg_support) return mlxbf_pmc_secure_write(addr, command, value); @@ -959,7 +1093,7 @@ static int mlxbf_pmc_write(void __iomem *addr, int command, uint64_t value) } /* Check if the register offset is within the mapped region for the block */ -static bool mlxbf_pmc_valid_range(int blk_num, uint32_t offset) +static bool mlxbf_pmc_valid_range(unsigned int blk_num, u32 offset) { if ((offset >= 0) && !(offset % MLXBF_PMC_REG_SIZE) && (offset + MLXBF_PMC_REG_SIZE <= pmc->block[blk_num].blk_size)) @@ -969,33 +1103,33 @@ static bool mlxbf_pmc_valid_range(int blk_num, uint32_t offset) } /* Get the event list corresponding to a certain block */ -static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk, - int *size) +static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk, size_t *psize) { const struct mlxbf_pmc_events *events; + size_t size; if (strstr(blk, "tilenet")) { events = mlxbf_pmc_hnfnet_events; - *size = ARRAY_SIZE(mlxbf_pmc_hnfnet_events); + size = ARRAY_SIZE(mlxbf_pmc_hnfnet_events); } else if (strstr(blk, "tile")) { events = mlxbf_pmc_hnf_events; - *size = ARRAY_SIZE(mlxbf_pmc_hnf_events); + size = ARRAY_SIZE(mlxbf_pmc_hnf_events); } else if (strstr(blk, "triogen")) { events = mlxbf_pmc_smgen_events; - *size = ARRAY_SIZE(mlxbf_pmc_smgen_events); + size = ARRAY_SIZE(mlxbf_pmc_smgen_events); } else if (strstr(blk, "trio")) { switch (pmc->event_set) { case MLXBF_PMC_EVENT_SET_BF1: events = mlxbf_pmc_trio_events_1; - *size = ARRAY_SIZE(mlxbf_pmc_trio_events_1); + size = ARRAY_SIZE(mlxbf_pmc_trio_events_1); break; case MLXBF_PMC_EVENT_SET_BF2: events = mlxbf_pmc_trio_events_2; - *size = ARRAY_SIZE(mlxbf_pmc_trio_events_2); + size = ARRAY_SIZE(mlxbf_pmc_trio_events_2); break; default: events = NULL; - *size = 0; + size = 0; break; } } else if (strstr(blk, "mss")) { @@ -1003,51 +1137,78 @@ static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk, case MLXBF_PMC_EVENT_SET_BF1: case MLXBF_PMC_EVENT_SET_BF2: events = mlxbf_pmc_mss_events_1; - *size = ARRAY_SIZE(mlxbf_pmc_mss_events_1); + size = ARRAY_SIZE(mlxbf_pmc_mss_events_1); break; case MLXBF_PMC_EVENT_SET_BF3: events = mlxbf_pmc_mss_events_3; - *size = ARRAY_SIZE(mlxbf_pmc_mss_events_3); + size = ARRAY_SIZE(mlxbf_pmc_mss_events_3); break; default: events = NULL; - *size = 0; + size = 0; break; } } else if (strstr(blk, "ecc")) { events = mlxbf_pmc_ecc_events; - *size = ARRAY_SIZE(mlxbf_pmc_ecc_events); + size = ARRAY_SIZE(mlxbf_pmc_ecc_events); } else if (strstr(blk, "pcie")) { events = mlxbf_pmc_pcie_events; - *size = ARRAY_SIZE(mlxbf_pmc_pcie_events); + size = ARRAY_SIZE(mlxbf_pmc_pcie_events); } else if (strstr(blk, "l3cache")) { events = mlxbf_pmc_l3c_events; - *size = ARRAY_SIZE(mlxbf_pmc_l3c_events); + size = ARRAY_SIZE(mlxbf_pmc_l3c_events); } else if (strstr(blk, "gic")) { events = mlxbf_pmc_smgen_events; - *size = ARRAY_SIZE(mlxbf_pmc_smgen_events); + size = ARRAY_SIZE(mlxbf_pmc_smgen_events); } else if (strstr(blk, "smmu")) { events = mlxbf_pmc_smgen_events; - *size = ARRAY_SIZE(mlxbf_pmc_smgen_events); + size = ARRAY_SIZE(mlxbf_pmc_smgen_events); } else if (strstr(blk, "llt_miss")) { events = mlxbf_pmc_llt_miss_events; - *size = ARRAY_SIZE(mlxbf_pmc_llt_miss_events); + size = ARRAY_SIZE(mlxbf_pmc_llt_miss_events); } else if (strstr(blk, "llt")) { events = mlxbf_pmc_llt_events; - *size = ARRAY_SIZE(mlxbf_pmc_llt_events); + size = ARRAY_SIZE(mlxbf_pmc_llt_events); + } else if (strstr(blk, "clock_measure")) { + events = mlxbf_pmc_clock_events; + size = ARRAY_SIZE(mlxbf_pmc_clock_events); + } else if (strstr(blk, "gga")) { + events = mlxbf_pmc_gga_events; + size = ARRAY_SIZE(mlxbf_pmc_gga_events); + } else if (strstr(blk, "apt")) { + events = mlxbf_pmc_apt_events; + size = ARRAY_SIZE(mlxbf_pmc_apt_events); + } else if (strstr(blk, "emi")) { + events = mlxbf_pmc_emi_events; + size = ARRAY_SIZE(mlxbf_pmc_emi_events); + } else if (strstr(blk, "prnf")) { + events = mlxbf_pmc_prnf_events; + size = ARRAY_SIZE(mlxbf_pmc_prnf_events); + } else if (strstr(blk, "msn")) { + events = mlxbf_pmc_msn_events; + size = ARRAY_SIZE(mlxbf_pmc_msn_events); } else { events = NULL; - *size = 0; + size = 0; } + if (psize) + *psize = size; + return events; } +static bool mlxbf_pmc_event_supported(const char *blk) +{ + return !!mlxbf_pmc_event_list(blk, NULL); +} + /* Get the event number given the name */ static int mlxbf_pmc_get_event_num(const char *blk, const char *evt) { const struct mlxbf_pmc_events *events; - int i, size; + unsigned int i; + size_t size; events = mlxbf_pmc_event_list(blk, &size); if (!events) @@ -1062,10 +1223,11 @@ static int mlxbf_pmc_get_event_num(const char *blk, const char *evt) } /* Get the event number given the name */ -static char *mlxbf_pmc_get_event_name(const char *blk, int evt) +static char *mlxbf_pmc_get_event_name(const char *blk, u32 evt) { const struct mlxbf_pmc_events *events; - int i, size; + unsigned int i; + size_t size; events = mlxbf_pmc_event_list(blk, &size); if (!events) @@ -1080,9 +1242,9 @@ static char *mlxbf_pmc_get_event_name(const char *blk, int evt) } /* Method to enable/disable/reset l3cache counters */ -static int mlxbf_pmc_config_l3_counters(int blk_num, bool enable, bool reset) +static int mlxbf_pmc_config_l3_counters(unsigned int blk_num, bool enable, bool reset) { - uint32_t perfcnt_cfg = 0; + u32 perfcnt_cfg = 0; if (enable) perfcnt_cfg |= MLXBF_PMC_L3C_PERF_CNT_CFG_EN; @@ -1095,12 +1257,9 @@ static int mlxbf_pmc_config_l3_counters(int blk_num, bool enable, bool reset) } /* Method to handle l3cache counter programming */ -static int mlxbf_pmc_program_l3_counter(int blk_num, uint32_t cnt_num, - uint32_t evt) +static int mlxbf_pmc_program_l3_counter(unsigned int blk_num, u32 cnt_num, u32 evt) { - uint32_t perfcnt_sel_1 = 0; - uint32_t perfcnt_sel = 0; - uint32_t *wordaddr; + u32 perfcnt_sel_1 = 0, perfcnt_sel = 0, *wordaddr; void __iomem *pmcaddr; int ret; @@ -1162,15 +1321,14 @@ static int mlxbf_pmc_program_l3_counter(int blk_num, uint32_t cnt_num, } /* Method to handle crspace counter programming */ -static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num, - uint32_t evt) +static int mlxbf_pmc_program_crspace_counter(unsigned int blk_num, u32 cnt_num, u32 evt) { - uint32_t word; - void *addr; + void __iomem *addr; + u32 word; int ret; addr = pmc->block[blk_num].mmio_base + - (rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); + ((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); ret = mlxbf_pmc_readl(addr, &word); if (ret) return ret; @@ -1187,9 +1345,9 @@ static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num, } /* Method to clear crspace counter value */ -static int mlxbf_pmc_clear_crspace_counter(int blk_num, uint32_t cnt_num) +static int mlxbf_pmc_clear_crspace_counter(unsigned int blk_num, u32 cnt_num) { - void *addr; + void __iomem *addr; addr = pmc->block[blk_num].mmio_base + MLXBF_PMC_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) + @@ -1199,10 +1357,9 @@ static int mlxbf_pmc_clear_crspace_counter(int blk_num, uint32_t cnt_num) } /* Method to program a counter to monitor an event */ -static int mlxbf_pmc_program_counter(int blk_num, uint32_t cnt_num, - uint32_t evt, bool is_l3) +static int mlxbf_pmc_program_counter(unsigned int blk_num, u32 cnt_num, u32 evt, bool is_l3) { - uint64_t perfctl, perfevt, perfmon_cfg; + u64 perfctl, perfevt, perfmon_cfg; if (cnt_num >= pmc->block[blk_num].counters) return -ENODEV; @@ -1263,12 +1420,11 @@ static int mlxbf_pmc_program_counter(int blk_num, uint32_t cnt_num, } /* Method to handle l3 counter reads */ -static int mlxbf_pmc_read_l3_counter(int blk_num, uint32_t cnt_num, - uint64_t *result) +static int mlxbf_pmc_read_l3_counter(unsigned int blk_num, u32 cnt_num, u64 *result) { - uint32_t perfcnt_low = 0, perfcnt_high = 0; - uint64_t value; + u32 perfcnt_low = 0, perfcnt_high = 0; int status; + u64 value; status = mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + MLXBF_PMC_L3C_PERF_CNT_LOW + @@ -1295,11 +1451,10 @@ static int mlxbf_pmc_read_l3_counter(int blk_num, uint32_t cnt_num, } /* Method to handle crspace counter reads */ -static int mlxbf_pmc_read_crspace_counter(int blk_num, uint32_t cnt_num, - uint64_t *result) +static int mlxbf_pmc_read_crspace_counter(unsigned int blk_num, u32 cnt_num, u64 *result) { - uint32_t value; int status = 0; + u32 value; status = mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + MLXBF_PMC_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) + @@ -1313,11 +1468,10 @@ static int mlxbf_pmc_read_crspace_counter(int blk_num, uint32_t cnt_num, } /* Method to read the counter value */ -static int mlxbf_pmc_read_counter(int blk_num, uint32_t cnt_num, bool is_l3, - uint64_t *result) +static int mlxbf_pmc_read_counter(unsigned int blk_num, u32 cnt_num, bool is_l3, u64 *result) { - uint32_t perfcfg_offset, perfval_offset; - uint64_t perfmon_cfg; + u32 perfcfg_offset, perfval_offset; + u64 perfmon_cfg; int status; if (cnt_num >= pmc->block[blk_num].counters) @@ -1351,13 +1505,11 @@ static int mlxbf_pmc_read_counter(int blk_num, uint32_t cnt_num, bool is_l3, } /* Method to read L3 block event */ -static int mlxbf_pmc_read_l3_event(int blk_num, uint32_t cnt_num, - uint64_t *result) +static int mlxbf_pmc_read_l3_event(unsigned int blk_num, u32 cnt_num, u64 *result) { - uint32_t perfcnt_sel = 0, perfcnt_sel_1 = 0; - uint32_t *wordaddr; + u32 perfcnt_sel = 0, perfcnt_sel_1 = 0, *wordaddr; void __iomem *pmcaddr; - uint64_t evt; + u64 evt; /* Select appropriate register information */ switch (cnt_num) { @@ -1405,15 +1557,14 @@ static int mlxbf_pmc_read_l3_event(int blk_num, uint32_t cnt_num, } /* Method to read crspace block event */ -static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num, - uint64_t *result) +static int mlxbf_pmc_read_crspace_event(unsigned int blk_num, u32 cnt_num, u64 *result) { - uint32_t word, evt; - void *addr; + u32 word, evt; + void __iomem *addr; int ret; addr = pmc->block[blk_num].mmio_base + - (rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); + ((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ); ret = mlxbf_pmc_readl(addr, &word); if (ret) return ret; @@ -1429,11 +1580,10 @@ static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num, } /* Method to find the event currently being monitored by a counter */ -static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3, - uint64_t *result) +static int mlxbf_pmc_read_event(unsigned int blk_num, u32 cnt_num, bool is_l3, u64 *result) { - uint32_t perfcfg_offset, perfval_offset; - uint64_t perfmon_cfg, perfevt; + u32 perfcfg_offset, perfval_offset; + u64 perfmon_cfg, perfevt; if (cnt_num >= pmc->block[blk_num].counters) return -EINVAL; @@ -1469,16 +1619,17 @@ static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3, } /* Method to read a register */ -static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result) +static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result) { - uint32_t ecc_out; + u32 reg; - if (strstr(pmc->block_name[blk_num], "ecc")) { + if ((strstr(pmc->block_name[blk_num], "ecc")) || + (strstr(pmc->block_name[blk_num], "clock_measure"))) { if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset, - &ecc_out)) + ®)) return -EFAULT; - *result = ecc_out; + *result = reg; return 0; } @@ -1490,8 +1641,11 @@ static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result) } /* Method to write to a register */ -static int mlxbf_pmc_write_reg(int blk_num, uint32_t offset, uint64_t data) +static int mlxbf_pmc_write_reg(unsigned int blk_num, u32 offset, u64 data) { + if (strstr(pmc->block_name[blk_num], "clock_measure")) + return -EINVAL; + if (strstr(pmc->block_name[blk_num], "ecc")) { return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset, MLXBF_PMC_WRITE_REG_32, data); @@ -1510,9 +1664,10 @@ static ssize_t mlxbf_pmc_counter_show(struct device *dev, { struct mlxbf_pmc_attribute *attr_counter = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int blk_num, cnt_num, offset; + unsigned int blk_num, cnt_num; bool is_l3 = false; - uint64_t value; + int offset; + u64 value; blk_num = attr_counter->nr; cnt_num = attr_counter->index; @@ -1544,14 +1699,16 @@ static ssize_t mlxbf_pmc_counter_store(struct device *dev, { struct mlxbf_pmc_attribute *attr_counter = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int blk_num, cnt_num, offset, err, data; + unsigned int blk_num, cnt_num, data; bool is_l3 = false; - uint64_t evt_num; + u64 evt_num; + int offset; + int err; blk_num = attr_counter->nr; cnt_num = attr_counter->index; - err = kstrtoint(buf, 0, &data); + err = kstrtouint(buf, 0, &data); if (err < 0) return err; @@ -1580,7 +1737,7 @@ static ssize_t mlxbf_pmc_counter_store(struct device *dev, if (err) return err; } else if (pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE) { - if (sscanf(attr->attr.name, "counter%d", &cnt_num) != 1) + if (sscanf(attr->attr.name, "counter%u", &cnt_num) != 1) return -EINVAL; err = mlxbf_pmc_clear_crspace_counter(blk_num, cnt_num); } else @@ -1595,10 +1752,11 @@ static ssize_t mlxbf_pmc_event_show(struct device *dev, { struct mlxbf_pmc_attribute *attr_event = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int blk_num, cnt_num, err; + unsigned int blk_num, cnt_num; bool is_l3 = false; - uint64_t evt_num; char *evt_name; + u64 evt_num; + int err; blk_num = attr_event->nr; cnt_num = attr_event->index; @@ -1624,8 +1782,10 @@ static ssize_t mlxbf_pmc_event_store(struct device *dev, { struct mlxbf_pmc_attribute *attr_event = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int blk_num, cnt_num, evt_num, err; + unsigned int blk_num, cnt_num; bool is_l3 = false; + int evt_num; + int err; blk_num = attr_event->nr; cnt_num = attr_event->index; @@ -1636,7 +1796,7 @@ static ssize_t mlxbf_pmc_event_store(struct device *dev, if (evt_num < 0) return -EINVAL; } else { - err = kstrtoint(buf, 0, &evt_num); + err = kstrtouint(buf, 0, &evt_num); if (err < 0) return err; } @@ -1658,9 +1818,11 @@ static ssize_t mlxbf_pmc_event_list_show(struct device *dev, { struct mlxbf_pmc_attribute *attr_event_list = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int blk_num, i, size, len = 0, ret = 0; const struct mlxbf_pmc_events *events; char e_info[MLXBF_PMC_EVENT_INFO_LEN]; + unsigned int blk_num, i, len = 0; + size_t size; + int ret = 0; blk_num = attr_event_list->nr; @@ -1686,8 +1848,8 @@ static ssize_t mlxbf_pmc_enable_show(struct device *dev, { struct mlxbf_pmc_attribute *attr_enable = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - uint32_t perfcnt_cfg, word; - int blk_num, value; + unsigned int blk_num, value; + u32 perfcnt_cfg, word; blk_num = attr_enable->nr; @@ -1707,7 +1869,7 @@ static ssize_t mlxbf_pmc_enable_show(struct device *dev, value = FIELD_GET(MLXBF_PMC_L3C_PERF_CNT_CFG_EN, perfcnt_cfg); } - return sysfs_emit(buf, "%d\n", value); + return sysfs_emit(buf, "%u\n", value); } /* Store function for "enable" sysfs files - only for l3cache & crspace */ @@ -1717,12 +1879,13 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev, { struct mlxbf_pmc_attribute *attr_enable = container_of( attr, struct mlxbf_pmc_attribute, dev_attr); - int err, en, blk_num; - uint32_t word; + unsigned int en, blk_num; + u32 word; + int err; blk_num = attr_enable->nr; - err = kstrtoint(buf, 0, &en); + err = kstrtouint(buf, 0, &en); if (err < 0) return err; @@ -1759,14 +1922,61 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev, return count; } +/* Show function for "count_clock" sysfs files - only for crspace */ +static ssize_t mlxbf_pmc_count_clock_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mlxbf_pmc_attribute *attr_count_clock = container_of( + attr, struct mlxbf_pmc_attribute, dev_attr); + unsigned int blk_num; + u32 reg; + + blk_num = attr_count_clock->nr; + + if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + + MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(pmc->block[blk_num].counters), + ®)) + return -EINVAL; + + return sysfs_emit(buf, "%u\n", reg); +} + +/* Store function for "count_clock" sysfs files - only for crspace */ +static ssize_t mlxbf_pmc_count_clock_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct mlxbf_pmc_attribute *attr_count_clock = container_of( + attr, struct mlxbf_pmc_attribute, dev_attr); + unsigned int blk_num; + u32 reg; + int err; + + blk_num = attr_count_clock->nr; + + err = kstrtouint(buf, 0, ®); + if (err < 0) + return err; + + mlxbf_pmc_write(pmc->block[blk_num].mmio_base + + MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(pmc->block[blk_num].counters), + MLXBF_PMC_WRITE_REG_32, reg); + + return count; +} + /* Populate attributes for blocks with counters to monitor performance */ -static int mlxbf_pmc_init_perftype_counter(struct device *dev, int blk_num) +static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_num) { struct mlxbf_pmc_attribute *attr; - int i = 0, j = 0; + unsigned int i = 0, j = 0; + + if (!mlxbf_pmc_event_supported(pmc->block_name[blk_num])) + return -ENOENT; /* "event_list" sysfs to list events supported by the block */ attr = &pmc->block[blk_num].attr_event_list; + sysfs_attr_init(&attr->dev_attr.attr); attr->dev_attr.attr.mode = 0444; attr->dev_attr.show = mlxbf_pmc_event_list_show; attr->nr = blk_num; @@ -1780,6 +1990,7 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, int blk_num) if (strstr(pmc->block_name[blk_num], "l3cache") || ((pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE))) { attr = &pmc->block[blk_num].attr_enable; + sysfs_attr_init(&attr->dev_attr.attr); attr->dev_attr.attr.mode = 0644; attr->dev_attr.show = mlxbf_pmc_enable_show; attr->dev_attr.store = mlxbf_pmc_enable_store; @@ -1792,6 +2003,21 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, int blk_num) attr = NULL; } + if (pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE) { + /* Program crspace counters to count clock cycles using "count_clock" sysfs */ + attr = &pmc->block[blk_num].attr_count_clock; + attr->dev_attr.attr.mode = 0644; + attr->dev_attr.show = mlxbf_pmc_count_clock_show; + attr->dev_attr.store = mlxbf_pmc_count_clock_store; + attr->nr = blk_num; + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, + "count_clock"); + if (!attr->dev_attr.attr.name) + return -ENOMEM; + pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr; + attr = NULL; + } + pmc->block[blk_num].attr_counter = devm_kcalloc( dev, pmc->block[blk_num].counters, sizeof(struct mlxbf_pmc_attribute), GFP_KERNEL); @@ -1807,26 +2033,26 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, int blk_num) /* "eventX" and "counterX" sysfs to program and read counter values */ for (j = 0; j < pmc->block[blk_num].counters; ++j) { attr = &pmc->block[blk_num].attr_counter[j]; + sysfs_attr_init(&attr->dev_attr.attr); attr->dev_attr.attr.mode = 0644; attr->dev_attr.show = mlxbf_pmc_counter_show; attr->dev_attr.store = mlxbf_pmc_counter_store; attr->index = j; attr->nr = blk_num; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "counter%d", j); + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, "counter%u", j); if (!attr->dev_attr.attr.name) return -ENOMEM; pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr; attr = NULL; attr = &pmc->block[blk_num].attr_event[j]; + sysfs_attr_init(&attr->dev_attr.attr); attr->dev_attr.attr.mode = 0644; attr->dev_attr.show = mlxbf_pmc_event_show; attr->dev_attr.store = mlxbf_pmc_event_store; attr->index = j; attr->nr = blk_num; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "event%d", j); + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, "event%u", j); if (!attr->dev_attr.attr.name) return -ENOMEM; pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr; @@ -1837,30 +2063,32 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, int blk_num) } /* Populate attributes for blocks with registers to monitor performance */ -static int mlxbf_pmc_init_perftype_reg(struct device *dev, int blk_num) +static int mlxbf_pmc_init_perftype_reg(struct device *dev, unsigned int blk_num) { - struct mlxbf_pmc_attribute *attr; const struct mlxbf_pmc_events *events; - int i = 0, j = 0; + struct mlxbf_pmc_attribute *attr; + unsigned int i = 0; + size_t count = 0; - events = mlxbf_pmc_event_list(pmc->block_name[blk_num], &j); + events = mlxbf_pmc_event_list(pmc->block_name[blk_num], &count); if (!events) - return -EINVAL; + return -ENOENT; pmc->block[blk_num].attr_event = devm_kcalloc( - dev, j, sizeof(struct mlxbf_pmc_attribute), GFP_KERNEL); + dev, count, sizeof(struct mlxbf_pmc_attribute), GFP_KERNEL); if (!pmc->block[blk_num].attr_event) return -ENOMEM; - while (j > 0) { - --j; - attr = &pmc->block[blk_num].attr_event[j]; + while (count > 0) { + --count; + attr = &pmc->block[blk_num].attr_event[count]; + sysfs_attr_init(&attr->dev_attr.attr); attr->dev_attr.attr.mode = 0644; attr->dev_attr.show = mlxbf_pmc_counter_show; attr->dev_attr.store = mlxbf_pmc_counter_store; attr->nr = blk_num; attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - events[j].evt_name); + events[count].evt_name); if (!attr->dev_attr.attr.name) return -ENOMEM; pmc->block[blk_num].block_attr[i] = &attr->dev_attr.attr; @@ -1872,7 +2100,7 @@ static int mlxbf_pmc_init_perftype_reg(struct device *dev, int blk_num) } /* Helper to create the bfperf sysfs sub-directories and files */ -static int mlxbf_pmc_create_groups(struct device *dev, int blk_num) +static int mlxbf_pmc_create_groups(struct device *dev, unsigned int blk_num) { int err; @@ -1883,7 +2111,7 @@ static int mlxbf_pmc_create_groups(struct device *dev, int blk_num) else if (pmc->block[blk_num].type == MLXBF_PMC_TYPE_REGISTER) err = mlxbf_pmc_init_perftype_reg(dev, blk_num); else - err = -EINVAL; + err = -ENOENT; if (err) return err; @@ -1914,19 +2142,20 @@ static bool mlxbf_pmc_guid_match(const guid_t *guid, /* Helper to map the Performance Counters from the varios blocks */ static int mlxbf_pmc_map_counters(struct device *dev) { - uint64_t info[MLXBF_PMC_INFO_SZ]; - int i, tile_num, ret; + u64 info[MLXBF_PMC_INFO_SZ]; + unsigned int tile_num, i; + int ret; for (i = 0; i < pmc->total_blocks; ++i) { /* Create sysfs for tiles only if block number < tile_count */ if (strstr(pmc->block_name[i], "tilenet")) { - if (sscanf(pmc->block_name[i], "tilenet%d", &tile_num) != 1) + if (sscanf(pmc->block_name[i], "tilenet%u", &tile_num) != 1) continue; if (tile_num >= pmc->tile_count) continue; } else if (strstr(pmc->block_name[i], "tile")) { - if (sscanf(pmc->block_name[i], "tile%d", &tile_num) != 1) + if (sscanf(pmc->block_name[i], "tile%u", &tile_num) != 1) continue; if (tile_num >= pmc->tile_count) @@ -1936,34 +2165,57 @@ static int mlxbf_pmc_map_counters(struct device *dev) /* Create sysfs only for enabled MSS blocks */ if (strstr(pmc->block_name[i], "mss") && pmc->event_set == MLXBF_PMC_EVENT_SET_BF3) { - int mss_num; + unsigned int mss_num; - if (sscanf(pmc->block_name[i], "mss%d", &mss_num) != 1) + if (sscanf(pmc->block_name[i], "mss%u", &mss_num) != 1) continue; if (!((pmc->mss_enable >> mss_num) & 0x1)) continue; } + /* Create sysfs only for enabled EMI blocks */ + if (strstr(pmc->block_name[i], "emi") && + pmc->event_set == MLXBF_PMC_EVENT_SET_BF3) { + unsigned int emi_num; + + if (sscanf(pmc->block_name[i], "emi%u", &emi_num) != 1) + continue; + + if (!((pmc->mss_enable >> (emi_num / 2)) & 0x1)) + continue; + } + /* Create sysfs only for enabled LLT blocks */ if (strstr(pmc->block_name[i], "llt_miss")) { - int llt_num; + unsigned int llt_num; - if (sscanf(pmc->block_name[i], "llt_miss%d", &llt_num) != 1) + if (sscanf(pmc->block_name[i], "llt_miss%u", &llt_num) != 1) continue; if (!((pmc->llt_enable >> llt_num) & 0x1)) continue; } else if (strstr(pmc->block_name[i], "llt")) { - int llt_num; + unsigned int llt_num; - if (sscanf(pmc->block_name[i], "llt%d", &llt_num) != 1) + if (sscanf(pmc->block_name[i], "llt%u", &llt_num) != 1) continue; if (!((pmc->llt_enable >> llt_num) & 0x1)) continue; } + /* Create sysfs only for enabled APT blocks */ + if (strstr(pmc->block_name[i], "apt")) { + unsigned int apt_num; + + if (sscanf(pmc->block_name[i], "apt%u", &apt_num) != 1) + continue; + + if (!((pmc->apt_enable >> apt_num) & 0x1)) + continue; + } + ret = device_property_read_u64_array(dev, pmc->block_name[i], info, MLXBF_PMC_INFO_SZ); if (ret) @@ -1987,6 +2239,10 @@ static int mlxbf_pmc_map_counters(struct device *dev) return -ENOMEM; ret = mlxbf_pmc_create_groups(dev, i); + if (ret == -ENOENT) { + dev_warn(dev, "ignoring unsupported block: '%s'\n", pmc->block_name[i]); + continue; + } if (ret) return ret; } @@ -2056,13 +2312,17 @@ static int mlxbf_pmc_probe(struct platform_device *pdev) return -EFAULT; if (device_property_read_u32(dev, "tile_num", &pmc->tile_count)) { + if (device_property_read_u8(dev, "apt_enable", &pmc->apt_enable)) { + dev_warn(dev, "Number of APTs undefined, ignoring blocks\n"); + pmc->apt_enable = 0; + } if (device_property_read_u8(dev, "llt_enable", &pmc->llt_enable)) { - dev_err(dev, "Number of tiles/LLTs undefined\n"); - return -EINVAL; + dev_warn(dev, "Number of LLTs undefined, ignoring blocks\n"); + pmc->llt_enable = 0; } if (device_property_read_u8(dev, "mss_enable", &pmc->mss_enable)) { - dev_err(dev, "Number of tiles/MSSs undefined\n"); - return -EINVAL; + dev_warn(dev, "Number of MSSs undefined, ignoring blocks\n"); + pmc->mss_enable = 0; } } |