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path: root/drivers/remoteproc/mtk_scp.c
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Diffstat (limited to 'drivers/remoteproc/mtk_scp.c')
-rw-r--r--drivers/remoteproc/mtk_scp.c164
1 files changed, 85 insertions, 79 deletions
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 48e759c2d486..f88e60e4bc21 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -152,45 +152,45 @@ static void mt8183_scp_reset_assert(struct mtk_scp *scp)
{
u32 val;
- val = readl(scp->reg_base + MT8183_SW_RSTN);
+ val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
val &= ~MT8183_SW_RSTN_BIT;
- writel(val, scp->reg_base + MT8183_SW_RSTN);
+ writel(val, scp->cluster->reg_base + MT8183_SW_RSTN);
}
static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
{
u32 val;
- val = readl(scp->reg_base + MT8183_SW_RSTN);
+ val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
val |= MT8183_SW_RSTN_BIT;
- writel(val, scp->reg_base + MT8183_SW_RSTN);
+ writel(val, scp->cluster->reg_base + MT8183_SW_RSTN);
}
static void mt8192_scp_reset_assert(struct mtk_scp *scp)
{
- writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
+ writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
}
static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
{
- writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
+ writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_CLR);
}
static void mt8195_scp_c1_reset_assert(struct mtk_scp *scp)
{
- writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_SET);
+ writel(1, scp->cluster->reg_base + MT8195_CORE1_SW_RSTN_SET);
}
static void mt8195_scp_c1_reset_deassert(struct mtk_scp *scp)
{
- writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_CLR);
+ writel(1, scp->cluster->reg_base + MT8195_CORE1_SW_RSTN_CLR);
}
static void mt8183_scp_irq_handler(struct mtk_scp *scp)
{
u32 scp_to_host;
- scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
+ scp_to_host = readl(scp->cluster->reg_base + MT8183_SCP_TO_HOST);
if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
scp_ipi_handler(scp);
else
@@ -198,14 +198,14 @@ static void mt8183_scp_irq_handler(struct mtk_scp *scp)
/* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
- scp->reg_base + MT8183_SCP_TO_HOST);
+ scp->cluster->reg_base + MT8183_SCP_TO_HOST);
}
static void mt8192_scp_irq_handler(struct mtk_scp *scp)
{
u32 scp_to_host;
- scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
+ scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
scp_ipi_handler(scp);
@@ -215,10 +215,10 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
* MT8192_SCP2APMCU_IPC.
*/
writel(MT8192_SCP_IPC_INT_BIT,
- scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
+ scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR);
} else {
scp_wdt_handler(scp, scp_to_host);
- writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
+ writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ);
}
}
@@ -226,12 +226,12 @@ static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp)
{
u32 scp_to_host;
- scp_to_host = readl(scp->reg_base + MT8195_SSHUB2APMCU_IPC_SET);
+ scp_to_host = readl(scp->cluster->reg_base + MT8195_SSHUB2APMCU_IPC_SET);
if (scp_to_host & MT8192_SCP_IPC_INT_BIT)
scp_ipi_handler(scp);
- writel(scp_to_host, scp->reg_base + MT8195_SSHUB2APMCU_IPC_CLR);
+ writel(scp_to_host, scp->cluster->reg_base + MT8195_SSHUB2APMCU_IPC_CLR);
}
static irqreturn_t scp_irq_handler(int irq, void *priv)
@@ -363,26 +363,26 @@ static int mt8195_scp_clk_get(struct mtk_scp *scp)
static int mt8183_scp_before_load(struct mtk_scp *scp)
{
/* Clear SCP to host interrupt */
- writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
+ writel(MT8183_SCP_IPC_INT_BIT, scp->cluster->reg_base + MT8183_SCP_TO_HOST);
/* Reset clocks before loading FW */
- writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
- writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_SW_SEL);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_DIV_SEL);
/* Initialize TCM before loading FW. */
- writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
- writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_L1_SRAM_PD);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
/* Turn on the power of SCP's SRAM before using it. */
- writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_SRAM_PDN);
/*
* Set I-cache and D-cache size before loading SCP FW.
* SCP SRAM logical address may change when cache size setting differs.
*/
writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
- scp->reg_base + MT8183_SCP_CACHE_CON);
- writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
+ scp->cluster->reg_base + MT8183_SCP_CACHE_CON);
+ writel(MT8183_SCP_CACHESIZE_8KB, scp->cluster->reg_base + MT8183_SCP_DCACHE_CON);
return 0;
}
@@ -408,28 +408,28 @@ static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
static int mt8186_scp_before_load(struct mtk_scp *scp)
{
/* Clear SCP to host interrupt */
- writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
+ writel(MT8183_SCP_IPC_INT_BIT, scp->cluster->reg_base + MT8183_SCP_TO_HOST);
/* Reset clocks before loading FW */
- writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
- writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_SW_SEL);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_DIV_SEL);
/* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/
- scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8183_SCP_SRAM_PDN, 0);
/* Initialize TCM before loading FW. */
- writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
- writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
- writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
- writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_L1_SRAM_PD);
+ writel(0x0, scp->cluster->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
+ writel(0x0, scp->cluster->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
+ writel(0x0, scp->cluster->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
/*
* Set I-cache and D-cache size before loading SCP FW.
* SCP SRAM logical address may change when cache size setting differs.
*/
writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
- scp->reg_base + MT8183_SCP_CACHE_CON);
- writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
+ scp->cluster->reg_base + MT8183_SCP_CACHE_CON);
+ writel(MT8183_SCP_CACHESIZE_8KB, scp->cluster->reg_base + MT8183_SCP_DCACHE_CON);
return 0;
}
@@ -437,19 +437,19 @@ static int mt8186_scp_before_load(struct mtk_scp *scp)
static int mt8192_scp_before_load(struct mtk_scp *scp)
{
/* clear SPM interrupt, SCP2SPM_IPC_CLR */
- writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
+ writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
- writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
+ writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
/* enable SRAM clock */
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
- scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* enable MPU for all memory regions */
- writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
+ writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
return 0;
}
@@ -457,20 +457,20 @@ static int mt8192_scp_before_load(struct mtk_scp *scp)
static int mt8195_scp_before_load(struct mtk_scp *scp)
{
/* clear SPM interrupt, SCP2SPM_IPC_CLR */
- writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
+ writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
- writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
+ writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
/* enable SRAM clock */
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
- scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* enable MPU for all memory regions */
- writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
+ writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
return 0;
}
@@ -479,10 +479,10 @@ static int mt8195_scp_c1_before_load(struct mtk_scp *scp)
{
scp->data->scp_reset_assert(scp);
- scp_sram_power_on(scp->reg_base + MT8195_CPU1_SRAM_PD, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
/* enable MPU for all memory regions */
- writel(0xff, scp->reg_base + MT8195_CORE1_MEM_ATT_PREDEF);
+ writel(0xff, scp->cluster->reg_base + MT8195_CORE1_MEM_ATT_PREDEF);
return 0;
}
@@ -601,11 +601,11 @@ static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
}
/* optional memory region */
- if (scp->l1tcm_size &&
- da >= scp->l1tcm_phys &&
- (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) {
- offset = da - scp->l1tcm_phys;
- return (void __force *)scp->l1tcm_base + offset;
+ if (scp->cluster->l1tcm_size &&
+ da >= scp->cluster->l1tcm_phys &&
+ (da + len) <= scp->cluster->l1tcm_phys + scp->cluster->l1tcm_size) {
+ offset = da - scp->cluster->l1tcm_phys;
+ return (void __force *)scp->cluster->l1tcm_base + offset;
}
/* optional memory region */
@@ -629,43 +629,43 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iome
static void mt8183_scp_stop(struct mtk_scp *scp)
{
/* Disable SCP watchdog */
- writel(0, scp->reg_base + MT8183_WDT_CFG);
+ writel(0, scp->cluster->reg_base + MT8183_WDT_CFG);
}
static void mt8192_scp_stop(struct mtk_scp *scp)
{
/* Disable SRAM clock */
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
- scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* Disable SCP watchdog */
- writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
+ writel(0, scp->cluster->reg_base + MT8192_CORE0_WDT_CFG);
}
static void mt8195_scp_stop(struct mtk_scp *scp)
{
/* Disable SRAM clock */
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
- scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* Disable SCP watchdog */
- writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
+ writel(0, scp->cluster->reg_base + MT8192_CORE0_WDT_CFG);
}
static void mt8195_scp_c1_stop(struct mtk_scp *scp)
{
/* Power off CPU SRAM */
- scp_sram_power_off(scp->reg_base + MT8195_CPU1_SRAM_PD, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
/* Disable SCP watchdog */
- writel(0, scp->reg_base + MT8195_CORE1_WDT_CFG);
+ writel(0, scp->cluster->reg_base + MT8195_CORE1_WDT_CFG);
}
static int scp_stop(struct rproc *rproc)
@@ -859,11 +859,16 @@ static int scp_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct mtk_scp *scp;
+ struct mtk_scp_of_cluster *scp_cluster;
struct rproc *rproc;
struct resource *res;
const char *fw_name = "scp.img";
int ret, i;
+ scp_cluster = devm_kzalloc(dev, sizeof(*scp_cluster), GFP_KERNEL);
+ if (!scp_cluster)
+ return -ENOMEM;
+
ret = rproc_of_parse_firmware(dev, 0, &fw_name);
if (ret < 0 && ret != -EINVAL)
return ret;
@@ -876,6 +881,7 @@ static int scp_probe(struct platform_device *pdev)
scp->rproc = rproc;
scp->dev = dev;
scp->data = of_device_get_match_data(dev);
+ scp->cluster = scp_cluster;
platform_set_drvdata(pdev, scp);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
@@ -889,20 +895,20 @@ static int scp_probe(struct platform_device *pdev)
/* l1tcm is an optional memory region */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm");
- scp->l1tcm_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(scp->l1tcm_base)) {
- ret = PTR_ERR(scp->l1tcm_base);
+ scp->cluster->l1tcm_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(scp->cluster->l1tcm_base)) {
+ ret = PTR_ERR(scp->cluster->l1tcm_base);
if (ret != -EINVAL) {
return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n");
}
} else {
- scp->l1tcm_size = resource_size(res);
- scp->l1tcm_phys = res->start;
+ scp->cluster->l1tcm_size = resource_size(res);
+ scp->cluster->l1tcm_phys = res->start;
}
- scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
- if (IS_ERR(scp->reg_base))
- return dev_err_probe(dev, PTR_ERR(scp->reg_base),
+ scp->cluster->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
+ if (IS_ERR(scp->cluster->reg_base))
+ return dev_err_probe(dev, PTR_ERR(scp->cluster->reg_base),
"Failed to parse and map cfg memory\n");
ret = scp->data->scp_clk_get(scp);
generated by cgit (git 2.34.1) at 2024-05-26 11:13:42 +0000