diff options
Diffstat (limited to 'drivers/staging/ccree')
-rw-r--r-- | drivers/staging/ccree/cc_hal.h | 33 | ||||
-rw-r--r-- | drivers/staging/ccree/cc_lli_defs.h | 2 | ||||
-rw-r--r-- | drivers/staging/ccree/cc_regs.h | 42 | ||||
-rw-r--r-- | drivers/staging/ccree/dx_reg_base_host.h | 25 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_aead.c | 258 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_buffer_mgr.c | 438 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_buffer_mgr.h | 5 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_cipher.c | 189 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_cipher.h | 13 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_driver.c | 381 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_driver.h | 55 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_fips.c | 26 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_fips.h | 4 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_hash.c | 377 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_ivgen.c | 18 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_pm.c | 35 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_request_mgr.c | 195 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_sram_mgr.c | 33 | ||||
-rw-r--r-- | drivers/staging/ccree/ssi_sysfs.c | 282 |
19 files changed, 997 insertions, 1414 deletions
diff --git a/drivers/staging/ccree/cc_hal.h b/drivers/staging/ccree/cc_hal.h deleted file mode 100644 index eecc866dfc74..000000000000 --- a/drivers/staging/ccree/cc_hal.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -/* pseudo cc_hal.h for cc7x_perf_test_driver (to be able to include code from - * CC drivers). - */ - -#ifndef __CC_HAL_H__ -#define __CC_HAL_H__ - -#include <linux/io.h> - -#define READ_REGISTER(_addr) ioread32((_addr)) -#define WRITE_REGISTER(_addr, _data) iowrite32((_data), (_addr)) - -#define CC_HAL_WRITE_REGISTER(offset, val) \ - WRITE_REGISTER(cc_base + (offset), val) -#define CC_HAL_READ_REGISTER(offset) READ_REGISTER(cc_base + (offset)) - -#endif diff --git a/drivers/staging/ccree/cc_lli_defs.h b/drivers/staging/ccree/cc_lli_defs.h index 851d3907167e..a9c417b07b04 100644 --- a/drivers/staging/ccree/cc_lli_defs.h +++ b/drivers/staging/ccree/cc_lli_defs.h @@ -59,7 +59,7 @@ static inline void cc_lli_set_addr(u32 *lli_p, dma_addr_t addr) lli_p[LLI_WORD0_OFFSET] = (addr & U32_MAX); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT lli_p[LLI_WORD1_OFFSET] &= ~LLI_HADDR_MASK; - lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 16)); + lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 32)); #endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */ } diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h deleted file mode 100644 index 4a893a6ba6ef..000000000000 --- a/drivers/staging/ccree/cc_regs.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -/*! - * @file - * @brief This file contains macro definitions for accessing ARM TrustZone - * CryptoCell register space. - */ - -#ifndef _CC_REGS_H_ -#define _CC_REGS_H_ - -#include <linux/bitfield.h> - -#define AXIM_MON_BASE_OFFSET CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_COMP) -#define AXIM_MON_COMP_VALUE GENMASK(DX_AXIM_MON_COMP_VALUE_BIT_SIZE + \ - DX_AXIM_MON_COMP_VALUE_BIT_SHIFT, \ - DX_AXIM_MON_COMP_VALUE_BIT_SHIFT) - -#define AXIM_MON_BASE_OFFSET CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_COMP) -#define AXIM_MON_COMP_VALUE GENMASK(DX_AXIM_MON_COMP_VALUE_BIT_SIZE + \ - DX_AXIM_MON_COMP_VALUE_BIT_SHIFT, \ - DX_AXIM_MON_COMP_VALUE_BIT_SHIFT) - -/* Register Offset macro */ -#define CC_REG_OFFSET(unit_name, reg_name) \ - (DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET) - -#endif /*_CC_REGS_H_*/ diff --git a/drivers/staging/ccree/dx_reg_base_host.h b/drivers/staging/ccree/dx_reg_base_host.h deleted file mode 100644 index 47bbadbcd1df..000000000000 --- a/drivers/staging/ccree/dx_reg_base_host.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef __DX_REG_BASE_HOST_H__ -#define __DX_REG_BASE_HOST_H__ - -#define DX_BASE_CC 0x80000000 -#define DX_BASE_HOST_RGF 0x0UL -#define DX_BASE_CRY_KERNEL 0x0UL -#define DX_BASE_ROM 0x40000000 - -#endif /*__DX_REG_BASE_HOST_H__*/ diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c index 5abe6b24ff8c..ba0954e4d2e5 100644 --- a/drivers/staging/ccree/ssi_aead.c +++ b/drivers/staging/ccree/ssi_aead.c @@ -92,18 +92,17 @@ static inline bool valid_assoclen(struct aead_request *req) static void ssi_aead_exit(struct crypto_aead *tfm) { - struct device *dev = NULL; struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("Clearing context @%p for %s\n", - crypto_aead_ctx(tfm), crypto_tfm_alg_name(&tfm->base)); + dev_dbg(dev, "Clearing context @%p for %s\n", crypto_aead_ctx(tfm), + crypto_tfm_alg_name(&tfm->base)); - dev = &ctx->drvdata->plat_dev->dev; /* Unmap enckey buffer */ if (ctx->enckey) { dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, ctx->enckey_dma_addr); - SSI_LOG_DEBUG("Freed enckey DMA buffer enckey_dma_addr=%pad\n", - ctx->enckey_dma_addr); + dev_dbg(dev, "Freed enckey DMA buffer enckey_dma_addr=%pad\n", + &ctx->enckey_dma_addr); ctx->enckey_dma_addr = 0; ctx->enckey = NULL; } @@ -116,8 +115,8 @@ static void ssi_aead_exit(struct crypto_aead *tfm) xcbc->xcbc_keys, xcbc->xcbc_keys_dma_addr); } - SSI_LOG_DEBUG("Freed xcbc_keys DMA buffer xcbc_keys_dma_addr=%pad\n", - xcbc->xcbc_keys_dma_addr); + dev_dbg(dev, "Freed xcbc_keys DMA buffer xcbc_keys_dma_addr=%pad\n", + &xcbc->xcbc_keys_dma_addr); xcbc->xcbc_keys_dma_addr = 0; xcbc->xcbc_keys = NULL; } else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC auth. */ @@ -127,8 +126,8 @@ static void ssi_aead_exit(struct crypto_aead *tfm) dma_free_coherent(dev, 2 * MAX_HMAC_DIGEST_SIZE, hmac->ipad_opad, hmac->ipad_opad_dma_addr); - SSI_LOG_DEBUG("Freed ipad_opad DMA buffer ipad_opad_dma_addr=%pad\n", - hmac->ipad_opad_dma_addr); + dev_dbg(dev, "Freed ipad_opad DMA buffer ipad_opad_dma_addr=%pad\n", + &hmac->ipad_opad_dma_addr); hmac->ipad_opad_dma_addr = 0; hmac->ipad_opad = NULL; } @@ -136,8 +135,8 @@ static void ssi_aead_exit(struct crypto_aead *tfm) dma_free_coherent(dev, MAX_HMAC_BLOCK_SIZE, hmac->padded_authkey, hmac->padded_authkey_dma_addr); - SSI_LOG_DEBUG("Freed padded_authkey DMA buffer padded_authkey_dma_addr=%pad\n", - hmac->padded_authkey_dma_addr); + dev_dbg(dev, "Freed padded_authkey DMA buffer padded_authkey_dma_addr=%pad\n", + &hmac->padded_authkey_dma_addr); hmac->padded_authkey_dma_addr = 0; hmac->padded_authkey = NULL; } @@ -146,29 +145,31 @@ static void ssi_aead_exit(struct crypto_aead *tfm) static int ssi_aead_init(struct crypto_aead *tfm) { - struct device *dev; struct aead_alg *alg = crypto_aead_alg(tfm); struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct ssi_crypto_alg *ssi_alg = container_of(alg, struct ssi_crypto_alg, aead_alg); - SSI_LOG_DEBUG("Initializing context @%p for %s\n", ctx, crypto_tfm_alg_name(&tfm->base)); + struct device *dev = drvdata_to_dev(ssi_alg->drvdata); + + dev_dbg(dev, "Initializing context @%p for %s\n", ctx, + crypto_tfm_alg_name(&tfm->base)); /* Initialize modes in instance */ ctx->cipher_mode = ssi_alg->cipher_mode; ctx->flow_mode = ssi_alg->flow_mode; ctx->auth_mode = ssi_alg->auth_mode; ctx->drvdata = ssi_alg->drvdata; - dev = &ctx->drvdata->plat_dev->dev; crypto_aead_set_reqsize(tfm, sizeof(struct aead_req_ctx)); /* Allocate key buffer, cache line aligned */ ctx->enckey = dma_alloc_coherent(dev, AES_MAX_KEY_SIZE, &ctx->enckey_dma_addr, GFP_KERNEL); if (!ctx->enckey) { - SSI_LOG_ERR("Failed allocating key buffer\n"); + dev_err(dev, "Failed allocating key buffer\n"); goto init_failed; } - SSI_LOG_DEBUG("Allocated enckey buffer in context ctx->enckey=@%p\n", ctx->enckey); + dev_dbg(dev, "Allocated enckey buffer in context ctx->enckey=@%p\n", + ctx->enckey); /* Set default authlen value */ @@ -182,7 +183,7 @@ static int ssi_aead_init(struct crypto_aead *tfm) &xcbc->xcbc_keys_dma_addr, GFP_KERNEL); if (!xcbc->xcbc_keys) { - SSI_LOG_ERR("Failed allocating buffer for XCBC keys\n"); + dev_err(dev, "Failed allocating buffer for XCBC keys\n"); goto init_failed; } } else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC authentication */ @@ -196,12 +197,12 @@ static int ssi_aead_init(struct crypto_aead *tfm) GFP_KERNEL); if (!hmac->ipad_opad) { - SSI_LOG_ERR("Failed allocating IPAD/OPAD buffer\n"); + dev_err(dev, "Failed allocating IPAD/OPAD buffer\n"); goto init_failed; } - SSI_LOG_DEBUG("Allocated authkey buffer in context ctx->authkey=@%p\n", - hmac->ipad_opad); + dev_dbg(dev, "Allocated authkey buffer in context ctx->authkey=@%p\n", + hmac->ipad_opad); hmac->padded_authkey = dma_alloc_coherent(dev, MAX_HMAC_BLOCK_SIZE, @@ -209,7 +210,7 @@ static int ssi_aead_init(struct crypto_aead *tfm) GFP_KERNEL); if (!hmac->padded_authkey) { - SSI_LOG_ERR("failed to allocate padded_authkey\n"); + dev_err(dev, "failed to allocate padded_authkey\n"); goto init_failed; } } else { @@ -240,8 +241,7 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) { if (memcmp(areq_ctx->mac_buf, areq_ctx->icv_virt_addr, ctx->authsize) != 0) { - SSI_LOG_DEBUG("Payload authentication failure, " - "(auth-size=%d, cipher=%d).\n", + dev_dbg(dev, "Payload authentication failure, (auth-size=%d, cipher=%d)\n", ctx->authsize, ctx->cipher_mode); /* In case of payload authentication failure, MUST NOT * revealed the decrypted message --> zero its memory. @@ -252,8 +252,11 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c } else { /*ENCRYPT*/ if (unlikely(areq_ctx->is_icv_fragmented)) ssi_buffer_mgr_copy_scatterlist_portion( - areq_ctx->mac_buf, areq_ctx->dst_sgl, areq->cryptlen + areq_ctx->dst_offset, - areq->cryptlen + areq_ctx->dst_offset + ctx->authsize, SSI_SG_FROM_BUF); + dev, areq_ctx->mac_buf, areq_ctx->dst_sgl, + areq->cryptlen + areq_ctx->dst_offset, + (areq->cryptlen + areq_ctx->dst_offset + + ctx->authsize), + SSI_SG_FROM_BUF); /* If an IV was generated, copy it back to the user provided buffer. */ if (areq_ctx->backup_giv) { @@ -377,8 +380,10 @@ static int hmac_setkey(struct cc_hw_desc *desc, struct ssi_aead_ctx *ctx) static int validate_keys_sizes(struct ssi_aead_ctx *ctx) { - SSI_LOG_DEBUG("enc_keylen=%u authkeylen=%u\n", - ctx->enc_keylen, ctx->auth_keylen); + struct device *dev = drvdata_to_dev(ctx->drvdata); + + dev_dbg(dev, "enc_keylen=%u authkeylen=%u\n", + ctx->enc_keylen, ctx->auth_keylen); switch (ctx->auth_mode) { case DRV_HASH_SHA1: @@ -395,22 +400,22 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx) return -EINVAL; break; default: - SSI_LOG_ERR("Invalid auth_mode=%d\n", ctx->auth_mode); + dev_err(dev, "Invalid auth_mode=%d\n", ctx->auth_mode); return -EINVAL; } /* Check cipher key size */ if (unlikely(ctx->flow_mode == S_DIN_to_DES)) { if (ctx->enc_keylen != DES3_EDE_KEY_SIZE) { - SSI_LOG_ERR("Invalid cipher(3DES) key size: %u\n", - ctx->enc_keylen); + dev_err(dev, "Invalid cipher(3DES) key size: %u\n", + ctx->enc_keylen); return -EINVAL; } } else { /* Default assumed to be AES ciphers */ if ((ctx->enc_keylen != AES_KEYSIZE_128) && (ctx->enc_keylen != AES_KEYSIZE_192) && (ctx->enc_keylen != AES_KEYSIZE_256)) { - SSI_LOG_ERR("Invalid cipher(AES) key size: %u\n", - ctx->enc_keylen); + dev_err(dev, "Invalid cipher(AES) key size: %u\n", + ctx->enc_keylen); return -EINVAL; } } @@ -426,7 +431,7 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl { dma_addr_t key_dma_addr = 0; struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); u32 larval_addr = ssi_ahash_get_larval_digest_sram_addr( ctx->drvdata, ctx->auth_mode); struct ssi_crypto_req ssi_req = {}; @@ -455,8 +460,8 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl if (likely(keylen != 0)) { key_dma_addr = dma_map_single(dev, (void *)key, keylen, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, key_dma_addr))) { - SSI_LOG_ERR("Mapping key va=0x%p len=%u for" - " DMA failed\n", key, keylen); + dev_err(dev, "Mapping key va=0x%p len=%u for DMA failed\n", + key, keylen); return -ENOMEM; } if (keylen > blocksize) { @@ -534,7 +539,7 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (unlikely(rc != 0)) - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); if (likely(key_dma_addr != 0)) dma_unmap_single(dev, key_dma_addr, keylen, DMA_TO_DEVICE); @@ -551,10 +556,10 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) struct crypto_authenc_key_param *param; struct cc_hw_desc desc[MAX_AEAD_SETKEY_SEQ]; int seq_len = 0, rc = -EINVAL; + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("Setting key in context @%p for %s. key=%p keylen=%u\n", - ctx, crypto_tfm_alg_name(crypto_aead_tfm(tfm)), - key, keylen); + dev_dbg(dev, "Setting key in context @%p for %s. key=%p keylen=%u\n", + ctx, crypto_tfm_alg_name(crypto_aead_tfm(tfm)), key, keylen); /* STAT_PHASE_0: Init and sanity checks */ @@ -622,7 +627,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) case DRV_HASH_NULL: /* non-authenc modes, e.g., CCM */ break; /* No auth. key setup */ default: - SSI_LOG_ERR("Unsupported authenc (%d)\n", ctx->auth_mode); + dev_err(dev, "Unsupported authenc (%d)\n", ctx->auth_mode); rc = -ENOTSUPP; goto badkey; } @@ -632,7 +637,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) if (seq_len > 0) { /* For CCM there is no sequence to setup the key */ rc = send_request(ctx->drvdata, &ssi_req, desc, seq_len, 0); if (unlikely(rc != 0)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); goto setkey_error; } } @@ -651,7 +656,6 @@ setkey_error: static int ssi_rfc4309_ccm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); - int rc = 0; if (keylen < 3) return -EINVAL; @@ -659,9 +663,7 @@ static int ssi_rfc4309_ccm_setkey(struct crypto_aead *tfm, const u8 *key, unsign keylen -= 3; memcpy(ctx->ctr_nonce, key + keylen, 3); - rc = ssi_aead_setkey(tfm, key, keylen); - - return rc; + return ssi_aead_setkey(tfm, key, keylen); } #endif /*SSI_CC_HAS_AES_CCM*/ @@ -670,6 +672,7 @@ static int ssi_aead_setauthsize( unsigned int authsize) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(authenc); + struct device *dev = drvdata_to_dev(ctx->drvdata); /* Unsupported auth. sizes */ if ((authsize == 0) || @@ -678,7 +681,7 @@ static int ssi_aead_setauthsize( } ctx->authsize = authsize; - SSI_LOG_DEBUG("authlen=%d\n", ctx->authsize); + dev_dbg(dev, "authlen=%d\n", ctx->authsize); return 0; } @@ -731,10 +734,11 @@ ssi_aead_create_assoc_desc( struct aead_req_ctx *areq_ctx = aead_request_ctx(areq); enum ssi_req_dma_buf_type assoc_dma_type = areq_ctx->assoc_buff_type; unsigned int idx = *seq_size; + struct device *dev = drvdata_to_dev(ctx->drvdata); switch (assoc_dma_type) { case SSI_DMA_BUF_DLLI: - SSI_LOG_DEBUG("ASSOC buffer type DLLI\n"); + dev_dbg(dev, "ASSOC buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, sg_dma_address(areq->src), areq->assoclen, NS_BIT); set_flow_mode(&desc[idx], @@ -744,7 +748,7 @@ ssi_aead_create_assoc_desc( set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_MLLI: - SSI_LOG_DEBUG("ASSOC buffer type MLLI\n"); + dev_dbg(dev, "ASSOC buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->assoc.sram_addr, areq_ctx->assoc.mlli_nents, NS_BIT); @@ -755,7 +759,7 @@ ssi_aead_create_assoc_desc( break; case SSI_DMA_BUF_NULL: default: - SSI_LOG_ERR("Invalid ASSOC buffer type\n"); + dev_err(dev, "Invalid ASSOC buffer type\n"); } *seq_size = (++idx); @@ -772,6 +776,9 @@ ssi_aead_process_authenc_data_desc( struct aead_req_ctx *areq_ctx = aead_request_ctx(areq); enum ssi_req_dma_buf_type data_dma_type = areq_ctx->data_buff_type; unsigned int idx = *seq_size; + struct crypto_aead *tfm = crypto_aead_reqtfm(areq); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); switch (data_dma_type) { case SSI_DMA_BUF_DLLI: @@ -783,7 +790,7 @@ ssi_aead_process_authenc_data_desc( unsigned int offset = (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? areq_ctx->dst_offset : areq_ctx->src_offset; - SSI_LOG_DEBUG("AUTHENC: SRC/DST buffer type DLLI\n"); + dev_dbg(dev, "AUTHENC: SRC/DST buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, (sg_dma_address(cipher) + offset), @@ -810,7 +817,7 @@ ssi_aead_process_authenc_data_desc( } } - SSI_LOG_DEBUG("AUTHENC: SRC/DST buffer type MLLI\n"); + dev_dbg(dev, "AUTHENC: SRC/DST buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, mlli_addr, mlli_nents, NS_BIT); @@ -819,7 +826,7 @@ ssi_aead_process_authenc_data_desc( } case SSI_DMA_BUF_NULL: default: - SSI_LOG_ERR("AUTHENC: Invalid SRC/DST buffer type\n"); + dev_err(dev, "AUTHENC: Invalid SRC/DST buffer type\n"); } *seq_size = (++idx); @@ -835,13 +842,16 @@ ssi_aead_process_cipher_data_desc( unsigned int idx = *seq_size; struct aead_req_ctx *areq_ctx = aead_request_ctx(areq); enum ssi_req_dma_buf_type data_dma_type = areq_ctx->data_buff_type; + struct crypto_aead *tfm = crypto_aead_reqtfm(areq); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); if (areq_ctx->cryptlen == 0) return; /*null processing*/ switch (data_dma_type) { case SSI_DMA_BUF_DLLI: - SSI_LOG_DEBUG("CIPHER: SRC/DST buffer type DLLI\n"); + dev_dbg(dev, "CIPHER: SRC/DST buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, (sg_dma_address(areq_ctx->src_sgl) + @@ -853,7 +863,7 @@ ssi_aead_process_cipher_data_desc( set_flow_mode(&desc[idx], flow_mode); break; case SSI_DMA_BUF_MLLI: - SSI_LOG_DEBUG("CIPHER: SRC/DST buffer type MLLI\n"); + dev_dbg(dev, "CIPHER: SRC/DST buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->src.sram_addr, areq_ctx->src.mlli_nents, NS_BIT); @@ -863,7 +873,7 @@ ssi_aead_process_cipher_data_desc( break; case SSI_DMA_BUF_NULL: default: - SSI_LOG_ERR("CIPHER: Invalid SRC/DST buffer type\n"); + dev_err(dev, "CIPHER: Invalid SRC/DST buffer type\n"); } *seq_size = (++idx); @@ -1178,14 +1188,15 @@ static inline void ssi_aead_load_mlli_to_sram( struct aead_req_ctx *req_ctx = aead_request_ctx(req); struct crypto_aead *tfm = crypto_aead_reqtfm(req); struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); if (unlikely( (req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) || (req_ctx->data_buff_type == SSI_DMA_BUF_MLLI) || !req_ctx->is_single_pass)) { - SSI_LOG_DEBUG("Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n", - (unsigned int)ctx->drvdata->mlli_sram_addr, - req_ctx->mlli_params.mlli_len); + dev_dbg(dev, "Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n", + (unsigned int)ctx->drvdata->mlli_sram_addr, + req_ctx->mlli_params.mlli_len); /* Copy MLLI table host-to-sram */ hw_desc_init(&desc[*seq_size]); set_din_type(&desc[*seq_size], DMA_DLLI, @@ -1333,6 +1344,7 @@ static int validate_data_size(struct ssi_aead_ctx *ctx, struct aead_request *req) { struct aead_req_ctx *areq_ctx = aead_request_ctx(req); + struct device *dev = drvdata_to_dev(ctx->drvdata); unsigned int assoclen = req->assoclen; unsigned int cipherlen = (direct == DRV_CRYPTO_DIRECTION_DECRYPT) ? (req->cryptlen - ctx->authsize) : req->cryptlen; @@ -1371,7 +1383,7 @@ static int validate_data_size(struct ssi_aead_ctx *ctx, areq_ctx->is_single_pass = false; break; default: - SSI_LOG_ERR("Unexpected flow mode (%d)\n", ctx->flow_mode); + dev_err(dev, "Unexpected flow mode (%d)\n", ctx->flow_mode); goto data_size_err; } @@ -1554,6 +1566,7 @@ static int config_ccm_adata(struct aead_request *req) { struct crypto_aead *tfm = crypto_aead_reqtfm(req); struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); struct aead_req_ctx *req_ctx = aead_request_ctx(req); //unsigned int size_of_a = 0, rem_a_size = 0; unsigned int lp = req->iv[0]; @@ -1575,7 +1588,7 @@ static int config_ccm_adata(struct aead_request *req) /* taken from crypto/ccm.c */ /* 2 <= L <= 8, so 1 <= L' <= 7. */ if (l < 2 || l > 8) { - SSI_LOG_ERR("illegal iv value %X\n", req->iv[0]); + dev_err(dev, "illegal iv value %X\n", req->iv[0]); return -EINVAL; } memcpy(b0, req->iv, AES_BLOCK_SIZE); @@ -1588,8 +1601,10 @@ static int config_ccm_adata(struct aead_request *req) *b0 |= 64; /* Enable bit 6 if Adata exists. */ rc = set_msg_len(b0 + 16 - l, cryptlen, l); /* Write L'. */ - if (rc != 0) + if (rc != 0) { + dev_err(dev, "message len overflow detected"); return rc; + } /* END of "taken from crypto/ccm.c" */ /* l(a) - size of associated data. */ @@ -1812,7 +1827,6 @@ static inline int ssi_aead_gcm( unsigned int *seq_size) { struct aead_req_ctx *req_ctx = aead_request_ctx(req); - unsigned int idx = *seq_size; unsigned int cipher_flow_mode; if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) { @@ -1829,7 +1843,6 @@ static inline int ssi_aead_gcm( ssi_aead_create_assoc_desc(req, DIN_HASH, desc, seq_size); ssi_aead_gcm_setup_gctr_desc(req, desc, seq_size); ssi_aead_process_gcm_result_desc(req, desc, seq_size); - idx = *seq_size; return 0; } @@ -1844,7 +1857,6 @@ static inline int ssi_aead_gcm( ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, seq_size); ssi_aead_process_gcm_result_desc(req, desc, seq_size); - idx = *seq_size; return 0; } @@ -1861,13 +1873,13 @@ static inline void ssi_aead_dump_gcm( return; if (title) { - SSI_LOG_DEBUG("----------------------------------------------------------------------------------"); - SSI_LOG_DEBUG("%s\n", title); + dev_dbg(dev, "----------------------------------------------------------------------------------"); + dev_dbg(dev, "%s\n", title); } - SSI_LOG_DEBUG("cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n", - ctx->cipher_mode, ctx->authsize, ctx->enc_keylen, - req->assoclen, req_ctx->cryptlen); + dev_dbg(dev, "cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n", + ctx->cipher_mode, ctx->authsize, ctx->enc_keylen, + req->assoclen, req_ctx->cryptlen); if (ctx->enckey) dump_byte_array("mac key", ctx->enckey, 16); @@ -1897,6 +1909,7 @@ static int config_gcm_context(struct aead_request *req) struct crypto_aead *tfm = crypto_aead_reqtfm(req); struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct aead_req_ctx *req_ctx = aead_request_ctx(req); + struct device *dev = drvdata_to_dev(ctx->drvdata); unsigned int cryptlen = (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) ? @@ -1904,7 +1917,8 @@ static int config_gcm_context(struct aead_request *req) (req->cryptlen - ctx->authsize); __be32 counter = cpu_to_be32(2); - SSI_LOG_DEBUG("%s() cryptlen = %d, req->assoclen = %d ctx->authsize = %d\n", __func__, cryptlen, req->assoclen, ctx->authsize); + dev_dbg(dev, "%s() cryptlen = %d, req->assoclen = %d ctx->authsize = %d\n", + __func__, cryptlen, req->assoclen, ctx->authsize); memset(req_ctx->hkey, 0, AES_BLOCK_SIZE); @@ -1958,20 +1972,20 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction struct crypto_aead *tfm = crypto_aead_reqtfm(req); struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); struct aead_req_ctx *areq_ctx = aead_request_ctx(req); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ssi_crypto_req ssi_req = {}; - SSI_LOG_DEBUG("%s context=%p req=%p iv=%p src=%p src_ofs=%d dst=%p dst_ofs=%d cryptolen=%d\n", - ((direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Encrypt" : "Decrypt"), - ctx, req, req->iv, sg_virt(req->src), req->src->offset, - sg_virt(req->dst), req->dst->offset, req->cryptlen); + dev_dbg(dev, "%s context=%p req=%p iv=%p src=%p src_ofs=%d dst=%p dst_ofs=%d cryptolen=%d\n", + ((direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Enc" : "Dec"), + ctx, req, req->iv, sg_virt(req->src), req->src->offset, + sg_virt(req->dst), req->dst->offset, req->cryptlen); /* STAT_PHASE_0: Init and sanity checks */ /* Check data length according to mode */ if (unlikely(validate_data_size(ctx, direct, req) != 0)) { - SSI_LOG_ERR("Unsupported crypt/assoc len %d/%d.\n", - req->cryptlen, req->assoclen); + dev_err(dev, "Unsupported crypt/assoc len %d/%d.\n", + req->cryptlen, req->assoclen); crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_BLOCK_LEN); return -EINVAL; } @@ -2017,7 +2031,8 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction if (ctx->cipher_mode == DRV_CIPHER_CCM) { rc = config_ccm_adata(req); if (unlikely(rc != 0)) { - SSI_LOG_ERR("config_ccm_adata() returned with a failure %d!", rc); + dev_dbg(dev, "config_ccm_adata() returned with a failure %d!", + rc); goto exit; } } else { @@ -2031,7 +2046,8 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction if (ctx->cipher_mode == DRV_CIPHER_GCTR) { rc = config_gcm_context(req); if (unlikely(rc != 0)) { - SSI_LOG_ERR("config_gcm_context() returned with a failure %d!", rc); + dev_dbg(dev, "config_gcm_context() returned with a failure %d!", + rc); goto exit; } } @@ -2039,7 +2055,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction rc = ssi_buffer_mgr_map_aead_request(ctx->drvdata, req); if (unlikely(rc != 0)) { - SSI_LOG_ERR("map_request() failed\n"); + dev_err(dev, "map_request() failed\n"); goto exit; } @@ -2095,7 +2111,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction break; #endif default: - SSI_LOG_ERR("Unsupported authenc (%d)\n", ctx->auth_mode); + dev_err(dev, "Unsupported authenc (%d)\n", ctx->auth_mode); ssi_buffer_mgr_unmap_aead_request(dev, req); rc = -ENOTSUPP; goto exit; @@ -2106,7 +2122,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction rc = send_request(ctx->drvdata, &ssi_req, desc, seq_len, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_aead_request(dev, req); } @@ -2139,10 +2155,13 @@ static int ssi_rfc4309_ccm_encrypt(struct aead_request *req) /* Very similar to ssi_aead_encrypt() above. */ struct aead_req_ctx *areq_ctx = aead_request_ctx(req); + struct crypto_aead *tfm = crypto_aead_reqtfm(req); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); int rc = -EINVAL; if (!valid_assoclen(req)) { - SSI_LOG_ERR("invalid Assoclen:%u\n", req->assoclen); + dev_err(dev, "invalid Assoclen:%u\n", req->assoclen); goto out; } @@ -2183,13 +2202,14 @@ static int ssi_aead_decrypt(struct aead_request *req) #if SSI_CC_HAS_AES_CCM static int ssi_rfc4309_ccm_decrypt(struct aead_request *req) { - /* Very similar to ssi_aead_decrypt() above. */ - + struct crypto_aead *tfm = crypto_aead_reqtfm(req); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); struct aead_req_ctx *areq_ctx = aead_request_ctx(req); int rc = -EINVAL; if (!valid_assoclen(req)) { - SSI_LOG_ERR("invalid Assoclen:%u\n", req->assoclen); + dev_err(dev, "invalid Assoclen:%u\n", req->assoclen); goto out; } @@ -2214,9 +2234,9 @@ out: static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); - int rc = 0; + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("%s() keylen %d, key %p\n", __func__, keylen, key); + dev_dbg(dev, "%s() keylen %d, key %p\n", __func__, keylen, key); if (keylen < 4) return -EINVAL; @@ -2224,17 +2244,15 @@ static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsign keylen -= 4; memcpy(ctx->ctr_nonce, key + keylen, 4); - rc = ssi_aead_setkey(tfm, key, keylen); - - return rc; + return ssi_aead_setkey(tfm, key, keylen); } static int ssi_rfc4543_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen) { struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); - int rc = 0; + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("%s() keylen %d, key %p\n", __func__, keylen, key); + dev_dbg(dev, "%s() keylen %d, key %p\n", __func__, keylen, key); if (keylen < 4) return -EINVAL; @@ -2242,9 +2260,7 @@ static int ssi_rfc4543_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsign keylen -= 4; memcpy(ctx->ctr_nonce, key + keylen, 4); - rc = ssi_aead_setkey(tfm, key, keylen); - - return rc; + return ssi_aead_setkey(tfm, key, keylen); } static int ssi_gcm_setauthsize(struct crypto_aead *authenc, @@ -2269,7 +2285,10 @@ static int ssi_gcm_setauthsize(struct crypto_aead *authenc, static int ssi_rfc4106_gcm_setauthsize(struct crypto_aead *authenc, unsigned int authsize) { - SSI_LOG_DEBUG("authsize %d\n", authsize); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(authenc); + struct device *dev = drvdata_to_dev(ctx->drvdata); + + dev_dbg(dev, "authsize %d\n", authsize); switch (authsize) { case 8: @@ -2286,7 +2305,10 @@ static int ssi_rfc4106_gcm_setauthsize(struct crypto_aead *authenc, static int ssi_rfc4543_gcm_setauthsize(struct crypto_aead *authenc, unsigned int authsize) { - SSI_LOG_DEBUG("authsize %d\n", authsize); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(authenc); + struct device *dev = drvdata_to_dev(ctx->drvdata); + + dev_dbg(dev, "authsize %d\n", authsize); if (authsize != 16) return -EINVAL; @@ -2298,11 +2320,14 @@ static int ssi_rfc4106_gcm_encrypt(struct aead_request *req) { /* Very similar to ssi_aead_encrypt() above. */ + struct crypto_aead *tfm = crypto_aead_reqtfm(req); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); struct aead_req_ctx *areq_ctx = aead_request_ctx(req); int rc = -EINVAL; if (!valid_assoclen(req)) { - SSI_LOG_ERR("invalid Assoclen:%u\n", req->assoclen); + dev_err(dev, "invalid Assoclen:%u\n", req->assoclen); goto out; } @@ -2350,11 +2375,14 @@ static int ssi_rfc4106_gcm_decrypt(struct aead_request *req) { /* Very similar to ssi_aead_decrypt() above. */ + struct crypto_aead *tfm = crypto_aead_reqtfm(req); + struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); struct aead_req_ctx *areq_ctx = aead_request_ctx(req); int rc = -EINVAL; if (!valid_assoclen(req)) { - SSI_LOG_ERR("invalid Assoclen:%u\n", req->assoclen); + dev_err(dev, "invalid Assoclen:%u\n", req->assoclen); goto out; } @@ -2654,16 +2682,17 @@ static struct ssi_alg_template aead_algs[] = { #endif /*SSI_CC_HAS_AES_GCM*/ }; -static struct ssi_crypto_alg *ssi_aead_create_alg(struct ssi_alg_template *template) +static struct ssi_crypto_alg *ssi_aead_create_alg( + struct ssi_alg_template *template, + struct device *dev) { struct ssi_crypto_alg *t_alg; struct aead_alg *alg; t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL); - if (!t_alg) { - SSI_LOG_ERR("failed to allocate t_alg\n"); + if (!t_alg) return ERR_PTR(-ENOMEM); - } + alg = &template->template_aead; snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name); @@ -2713,6 +2742,7 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata) struct ssi_crypto_alg *t_alg; int rc = -ENOMEM; int alg; + struct device *dev = drvdata_to_dev(drvdata); aead_handle = kmalloc(sizeof(*aead_handle), GFP_KERNEL); if (!aead_handle) { @@ -2720,36 +2750,36 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata) goto fail0; } + INIT_LIST_HEAD(&aead_handle->aead_list); drvdata->aead_handle = aead_handle; aead_handle->sram_workspace_addr = ssi_sram_mgr_alloc( drvdata, MAX_HMAC_DIGEST_SIZE); if (aead_handle->sram_workspace_addr == NULL_SRAM_ADDR) { - SSI_LOG_ERR("SRAM pool exhausted\n"); + dev_err(dev, "SRAM pool exhausted\n"); rc = -ENOMEM; goto fail1; } - INIT_LIST_HEAD(&aead_handle->aead_list); - /* Linux crypto */ for (alg = 0; alg < ARRAY_SIZE(aead_algs); alg++) { - t_alg = ssi_aead_create_alg(&aead_algs[alg]); + t_alg = ssi_aead_create_alg(&aead_algs[alg], dev); if (IS_ERR(t_alg)) { rc = PTR_ERR(t_alg); - SSI_LOG_ERR("%s alg allocation failed\n", - aead_algs[alg].driver_name); + dev_err(dev, "%s alg allocation failed\n", + aead_algs[alg].driver_name); goto fail1; } t_alg->drvdata = drvdata; rc = crypto_register_aead(&t_alg->aead_alg); if (unlikely(rc != 0)) { - SSI_LOG_ERR("%s alg registration failed\n", - t_alg->aead_alg.base.cra_driver_name); + dev_err(dev, "%s alg registration failed\n", + t_alg->aead_alg.base.cra_driver_name); goto fail2; } else { list_add_tail(&t_alg->entry, &aead_handle->aead_list); - SSI_LOG_DEBUG("Registered %s\n", t_alg->aead_alg.base.cra_driver_name); + dev_dbg(dev, "Registered %s\n", + t_alg->aead_alg.base.cra_driver_name); } } diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index 63936091d524..1f8a225530a8 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -33,14 +33,10 @@ #include "ssi_hash.h" #include "ssi_aead.h" -#ifdef CC_DEBUG #define GET_DMA_BUFFER_TYPE(buff_type) ( \ ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \ ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \ ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID") -#else -#define GET_DMA_BUFFER_TYPE(buff_type) -#endif enum dma_buffer_type { DMA_NULL_TYPE = -1, @@ -76,16 +72,12 @@ struct buffer_array { * @lbytes: [OUT] Returns the amount of bytes at the last entry */ static unsigned int ssi_buffer_mgr_get_sgl_nents( - struct scatterlist *sg_list, unsigned int nbytes, u32 *lbytes, bool *is_chained) + struct device *dev, struct scatterlist *sg_list, + unsigned int nbytes, u32 *lbytes, bool *is_chained) { unsigned int nents = 0; while (nbytes != 0) { - if (sg_is_chain(sg_list)) { - SSI_LOG_ERR("Unexpected chained entry " - "in sg (entry =0x%X)\n", nents); - BUG(); - } if (sg_list->length != 0) { nents++; /* get the number of bytes in the last entry */ @@ -98,7 +90,7 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents( *is_chained = true; } } - SSI_LOG_DEBUG("nents %d last bytes %d\n", nents, *lbytes); + dev_dbg(dev, "nents %d last bytes %d\n", nents, *lbytes); return nents; } @@ -134,20 +126,20 @@ void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, u32 data_len) * @direct: */ void ssi_buffer_mgr_copy_scatterlist_portion( - u8 *dest, struct scatterlist *sg, - u32 to_skip, u32 end, - enum ssi_sg_cpy_direct direct) + struct device *dev, u8 *dest, + struct scatterlist *sg, u32 to_skip, + u32 end, enum ssi_sg_cpy_direct direct) { u32 nents, lbytes; - nents = ssi_buffer_mgr_get_sgl_nents(sg, end, &lbytes, NULL); + nents = ssi_buffer_mgr_get_sgl_nents(dev, sg, end, &lbytes, NULL); sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip + 1), to_skip, (direct == SSI_SG_TO_BUF)); } static inline int ssi_buffer_mgr_render_buff_to_mlli( - dma_addr_t buff_dma, u32 buff_size, u32 *curr_nents, - u32 **mlli_entry_pp) + struct device *dev, dma_addr_t buff_dma, u32 buff_size, + u32 *curr_nents, u32 **mlli_entry_pp) { u32 *mlli_entry_p = *mlli_entry_pp; u32 new_nents; @@ -161,9 +153,9 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli( while (buff_size > CC_MAX_MLLI_ENTRY_SIZE) { cc_lli_set_addr(mlli_entry_p, buff_dma); cc_lli_set_size(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE); - SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents, - mlli_entry_p[LLI_WORD0_OFFSET], - mlli_entry_p[LLI_WORD1_OFFSET]); + dev_dbg(dev, "entry[%d]: single_buff=0x%08X size=%08X\n", + *curr_nents, mlli_entry_p[LLI_WORD0_OFFSET], + mlli_entry_p[LLI_WORD1_OFFSET]); buff_dma += CC_MAX_MLLI_ENTRY_SIZE; buff_size -= CC_MAX_MLLI_ENTRY_SIZE; mlli_entry_p = mlli_entry_p + 2; @@ -172,9 +164,9 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli( /*Last entry */ cc_lli_set_addr(mlli_entry_p, buff_dma); cc_lli_set_size(mlli_entry_p, buff_size); - SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents, - mlli_entry_p[LLI_WORD0_OFFSET], - mlli_entry_p[LLI_WORD1_OFFSET]); + dev_dbg(dev, "entry[%d]: single_buff=0x%08X size=%08X\n", + *curr_nents, mlli_entry_p[LLI_WORD0_OFFSET], + mlli_entry_p[LLI_WORD1_OFFSET]); mlli_entry_p = mlli_entry_p + 2; *mlli_entry_pp = mlli_entry_p; (*curr_nents)++; @@ -182,8 +174,9 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli( } static inline int ssi_buffer_mgr_render_scatterlist_to_mlli( - struct scatterlist *sgl, u32 sgl_data_len, u32 sgl_offset, - u32 *curr_nents, u32 **mlli_entry_pp) + struct device *dev, struct scatterlist *sgl, + u32 sgl_data_len, u32 sgl_offset, u32 *curr_nents, + u32 **mlli_entry_pp) { struct scatterlist *curr_sgl = sgl; u32 *mlli_entry_p = *mlli_entry_pp; @@ -197,8 +190,8 @@ static inline int ssi_buffer_mgr_render_scatterlist_to_mlli( sgl_data_len; sgl_data_len -= entry_data_len; rc = ssi_buffer_mgr_render_buff_to_mlli( - sg_dma_address(curr_sgl) + sgl_offset, entry_data_len, - curr_nents, &mlli_entry_p); + dev, sg_dma_address(curr_sgl) + sgl_offset, + entry_data_len, curr_nents, &mlli_entry_p); if (rc != 0) return rc; @@ -217,14 +210,14 @@ static int ssi_buffer_mgr_generate_mlli( u32 total_nents = 0, prev_total_nents = 0; int rc = 0, i; - SSI_LOG_DEBUG("NUM of SG's = %d\n", sg_data->num_of_buffers); + dev_dbg(dev, "NUM of SG's = %d\n", sg_data->num_of_buffers); /* Allocate memory from the pointed pool */ mlli_params->mlli_virt_addr = dma_pool_alloc( mlli_params->curr_pool, GFP_KERNEL, &mlli_params->mlli_dma_addr); if (unlikely(!mlli_params->mlli_virt_addr)) { - SSI_LOG_ERR("dma_pool_alloc() failed\n"); + dev_err(dev, "dma_pool_alloc() failed\n"); rc = -ENOMEM; goto build_mlli_exit; } @@ -234,12 +227,12 @@ static int ssi_buffer_mgr_generate_mlli( for (i = 0; i < sg_data->num_of_buffers; i++) { if (sg_data->type[i] == DMA_SGL_TYPE) rc = ssi_buffer_mgr_render_scatterlist_to_mlli( - sg_data->entry[i].sgl, - sg_data->total_data_len[i], sg_data->offset[i], &total_nents, - &mlli_p); + dev, sg_data->entry[i].sgl, + sg_data->total_data_len[i], sg_data->offset[i], + &total_nents, &mlli_p); else /*DMA_BUFF_TYPE*/ rc = ssi_buffer_mgr_render_buff_to_mlli( - sg_data->entry[i].buffer_dma, + dev, sg_data->entry[i].buffer_dma, sg_data->total_data_len[i], &total_nents, &mlli_p); if (rc != 0) @@ -259,26 +252,23 @@ static int ssi_buffer_mgr_generate_mlli( /* Set MLLI size for the bypass operation */ mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE); - SSI_LOG_DEBUG("MLLI params: " - "virt_addr=%pK dma_addr=%pad mlli_len=0x%X\n", - mlli_params->mlli_virt_addr, - mlli_params->mlli_dma_addr, - mlli_params->mlli_len); + dev_dbg(dev, "MLLI params: virt_addr=%pK dma_addr=%pad mlli_len=0x%X\n", + mlli_params->mlli_virt_addr, &mlli_params->mlli_dma_addr, + mlli_params->mlli_len); build_mlli_exit: return rc; } static inline void ssi_buffer_mgr_add_buffer_entry( - struct buffer_array *sgl_data, + struct device *dev, struct buffer_array *sgl_data, dma_addr_t buffer_dma, unsigned int buffer_len, bool is_last_entry, u32 *mlli_nents) { unsigned int index = sgl_data->num_of_buffers; - SSI_LOG_DEBUG("index=%u single_buff=%pad " - "buffer_len=0x%08X is_last=%d\n", - index, buffer_dma, buffer_len, is_last_entry); + dev_dbg(dev, "index=%u single_buff=%pad buffer_len=0x%08X is_last=%d\n", + index, &buffer_dma, buffer_len, is_last_entry); sgl_data->nents[index] = 1; sgl_data->entry[index].buffer_dma = buffer_dma; sgl_data->offset[index] = 0; @@ -292,6 +282,7 @@ static inline void ssi_buffer_mgr_add_buffer_entry( } static inline void ssi_buffer_mgr_add_scatterlist_entry( + struct device *dev, struct buffer_array *sgl_data, unsigned int nents, struct scatterlist *sgl, @@ -302,8 +293,8 @@ static inline void ssi_buffer_mgr_add_scatterlist_entry( { unsigned int index = sgl_data->num_of_buffers; - SSI_LOG_DEBUG("index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n", - index, nents, sgl, data_len, is_last_table); + dev_dbg(dev, "index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n", + index, nents, sgl, data_len, is_last_table); sgl_data->nents[index] = nents; sgl_data->entry[index].sgl = sgl; sgl_data->offset[index] = data_offset; @@ -327,7 +318,7 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents, if (!l_sg) break; if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)) { - SSI_LOG_ERR("dma_map_page() sg buffer failed\n"); + dev_err(dev, "dma_map_page() sg buffer failed\n"); goto err; } l_sg = sg_next(l_sg); @@ -356,26 +347,22 @@ static int ssi_buffer_mgr_map_scatterlist( if (sg_is_last(sg)) { /* One entry only case -set to DLLI */ if (unlikely(dma_map_sg(dev, sg, 1, direction) != 1)) { - SSI_LOG_ERR("dma_map_sg() single buffer failed\n"); + dev_err(dev, "dma_map_sg() single buffer failed\n"); return -ENOMEM; } - SSI_LOG_DEBUG("Mapped sg: dma_address=%pad " - "page=%p addr=%pK offset=%u " - "length=%u\n", - sg_dma_address(sg), - sg_page(sg), - sg_virt(sg), - sg->offset, sg->length); + dev_dbg(dev, "Mapped sg: dma_address=%pad page=%p addr=%pK offset=%u length=%u\n", + &sg_dma_address(sg), sg_page(sg), sg_virt(sg), + sg->offset, sg->length); *lbytes = nbytes; *nents = 1; *mapped_nents = 1; } else { /*sg_is_last*/ - *nents = ssi_buffer_mgr_get_sgl_nents(sg, nbytes, lbytes, + *nents = ssi_buffer_mgr_get_sgl_nents(dev, sg, nbytes, lbytes, &is_chained); if (*nents > max_sg_nents) { *nents = 0; - SSI_LOG_ERR("Too many fragments. current %d max %d\n", - *nents, max_sg_nents); + dev_err(dev, "Too many fragments. current %d max %d\n", + *nents, max_sg_nents); return -ENOMEM; } if (!is_chained) { @@ -385,7 +372,7 @@ static int ssi_buffer_mgr_map_scatterlist( *mapped_nents = dma_map_sg(dev, sg, *nents, direction); if (unlikely(*mapped_nents == 0)) { *nents = 0; - SSI_LOG_ERR("dma_map_sg() sg buffer failed\n"); + dev_err(dev, "dma_map_sg() sg buffer failed\n"); return -ENOMEM; } } else { @@ -398,7 +385,7 @@ static int ssi_buffer_mgr_map_scatterlist( direction); if (unlikely(*mapped_nents != *nents)) { *nents = *mapped_nents; - SSI_LOG_ERR("dma_map_sg() sg buffer failed\n"); + dev_err(dev, "dma_map_sg() sg buffer failed\n"); return -ENOMEM; } } @@ -414,26 +401,22 @@ ssi_aead_handle_config_buf(struct device *dev, struct buffer_array *sg_data, unsigned int assoclen) { - SSI_LOG_DEBUG(" handle additional data config set to DLLI\n"); + dev_dbg(dev, " handle additional data config set to DLLI\n"); /* create sg for the current buffer */ sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size); if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1, DMA_TO_DEVICE) != 1)) { - SSI_LOG_ERR("dma_map_sg() " - "config buffer failed\n"); - return -ENOMEM; + dev_err(dev, "dma_map_sg() config buffer failed\n"); + return -ENOMEM; } - SSI_LOG_DEBUG("Mapped curr_buff: dma_address=%pad " - "page=%p addr=%pK " - "offset=%u length=%u\n", - sg_dma_address(&areq_ctx->ccm_adata_sg), - sg_page(&areq_ctx->ccm_adata_sg), - sg_virt(&areq_ctx->ccm_adata_sg), - areq_ctx->ccm_adata_sg.offset, - areq_ctx->ccm_adata_sg.length); + dev_dbg(dev, "Mapped curr_buff: dma_address=%pad page=%p addr=%pK offset=%u length=%u\n", + &sg_dma_address(&areq_ctx->ccm_adata_sg), + sg_page(&areq_ctx->ccm_adata_sg), + sg_virt(&areq_ctx->ccm_adata_sg), + areq_ctx->ccm_adata_sg.offset, areq_ctx->ccm_adata_sg.length); /* prepare for case of MLLI */ if (assoclen > 0) { - ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, 1, &areq_ctx->ccm_adata_sg, (AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size), 0, false, NULL); @@ -447,28 +430,23 @@ static inline int ssi_ahash_handle_curr_buf(struct device *dev, u32 curr_buff_cnt, struct buffer_array *sg_data) { - SSI_LOG_DEBUG(" handle curr buff %x set to DLLI\n", curr_buff_cnt); + dev_dbg(dev, " handle curr buff %x set to DLLI\n", curr_buff_cnt); /* create sg for the current buffer */ sg_init_one(areq_ctx->buff_sg, curr_buff, curr_buff_cnt); if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE) != 1)) { - SSI_LOG_ERR("dma_map_sg() " - "src buffer failed\n"); - return -ENOMEM; + dev_err(dev, "dma_map_sg() src buffer failed\n"); + return -ENOMEM; } - SSI_LOG_DEBUG("Mapped curr_buff: dma_address=%pad " - "page=%p addr=%pK " - "offset=%u length=%u\n", - sg_dma_address(areq_ctx->buff_sg), - sg_page(areq_ctx->buff_sg), - sg_virt(areq_ctx->buff_sg), - areq_ctx->buff_sg->offset, - areq_ctx->buff_sg->length); + dev_dbg(dev, "Mapped curr_buff: dma_address=%pad page=%p addr=%pK offset=%u length=%u\n", + &sg_dma_address(areq_ctx->buff_sg), sg_page(areq_ctx->buff_sg), + sg_virt(areq_ctx->buff_sg), areq_ctx->buff_sg->offset, + areq_ctx->buff_sg->length); areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->curr_sg = areq_ctx->buff_sg; areq_ctx->in_nents = 0; /* prepare for case of MLLI */ - ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1, areq_ctx->buff_sg, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, 1, areq_ctx->buff_sg, curr_buff_cnt, 0, false, NULL); return 0; } @@ -483,9 +461,8 @@ void ssi_buffer_mgr_unmap_blkcipher_request( struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx; if (likely(req_ctx->gen_ctx.iv_dma_addr != 0)) { - SSI_LOG_DEBUG("Unmapped iv: iv_dma_addr=%pad iv_size=%u\n", - req_ctx->gen_ctx.iv_dma_addr, - ivsize); + dev_dbg(dev, "Unmapped iv: iv_dma_addr=%pad iv_size=%u\n", + &req_ctx->gen_ctx.iv_dma_addr, ivsize); dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr, ivsize, req_ctx->is_giv ? DMA_BIDIRECTIONAL : @@ -499,11 +476,11 @@ void ssi_buffer_mgr_unmap_blkcipher_request( } dma_unmap_sg(dev, src, req_ctx->in_nents, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped req->src=%pK\n", sg_virt(src)); + dev_dbg(dev, "Unmapped req->src=%pK\n", sg_virt(src)); if (src != dst) { dma_unmap_sg(dev, dst, req_ctx->out_nents, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped req->dst=%pK\n", sg_virt(dst)); + dev_dbg(dev, "Unmapped req->dst=%pK\n", sg_virt(dst)); } } @@ -519,7 +496,7 @@ int ssi_buffer_mgr_map_blkcipher_request( struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx; struct mlli_params *mlli_params = &req_ctx->mlli_params; struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); struct buffer_array sg_data; u32 dummy = 0; int rc = 0; @@ -539,13 +516,12 @@ int ssi_buffer_mgr_map_blkcipher_request( DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, req_ctx->gen_ctx.iv_dma_addr))) { - SSI_LOG_ERR("Mapping iv %u B at va=%pK " - "for DMA failed\n", ivsize, info); + dev_err(dev, "Mapping iv %u B at va=%pK for DMA failed\n", + ivsize, info); return -ENOMEM; } - SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=%pad\n", - ivsize, info, - req_ctx->gen_ctx.iv_dma_addr); + dev_dbg(dev, "Mapped iv %u B at va=%pK to dma=%pad\n", + ivsize, info, &req_ctx->gen_ctx.iv_dma_addr); } else { req_ctx->gen_ctx.iv_dma_addr = 0; } @@ -567,7 +543,7 @@ int ssi_buffer_mgr_map_blkcipher_request( /* Handle inplace operation */ if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) { req_ctx->out_nents = 0; - ssi_buffer_mgr_add_scatterlist_entry(&sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, @@ -587,12 +563,12 @@ int ssi_buffer_mgr_map_blkcipher_request( req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; if (unlikely((req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI))) { - ssi_buffer_mgr_add_scatterlist_entry(&sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, &req_ctx->in_mlli_nents); - ssi_buffer_mgr_add_scatterlist_entry(&sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, &sg_data, req_ctx->out_nents, dst, nbytes, 0, true, @@ -607,8 +583,8 @@ int ssi_buffer_mgr_map_blkcipher_request( goto ablkcipher_exit; } - SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n", - GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type)); + dev_dbg(dev, "areq_ctx->dma_buf_type = %s\n", + GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type)); return 0; @@ -674,30 +650,34 @@ void ssi_buffer_mgr_unmap_aead_request( *allocated and should be released */ if (areq_ctx->mlli_params.curr_pool) { - SSI_LOG_DEBUG("free MLLI buffer: dma=%pad virt=%pK\n", - areq_ctx->mlli_params.mlli_dma_addr, - areq_ctx->mlli_params.mlli_virt_addr); + dev_dbg(dev, "free MLLI buffer: dma=%pad virt=%pK\n", + &areq_ctx->mlli_params.mlli_dma_addr, + areq_ctx->mlli_params.mlli_virt_addr); dma_pool_free(areq_ctx->mlli_params.curr_pool, areq_ctx->mlli_params.mlli_virt_addr, areq_ctx->mlli_params.mlli_dma_addr); } - SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src), areq_ctx->src.nents, areq_ctx->assoc.nents, req->assoclen, req->cryptlen); + dev_dbg(dev, "Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", + sg_virt(req->src), areq_ctx->src.nents, areq_ctx->assoc.nents, + req->assoclen, req->cryptlen); size_to_unmap = req->assoclen + req->cryptlen; if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) size_to_unmap += areq_ctx->req_authsize; if (areq_ctx->is_gcm4543) size_to_unmap += crypto_aead_ivsize(tfm); - dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src, size_to_unmap, &dummy, &chained), DMA_BIDIRECTIONAL); + dma_unmap_sg(dev, req->src, + ssi_buffer_mgr_get_sgl_nents(dev, req->src, size_to_unmap, + &dummy, &chained), + DMA_BIDIRECTIONAL); if (unlikely(req->src != req->dst)) { - SSI_LOG_DEBUG("Unmapping dst sgl: req->dst=%pK\n", - sg_virt(req->dst)); + dev_dbg(dev, "Unmapping dst sgl: req->dst=%pK\n", + sg_virt(req->dst)); dma_unmap_sg(dev, req->dst, - ssi_buffer_mgr_get_sgl_nents(req->dst, + ssi_buffer_mgr_get_sgl_nents(dev, req->dst, size_to_unmap, - &dummy, - &chained), + &dummy, &chained), DMA_BIDIRECTIONAL); } if (drvdata->coherent && @@ -712,13 +692,14 @@ void ssi_buffer_mgr_unmap_aead_request( * data memory overriding that caused by cache coherence problem. */ ssi_buffer_mgr_copy_scatterlist_portion( - areq_ctx->backup_mac, req->src, + dev, areq_ctx->backup_mac, req->src, size_to_skip + req->cryptlen - areq_ctx->req_authsize, size_to_skip + req->cryptlen, SSI_SG_FROM_BUF); } } static inline int ssi_buffer_mgr_get_aead_icv_nents( + struct device *dev, struct scatterlist *sgl, unsigned int sgl_nents, unsigned int authsize, @@ -757,12 +738,12 @@ static inline int ssi_buffer_mgr_get_aead_icv_nents( nents = 2; *is_icv_fragmented = true; } else { - SSI_LOG_ERR("Unsupported num. of ICV fragments (> %d)\n", - MAX_ICV_NENTS_SUPPORTED); + dev_err(dev, "Unsupported num. of ICV fragments (> %d)\n", + MAX_ICV_NENTS_SUPPORTED); nents = -1; /*unsupported*/ } - SSI_LOG_DEBUG("is_frag=%s icv_nents=%u\n", - (*is_icv_fragmented ? "true" : "false"), nents); + dev_dbg(dev, "is_frag=%s icv_nents=%u\n", + (*is_icv_fragmented ? "true" : "false"), nents); return nents; } @@ -775,7 +756,7 @@ static inline int ssi_buffer_mgr_aead_chain_iv( { struct aead_req_ctx *areq_ctx = aead_request_ctx(req); unsigned int hw_iv_size = areq_ctx->hw_iv_size; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); int rc = 0; if (unlikely(!req->iv)) { @@ -786,22 +767,22 @@ static inline int ssi_buffer_mgr_aead_chain_iv( areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv, hw_iv_size, DMA_BIDIRECTIONAL); if (unlikely(dma_mapping_error(dev, areq_ctx->gen_ctx.iv_dma_addr))) { - SSI_LOG_ERR("Mapping iv %u B at va=%pK for DMA failed\n", - hw_iv_size, req->iv); + dev_err(dev, "Mapping iv %u B at va=%pK for DMA failed\n", + hw_iv_size, req->iv); rc = -ENOMEM; goto chain_iv_exit; } - SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=%pad\n", - hw_iv_size, req->iv, - areq_ctx->gen_ctx.iv_dma_addr); + dev_dbg(dev, "Mapped iv %u B at va=%pK to dma=%pad\n", + hw_iv_size, req->iv, &areq_ctx->gen_ctx.iv_dma_addr); if (do_chain && areq_ctx->plaintext_authenticate_only) { // TODO: what about CTR?? ask Ron struct crypto_aead *tfm = crypto_aead_reqtfm(req); unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm); unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET; /* Chain to given list */ ssi_buffer_mgr_add_buffer_entry( - sg_data, areq_ctx->gen_ctx.iv_dma_addr + iv_ofs, + dev, sg_data, + areq_ctx->gen_ctx.iv_dma_addr + iv_ofs, iv_size_to_authenc, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; @@ -824,6 +805,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc( struct crypto_aead *tfm = crypto_aead_reqtfm(req); unsigned int sg_index = 0; u32 size_of_assoc = req->assoclen; + struct device *dev = drvdata_to_dev(drvdata); if (areq_ctx->is_gcm4543) size_of_assoc += crypto_aead_ivsize(tfm); @@ -837,9 +819,9 @@ static inline int ssi_buffer_mgr_aead_chain_assoc( areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL; areq_ctx->assoc.nents = 0; areq_ctx->assoc.mlli_nents = 0; - SSI_LOG_DEBUG("Chain assoc of length 0: buff_type=%s nents=%u\n", - GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), - areq_ctx->assoc.nents); + dev_dbg(dev, "Chain assoc of length 0: buff_type=%s nents=%u\n", + GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), + areq_ctx->assoc.nents); goto chain_assoc_exit; } @@ -853,16 +835,16 @@ static inline int ssi_buffer_mgr_aead_chain_assoc( current_sg = sg_next(current_sg); //if have reached the end of the sgl, then this is unexpected if (!current_sg) { - SSI_LOG_ERR("reached end of sg list. unexpected\n"); - BUG(); + dev_err(dev, "reached end of sg list. unexpected\n"); + return -EINVAL; } sg_index += current_sg->length; mapped_nents++; } } if (unlikely(mapped_nents > LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) { - SSI_LOG_ERR("Too many fragments. current %d max %d\n", - mapped_nents, LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES); + dev_err(dev, "Too many fragments. current %d max %d\n", + mapped_nents, LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES); return -ENOMEM; } areq_ctx->assoc.nents = mapped_nents; @@ -873,9 +855,9 @@ static inline int ssi_buffer_mgr_aead_chain_assoc( if (areq_ctx->ccm_hdr_size != ccm_header_size_null) { if (unlikely((mapped_nents + 1) > LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) { - SSI_LOG_ERR("CCM case.Too many fragments. Current %d max %d\n", - (areq_ctx->assoc.nents + 1), - LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES); + dev_err(dev, "CCM case.Too many fragments. Current %d max %d\n", + (areq_ctx->assoc.nents + 1), + LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES); rc = -ENOMEM; goto chain_assoc_exit; } @@ -889,11 +871,11 @@ static inline int ssi_buffer_mgr_aead_chain_assoc( if (unlikely((do_chain) || (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) { - SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n", - GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), - areq_ctx->assoc.nents); + dev_dbg(dev, "Chain assoc: buff_type=%s nents=%u\n", + GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type), + areq_ctx->assoc.nents); ssi_buffer_mgr_add_scatterlist_entry( - sg_data, areq_ctx->assoc.nents, + dev, sg_data, areq_ctx->assoc.nents, req->src, req->assoclen, 0, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; @@ -951,10 +933,11 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( unsigned int authsize = areq_ctx->req_authsize; int rc = 0, icv_nents; struct crypto_aead *tfm = crypto_aead_reqtfm(req); + struct device *dev = drvdata_to_dev(drvdata); if (likely(req->src == req->dst)) { /*INPLACE*/ - ssi_buffer_mgr_add_scatterlist_entry(sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, areq_ctx->src.nents, areq_ctx->src_sgl, areq_ctx->cryptlen, @@ -962,7 +945,8 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( is_last_table, &areq_ctx->src.mlli_nents); - icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->src_sgl, + icv_nents = ssi_buffer_mgr_get_aead_icv_nents(dev, + areq_ctx->src_sgl, areq_ctx->src.nents, authsize, *src_last_bytes, @@ -990,7 +974,8 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( skip += crypto_aead_ivsize(tfm); ssi_buffer_mgr_copy_scatterlist_portion( - areq_ctx->backup_mac, req->src, + dev, areq_ctx->backup_mac, + req->src, (skip + req->cryptlen - areq_ctx->req_authsize), skip + req->cryptlen, @@ -1013,14 +998,14 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) { /*NON-INPLACE and DECRYPT*/ - ssi_buffer_mgr_add_scatterlist_entry(sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, areq_ctx->src.nents, areq_ctx->src_sgl, areq_ctx->cryptlen, areq_ctx->src_offset, is_last_table, &areq_ctx->src.mlli_nents); - ssi_buffer_mgr_add_scatterlist_entry(sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, areq_ctx->dst.nents, areq_ctx->dst_sgl, areq_ctx->cryptlen, @@ -1028,7 +1013,8 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( is_last_table, &areq_ctx->dst.mlli_nents); - icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->src_sgl, + icv_nents = ssi_buffer_mgr_get_aead_icv_nents(dev, + areq_ctx->src_sgl, areq_ctx->src.nents, authsize, *src_last_bytes, @@ -1043,15 +1029,15 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( * verification is made by CPU compare in order to simplify * MAC verification upon request completion */ - u32 size_to_skip = req->assoclen; + u32 size_to_skip = req->assoclen; - if (areq_ctx->is_gcm4543) - size_to_skip += crypto_aead_ivsize(tfm); + if (areq_ctx->is_gcm4543) + size_to_skip += crypto_aead_ivsize(tfm); - ssi_buffer_mgr_copy_scatterlist_portion( - areq_ctx->backup_mac, req->src, - size_to_skip + req->cryptlen - areq_ctx->req_authsize, - size_to_skip + req->cryptlen, SSI_SG_TO_BUF); + ssi_buffer_mgr_copy_scatterlist_portion( + dev, areq_ctx->backup_mac, req->src, + size_to_skip + req->cryptlen - areq_ctx->req_authsize, + size_to_skip + req->cryptlen, SSI_SG_TO_BUF); areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { /* Contig. ICV */ /*Should hanlde if the sg is not contig.*/ @@ -1065,14 +1051,14 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( } else { /*NON-INPLACE and ENCRYPT*/ - ssi_buffer_mgr_add_scatterlist_entry(sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, areq_ctx->dst.nents, areq_ctx->dst_sgl, areq_ctx->cryptlen, areq_ctx->dst_offset, is_last_table, &areq_ctx->dst.mlli_nents); - ssi_buffer_mgr_add_scatterlist_entry(sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, sg_data, areq_ctx->src.nents, areq_ctx->src_sgl, areq_ctx->cryptlen, @@ -1080,7 +1066,8 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli( is_last_table, &areq_ctx->src.mlli_nents); - icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->dst_sgl, + icv_nents = ssi_buffer_mgr_get_aead_icv_nents(dev, + areq_ctx->dst_sgl, areq_ctx->dst.nents, authsize, *dst_last_bytes, @@ -1115,7 +1102,7 @@ static inline int ssi_buffer_mgr_aead_chain_data( bool is_last_table, bool do_chain) { struct aead_req_ctx *areq_ctx = aead_request_ctx(req); - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type; unsigned int authsize = areq_ctx->req_authsize; int src_last_bytes = 0, dst_last_bytes = 0; @@ -1134,10 +1121,9 @@ static inline int ssi_buffer_mgr_aead_chain_data( offset = size_to_skip; - if (!sg_data) { - rc = -EINVAL; - goto chain_data_exit; - } + if (!sg_data) + return -EINVAL; + areq_ctx->src_sgl = req->src; areq_ctx->dst_sgl = req->dst; @@ -1145,7 +1131,10 @@ static inline int ssi_buffer_mgr_aead_chain_data( size_for_map += crypto_aead_ivsize(tfm); size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0; - src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src, size_for_map, &src_last_bytes, &chained); + src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(dev, req->src, + size_for_map, + &src_last_bytes, + &chained); sg_index = areq_ctx->src_sgl->length; //check where the data starts while (sg_index <= size_to_skip) { @@ -1153,15 +1142,15 @@ static inline int ssi_buffer_mgr_aead_chain_data( areq_ctx->src_sgl = sg_next(areq_ctx->src_sgl); //if have reached the end of the sgl, then this is unexpected if (!areq_ctx->src_sgl) { - SSI_LOG_ERR("reached end of sg list. unexpected\n"); - BUG(); + dev_err(dev, "reached end of sg list. unexpected\n"); + return -EINVAL; } sg_index += areq_ctx->src_sgl->length; src_mapped_nents--; } if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES)) { - SSI_LOG_ERR("Too many fragments. current %d max %d\n", - src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES); + dev_err(dev, "Too many fragments. current %d max %d\n", + src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES); return -ENOMEM; } @@ -1187,7 +1176,10 @@ static inline int ssi_buffer_mgr_aead_chain_data( } } - dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst, size_for_map, &dst_last_bytes, &chained); + dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(dev, req->dst, + size_for_map, + &dst_last_bytes, + &chained); sg_index = areq_ctx->dst_sgl->length; offset = size_to_skip; @@ -1197,15 +1189,15 @@ static inline int ssi_buffer_mgr_aead_chain_data( areq_ctx->dst_sgl = sg_next(areq_ctx->dst_sgl); //if have reached the end of the sgl, then this is unexpected if (!areq_ctx->dst_sgl) { - SSI_LOG_ERR("reached end of sg list. unexpected\n"); - BUG(); + dev_err(dev, "reached end of sg list. unexpected\n"); + return -EINVAL; } sg_index += areq_ctx->dst_sgl->length; dst_mapped_nents--; } if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES)) { - SSI_LOG_ERR("Too many fragments. current %d max %d\n", - dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES); + dev_err(dev, "Too many fragments. current %d max %d\n", + dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES); return -ENOMEM; } areq_ctx->dst.nents = dst_mapped_nents; @@ -1285,7 +1277,7 @@ int ssi_buffer_mgr_map_aead_request( { struct aead_req_ctx *areq_ctx = aead_request_ctx(req); struct mlli_params *mlli_params = &areq_ctx->mlli_params; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); struct buffer_array sg_data; unsigned int authsize = areq_ctx->req_authsize; struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle; @@ -1312,7 +1304,7 @@ int ssi_buffer_mgr_map_aead_request( * data memory overriding that caused by cache coherence problem. */ ssi_buffer_mgr_copy_scatterlist_portion( - areq_ctx->backup_mac, req->src, + dev, areq_ctx->backup_mac, req->src, size_to_skip + req->cryptlen - areq_ctx->req_authsize, size_to_skip + req->cryptlen, SSI_SG_TO_BUF); } @@ -1327,8 +1319,8 @@ int ssi_buffer_mgr_map_aead_request( MAX_MAC_SIZE, DMA_BIDIRECTIONAL); if (unlikely(dma_mapping_error(dev, areq_ctx->mac_buf_dma_addr))) { - SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK for DMA failed\n", - MAX_MAC_SIZE, areq_ctx->mac_buf); + dev_err(dev, "Mapping mac_buf %u B at va=%pK for DMA failed\n", + MAX_MAC_SIZE, areq_ctx->mac_buf); rc = -ENOMEM; goto aead_map_failure; } @@ -1340,9 +1332,10 @@ int ssi_buffer_mgr_map_aead_request( DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, areq_ctx->ccm_iv0_dma_addr))) { - SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK " - "for DMA failed\n", AES_BLOCK_SIZE, - (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET)); + dev_err(dev, "Mapping mac_buf %u B at va=%pK for DMA failed\n", + AES_BLOCK_SIZE, + (areq_ctx->ccm_config + + CCM_CTR_COUNT_0_OFFSET)); areq_ctx->ccm_iv0_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; @@ -1362,8 +1355,8 @@ int ssi_buffer_mgr_map_aead_request( AES_BLOCK_SIZE, DMA_BIDIRECTIONAL); if (unlikely(dma_mapping_error(dev, areq_ctx->hkey_dma_addr))) { - SSI_LOG_ERR("Mapping hkey %u B at va=%pK for DMA failed\n", - AES_BLOCK_SIZE, areq_ctx->hkey); + dev_err(dev, "Mapping hkey %u B at va=%pK for DMA failed\n", + AES_BLOCK_SIZE, areq_ctx->hkey); rc = -ENOMEM; goto aead_map_failure; } @@ -1373,8 +1366,8 @@ int ssi_buffer_mgr_map_aead_request( AES_BLOCK_SIZE, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_block_len_dma_addr))) { - SSI_LOG_ERR("Mapping gcm_len_block %u B at va=%pK for DMA failed\n", - AES_BLOCK_SIZE, &areq_ctx->gcm_len_block); + dev_err(dev, "Mapping gcm_len_block %u B at va=%pK for DMA failed\n", + AES_BLOCK_SIZE, &areq_ctx->gcm_len_block); rc = -ENOMEM; goto aead_map_failure; } @@ -1385,9 +1378,8 @@ int ssi_buffer_mgr_map_aead_request( DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc1_dma_addr))) { - SSI_LOG_ERR("Mapping gcm_iv_inc1 %u B at va=%pK " - "for DMA failed\n", AES_BLOCK_SIZE, - (areq_ctx->gcm_iv_inc1)); + dev_err(dev, "Mapping gcm_iv_inc1 %u B at va=%pK for DMA failed\n", + AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc1)); areq_ctx->gcm_iv_inc1_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; @@ -1399,9 +1391,8 @@ int ssi_buffer_mgr_map_aead_request( DMA_TO_DEVICE); if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc2_dma_addr))) { - SSI_LOG_ERR("Mapping gcm_iv_inc2 %u B at va=%pK " - "for DMA failed\n", AES_BLOCK_SIZE, - (areq_ctx->gcm_iv_inc2)); + dev_err(dev, "Mapping gcm_iv_inc2 %u B at va=%pK for DMA failed\n", + AES_BLOCK_SIZE, (areq_ctx->gcm_iv_inc2)); areq_ctx->gcm_iv_inc2_dma_addr = 0; rc = -ENOMEM; goto aead_map_failure; @@ -1481,9 +1472,10 @@ int ssi_buffer_mgr_map_aead_request( goto aead_map_failure; ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req); - SSI_LOG_DEBUG("assoc params mn %d\n", areq_ctx->assoc.mlli_nents); - SSI_LOG_DEBUG("src params mn %d\n", areq_ctx->src.mlli_nents); - SSI_LOG_DEBUG("dst params mn %d\n", areq_ctx->dst.mlli_nents); + dev_dbg(dev, "assoc params mn %d\n", + areq_ctx->assoc.mlli_nents); + dev_dbg(dev, "src params mn %d\n", areq_ctx->src.mlli_nents); + dev_dbg(dev, "dst params mn %d\n", areq_ctx->dst.mlli_nents); } return 0; @@ -1496,7 +1488,7 @@ int ssi_buffer_mgr_map_hash_request_final( struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, bool do_update) { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 : areq_ctx->buff0; u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt : @@ -1507,11 +1499,8 @@ int ssi_buffer_mgr_map_hash_request_final( u32 dummy = 0; u32 mapped_nents = 0; - SSI_LOG_DEBUG(" final params : curr_buff=%pK " - "curr_buff_cnt=0x%X nbytes = 0x%X " - "src=%pK curr_index=%u\n", - curr_buff, *curr_buff_cnt, nbytes, - src, areq_ctx->buff_index); + dev_dbg(dev, "final params : curr_buff=%pK curr_buff_cnt=0x%X nbytes = 0x%X src=%pK curr_index=%u\n", + curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; mlli_params->curr_pool = NULL; @@ -1557,7 +1546,7 @@ int ssi_buffer_mgr_map_hash_request_final( if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ - ssi_buffer_mgr_add_scatterlist_entry(&sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes, 0, true, &areq_ctx->mlli_nents); @@ -1568,8 +1557,8 @@ int ssi_buffer_mgr_map_hash_request_final( } /* change the buffer index for the unmap function */ areq_ctx->buff_index = (areq_ctx->buff_index ^ 1); - SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n", - GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type)); + dev_dbg(dev, "areq_ctx->data_dma_buf_type = %s\n", + GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type)); return 0; fail_unmap_din: @@ -1586,7 +1575,7 @@ int ssi_buffer_mgr_map_hash_request_update( struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, unsigned int block_size) { struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 : areq_ctx->buff0; u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt : @@ -1604,11 +1593,8 @@ int ssi_buffer_mgr_map_hash_request_update( u32 dummy = 0; u32 mapped_nents = 0; - SSI_LOG_DEBUG(" update params : curr_buff=%pK " - "curr_buff_cnt=0x%X nbytes=0x%X " - "src=%pK curr_index=%u\n", - curr_buff, *curr_buff_cnt, nbytes, - src, areq_ctx->buff_index); + dev_dbg(dev, " update params : curr_buff=%pK curr_buff_cnt=0x%X nbytes=0x%X src=%pK curr_index=%u\n", + curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; mlli_params->curr_pool = NULL; @@ -1617,14 +1603,11 @@ int ssi_buffer_mgr_map_hash_request_update( areq_ctx->in_nents = 0; if (unlikely(total_in_len < block_size)) { - SSI_LOG_DEBUG(" less than one block: curr_buff=%pK " - "*curr_buff_cnt=0x%X copy_to=%pK\n", - curr_buff, *curr_buff_cnt, - &curr_buff[*curr_buff_cnt]); + dev_dbg(dev, " less than one block: curr_buff=%pK *curr_buff_cnt=0x%X copy_to=%pK\n", + curr_buff, *curr_buff_cnt, &curr_buff[*curr_buff_cnt]); areq_ctx->in_nents = - ssi_buffer_mgr_get_sgl_nents(src, - nbytes, - &dummy, NULL); + ssi_buffer_mgr_get_sgl_nents(dev, src, nbytes, &dummy, + NULL); sg_copy_to_buffer(src, areq_ctx->in_nents, &curr_buff[*curr_buff_cnt], nbytes); *curr_buff_cnt += nbytes; @@ -1636,17 +1619,15 @@ int ssi_buffer_mgr_map_hash_request_update( /* update data len */ update_data_len = total_in_len - *next_buff_cnt; - SSI_LOG_DEBUG(" temp length : *next_buff_cnt=0x%X " - "update_data_len=0x%X\n", + dev_dbg(dev, " temp length : *next_buff_cnt=0x%X update_data_len=0x%X\n", *next_buff_cnt, update_data_len); /* Copy the new residue to next buffer */ if (*next_buff_cnt != 0) { - SSI_LOG_DEBUG(" handle residue: next buff %pK skip data %u" - " residue %u\n", next_buff, - (update_data_len - *curr_buff_cnt), - *next_buff_cnt); - ssi_buffer_mgr_copy_scatterlist_portion(next_buff, src, + dev_dbg(dev, " handle residue: next buff %pK skip data %u residue %u\n", + next_buff, (update_data_len - *curr_buff_cnt), + *next_buff_cnt); + ssi_buffer_mgr_copy_scatterlist_portion(dev, next_buff, src, (update_data_len - *curr_buff_cnt), nbytes, SSI_SG_TO_BUF); /* change the buffer index for next operation */ @@ -1688,7 +1669,7 @@ int ssi_buffer_mgr_map_hash_request_update( if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ - ssi_buffer_mgr_add_scatterlist_entry(&sg_data, + ssi_buffer_mgr_add_scatterlist_entry(dev, &sg_data, areq_ctx->in_nents, src, (update_data_len - *curr_buff_cnt), @@ -1725,29 +1706,26 @@ void ssi_buffer_mgr_unmap_hash_request( *allocated and should be released */ if (areq_ctx->mlli_params.curr_pool) { - SSI_LOG_DEBUG("free MLLI buffer: dma=%pad virt=%pK\n", - areq_ctx->mlli_params.mlli_dma_addr, - areq_ctx->mlli_params.mlli_virt_addr); + dev_dbg(dev, "free MLLI buffer: dma=%pad virt=%pK\n", + &areq_ctx->mlli_params.mlli_dma_addr, + areq_ctx->mlli_params.mlli_virt_addr); dma_pool_free(areq_ctx->mlli_params.curr_pool, areq_ctx->mlli_params.mlli_virt_addr, areq_ctx->mlli_params.mlli_dma_addr); } if ((src) && likely(areq_ctx->in_nents != 0)) { - SSI_LOG_DEBUG("Unmapped sg src: virt=%pK dma=%pad len=0x%X\n", - sg_virt(src), - sg_dma_address(src), - sg_dma_len(src)); + dev_dbg(dev, "Unmapped sg src: virt=%pK dma=%pad len=0x%X\n", + sg_virt(src), &sg_dma_address(src), sg_dma_len(src)); dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE); } if (*prev_len != 0) { - SSI_LOG_DEBUG("Unmapped buffer: areq_ctx->buff_sg=%pK" - " dma=%pad len 0x%X\n", - sg_virt(areq_ctx->buff_sg), - sg_dma_address(areq_ctx->buff_sg), - sg_dma_len(areq_ctx->buff_sg)); + dev_dbg(dev, "Unmapped buffer: areq_ctx->buff_sg=%pK dma=%pad len 0x%X\n", + sg_virt(areq_ctx->buff_sg), + &sg_dma_address(areq_ctx->buff_sg), + sg_dma_len(areq_ctx->buff_sg)); dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE); if (!do_revert) { /* clean the previous data length for update operation */ @@ -1761,7 +1739,7 @@ void ssi_buffer_mgr_unmap_hash_request( int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata) { struct buff_mgr_handle *buff_mgr_handle; - struct device *dev = &drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(drvdata); buff_mgr_handle = kmalloc(sizeof(*buff_mgr_handle), GFP_KERNEL); if (!buff_mgr_handle) diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h b/drivers/staging/ccree/ssi_buffer_mgr.h index 41f5223730f8..1032f25edcab 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.h +++ b/drivers/staging/ccree/ssi_buffer_mgr.h @@ -80,7 +80,10 @@ int ssi_buffer_mgr_map_hash_request_update(struct ssi_drvdata *drvdata, void *ct void ssi_buffer_mgr_unmap_hash_request(struct device *dev, void *ctx, struct scatterlist *src, bool do_revert); -void ssi_buffer_mgr_copy_scatterlist_portion(u8 *dest, struct scatterlist *sg, u32 to_skip, u32 end, enum ssi_sg_cpy_direct direct); +void ssi_buffer_mgr_copy_scatterlist_portion(struct device *dev, u8 *dest, + struct scatterlist *sg, + u32 to_skip, u32 end, + enum ssi_sg_cpy_direct direct); void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, u32 data_len); diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c index 8d31a93fd8b7..ee85cbf7c9ae 100644 --- a/drivers/staging/ccree/ssi_cipher.c +++ b/drivers/staging/ccree/ssi_cipher.c @@ -181,45 +181,42 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm) struct crypto_alg *alg = tfm->__crt_alg; struct ssi_crypto_alg *ssi_alg = container_of(alg, struct ssi_crypto_alg, crypto_alg); - struct device *dev; + struct device *dev = drvdata_to_dev(ssi_alg->drvdata); int rc = 0; unsigned int max_key_buf_size = get_max_keysize(tfm); - SSI_LOG_DEBUG("Initializing context @%p for %s\n", - ctx_p, crypto_tfm_alg_name(tfm)); + dev_dbg(dev, "Initializing context @%p for %s\n", ctx_p, + crypto_tfm_alg_name(tfm)); ctx_p->cipher_mode = ssi_alg->cipher_mode; ctx_p->flow_mode = ssi_alg->flow_mode; ctx_p->drvdata = ssi_alg->drvdata; - dev = &ctx_p->drvdata->plat_dev->dev; /* Allocate key buffer, cache line aligned */ ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA); - if (!ctx_p->user.key) { - SSI_LOG_ERR("Allocating key buffer in context failed\n"); - rc = -ENOMEM; - } - SSI_LOG_DEBUG("Allocated key buffer in context. key=@%p\n", - ctx_p->user.key); + if (!ctx_p->user.key) + return -ENOMEM; + + dev_dbg(dev, "Allocated key buffer in context. key=@%p\n", + ctx_p->user.key); /* Map key buffer */ ctx_p->user.key_dma_addr = dma_map_single(dev, (void *)ctx_p->user.key, max_key_buf_size, DMA_TO_DEVICE); if (dma_mapping_error(dev, ctx_p->user.key_dma_addr)) { - SSI_LOG_ERR("Mapping Key %u B at va=%pK for DMA failed\n", - max_key_buf_size, ctx_p->user.key); + dev_err(dev, "Mapping Key %u B at va=%pK for DMA failed\n", + max_key_buf_size, ctx_p->user.key); return -ENOMEM; } - SSI_LOG_DEBUG("Mapped key %u B at va=%pK to dma=%pad\n", - max_key_buf_size, ctx_p->user.key, - ctx_p->user.key_dma_addr); + dev_dbg(dev, "Mapped key %u B at va=%pK to dma=%pad\n", + max_key_buf_size, ctx_p->user.key, &ctx_p->user.key_dma_addr); if (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) { /* Alloc hash tfm for essiv */ ctx_p->shash_tfm = crypto_alloc_shash("sha256-generic", 0, 0); if (IS_ERR(ctx_p->shash_tfm)) { - SSI_LOG_ERR("Error allocating hash tfm for ESSIV.\n"); + dev_err(dev, "Error allocating hash tfm for ESSIV.\n"); return PTR_ERR(ctx_p->shash_tfm); } } @@ -230,11 +227,11 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm) static void ssi_blkcipher_exit(struct crypto_tfm *tfm) { struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm); - struct device *dev = &ctx_p->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx_p->drvdata); unsigned int max_key_buf_size = get_max_keysize(tfm); - SSI_LOG_DEBUG("Clearing context @%p for %s\n", - crypto_tfm_ctx(tfm), crypto_tfm_alg_name(tfm)); + dev_dbg(dev, "Clearing context @%p for %s\n", + crypto_tfm_ctx(tfm), crypto_tfm_alg_name(tfm)); if (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) { /* Free hash tfm for essiv */ @@ -245,12 +242,12 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm) /* Unmap key buffer */ dma_unmap_single(dev, ctx_p->user.key_dma_addr, max_key_buf_size, DMA_TO_DEVICE); - SSI_LOG_DEBUG("Unmapped key buffer key_dma_addr=%pad\n", - ctx_p->user.key_dma_addr); + dev_dbg(dev, "Unmapped key buffer key_dma_addr=%pad\n", + &ctx_p->user.key_dma_addr); /* Free key buffer in context */ kfree(ctx_p->user.key); - SSI_LOG_DEBUG("Free key buffer in context. key=@%p\n", ctx_p->user.key); + dev_dbg(dev, "Free key buffer in context. key=@%p\n", ctx_p->user.key); } struct tdes_keys { @@ -298,16 +295,14 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, unsigned int keylen) { struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm); - struct device *dev = &ctx_p->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx_p->drvdata); u32 tmp[DES_EXPKEY_WORDS]; unsigned int max_key_buf_size = get_max_keysize(tfm); - SSI_LOG_DEBUG("Setting key in context @%p for %s. keylen=%u\n", - ctx_p, crypto_tfm_alg_name(tfm), keylen); + dev_dbg(dev, "Setting key in context @%p for %s. keylen=%u\n", + ctx_p, crypto_tfm_alg_name(tfm), keylen); dump_byte_array("key", (u8 *)key, keylen); - SSI_LOG_DEBUG("after FIPS check"); - /* STAT_PHASE_0: Init and sanity checks */ #if SSI_CC_HAS_MULTI2 @@ -317,7 +312,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, #endif /*SSI_CC_HAS_MULTI2*/ if (unlikely(validate_keys_sizes(ctx_p, keylen) != 0)) { - SSI_LOG_ERR("Unsupported key size %d.\n", keylen); + dev_err(dev, "Unsupported key size %d.\n", keylen); crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); return -EINVAL; } @@ -327,13 +322,14 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, struct arm_hw_key_info *hki = (struct arm_hw_key_info *)key; if (unlikely(ctx_p->flow_mode != S_DIN_to_AES)) { - SSI_LOG_ERR("HW key not supported for non-AES flows\n"); + dev_err(dev, "HW key not supported for non-AES flows\n"); return -EINVAL; } ctx_p->hw.key1_slot = hw_key_to_cc_hw_key(hki->hw_key1); if (unlikely(ctx_p->hw.key1_slot == END_OF_KEYS)) { - SSI_LOG_ERR("Unsupported hw key1 number (%d)\n", hki->hw_key1); + dev_err(dev, "Unsupported hw key1 number (%d)\n", + hki->hw_key1); return -EINVAL; } @@ -341,18 +337,20 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, (ctx_p->cipher_mode == DRV_CIPHER_ESSIV) || (ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER)) { if (unlikely(hki->hw_key1 == hki->hw_key2)) { - SSI_LOG_ERR("Illegal hw key numbers (%d,%d)\n", hki->hw_key1, hki->hw_key2); + dev_err(dev, "Illegal hw key numbers (%d,%d)\n", + hki->hw_key1, hki->hw_key2); return -EINVAL; } ctx_p->hw.key2_slot = hw_key_to_cc_hw_key(hki->hw_key2); if (unlikely(ctx_p->hw.key2_slot == END_OF_KEYS)) { - SSI_LOG_ERR("Unsupported hw key2 number (%d)\n", hki->hw_key2); + dev_err(dev, "Unsupported hw key2 number (%d)\n", + hki->hw_key2); return -EINVAL; } } ctx_p->keylen = keylen; - SSI_LOG_DEBUG("ssi_is_hw_key ret 0"); + dev_dbg(dev, "ssi_is_hw_key ret 0"); return 0; } @@ -362,19 +360,19 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, if (unlikely(!des_ekey(tmp, key)) && (crypto_tfm_get_flags(tfm) & CRYPTO_TFM_REQ_WEAK_KEY)) { tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY; - SSI_LOG_DEBUG("weak DES key"); + dev_dbg(dev, "weak DES key"); return -EINVAL; } } if ((ctx_p->cipher_mode == DRV_CIPHER_XTS) && xts_check_key(tfm, key, keylen) != 0) { - SSI_LOG_DEBUG("weak XTS key"); + dev_dbg(dev, "weak XTS key"); return -EINVAL; } if ((ctx_p->flow_mode == S_DIN_to_DES) && (keylen == DES3_EDE_KEY_SIZE) && ssi_verify_3des_keys(key, keylen) != 0) { - SSI_LOG_DEBUG("weak 3DES key"); + dev_dbg(dev, "weak 3DES key"); return -EINVAL; } @@ -389,7 +387,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, if (ctx_p->key_round_number < CC_MULTI2_MIN_NUM_ROUNDS || ctx_p->key_round_number > CC_MULTI2_MAX_NUM_ROUNDS) { crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); - SSI_LOG_DEBUG("SSI_CC_HAS_MULTI2 einval"); + dev_dbg(dev, "SSI_CC_HAS_MULTI2 einval"); return -EINVAL; #endif /*SSI_CC_HAS_MULTI2*/ } else { @@ -407,7 +405,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, err = crypto_shash_digest(desc, ctx_p->user.key, key_len, ctx_p->user.key + key_len); if (err) { - SSI_LOG_ERR("Failed to hash ESSIV key.\n"); + dev_err(dev, "Failed to hash ESSIV key.\n"); return err; } } @@ -416,7 +414,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm, max_key_buf_size, DMA_TO_DEVICE); ctx_p->keylen = keylen; - SSI_LOG_DEBUG("return safely"); + dev_dbg(dev, "return safely"); return 0; } @@ -430,6 +428,7 @@ ssi_blkcipher_create_setup_desc( unsigned int *seq_size) { struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx_p->drvdata); int cipher_mode = ctx_p->cipher_mode; int flow_mode = ctx_p->flow_mode; int direction = req_ctx->gen_ctx.op_type; @@ -540,8 +539,7 @@ ssi_blkcipher_create_setup_desc( (*seq_size)++; break; default: - SSI_LOG_ERR("Unsupported cipher mode (%d)\n", cipher_mode); - BUG(); + dev_err(dev, "Unsupported cipher mode (%d)\n", cipher_mode); } } @@ -601,6 +599,7 @@ ssi_blkcipher_create_data_desc( unsigned int *seq_size) { struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx_p->drvdata); unsigned int flow_mode = ctx_p->flow_mode; switch (ctx_p->flow_mode) { @@ -616,15 +615,15 @@ ssi_blkcipher_create_data_desc( break; #endif /*SSI_CC_HAS_MULTI2*/ default: - SSI_LOG_ERR("invalid flow mode, flow_mode = %d\n", flow_mode); + dev_err(dev, "invalid flow mode, flow_mode = %d\n", flow_mode); return; } /* Process */ if (likely(req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI)) { - SSI_LOG_DEBUG(" data params addr %pad length 0x%X\n", - sg_dma_address(src), nbytes); - SSI_LOG_DEBUG(" data params addr %pad length 0x%X\n", - sg_dma_address(dst), nbytes); + dev_dbg(dev, " data params addr %pad length 0x%X\n", + &sg_dma_address(src), nbytes); + dev_dbg(dev, " data params addr %pad length 0x%X\n", + &sg_dma_address(dst), nbytes); hw_desc_init(&desc[*seq_size]); set_din_type(&desc[*seq_size], DMA_DLLI, sg_dma_address(src), nbytes, NS_BIT); @@ -637,9 +636,8 @@ ssi_blkcipher_create_data_desc( (*seq_size)++; } else { /* bypass */ - SSI_LOG_DEBUG(" bypass params addr %pad " - "length 0x%X addr 0x%08X\n", - req_ctx->mlli_params.mlli_dma_addr, + dev_dbg(dev, " bypass params addr %pad length 0x%X addr 0x%08X\n", + &req_ctx->mlli_params.mlli_dma_addr, req_ctx->mlli_params.mlli_len, (unsigned int)ctx_p->drvdata->mlli_sram_addr); hw_desc_init(&desc[*seq_size]); @@ -657,21 +655,18 @@ ssi_blkcipher_create_data_desc( ctx_p->drvdata->mlli_sram_addr, req_ctx->in_mlli_nents, NS_BIT); if (req_ctx->out_nents == 0) { - SSI_LOG_DEBUG(" din/dout params addr 0x%08X " - "addr 0x%08X\n", - (unsigned int)ctx_p->drvdata->mlli_sram_addr, - (unsigned int)ctx_p->drvdata->mlli_sram_addr); + dev_dbg(dev, " din/dout params addr 0x%08X addr 0x%08X\n", + (unsigned int)ctx_p->drvdata->mlli_sram_addr, + (unsigned int)ctx_p->drvdata->mlli_sram_addr); set_dout_mlli(&desc[*seq_size], ctx_p->drvdata->mlli_sram_addr, req_ctx->in_mlli_nents, NS_BIT, (!areq ? 0 : 1)); } else { - SSI_LOG_DEBUG(" din/dout params " - "addr 0x%08X addr 0x%08X\n", + dev_dbg(dev, " din/dout params addr 0x%08X addr 0x%08X\n", (unsigned int)ctx_p->drvdata->mlli_sram_addr, (unsigned int)ctx_p->drvdata->mlli_sram_addr + - (u32)LLI_ENTRY_BYTE_SIZE * - req_ctx->in_nents); + (u32)LLI_ENTRY_BYTE_SIZE * req_ctx->in_nents); set_dout_mlli(&desc[*seq_size], (ctx_p->drvdata->mlli_sram_addr + (LLI_ENTRY_BYTE_SIZE * @@ -697,16 +692,10 @@ static int ssi_blkcipher_complete(struct device *dev, void __iomem *cc_base) { int completion_error = 0; - u32 inflight_counter; struct ablkcipher_request *req = (struct ablkcipher_request *)areq; ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst); - - /*Set the inflight couter value to local variable*/ - inflight_counter = ctx_p->drvdata->inflight_counter; - /*Decrease the inflight counter*/ - if (ctx_p->flow_mode == BYPASS && ctx_p->drvdata->inflight_counter > 0) - ctx_p->drvdata->inflight_counter--; + kfree(req_ctx->iv); if (areq) { /* @@ -742,20 +731,20 @@ static int ssi_blkcipher_process( enum drv_crypto_direction direction) { struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm); - struct device *dev = &ctx_p->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx_p->drvdata); struct cc_hw_desc desc[MAX_ABLKCIPHER_SEQ_LEN]; struct ssi_crypto_req ssi_req = {}; int rc, seq_len = 0, cts_restore_flag = 0; - SSI_LOG_DEBUG("%s areq=%p info=%p nbytes=%d\n", - ((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Encrypt" : "Decrypt"), - areq, info, nbytes); + dev_dbg(dev, "%s areq=%p info=%p nbytes=%d\n", + ((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ? + "Encrypt" : "Decrypt"), areq, info, nbytes); /* STAT_PHASE_0: Init and sanity checks */ /* TODO: check data length according to mode */ if (unlikely(validate_data_size(ctx_p, nbytes))) { - SSI_LOG_ERR("Unsupported data size %d.\n", nbytes); + dev_err(dev, "Unsupported data size %d.\n", nbytes); crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_BLOCK_LEN); rc = -EINVAL; goto exit_process; @@ -765,6 +754,17 @@ static int ssi_blkcipher_process( rc = 0; goto exit_process; } + + /* The IV we are handed may be allocted from the stack so + * we must copy it to a DMAable buffer before use. + */ + req_ctx->iv = kmalloc(ivsize, GFP_KERNEL); + if (!req_ctx->iv) { + rc = -ENOMEM; + goto exit_process; + } + memcpy(req_ctx->iv, info, ivsize); + /*For CTS in case of data size aligned to 16 use CBC mode*/ if (((nbytes % AES_BLOCK_SIZE) == 0) && (ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS)) { ctx_p->cipher_mode = DRV_CIPHER_CBC; @@ -786,9 +786,11 @@ static int ssi_blkcipher_process( /* STAT_PHASE_1: Map buffers */ - rc = ssi_buffer_mgr_map_blkcipher_request(ctx_p->drvdata, req_ctx, ivsize, nbytes, info, src, dst); + rc = ssi_buffer_mgr_map_blkcipher_request(ctx_p->drvdata, req_ctx, + ivsize, nbytes, req_ctx->iv, + src, dst); if (unlikely(rc != 0)) { - SSI_LOG_ERR("map_request() failed\n"); + dev_err(dev, "map_request() failed\n"); goto exit_process; } @@ -838,8 +840,10 @@ exit_process: if (cts_restore_flag != 0) ctx_p->cipher_mode = DRV_CIPHER_CBC_CTS; - if (rc != -EINPROGRESS) + if (rc != -EINPROGRESS) { kfree(req_ctx->backup_info); + kfree(req_ctx->iv); + } return rc; } @@ -1245,16 +1249,15 @@ static struct ssi_alg_template blkcipher_algs[] = { }; static -struct ssi_crypto_alg *ssi_ablkcipher_create_alg(struct ssi_alg_template *template) +struct ssi_crypto_alg *ssi_ablkcipher_create_alg(struct ssi_alg_template + *template, struct device *dev) { struct ssi_crypto_alg *t_alg; struct crypto_alg *alg; t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL); - if (!t_alg) { - SSI_LOG_ERR("failed to allocate t_alg\n"); + if (!t_alg) return ERR_PTR(-ENOMEM); - } alg = &t_alg->crypto_alg; @@ -1285,10 +1288,6 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata) struct ssi_crypto_alg *t_alg, *n; struct ssi_blkcipher_handle *blkcipher_handle = drvdata->blkcipher_handle; - struct device *dev; - - dev = &drvdata->plat_dev->dev; - if (blkcipher_handle) { /* Remove registered algs */ list_for_each_entry_safe(t_alg, n, @@ -1308,6 +1307,7 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata) { struct ssi_blkcipher_handle *ablkcipher_handle; struct ssi_crypto_alg *t_alg; + struct device *dev = drvdata_to_dev(drvdata); int rc = -ENOMEM; int alg; @@ -1315,37 +1315,38 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata) if (!ablkcipher_handle) return -ENOMEM; - drvdata->blkcipher_handle = ablkcipher_handle; - INIT_LIST_HEAD(&ablkcipher_handle->blkcipher_alg_list); + drvdata->blkcipher_handle = ablkcipher_handle; /* Linux crypto */ - SSI_LOG_DEBUG("Number of algorithms = %zu\n", ARRAY_SIZE(blkcipher_algs)); + dev_dbg(dev, "Number of algorithms = %zu\n", + ARRAY_SIZE(blkcipher_algs)); for (alg = 0; alg < ARRAY_SIZE(blkcipher_algs); alg++) { - SSI_LOG_DEBUG("creating %s\n", blkcipher_algs[alg].driver_name); - t_alg = ssi_ablkcipher_create_alg(&blkcipher_algs[alg]); + dev_dbg(dev, "creating %s\n", blkcipher_algs[alg].driver_name); + t_alg = ssi_ablkcipher_create_alg(&blkcipher_algs[alg], dev); if (IS_ERR(t_alg)) { rc = PTR_ERR(t_alg); - SSI_LOG_ERR("%s alg allocation failed\n", - blkcipher_algs[alg].driver_name); + dev_err(dev, "%s alg allocation failed\n", + blkcipher_algs[alg].driver_name); goto fail0; } t_alg->drvdata = drvdata; - SSI_LOG_DEBUG("registering %s\n", blkcipher_algs[alg].driver_name); + dev_dbg(dev, "registering %s\n", + blkcipher_algs[alg].driver_name); rc = crypto_register_alg(&t_alg->crypto_alg); - SSI_LOG_DEBUG("%s alg registration rc = %x\n", - t_alg->crypto_alg.cra_driver_name, rc); + dev_dbg(dev, "%s alg registration rc = %x\n", + t_alg->crypto_alg.cra_driver_name, rc); if (unlikely(rc != 0)) { - SSI_LOG_ERR("%s alg registration failed\n", - t_alg->crypto_alg.cra_driver_name); + dev_err(dev, "%s alg registration failed\n", + t_alg->crypto_alg.cra_driver_name); kfree(t_alg); goto fail0; } else { list_add_tail(&t_alg->entry, &ablkcipher_handle->blkcipher_alg_list); - SSI_LOG_DEBUG("Registered %s\n", - t_alg->crypto_alg.cra_driver_name); + dev_dbg(dev, "Registered %s\n", + t_alg->crypto_alg.cra_driver_name); } } return 0; diff --git a/drivers/staging/ccree/ssi_cipher.h b/drivers/staging/ccree/ssi_cipher.h index 296b375d5d89..25e6335c0d94 100644 --- a/drivers/staging/ccree/ssi_cipher.h +++ b/drivers/staging/ccree/ssi_cipher.h @@ -27,11 +27,11 @@ #include "ssi_buffer_mgr.h" /* Crypto cipher flags */ -#define CC_CRYPTO_CIPHER_KEY_KFDE0 (1 << 0) -#define CC_CRYPTO_CIPHER_KEY_KFDE1 (1 << 1) -#define CC_CRYPTO_CIPHER_KEY_KFDE2 (1 << 2) -#define CC_CRYPTO_CIPHER_KEY_KFDE3 (1 << 3) -#define CC_CRYPTO_CIPHER_DU_SIZE_512B (1 << 4) +#define CC_CRYPTO_CIPHER_KEY_KFDE0 BIT(0) +#define CC_CRYPTO_CIPHER_KEY_KFDE1 BIT(1) +#define CC_CRYPTO_CIPHER_KEY_KFDE2 BIT(2) +#define CC_CRYPTO_CIPHER_KEY_KFDE3 BIT(3) +#define CC_CRYPTO_CIPHER_DU_SIZE_512B BIT(4) #define CC_CRYPTO_CIPHER_KEY_KFDE_MASK (CC_CRYPTO_CIPHER_KEY_KFDE0 | CC_CRYPTO_CIPHER_KEY_KFDE1 | CC_CRYPTO_CIPHER_KEY_KFDE2 | CC_CRYPTO_CIPHER_KEY_KFDE3) @@ -43,6 +43,7 @@ struct blkcipher_req_ctx { u32 out_nents; u32 out_mlli_nents; u8 *backup_info; /*store iv for generated IV flow*/ + u8 *iv; bool is_giv; struct mlli_params mlli_params; }; @@ -75,7 +76,7 @@ struct arm_hw_key_info { static inline bool ssi_is_hw_key(struct crypto_tfm *tfm) { - return 0; + return false; } #endif /* CRYPTO_TFM_REQ_HW_KEY */ diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 9c6f1200c130..1a3c481fa92a 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -74,70 +74,46 @@ #include "ssi_fips.h" #ifdef DX_DUMP_BYTES -void dump_byte_array(const char *name, const u8 *the_array, unsigned long size) +void dump_byte_array(const char *name, const u8 *buf, size_t len) { - int i, line_offset = 0, ret = 0; - const u8 *cur_byte; - char line_buf[80]; + char prefix[NAME_LEN]; - if (!the_array) { - SSI_LOG_ERR("cannot dump array - NULL pointer\n"); + if (!buf) return; - } - ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ", name, size); - if (ret < 0) { - SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret); - return; - } - line_offset = ret; - for (i = 0, cur_byte = the_array; - (i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) { - ret = snprintf(line_buf + line_offset, - sizeof(line_buf) - line_offset, - "0x%02X ", *cur_byte); - if (ret < 0) { - SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret); - return; - } - line_offset += ret; - if (line_offset > 75) { /* Cut before line end */ - SSI_LOG_DEBUG("%s\n", line_buf); - line_offset = 0; - } - } + snprintf(prefix, sizeof(prefix), "%s[%lu]: ", name, len); - if (line_offset > 0) /* Dump remaining line */ - SSI_LOG_DEBUG("%s\n", line_buf); + print_hex_dump(KERN_DEBUG, prefix, DUMP_PREFIX_ADDRESS, 16, 1, len, + false); } #endif static irqreturn_t cc_isr(int irq, void *dev_id) { struct ssi_drvdata *drvdata = (struct ssi_drvdata *)dev_id; - void __iomem *cc_base = drvdata->cc_base; + struct device *dev = drvdata_to_dev(drvdata); u32 irr; u32 imr; /* STAT_OP_TYPE_GENERIC STAT_PHASE_0: Interrupt */ /* read the interrupt status */ - irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR)); - SSI_LOG_DEBUG("Got IRR=0x%08X\n", irr); + irr = cc_ioread(drvdata, CC_REG(HOST_IRR)); + dev_dbg(dev, "Got IRR=0x%08X\n", irr); if (unlikely(irr == 0)) { /* Probably shared interrupt line */ - SSI_LOG_ERR("Got interrupt with empty IRR\n"); + dev_err(dev, "Got interrupt with empty IRR\n"); return IRQ_NONE; } - imr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR)); + imr = cc_ioread(drvdata, CC_REG(HOST_IMR)); /* clear interrupt - must be before processing events */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), irr); + cc_iowrite(drvdata, CC_REG(HOST_ICR), irr); drvdata->irq = irr; /* Completion interrupt - most probable */ if (likely((irr & SSI_COMP_IRQ_MASK) != 0)) { /* Mask AXI completion interrupt - will be unmasked in Deferred service handler */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_COMP_IRQ_MASK); + cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | SSI_COMP_IRQ_MASK); irr &= ~SSI_COMP_IRQ_MASK; complete_request(drvdata); } @@ -145,7 +121,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id) /* TEE FIPS interrupt */ if (likely((irr & SSI_GPR0_IRQ_MASK) != 0)) { /* Mask interrupt - will be unmasked in Deferred service handler */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_GPR0_IRQ_MASK); + cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | SSI_GPR0_IRQ_MASK); irr &= ~SSI_GPR0_IRQ_MASK; fips_handler(drvdata); } @@ -155,14 +131,16 @@ static irqreturn_t cc_isr(int irq, void *dev_id) u32 axi_err; /* Read the AXI error ID */ - axi_err = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR)); - SSI_LOG_DEBUG("AXI completion error: axim_mon_err=0x%08X\n", axi_err); + axi_err = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR)); + dev_dbg(dev, "AXI completion error: axim_mon_err=0x%08X\n", + axi_err); irr &= ~SSI_AXI_ERR_IRQ_MASK; } if (unlikely(irr != 0)) { - SSI_LOG_DEBUG("IRR includes unknown cause bits (0x%08X)\n", irr); + dev_dbg(dev, "IRR includes unknown cause bits (0x%08X)\n", + irr); /* Just warning */ } @@ -172,48 +150,48 @@ static irqreturn_t cc_isr(int irq, void *dev_id) int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe) { unsigned int val, cache_params; - void __iomem *cc_base = drvdata->cc_base; + struct device *dev = drvdata_to_dev(drvdata); /* Unmask all AXI interrupt sources AXI_CFG1 register */ - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG), val & ~SSI_AXI_IRQ_MASK); - SSI_LOG_DEBUG("AXIM_CFG=0x%08X\n", CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG))); + val = cc_ioread(drvdata, CC_REG(AXIM_CFG)); + cc_iowrite(drvdata, CC_REG(AXIM_CFG), val & ~SSI_AXI_IRQ_MASK); + dev_dbg(dev, "AXIM_CFG=0x%08X\n", + cc_ioread(drvdata, CC_REG(AXIM_CFG))); /* Clear all pending interrupts */ - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR)); - SSI_LOG_DEBUG("IRR=0x%08X\n", val); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), val); + val = cc_ioread(drvdata, CC_REG(HOST_IRR)); + dev_dbg(dev, "IRR=0x%08X\n", val); + cc_iowrite(drvdata, CC_REG(HOST_ICR), val); /* Unmask relevant interrupt cause */ - val = (~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK | SSI_GPR0_IRQ_MASK)); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), val); + val = (unsigned int)(~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK | + SSI_GPR0_IRQ_MASK)); + cc_iowrite(drvdata, CC_REG(HOST_IMR), val); #ifdef DX_HOST_IRQ_TIMER_INIT_VAL_REG_OFFSET #ifdef DX_IRQ_DELAY /* Set CC IRQ delay */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL), - DX_IRQ_DELAY); + cc_iowrite(drvdata, CC_REG(HOST_IRQ_TIMER_INIT_VAL), DX_IRQ_DELAY); #endif - if (CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)) > 0) { - SSI_LOG_DEBUG("irq_delay=%d CC cycles\n", - CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL))); + if (cc_ioread(drvdata, CC_REG(HOST_IRQ_TIMER_INIT_VAL)) > 0) { + dev_dbg(dev, "irq_delay=%d CC cycles\n", + cc_ioread(drvdata, CC_REG(HOST_IRQ_TIMER_INIT_VAL))); } #endif cache_params = (drvdata->coherent ? CC_COHERENT_CACHE_PARAMS : 0x0); - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS)); + val = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS)); if (is_probe) - SSI_LOG_INFO("Cache params previous: 0x%08X\n", val); + dev_info(dev, "Cache params previous: 0x%08X\n", val); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS), - cache_params); - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS)); + cc_iowrite(drvdata, CC_REG(AXIM_CACHE_PARAMS), cache_params); + val = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS)); if (is_probe) - SSI_LOG_INFO("Cache params current: 0x%08X (expect: 0x%08X)\n", - val, cache_params); + dev_info(dev, "Cache params current: 0x%08X (expect: 0x%08X)\n", + val, cache_params); return 0; } @@ -222,181 +200,172 @@ static int init_cc_resources(struct platform_device *plat_dev) { struct resource *req_mem_cc_regs = NULL; void __iomem *cc_base = NULL; - bool irq_registered = false; - struct ssi_drvdata *new_drvdata = kzalloc(sizeof(*new_drvdata), - GFP_KERNEL); + struct ssi_drvdata *new_drvdata; struct device *dev = &plat_dev->dev; struct device_node *np = dev->of_node; u32 signature_val; + dma_addr_t dma_mask; int rc = 0; - if (unlikely(!new_drvdata)) { - SSI_LOG_ERR("Failed to allocate drvdata"); - rc = -ENOMEM; - goto init_cc_res_err; - } + new_drvdata = devm_kzalloc(dev, sizeof(*new_drvdata), GFP_KERNEL); + if (!new_drvdata) + return -ENOMEM; + + platform_set_drvdata(plat_dev, new_drvdata); + new_drvdata->plat_dev = plat_dev; new_drvdata->clk = of_clk_get(np, 0); new_drvdata->coherent = of_dma_is_coherent(np); - /*Initialize inflight counter used in dx_ablkcipher_secure_complete used for count of BYSPASS blocks operations*/ - new_drvdata->inflight_counter = 0; - - dev_set_drvdata(&plat_dev->dev, new_drvdata); /* Get device resources */ /* First CC registers space */ - new_drvdata->res_mem = platform_get_resource(plat_dev, IORESOURCE_MEM, 0); - if (unlikely(!new_drvdata->res_mem)) { - SSI_LOG_ERR("Failed getting IO memory resource\n"); - rc = -ENODEV; - goto init_cc_res_err; - } - SSI_LOG_DEBUG("Got MEM resource (%s): start=%pad end=%pad\n", - new_drvdata->res_mem->name, - new_drvdata->res_mem->start, - new_drvdata->res_mem->end); + req_mem_cc_regs = platform_get_resource(plat_dev, IORESOURCE_MEM, 0); /* Map registers space */ - req_mem_cc_regs = request_mem_region(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem), "arm_cc7x_regs"); - if (unlikely(!req_mem_cc_regs)) { - SSI_LOG_ERR("Couldn't allocate registers memory region at " - "0x%08X\n", (unsigned int)new_drvdata->res_mem->start); - rc = -EBUSY; - goto init_cc_res_err; + new_drvdata->cc_base = devm_ioremap_resource(dev, req_mem_cc_regs); + if (IS_ERR(new_drvdata->cc_base)) { + dev_err(dev, "Failed to ioremap registers"); + return PTR_ERR(new_drvdata->cc_base); } - cc_base = ioremap(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem)); - if (unlikely(!cc_base)) { - SSI_LOG_ERR("ioremap[CC](0x%08X,0x%08X) failed\n", - (unsigned int)new_drvdata->res_mem->start, - (unsigned int)resource_size(new_drvdata->res_mem)); - rc = -ENOMEM; - goto init_cc_res_err; - } - SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n", &new_drvdata->res_mem->start, cc_base); - new_drvdata->cc_base = cc_base; + + dev_dbg(dev, "Got MEM resource (%s): %pR\n", req_mem_cc_regs->name, + req_mem_cc_regs); + dev_dbg(dev, "CC registers mapped from %pa to 0x%p\n", + &req_mem_cc_regs->start, new_drvdata->cc_base); + + cc_base = new_drvdata->cc_base; /* Then IRQ */ - new_drvdata->res_irq = platform_get_resource(plat_dev, IORESOURCE_IRQ, 0); - if (unlikely(!new_drvdata->res_irq)) { - SSI_LOG_ERR("Failed getting IRQ resource\n"); - rc = -ENODEV; - goto init_cc_res_err; - } - rc = request_irq(new_drvdata->res_irq->start, cc_isr, - IRQF_SHARED, "arm_cc7x", new_drvdata); - if (unlikely(rc != 0)) { - SSI_LOG_ERR("Could not register to interrupt %llu\n", - (unsigned long long)new_drvdata->res_irq->start); - goto init_cc_res_err; + new_drvdata->irq = platform_get_irq(plat_dev, 0); + if (new_drvdata->irq < 0) { + dev_err(dev, "Failed getting IRQ resource\n"); + return new_drvdata->irq; } - init_completion(&new_drvdata->icache_setup_completion); - irq_registered = true; - SSI_LOG_DEBUG("Registered to IRQ (%s) %llu\n", - new_drvdata->res_irq->name, - (unsigned long long)new_drvdata->res_irq->start); + rc = devm_request_irq(dev, new_drvdata->irq, cc_isr, + IRQF_SHARED, "arm_cc7x", new_drvdata); + if (rc) { + dev_err(dev, "Could not register to interrupt %d\n", + new_drvdata->irq); + return rc; + } + dev_dbg(dev, "Registered to IRQ: %d\n", new_drvdata->irq); - new_drvdata->plat_dev = plat_dev; + if (!plat_dev->dev.dma_mask) + plat_dev->dev.dma_mask = &plat_dev->dev.coherent_dma_mask; - rc = cc_clk_on(new_drvdata); - if (rc) - goto init_cc_res_err; + dma_mask = (dma_addr_t)(DMA_BIT_MASK(DMA_BIT_MASK_LEN)); + while (dma_mask > 0x7fffffffUL) { + if (dma_supported(&plat_dev->dev, dma_mask)) { + rc = dma_set_coherent_mask(&plat_dev->dev, dma_mask); + if (!rc) + break; + } + dma_mask >>= 1; + } - if (!new_drvdata->plat_dev->dev.dma_mask) - new_drvdata->plat_dev->dev.dma_mask = &new_drvdata->plat_dev->dev.coherent_dma_mask; + if (rc) { + dev_err(dev, "Failed in dma_set_mask, mask=%par\n", + &dma_mask); + return rc; + } - if (!new_drvdata->plat_dev->dev.coherent_dma_mask) - new_drvdata->plat_dev->dev.coherent_dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN); + rc = cc_clk_on(new_drvdata); + if (rc) { + dev_err(dev, "Failed to enable clock"); + return rc; + } /* Verify correct mapping */ - signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE)); + signature_val = cc_ioread(new_drvdata, CC_REG(HOST_SIGNATURE)); if (signature_val != DX_DEV_SIGNATURE) { - SSI_LOG_ERR("Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n", - signature_val, (u32)DX_DEV_SIGNATURE); + dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n", + signature_val, (u32)DX_DEV_SIGNATURE); rc = -EINVAL; - goto init_cc_res_err; + goto post_clk_err; } - SSI_LOG_DEBUG("CC SIGNATURE=0x%08X\n", signature_val); + dev_dbg(dev, "CC SIGNATURE=0x%08X\n", signature_val); /* Display HW versions */ - SSI_LOG(KERN_INFO, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", SSI_DEV_NAME_STR, - CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_VERSION)), DRV_MODULE_VERSION); + dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", + SSI_DEV_NAME_STR, + cc_ioread(new_drvdata, CC_REG(HOST_VERSION)), + DRV_MODULE_VERSION); rc = init_cc_regs(new_drvdata, true); if (unlikely(rc != 0)) { - SSI_LOG_ERR("init_cc_regs failed\n"); - goto init_cc_res_err; + dev_err(dev, "init_cc_regs failed\n"); + goto post_clk_err; } #ifdef ENABLE_CC_SYSFS - rc = ssi_sysfs_init(&plat_dev->dev.kobj, new_drvdata); + rc = ssi_sysfs_init(&dev->kobj, new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("init_stat_db failed\n"); - goto init_cc_res_err; + dev_err(dev, "init_stat_db failed\n"); + goto post_regs_err; } #endif + rc = ssi_fips_init(new_drvdata); + if (unlikely(rc != 0)) { + dev_err(dev, "SSI_FIPS_INIT failed 0x%x\n", rc); + goto post_sysfs_err; + } rc = ssi_sram_mgr_init(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_sram_mgr_init failed\n"); - goto init_cc_res_err; + dev_err(dev, "ssi_sram_mgr_init failed\n"); + goto post_fips_init_err; } new_drvdata->mlli_sram_addr = ssi_sram_mgr_alloc(new_drvdata, MAX_MLLI_BUFF_SIZE); if (unlikely(new_drvdata->mlli_sram_addr == NULL_SRAM_ADDR)) { - SSI_LOG_ERR("Failed to alloc MLLI Sram buffer\n"); + dev_err(dev, "Failed to alloc MLLI Sram buffer\n"); rc = -ENOMEM; - goto init_cc_res_err; + goto post_sram_mgr_err; } rc = request_mgr_init(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("request_mgr_init failed\n"); - goto init_cc_res_err; + dev_err(dev, "request_mgr_init failed\n"); + goto post_sram_mgr_err; } rc = ssi_buffer_mgr_init(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("buffer_mgr_init failed\n"); - goto init_cc_res_err; + dev_err(dev, "buffer_mgr_init failed\n"); + goto post_req_mgr_err; } rc = ssi_power_mgr_init(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_power_mgr_init failed\n"); - goto init_cc_res_err; - } - - rc = ssi_fips_init(new_drvdata); - if (unlikely(rc != 0)) { - SSI_LOG_ERR("SSI_FIPS_INIT failed 0x%x\n", rc); - goto init_cc_res_err; + dev_err(dev, "ssi_power_mgr_init failed\n"); + goto post_buf_mgr_err; } rc = ssi_ivgen_init(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_ivgen_init failed\n"); - goto init_cc_res_err; + dev_err(dev, "ssi_ivgen_init failed\n"); + goto post_power_mgr_err; } /* Allocate crypto algs */ rc = ssi_ablkcipher_alloc(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_ablkcipher_alloc failed\n"); - goto init_cc_res_err; + dev_err(dev, "ssi_ablkcipher_alloc failed\n"); + goto post_ivgen_err; } /* hash must be allocated before aead since hash exports APIs */ rc = ssi_hash_alloc(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_hash_alloc failed\n"); - goto init_cc_res_err; + dev_err(dev, "ssi_hash_alloc failed\n"); + goto post_cipher_err; } rc = ssi_aead_alloc(new_drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("ssi_aead_alloc failed\n"); - goto init_cc_res_err; + dev_err(dev, "ssi_aead_alloc failed\n"); + goto post_hash_err; } /* If we got here and FIPS mode is enabled @@ -407,52 +376,43 @@ static int init_cc_resources(struct platform_device *plat_dev) return 0; -init_cc_res_err: - SSI_LOG_ERR("Freeing CC HW resources!\n"); - - if (new_drvdata) { - ssi_aead_free(new_drvdata); - ssi_hash_free(new_drvdata); - ssi_ablkcipher_free(new_drvdata); - ssi_ivgen_fini(new_drvdata); - ssi_power_mgr_fini(new_drvdata); - ssi_buffer_mgr_fini(new_drvdata); - request_mgr_fini(new_drvdata); - ssi_sram_mgr_fini(new_drvdata); - ssi_fips_fini(new_drvdata); +post_hash_err: + ssi_hash_free(new_drvdata); +post_cipher_err: + ssi_ablkcipher_free(new_drvdata); +post_ivgen_err: + ssi_ivgen_fini(new_drvdata); +post_power_mgr_err: + ssi_power_mgr_fini(new_drvdata); +post_buf_mgr_err: + ssi_buffer_mgr_fini(new_drvdata); +post_req_mgr_err: + request_mgr_fini(new_drvdata); +post_sram_mgr_err: + ssi_sram_mgr_fini(new_drvdata); +post_fips_init_err: + ssi_fips_fini(new_drvdata); +post_sysfs_err: #ifdef ENABLE_CC_SYSFS - ssi_sysfs_fini(); + ssi_sysfs_fini(); #endif - - if (req_mem_cc_regs) { - if (irq_registered) { - free_irq(new_drvdata->res_irq->start, new_drvdata); - new_drvdata->res_irq = NULL; - iounmap(cc_base); - new_drvdata->cc_base = NULL; - } - release_mem_region(new_drvdata->res_mem->start, - resource_size(new_drvdata->res_mem)); - new_drvdata->res_mem = NULL; - } - kfree(new_drvdata); - dev_set_drvdata(&plat_dev->dev, NULL); - } - +post_regs_err: + fini_cc_regs(new_drvdata); +post_clk_err: + cc_clk_off(new_drvdata); return rc; } void fini_cc_regs(struct ssi_drvdata *drvdata) { /* Mask all interrupts */ - WRITE_REGISTER(drvdata->cc_base + - CC_REG_OFFSET(HOST_RGF, HOST_IMR), 0xFFFFFFFF); + cc_iowrite(drvdata, CC_REG(HOST_IMR), 0xFFFFFFFF); } static void cleanup_cc_resources(struct platform_device *plat_dev) { struct ssi_drvdata *drvdata = - (struct ssi_drvdata *)dev_get_drvdata(&plat_dev->dev); + (struct ssi_drvdata *)platform_get_drvdata(plat_dev); ssi_aead_free(drvdata); ssi_hash_free(drvdata); @@ -466,22 +426,8 @@ static void cleanup_cc_resources(struct platform_device *plat_dev) #ifdef ENABLE_CC_SYSFS ssi_sysfs_fini(); #endif - fini_cc_regs(drvdata); cc_clk_off(drvdata); - free_irq(drvdata->res_irq->start, drvdata); - drvdata->res_irq = NULL; - - if (drvdata->cc_base) { - iounmap(drvdata->cc_base); - release_mem_region(drvdata->res_mem->start, - resource_size(drvdata->res_mem)); - drvdata->cc_base = NULL; - drvdata->res_mem = NULL; - } - - kfree(drvdata); - dev_set_drvdata(&plat_dev->dev, NULL); } int cc_clk_on(struct ssi_drvdata *drvdata) @@ -514,18 +460,19 @@ void cc_clk_off(struct ssi_drvdata *drvdata) static int cc7x_probe(struct platform_device *plat_dev) { int rc; + struct device *dev = &plat_dev->dev; #if defined(CONFIG_ARM) && defined(CC_DEBUG) u32 ctr, cacheline_size; asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); cacheline_size = 4 << ((ctr >> 16) & 0xf); - SSI_LOG_DEBUG("CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n", - cacheline_size, L1_CACHE_BYTES); + dev_dbg(dev, "CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n", + cacheline_size, L1_CACHE_BYTES); asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr)); - SSI_LOG_DEBUG("Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n", - (ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF, - (ctr >> 20) & 0xF, ctr & 0xF); + dev_dbg(dev, "Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n", + (ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF, + (ctr >> 20) & 0xF, ctr & 0xF); #endif /* Map registers space */ @@ -533,18 +480,20 @@ static int cc7x_probe(struct platform_device *plat_dev) if (rc != 0) return rc; - SSI_LOG(KERN_INFO, "ARM cc7x_ree device initialized\n"); + dev_info(dev, "ARM ccree device initialized\n"); return 0; } static int cc7x_remove(struct platform_device *plat_dev) { - SSI_LOG_DEBUG("Releasing cc7x resources...\n"); + struct device *dev = &plat_dev->dev; + + dev_dbg(dev, "Releasing cc7x resources...\n"); cleanup_cc_resources(plat_dev); - SSI_LOG(KERN_INFO, "ARM cc7x_ree device terminated\n"); + dev_info(dev, "ARM ccree device terminated\n"); return 0; } diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index b6ad89ae9bee..94c755cafb47 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -37,13 +37,11 @@ #include <crypto/hash.h> #include <linux/version.h> #include <linux/clk.h> +#include <linux/platform_device.h> /* Registers definitions from shared/hw/ree_include */ -#include "dx_reg_base_host.h" #include "dx_host.h" -#include "cc_regs.h" #include "dx_reg_common.h" -#include "cc_hal.h" #define CC_SUPPORT_SHA DX_DEV_SHA_MAX #include "cc_crypto_ctx.h" #include "ssi_sysfs.h" @@ -68,12 +66,19 @@ #define SSI_AXI_IRQ_MASK ((1 << DX_AXIM_CFG_BRESPMASK_BIT_SHIFT) | (1 << DX_AXIM_CFG_RRESPMASK_BIT_SHIFT) | \ (1 << DX_AXIM_CFG_INFLTMASK_BIT_SHIFT) | (1 << DX_AXIM_CFG_COMPMASK_BIT_SHIFT)) -#define SSI_AXI_ERR_IRQ_MASK (1 << DX_HOST_IRR_AXI_ERR_INT_BIT_SHIFT) +#define SSI_AXI_ERR_IRQ_MASK BIT(DX_HOST_IRR_AXI_ERR_INT_BIT_SHIFT) -#define SSI_COMP_IRQ_MASK (1 << DX_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT) +#define SSI_COMP_IRQ_MASK BIT(DX_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT) + +#define AXIM_MON_COMP_VALUE GENMASK(DX_AXIM_MON_COMP_VALUE_BIT_SIZE + \ + DX_AXIM_MON_COMP_VALUE_BIT_SHIFT, \ + DX_AXIM_MON_COMP_VALUE_BIT_SHIFT) + +/* Register name mangling macro */ +#define CC_REG(reg_name) DX_ ## reg_name ## _REG_OFFSET /* TEE FIPS status interrupt */ -#define SSI_GPR0_IRQ_MASK (1 << DX_HOST_IRR_GPR0_BIT_SHIFT) +#define SSI_GPR0_IRQ_MASK BIT(DX_HOST_IRR_GPR0_BIT_SHIFT) #define SSI_CRA_PRIO 3000 @@ -90,19 +95,6 @@ * field in the HW descriptor. The DMA engine +8 that value. */ -/* Logging macros */ -#define SSI_LOG(level, format, ...) \ - printk(level "cc715ree::%s: " format, __func__, ##__VA_ARGS__) -#define SSI_LOG_ERR(format, ...) SSI_LOG(KERN_ERR, format, ##__VA_ARGS__) -#define SSI_LOG_WARNING(format, ...) SSI_LOG(KERN_WARNING, format, ##__VA_ARGS__) -#define SSI_LOG_NOTICE(format, ...) SSI_LOG(KERN_NOTICE, format, ##__VA_ARGS__) -#define SSI_LOG_INFO(format, ...) SSI_LOG(KERN_INFO, format, ##__VA_ARGS__) -#ifdef CC_DEBUG -#define SSI_LOG_DEBUG(format, ...) SSI_LOG(KERN_DEBUG, format, ##__VA_ARGS__) -#else /* Debug log messages are removed at compile time for non-DEBUG config. */ -#define SSI_LOG_DEBUG(format, ...) do {} while (0) -#endif - #define MIN(a, b) (((a) < (b)) ? (a) : (b)) #define MAX(a, b) (((a) > (b)) ? (a) : (b)) @@ -128,10 +120,8 @@ struct ssi_crypto_req { * @fw_ver: SeP loaded firmware version */ struct ssi_drvdata { - struct resource *res_mem; - struct resource *res_irq; void __iomem *cc_base; - unsigned int irq; + int irq; u32 irq_mask; u32 fw_ver; /* Calibration time of start/stop @@ -140,7 +130,6 @@ struct ssi_drvdata { u32 monitor_null_cycles; struct platform_device *plat_dev; ssi_sram_addr_t mlli_sram_addr; - struct completion icache_setup_completion; void *buff_mgr_handle; void *hash_handle; void *aead_handle; @@ -149,7 +138,6 @@ struct ssi_drvdata { void *fips_handle; void *ivgen_handle; void *sram_mgr_handle; - u32 inflight_counter; struct clk *clk; bool coherent; }; @@ -187,11 +175,16 @@ struct async_gen_req_ctx { enum drv_crypto_direction op_type; }; +static inline struct device *drvdata_to_dev(struct ssi_drvdata *drvdata) +{ + return &drvdata->plat_dev->dev; +} + #ifdef DX_DUMP_BYTES void dump_byte_array(const char *name, const u8 *the_array, unsigned long size); #else -#define dump_byte_array(name, array, size) do { \ -} while (0); +static inline void dump_byte_array(const char *name, const u8 *the_array, + unsigned long size) {}; #endif int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe); @@ -199,5 +192,15 @@ void fini_cc_regs(struct ssi_drvdata *drvdata); int cc_clk_on(struct ssi_drvdata *drvdata); void cc_clk_off(struct ssi_drvdata *drvdata); +static inline void cc_iowrite(struct ssi_drvdata *drvdata, u32 reg, u32 val) +{ + iowrite32(val, (drvdata->cc_base + reg)); +} + +static inline u32 cc_ioread(struct ssi_drvdata *drvdata, u32 reg) +{ + return ioread32(drvdata->cc_base + reg); +} + #endif /*__SSI_DRIVER_H__*/ diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c index 33d53d64603d..4aea99fa129f 100644 --- a/drivers/staging/ccree/ssi_fips.c +++ b/drivers/staging/ccree/ssi_fips.c @@ -19,7 +19,6 @@ #include "ssi_config.h" #include "ssi_driver.h" -#include "cc_hal.h" #include "ssi_fips.h" static void fips_dsr(unsigned long devarg); @@ -34,9 +33,8 @@ struct ssi_fips_handle { static bool cc_get_tee_fips_status(struct ssi_drvdata *drvdata) { u32 reg; - void __iomem *cc_base = drvdata->cc_base; - reg = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, GPR_HOST)); + reg = cc_ioread(drvdata, CC_REG(GPR_HOST)); return (reg == (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK)); } @@ -46,12 +44,11 @@ static bool cc_get_tee_fips_status(struct ssi_drvdata *drvdata) */ void cc_set_ree_fips_status(struct ssi_drvdata *drvdata, bool status) { - void __iomem *cc_base = drvdata->cc_base; int val = CC_FIPS_SYNC_REE_STATUS; val |= (status ? CC_FIPS_SYNC_MODULE_OK : CC_FIPS_SYNC_MODULE_ERROR); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), val); + cc_iowrite(drvdata, CC_REG(HOST_GPR0), val); } void ssi_fips_fini(struct ssi_drvdata *drvdata) @@ -76,41 +73,42 @@ void fips_handler(struct ssi_drvdata *drvdata) tasklet_schedule(&fips_handle_ptr->tasklet); } -static inline void tee_fips_error(void) +static inline void tee_fips_error(struct device *dev) { if (fips_enabled) panic("ccree: TEE reported cryptographic error in fips mode!\n"); else - SSI_LOG_ERR("TEE reported error!\n"); + dev_err(dev, "TEE reported error!\n"); } /* Deferred service handler, run as interrupt-fired tasklet */ static void fips_dsr(unsigned long devarg) { struct ssi_drvdata *drvdata = (struct ssi_drvdata *)devarg; - void __iomem *cc_base = drvdata->cc_base; + struct device *dev = drvdata_to_dev(drvdata); u32 irq, state, val; irq = (drvdata->irq & (SSI_GPR0_IRQ_MASK)); if (irq) { - state = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, GPR_HOST)); + state = cc_ioread(drvdata, CC_REG(GPR_HOST)); if (state != (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK)) - tee_fips_error(); + tee_fips_error(dev); } /* after verifing that there is nothing to do, * unmask AXI completion interrupt. */ - val = (CC_REG_OFFSET(HOST_RGF, HOST_IMR) & ~irq); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), val); + val = (CC_REG(HOST_IMR) & ~irq); + cc_iowrite(drvdata, CC_REG(HOST_IMR), val); } /* The function called once at driver entry point .*/ int ssi_fips_init(struct ssi_drvdata *p_drvdata) { struct ssi_fips_handle *fips_h; + struct device *dev = drvdata_to_dev(p_drvdata); fips_h = kzalloc(sizeof(*fips_h), GFP_KERNEL); if (!fips_h) @@ -118,11 +116,11 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata) p_drvdata->fips_handle = fips_h; - SSI_LOG_DEBUG("Initializing fips tasklet\n"); + dev_dbg(dev, "Initializing fips tasklet\n"); tasklet_init(&fips_h->tasklet, fips_dsr, (unsigned long)p_drvdata); if (!cc_get_tee_fips_status(p_drvdata)) - tee_fips_error(); + tee_fips_error(dev); return 0; } diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h index 369ddf9478e7..63bcca7f3af9 100644 --- a/drivers/staging/ccree/ssi_fips.h +++ b/drivers/staging/ccree/ssi_fips.h @@ -40,8 +40,8 @@ static inline int ssi_fips_init(struct ssi_drvdata *p_drvdata) } static inline void ssi_fips_fini(struct ssi_drvdata *drvdata) {} -void cc_set_ree_fips_status(struct ssi_drvdata *drvdata, bool ok) {} -void fips_handler(struct ssi_drvdata *drvdata) {} +static inline void cc_set_ree_fips_status(struct ssi_drvdata *drvdata, bool ok) {} +static inline void fips_handler(struct ssi_drvdata *drvdata) {} #endif /* CONFIG_CRYPTO_FIPS */ diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index 13291aeaf350..d79090ed7f9c 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -134,14 +134,13 @@ static int ssi_hash_map_result(struct device *dev, digestsize, DMA_BIDIRECTIONAL); if (unlikely(dma_mapping_error(dev, state->digest_result_dma_addr))) { - SSI_LOG_ERR("Mapping digest result buffer %u B for DMA failed\n", - digestsize); + dev_err(dev, "Mapping digest result buffer %u B for DMA failed\n", + digestsize); return -ENOMEM; } - SSI_LOG_DEBUG("Mapped digest result buffer %u B " - "at va=%pK to dma=%pad\n", + dev_dbg(dev, "Mapped digest result buffer %u B at va=%pK to dma=%pad\n", digestsize, state->digest_result_buff, - state->digest_result_dma_addr); + &state->digest_result_dma_addr); return 0; } @@ -158,54 +157,50 @@ static int ssi_hash_map_request(struct device *dev, int rc = -ENOMEM; state->buff0 = kzalloc(SSI_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA); - if (!state->buff0) { - SSI_LOG_ERR("Allocating buff0 in context failed\n"); + if (!state->buff0) goto fail0; - } + state->buff1 = kzalloc(SSI_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA); - if (!state->buff1) { - SSI_LOG_ERR("Allocating buff1 in context failed\n"); + if (!state->buff1) goto fail_buff0; - } + state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE, GFP_KERNEL | GFP_DMA); - if (!state->digest_result_buff) { - SSI_LOG_ERR("Allocating digest_result_buff in context failed\n"); + if (!state->digest_result_buff) goto fail_buff1; - } + state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA); - if (!state->digest_buff) { - SSI_LOG_ERR("Allocating digest-buffer in context failed\n"); + if (!state->digest_buff) goto fail_digest_result_buff; - } - SSI_LOG_DEBUG("Allocated digest-buffer in context ctx->digest_buff=@%p\n", state->digest_buff); + dev_dbg(dev, "Allocated digest-buffer in context ctx->digest_buff=@%p\n", + state->digest_buff); if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL | GFP_DMA); - if (!state->digest_bytes_len) { - SSI_LOG_ERR("Allocating digest-bytes-len in context failed\n"); + if (!state->digest_bytes_len) goto fail1; - } - SSI_LOG_DEBUG("Allocated digest-bytes-len in context state->>digest_bytes_len=@%p\n", state->digest_bytes_len); + + dev_dbg(dev, "Allocated digest-bytes-len in context state->>digest_bytes_len=@%p\n", + state->digest_bytes_len); } else { state->digest_bytes_len = NULL; } state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA); - if (!state->opad_digest_buff) { - SSI_LOG_ERR("Allocating opad-digest-buffer in context failed\n"); + if (!state->opad_digest_buff) goto fail2; - } - SSI_LOG_DEBUG("Allocated opad-digest-buffer in context state->digest_bytes_len=@%p\n", state->opad_digest_buff); + + dev_dbg(dev, "Allocated opad-digest-buffer in context state->digest_bytes_len=@%p\n", + state->opad_digest_buff); state->digest_buff_dma_addr = dma_map_single(dev, (void *)state->digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_buff_dma_addr)) { - SSI_LOG_ERR("Mapping digest len %d B at va=%pK for DMA failed\n", - ctx->inter_digestsize, state->digest_buff); + dev_err(dev, "Mapping digest len %d B at va=%pK for DMA failed\n", + ctx->inter_digestsize, state->digest_buff); goto fail3; } - SSI_LOG_DEBUG("Mapped digest %d B at va=%pK to dma=%pad\n", - ctx->inter_digestsize, state->digest_buff, - state->digest_buff_dma_addr); + dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n", + ctx->inter_digestsize, state->digest_buff, + &state->digest_buff_dma_addr); if (is_hmac) { dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); @@ -240,7 +235,7 @@ static int ssi_hash_map_request(struct device *dev, rc = send_request(ctx->drvdata, &ssi_req, &desc, 1, 0); if (unlikely(rc != 0)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); goto fail4; } } @@ -248,13 +243,13 @@ static int ssi_hash_map_request(struct device *dev, if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { state->digest_bytes_len_dma_addr = dma_map_single(dev, (void *)state->digest_bytes_len, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) { - SSI_LOG_ERR("Mapping digest len %u B at va=%pK for DMA failed\n", - HASH_LEN_SIZE, state->digest_bytes_len); + dev_err(dev, "Mapping digest len %u B at va=%pK for DMA failed\n", + HASH_LEN_SIZE, state->digest_bytes_len); goto fail4; } - SSI_LOG_DEBUG("Mapped digest len %u B at va=%pK to dma=%pad\n", - HASH_LEN_SIZE, state->digest_bytes_len, - state->digest_bytes_len_dma_addr); + dev_dbg(dev, "Mapped digest len %u B at va=%pK to dma=%pad\n", + HASH_LEN_SIZE, state->digest_bytes_len, + &state->digest_bytes_len_dma_addr); } else { state->digest_bytes_len_dma_addr = 0; } @@ -262,14 +257,14 @@ static int ssi_hash_map_request(struct device *dev, if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) { state->opad_digest_dma_addr = dma_map_single(dev, (void *)state->opad_digest_buff, ctx->inter_digestsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, state->opad_digest_dma_addr)) { - SSI_LOG_ERR("Mapping opad digest %d B at va=%pK for DMA failed\n", - ctx->inter_digestsize, - state->opad_digest_buff); + dev_err(dev, "Mapping opad digest %d B at va=%pK for DMA failed\n", + ctx->inter_digestsize, + state->opad_digest_buff); goto fail5; } - SSI_LOG_DEBUG("Mapped opad digest %d B at va=%pK to dma=%pad\n", - ctx->inter_digestsize, state->opad_digest_buff, - state->opad_digest_dma_addr); + dev_dbg(dev, "Mapped opad digest %d B at va=%pK to dma=%pad\n", + ctx->inter_digestsize, state->opad_digest_buff, + &state->opad_digest_dma_addr); } else { state->opad_digest_dma_addr = 0; } @@ -316,22 +311,22 @@ static void ssi_hash_unmap_request(struct device *dev, if (state->digest_buff_dma_addr != 0) { dma_unmap_single(dev, state->digest_buff_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped digest-buffer: digest_buff_dma_addr=%pad\n", - state->digest_buff_dma_addr); + dev_dbg(dev, "Unmapped digest-buffer: digest_buff_dma_addr=%pad\n", + &state->digest_buff_dma_addr); state->digest_buff_dma_addr = 0; } if (state->digest_bytes_len_dma_addr != 0) { dma_unmap_single(dev, state->digest_bytes_len_dma_addr, HASH_LEN_SIZE, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped digest-bytes-len buffer: digest_bytes_len_dma_addr=%pad\n", - state->digest_bytes_len_dma_addr); + dev_dbg(dev, "Unmapped digest-bytes-len buffer: digest_bytes_len_dma_addr=%pad\n", + &state->digest_bytes_len_dma_addr); state->digest_bytes_len_dma_addr = 0; } if (state->opad_digest_dma_addr != 0) { dma_unmap_single(dev, state->opad_digest_dma_addr, ctx->inter_digestsize, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped opad-digest: opad_digest_dma_addr=%pad\n", - state->opad_digest_dma_addr); + dev_dbg(dev, "Unmapped opad-digest: opad_digest_dma_addr=%pad\n", + &state->opad_digest_dma_addr); state->opad_digest_dma_addr = 0; } @@ -352,11 +347,9 @@ static void ssi_hash_unmap_result(struct device *dev, state->digest_result_dma_addr, digestsize, DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("unmpa digest result buffer " - "va (%pK) pa (%pad) len %u\n", - state->digest_result_buff, - state->digest_result_dma_addr, - digestsize); + dev_dbg(dev, "unmpa digest result buffer va (%pK) pa (%pad) len %u\n", + state->digest_result_buff, + &state->digest_result_dma_addr, digestsize); memcpy(result, state->digest_result_buff, digestsize); @@ -369,7 +362,7 @@ static void ssi_hash_update_complete(struct device *dev, void *ssi_req, void __i struct ahash_request *req = (struct ahash_request *)ssi_req; struct ahash_req_ctx *state = ahash_request_ctx(req); - SSI_LOG_DEBUG("req=%pK\n", req); + dev_dbg(dev, "req=%pK\n", req); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, false); req->base.complete(&req->base, 0); @@ -383,7 +376,7 @@ static void ssi_hash_digest_complete(struct device *dev, void *ssi_req, void __i struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); u32 digestsize = crypto_ahash_digestsize(tfm); - SSI_LOG_DEBUG("req=%pK\n", req); + dev_dbg(dev, "req=%pK\n", req); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, false); ssi_hash_unmap_result(dev, state, digestsize, req->result); @@ -399,7 +392,7 @@ static void ssi_hash_complete(struct device *dev, void *ssi_req, void __iomem *c struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); u32 digestsize = crypto_ahash_digestsize(tfm); - SSI_LOG_DEBUG("req=%pK\n", req); + dev_dbg(dev, "req=%pK\n", req); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, false); ssi_hash_unmap_result(dev, state, digestsize, req->result); @@ -414,7 +407,7 @@ static int ssi_hash_digest(struct ahash_req_ctx *state, unsigned int nbytes, u8 *result, void *async_req) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); bool is_hmac = ctx->is_hmac; struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; @@ -423,20 +416,21 @@ static int ssi_hash_digest(struct ahash_req_ctx *state, int idx = 0; int rc = 0; - SSI_LOG_DEBUG("===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); + dev_dbg(dev, "===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", + nbytes); if (unlikely(ssi_hash_map_request(dev, state, ctx) != 0)) { - SSI_LOG_ERR("map_ahash_source() failed\n"); + dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -553,7 +547,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE); if (async_req) { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); ssi_hash_unmap_result(dev, state, digestsize, result); ssi_hash_unmap_request(dev, state, ctx); @@ -561,7 +555,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE); } else { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (rc != 0) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); } else { ssi_buffer_mgr_unmap_hash_request(dev, state, src, false); @@ -579,14 +573,14 @@ static int ssi_hash_update(struct ahash_req_ctx *state, unsigned int nbytes, void *async_req) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; u32 idx = 0; int rc; - SSI_LOG_DEBUG("===== %s-update (%d) ====\n", ctx->is_hmac ? - "hmac" : "hash", nbytes); + dev_dbg(dev, "===== %s-update (%d) ====\n", ctx->is_hmac ? + "hmac" : "hash", nbytes); if (nbytes == 0) { /* no real updates required */ @@ -596,12 +590,12 @@ static int ssi_hash_update(struct ahash_req_ctx *state, rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, state, src, nbytes, block_size); if (unlikely(rc)) { if (rc == 1) { - SSI_LOG_DEBUG(" data size not require HW update %x\n", - nbytes); + dev_dbg(dev, " data size not require HW update %x\n", + nbytes); /* No hardware updates are required */ return 0; } - SSI_LOG_ERR("map_ahash_request_update() failed\n"); + dev_err(dev, "map_ahash_request_update() failed\n"); return -ENOMEM; } @@ -653,13 +647,13 @@ static int ssi_hash_update(struct ahash_req_ctx *state, if (async_req) { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); } } else { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (rc != 0) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); } else { ssi_buffer_mgr_unmap_hash_request(dev, state, src, false); @@ -676,21 +670,22 @@ static int ssi_hash_finup(struct ahash_req_ctx *state, u8 *result, void *async_req) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); bool is_hmac = ctx->is_hmac; struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; int idx = 0; int rc; - SSI_LOG_DEBUG("===== %s-finup (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); + dev_dbg(dev, "===== %s-finup (%d) ====\n", is_hmac ? "hmac" : "hash", + nbytes); if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } @@ -783,14 +778,14 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE); if (async_req) { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); ssi_hash_unmap_result(dev, state, digestsize, result); } } else { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (rc != 0) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); ssi_hash_unmap_result(dev, state, digestsize, result); } else { @@ -810,22 +805,23 @@ static int ssi_hash_final(struct ahash_req_ctx *state, u8 *result, void *async_req) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); bool is_hmac = ctx->is_hmac; struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; int idx = 0; int rc; - SSI_LOG_DEBUG("===== %s-final (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes); + dev_dbg(dev, "===== %s-final (%d) ====\n", is_hmac ? "hmac" : "hash", + nbytes); if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, src, nbytes, 0) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } @@ -927,14 +923,14 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE); if (async_req) { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); ssi_hash_unmap_result(dev, state, digestsize, result); } } else { rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (rc != 0) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, src, true); ssi_hash_unmap_result(dev, state, digestsize, result); } else { @@ -948,7 +944,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE); static int ssi_hash_init(struct ahash_req_ctx *state, struct ssi_hash_ctx *ctx) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); state->xcbc_count = 0; @@ -970,10 +966,12 @@ static int ssi_hash_setkey(void *hash, int i, idx = 0, rc = 0; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; ssi_sram_addr_t larval_addr; - - SSI_LOG_DEBUG("start keylen: %d", keylen); + struct device *dev; ctx = crypto_ahash_ctx(((struct crypto_ahash *)hash)); + dev = drvdata_to_dev(ctx->drvdata); + dev_dbg(dev, "start keylen: %d", keylen); + blocksize = crypto_tfm_alg_blocksize(&((struct crypto_ahash *)hash)->base); digestsize = crypto_ahash_digestsize(((struct crypto_ahash *)hash)); @@ -989,18 +987,16 @@ static int ssi_hash_setkey(void *hash, if (keylen != 0) { ctx->key_params.key_dma_addr = dma_map_single( - &ctx->drvdata->plat_dev->dev, - (void *)key, + dev, (void *)key, keylen, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&ctx->drvdata->plat_dev->dev, + if (unlikely(dma_mapping_error(dev, ctx->key_params.key_dma_addr))) { - SSI_LOG_ERR("Mapping key va=0x%p len=%u for" - " DMA failed\n", key, keylen); + dev_err(dev, "Mapping key va=0x%p len=%u for DMA failed\n", + key, keylen); return -ENOMEM; } - SSI_LOG_DEBUG("mapping key-buffer: key_dma_addr=%pad " - "keylen=%u\n", ctx->key_params.key_dma_addr, - ctx->key_params.keylen); + dev_dbg(dev, "mapping key-buffer: key_dma_addr=%pad keylen=%u\n", + &ctx->key_params.key_dma_addr, ctx->key_params.keylen); if (keylen > blocksize) { /* Load hash initial state */ @@ -1079,7 +1075,7 @@ static int ssi_hash_setkey(void *hash, rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0); if (unlikely(rc != 0)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); goto out; } @@ -1139,12 +1135,10 @@ out: crypto_ahash_set_flags((struct crypto_ahash *)hash, CRYPTO_TFM_RES_BAD_KEY_LEN); if (ctx->key_params.key_dma_addr) { - dma_unmap_single(&ctx->drvdata->plat_dev->dev, - ctx->key_params.key_dma_addr, + dma_unmap_single(dev, ctx->key_params.key_dma_addr, ctx->key_params.keylen, DMA_TO_DEVICE); - SSI_LOG_DEBUG("Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n", - ctx->key_params.key_dma_addr, - ctx->key_params.keylen); + dev_dbg(dev, "Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n", + &ctx->key_params.key_dma_addr, ctx->key_params.keylen); } return rc; } @@ -1154,10 +1148,11 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash, { struct ssi_crypto_req ssi_req = {}; struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); + struct device *dev = drvdata_to_dev(ctx->drvdata); int idx = 0, rc = 0; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; - SSI_LOG_DEBUG("===== setkey (%d) ====\n", keylen); + dev_dbg(dev, "===== setkey (%d) ====\n", keylen); switch (keylen) { case AES_KEYSIZE_128: @@ -1171,19 +1166,15 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash, ctx->key_params.keylen = keylen; ctx->key_params.key_dma_addr = dma_map_single( - &ctx->drvdata->plat_dev->dev, - (void *)key, + dev, (void *)key, keylen, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&ctx->drvdata->plat_dev->dev, - ctx->key_params.key_dma_addr))) { - SSI_LOG_ERR("Mapping key va=0x%p len=%u for" - " DMA failed\n", key, keylen); + if (unlikely(dma_mapping_error(dev, ctx->key_params.key_dma_addr))) { + dev_err(dev, "Mapping key va=0x%p len=%u for DMA failed\n", + key, keylen); return -ENOMEM; } - SSI_LOG_DEBUG("mapping key-buffer: key_dma_addr=%pad " - "keylen=%u\n", - ctx->key_params.key_dma_addr, - ctx->key_params.keylen); + dev_dbg(dev, "mapping key-buffer: key_dma_addr=%pad keylen=%u\n", + &ctx->key_params.key_dma_addr, ctx->key_params.keylen); ctx->is_hmac = true; /* 1. Load the AES key */ @@ -1226,12 +1217,10 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash, if (rc != 0) crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); - dma_unmap_single(&ctx->drvdata->plat_dev->dev, - ctx->key_params.key_dma_addr, + dma_unmap_single(dev, ctx->key_params.key_dma_addr, ctx->key_params.keylen, DMA_TO_DEVICE); - SSI_LOG_DEBUG("Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n", - ctx->key_params.key_dma_addr, - ctx->key_params.keylen); + dev_dbg(dev, "Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n", + &ctx->key_params.key_dma_addr, ctx->key_params.keylen); return rc; } @@ -1241,8 +1230,9 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("===== setkey (%d) ====\n", keylen); + dev_dbg(dev, "===== setkey (%d) ====\n", keylen); ctx->is_hmac = true; @@ -1259,16 +1249,14 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash, /* STAT_PHASE_1: Copy key to ctx */ - dma_sync_single_for_cpu(&ctx->drvdata->plat_dev->dev, - ctx->opad_tmp_keys_dma_addr, + dma_sync_single_for_cpu(dev, ctx->opad_tmp_keys_dma_addr, keylen, DMA_TO_DEVICE); memcpy(ctx->opad_tmp_keys_buff, key, keylen); if (keylen == 24) memset(ctx->opad_tmp_keys_buff + 24, 0, CC_AES_KEY_SIZE_MAX - 24); - dma_sync_single_for_device(&ctx->drvdata->plat_dev->dev, - ctx->opad_tmp_keys_dma_addr, + dma_sync_single_for_device(dev, ctx->opad_tmp_keys_dma_addr, keylen, DMA_TO_DEVICE); ctx->key_params.keylen = keylen; @@ -1279,23 +1267,21 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash, static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); if (ctx->digest_buff_dma_addr != 0) { dma_unmap_single(dev, ctx->digest_buff_dma_addr, sizeof(ctx->digest_buff), DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped digest-buffer: " - "digest_buff_dma_addr=%pad\n", - ctx->digest_buff_dma_addr); + dev_dbg(dev, "Unmapped digest-buffer: digest_buff_dma_addr=%pad\n", + &ctx->digest_buff_dma_addr); ctx->digest_buff_dma_addr = 0; } if (ctx->opad_tmp_keys_dma_addr != 0) { dma_unmap_single(dev, ctx->opad_tmp_keys_dma_addr, sizeof(ctx->opad_tmp_keys_buff), DMA_BIDIRECTIONAL); - SSI_LOG_DEBUG("Unmapped opad-digest: " - "opad_tmp_keys_dma_addr=%pad\n", - ctx->opad_tmp_keys_dma_addr); + dev_dbg(dev, "Unmapped opad-digest: opad_tmp_keys_dma_addr=%pad\n", + &ctx->opad_tmp_keys_dma_addr); ctx->opad_tmp_keys_dma_addr = 0; } @@ -1304,30 +1290,30 @@ static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx) static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx) { - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); ctx->key_params.keylen = 0; ctx->digest_buff_dma_addr = dma_map_single(dev, (void *)ctx->digest_buff, sizeof(ctx->digest_buff), DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, ctx->digest_buff_dma_addr)) { - SSI_LOG_ERR("Mapping digest len %zu B at va=%pK for DMA failed\n", - sizeof(ctx->digest_buff), ctx->digest_buff); + dev_err(dev, "Mapping digest len %zu B at va=%pK for DMA failed\n", + sizeof(ctx->digest_buff), ctx->digest_buff); goto fail; } - SSI_LOG_DEBUG("Mapped digest %zu B at va=%pK to dma=%pad\n", - sizeof(ctx->digest_buff), ctx->digest_buff, - ctx->digest_buff_dma_addr); + dev_dbg(dev, "Mapped digest %zu B at va=%pK to dma=%pad\n", + sizeof(ctx->digest_buff), ctx->digest_buff, + &ctx->digest_buff_dma_addr); ctx->opad_tmp_keys_dma_addr = dma_map_single(dev, (void *)ctx->opad_tmp_keys_buff, sizeof(ctx->opad_tmp_keys_buff), DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, ctx->opad_tmp_keys_dma_addr)) { - SSI_LOG_ERR("Mapping opad digest %zu B at va=%pK for DMA failed\n", - sizeof(ctx->opad_tmp_keys_buff), - ctx->opad_tmp_keys_buff); + dev_err(dev, "Mapping opad digest %zu B at va=%pK for DMA failed\n", + sizeof(ctx->opad_tmp_keys_buff), + ctx->opad_tmp_keys_buff); goto fail; } - SSI_LOG_DEBUG("Mapped opad_tmp_keys %zu B at va=%pK to dma=%pad\n", - sizeof(ctx->opad_tmp_keys_buff), ctx->opad_tmp_keys_buff, - ctx->opad_tmp_keys_dma_addr); + dev_dbg(dev, "Mapped opad_tmp_keys %zu B at va=%pK to dma=%pad\n", + sizeof(ctx->opad_tmp_keys_buff), ctx->opad_tmp_keys_buff, + &ctx->opad_tmp_keys_dma_addr); ctx->is_hmac = false; return 0; @@ -1361,8 +1347,9 @@ static int ssi_ahash_cra_init(struct crypto_tfm *tfm) static void ssi_hash_cra_exit(struct crypto_tfm *tfm) { struct ssi_hash_ctx *ctx = crypto_tfm_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("ssi_hash_cra_exit"); + dev_dbg(dev, "ssi_hash_cra_exit"); ssi_hash_free_ctx(ctx); } @@ -1371,7 +1358,7 @@ static int ssi_mac_update(struct ahash_request *req) struct ahash_req_ctx *state = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); unsigned int block_size = crypto_tfm_alg_blocksize(&tfm->base); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; @@ -1388,12 +1375,12 @@ static int ssi_mac_update(struct ahash_request *req) rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, state, req->src, req->nbytes, block_size); if (unlikely(rc)) { if (rc == 1) { - SSI_LOG_DEBUG(" data size not require HW update %x\n", - req->nbytes); + dev_dbg(dev, " data size not require HW update %x\n", + req->nbytes); /* No hardware updates are required */ return 0; } - SSI_LOG_ERR("map_ahash_request_update() failed\n"); + dev_err(dev, "map_ahash_request_update() failed\n"); return -ENOMEM; } @@ -1420,7 +1407,7 @@ static int ssi_mac_update(struct ahash_request *req) rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, true); } return rc; @@ -1431,7 +1418,7 @@ static int ssi_mac_final(struct ahash_request *req) struct ahash_req_ctx *state = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; int idx = 0; @@ -1451,15 +1438,15 @@ static int ssi_mac_final(struct ahash_request *req) key_len = ctx->key_params.keylen; } - SSI_LOG_DEBUG("===== final xcbc reminder (%d) ====\n", rem_cnt); + dev_dbg(dev, "===== final xcbc reminder (%d) ====\n", rem_cnt); if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 0) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } @@ -1530,7 +1517,7 @@ static int ssi_mac_final(struct ahash_request *req) rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, true); ssi_hash_unmap_result(dev, state, digestsize, req->result); } @@ -1542,7 +1529,7 @@ static int ssi_mac_finup(struct ahash_request *req) struct ahash_req_ctx *state = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; int idx = 0; @@ -1550,18 +1537,18 @@ static int ssi_mac_finup(struct ahash_request *req) u32 key_len = 0; u32 digestsize = crypto_ahash_digestsize(tfm); - SSI_LOG_DEBUG("===== finup xcbc(%d) ====\n", req->nbytes); + dev_dbg(dev, "===== finup xcbc(%d) ====\n", req->nbytes); if (state->xcbc_count > 0 && req->nbytes == 0) { - SSI_LOG_DEBUG("No data to update. Call to fdx_mac_final\n"); + dev_dbg(dev, "No data to update. Call to fdx_mac_final\n"); return ssi_mac_final(req); } if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 1) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } @@ -1601,7 +1588,7 @@ static int ssi_mac_finup(struct ahash_request *req) rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, true); ssi_hash_unmap_result(dev, state, digestsize, req->result); } @@ -1613,7 +1600,7 @@ static int ssi_mac_digest(struct ahash_request *req) struct ahash_req_ctx *state = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); u32 digestsize = crypto_ahash_digestsize(tfm); struct ssi_crypto_req ssi_req = {}; struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN]; @@ -1621,19 +1608,19 @@ static int ssi_mac_digest(struct ahash_request *req) int idx = 0; int rc; - SSI_LOG_DEBUG("===== -digest mac (%d) ====\n", req->nbytes); + dev_dbg(dev, "===== -digest mac (%d) ====\n", req->nbytes); if (unlikely(ssi_hash_map_request(dev, state, ctx) != 0)) { - SSI_LOG_ERR("map_ahash_source() failed\n"); + dev_err(dev, "map_ahash_source() failed\n"); return -ENOMEM; } if (unlikely(ssi_hash_map_result(dev, state, digestsize) != 0)) { - SSI_LOG_ERR("map_ahash_digest() failed\n"); + dev_err(dev, "map_ahash_digest() failed\n"); return -ENOMEM; } if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, req->src, req->nbytes, 1) != 0)) { - SSI_LOG_ERR("map_ahash_request_final() failed\n"); + dev_err(dev, "map_ahash_request_final() failed\n"); return -ENOMEM; } @@ -1673,7 +1660,7 @@ static int ssi_mac_digest(struct ahash_request *req) rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 1); if (unlikely(rc != -EINPROGRESS)) { - SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc); + dev_err(dev, "send_request() failed (rc=%d)\n", rc); ssi_buffer_mgr_unmap_hash_request(dev, state, req->src, true); ssi_hash_unmap_result(dev, state, digestsize, req->result); ssi_hash_unmap_request(dev, state, ctx); @@ -1727,8 +1714,9 @@ static int ssi_ahash_init(struct ahash_request *req) struct ahash_req_ctx *state = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx->drvdata); - SSI_LOG_DEBUG("===== init (%d) ====\n", req->nbytes); + dev_dbg(dev, "===== init (%d) ====\n", req->nbytes); return ssi_hash_init(state, ctx); } @@ -1737,7 +1725,7 @@ static int ssi_ahash_export(struct ahash_request *req, void *out) { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ahash_req_ctx *state = ahash_request_ctx(req); u8 *curr_buff = state->buff_index ? state->buff1 : state->buff0; u32 curr_buff_cnt = state->buff_index ? state->buff1_cnt : @@ -1778,7 +1766,7 @@ static int ssi_ahash_import(struct ahash_request *req, const void *in) { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); - struct device *dev = &ctx->drvdata->plat_dev->dev; + struct device *dev = drvdata_to_dev(ctx->drvdata); struct ahash_req_ctx *state = ahash_request_ctx(req); u32 tmp; int rc; @@ -2054,17 +2042,17 @@ static struct ssi_hash_template driver_hash[] = { }; static struct ssi_hash_alg * -ssi_hash_create_alg(struct ssi_hash_template *template, bool keyed) +ssi_hash_create_alg(struct ssi_hash_template *template, struct device *dev, + bool keyed) { struct ssi_hash_alg *t_crypto_alg; struct crypto_alg *alg; struct ahash_alg *halg; t_crypto_alg = kzalloc(sizeof(*t_crypto_alg), GFP_KERNEL); - if (!t_crypto_alg) { - SSI_LOG_ERR("failed to allocate t_crypto_alg\n"); + if (!t_crypto_alg) return ERR_PTR(-ENOMEM); - } + t_crypto_alg->ahash_alg = template->template_ahash; halg = &t_crypto_alg->ahash_alg; @@ -2107,6 +2095,7 @@ int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata) ssi_sram_addr_t sram_buff_ofs = hash_handle->digest_len_sram_addr; unsigned int larval_seq_len = 0; struct cc_hw_desc larval_seq[CC_DIGEST_SIZE_MAX / sizeof(u32)]; + struct device *dev = drvdata_to_dev(drvdata); int rc = 0; #if (DX_DEV_SHA_MAX > 256) int i; @@ -2191,7 +2180,7 @@ int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata) } rc = send_request_init(drvdata, larval_seq, larval_seq_len); if (unlikely(rc != 0)) { - SSI_LOG_ERR("send_request() failed (rc = %d)\n", rc); + dev_err(dev, "send_request() failed (rc = %d)\n", rc); goto init_digest_const_err; } larval_seq_len = 0; @@ -2209,7 +2198,7 @@ int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata) } rc = send_request_init(drvdata, larval_seq, larval_seq_len); if (unlikely(rc != 0)) { - SSI_LOG_ERR("send_request() failed (rc = %d)\n", rc); + dev_err(dev, "send_request() failed (rc = %d)\n", rc); goto init_digest_const_err; } #endif @@ -2223,17 +2212,15 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata) struct ssi_hash_handle *hash_handle; ssi_sram_addr_t sram_buff; u32 sram_size_to_alloc; + struct device *dev = drvdata_to_dev(drvdata); int rc = 0; int alg; hash_handle = kzalloc(sizeof(*hash_handle), GFP_KERNEL); - if (!hash_handle) { - SSI_LOG_ERR("kzalloc failed to allocate %zu B\n", - sizeof(*hash_handle)); - rc = -ENOMEM; - goto fail; - } + if (!hash_handle) + return -ENOMEM; + INIT_LIST_HEAD(&hash_handle->hash_list); drvdata->hash_handle = hash_handle; sram_size_to_alloc = sizeof(digest_len_init) + @@ -2249,7 +2236,7 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata) sram_buff = ssi_sram_mgr_alloc(drvdata, sram_size_to_alloc); if (sram_buff == NULL_SRAM_ADDR) { - SSI_LOG_ERR("SRAM pool exhausted\n"); + dev_err(dev, "SRAM pool exhausted\n"); rc = -ENOMEM; goto fail; } @@ -2260,31 +2247,29 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata) /*must be set before the alg registration as it is being used there*/ rc = ssi_hash_init_sram_digest_consts(drvdata); if (unlikely(rc != 0)) { - SSI_LOG_ERR("Init digest CONST failed (rc=%d)\n", rc); + dev_err(dev, "Init digest CONST failed (rc=%d)\n", rc); goto fail; } - INIT_LIST_HEAD(&hash_handle->hash_list); - /* ahash registration */ for (alg = 0; alg < ARRAY_SIZE(driver_hash); alg++) { struct ssi_hash_alg *t_alg; int hw_mode = driver_hash[alg].hw_mode; /* register hmac version */ - t_alg = ssi_hash_create_alg(&driver_hash[alg], true); + t_alg = ssi_hash_create_alg(&driver_hash[alg], dev, true); if (IS_ERR(t_alg)) { rc = PTR_ERR(t_alg); - SSI_LOG_ERR("%s alg allocation failed\n", - driver_hash[alg].driver_name); + dev_err(dev, "%s alg allocation failed\n", + driver_hash[alg].driver_name); goto fail; } t_alg->drvdata = drvdata; rc = crypto_register_ahash(&t_alg->ahash_alg); if (unlikely(rc)) { - SSI_LOG_ERR("%s alg registration failed\n", - driver_hash[alg].driver_name); + dev_err(dev, "%s alg registration failed\n", + driver_hash[alg].driver_name); kfree(t_alg); goto fail; } else { @@ -2297,19 +2282,19 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata) continue; /* register hash version */ - t_alg = ssi_hash_create_alg(&driver_hash[alg], false); + t_alg = ssi_hash_create_alg(&driver_hash[alg], dev, false); if (IS_ERR(t_alg)) { rc = PTR_ERR(t_alg); - SSI_LOG_ERR("%s alg allocation failed\n", - driver_hash[alg].driver_name); + dev_err(dev, "%s alg allocation failed\n", + driver_hash[alg].driver_name); goto fail; } t_alg->drvdata = drvdata; rc = crypto_register_ahash(&t_alg->ahash_alg); if (unlikely(rc)) { - SSI_LOG_ERR("%s alg registration failed\n", - driver_hash[alg].driver_name); + dev_err(dev, "%s alg registration failed\n", + driver_hash[alg].driver_name); kfree(t_alg); goto fail; } else { @@ -2443,6 +2428,7 @@ static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx, unsigned int *seq_size) { unsigned int idx = *seq_size; + struct device *dev = drvdata_to_dev(ctx->drvdata); if (likely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_DLLI)) { hw_desc_init(&desc[idx]); @@ -2453,7 +2439,7 @@ static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx, idx++; } else { if (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { - SSI_LOG_DEBUG(" NULL mode\n"); + dev_dbg(dev, " NULL mode\n"); /* nothing to build */ return; } @@ -2493,6 +2479,7 @@ ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode) { struct ssi_drvdata *_drvdata = (struct ssi_drvdata *)drvdata; struct ssi_hash_handle *hash_handle = _drvdata->hash_handle; + struct device *dev = drvdata_to_dev(_drvdata); switch (mode) { case DRV_HASH_NULL: @@ -2527,7 +2514,7 @@ ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode) sizeof(sha384_init)); #endif default: - SSI_LOG_ERR("Invalid hash mode (%d)\n", mode); + dev_err(dev, "Invalid hash mode (%d)\n", mode); } /*This is valid wrong value to avoid kernel crash*/ diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c index b01e03231947..3f082f41ae8f 100644 --- a/drivers/staging/ccree/ssi_ivgen.c +++ b/drivers/staging/ccree/ssi_ivgen.c @@ -193,12 +193,9 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata) /* Allocate "this" context */ drvdata->ivgen_handle = kzalloc(sizeof(*drvdata->ivgen_handle), GFP_KERNEL); - if (!drvdata->ivgen_handle) { - SSI_LOG_ERR("Not enough memory to allocate IVGEN context " - "(%zu B)\n", sizeof(*drvdata->ivgen_handle)); - rc = -ENOMEM; - goto out; - } + if (!drvdata->ivgen_handle) + return -ENOMEM; + ivgen_ctx = drvdata->ivgen_handle; /* Allocate pool's header for intial enc. key/IV */ @@ -206,15 +203,15 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata) &ivgen_ctx->pool_meta_dma, GFP_KERNEL); if (!ivgen_ctx->pool_meta) { - SSI_LOG_ERR("Not enough memory to allocate DMA of pool_meta " - "(%u B)\n", SSI_IVPOOL_META_SIZE); + dev_err(device, "Not enough memory to allocate DMA of pool_meta (%u B)\n", + SSI_IVPOOL_META_SIZE); rc = -ENOMEM; goto out; } /* Allocate IV pool in SRAM */ ivgen_ctx->pool = ssi_sram_mgr_alloc(drvdata, SSI_IVPOOL_SIZE); if (ivgen_ctx->pool == NULL_SRAM_ADDR) { - SSI_LOG_ERR("SRAM pool exhausted\n"); + dev_err(device, "SRAM pool exhausted\n"); rc = -ENOMEM; goto out; } @@ -248,6 +245,7 @@ int ssi_ivgen_getiv( { struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle; unsigned int idx = *iv_seq_len; + struct device *dev = drvdata_to_dev(drvdata); unsigned int t; if ((iv_out_size != CC_AES_IV_SIZE) && @@ -291,7 +289,7 @@ int ssi_ivgen_getiv( ivgen_ctx->next_iv_ofs += iv_out_size; if ((SSI_IVPOOL_SIZE - ivgen_ctx->next_iv_ofs) < CC_AES_IV_SIZE) { - SSI_LOG_DEBUG("Pool exhausted, regenerating iv-pool\n"); + dev_dbg(dev, "Pool exhausted, regenerating iv-pool\n"); /* pool is drained -regenerate it! */ return ssi_ivgen_generate_pool(ivgen_ctx, iv_seq, iv_seq_len); } diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c index 31325e6cd4b4..36a498098a70 100644 --- a/drivers/staging/ccree/ssi_pm.c +++ b/drivers/staging/ccree/ssi_pm.c @@ -40,11 +40,12 @@ int ssi_power_mgr_runtime_suspend(struct device *dev) (struct ssi_drvdata *)dev_get_drvdata(dev); int rc; - SSI_LOG_DEBUG("set HOST_POWER_DOWN_EN\n"); - WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE); + dev_dbg(dev, "set HOST_POWER_DOWN_EN\n"); + cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE); rc = ssi_request_mgr_runtime_suspend_queue(drvdata); if (rc != 0) { - SSI_LOG_ERR("ssi_request_mgr_runtime_suspend_queue (%x)\n", rc); + dev_err(dev, "ssi_request_mgr_runtime_suspend_queue (%x)\n", + rc); return rc; } fini_cc_regs(drvdata); @@ -58,24 +59,24 @@ int ssi_power_mgr_runtime_resume(struct device *dev) struct ssi_drvdata *drvdata = (struct ssi_drvdata *)dev_get_drvdata(dev); - SSI_LOG_DEBUG("unset HOST_POWER_DOWN_EN\n"); - WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE); + dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n"); + cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE); rc = cc_clk_on(drvdata); if (rc) { - SSI_LOG_ERR("failed getting clock back on. We're toast.\n"); + dev_err(dev, "failed getting clock back on. We're toast.\n"); return rc; } rc = init_cc_regs(drvdata, false); if (rc != 0) { - SSI_LOG_ERR("init_cc_regs (%x)\n", rc); + dev_err(dev, "init_cc_regs (%x)\n", rc); return rc; } rc = ssi_request_mgr_runtime_resume_queue(drvdata); if (rc != 0) { - SSI_LOG_ERR("ssi_request_mgr_runtime_resume_queue (%x)\n", rc); + dev_err(dev, "ssi_request_mgr_runtime_resume_queue (%x)\n", rc); return rc; } @@ -109,7 +110,8 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev) rc = pm_runtime_put_autosuspend(dev); } else { /* Something wrong happens*/ - BUG(); + dev_err(dev, "request to suspend already suspended queue"); + rc = -EBUSY; } return rc; } @@ -120,16 +122,17 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata) { int rc = 0; #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - struct platform_device *plat_dev = drvdata->plat_dev; + struct device *dev = drvdata_to_dev(drvdata); + /* must be before the enabling to avoid resdundent suspending */ - pm_runtime_set_autosuspend_delay(&plat_dev->dev, SSI_SUSPEND_TIMEOUT); - pm_runtime_use_autosuspend(&plat_dev->dev); + pm_runtime_set_autosuspend_delay(dev, SSI_SUSPEND_TIMEOUT); + pm_runtime_use_autosuspend(dev); /* activate the PM module */ - rc = pm_runtime_set_active(&plat_dev->dev); + rc = pm_runtime_set_active(dev); if (rc != 0) return rc; /* enable the PM module*/ - pm_runtime_enable(&plat_dev->dev); + pm_runtime_enable(dev); #endif return rc; } @@ -137,8 +140,6 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata) void ssi_power_mgr_fini(struct ssi_drvdata *drvdata) { #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - struct platform_device *plat_dev = drvdata->plat_dev; - - pm_runtime_disable(&plat_dev->dev); + pm_runtime_disable(drvdata_to_dev(drvdata)); #endif } diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c index e5c2f92857f6..a8a7dc672d4c 100644 --- a/drivers/staging/ccree/ssi_request_mgr.c +++ b/drivers/staging/ccree/ssi_request_mgr.c @@ -49,7 +49,6 @@ struct ssi_request_mgr_handle { dma_addr_t dummy_comp_buff_dma; struct cc_hw_desc monitor_desc; - volatile unsigned long monitor_lock; #ifdef COMP_IN_WQ struct workqueue_struct *workq; struct delayed_work compwork; @@ -69,19 +68,19 @@ static void comp_work_handler(struct work_struct *work); void request_mgr_fini(struct ssi_drvdata *drvdata) { struct ssi_request_mgr_handle *req_mgr_h = drvdata->request_mgr_handle; + struct device *dev = drvdata_to_dev(drvdata); if (!req_mgr_h) return; /* Not allocated */ if (req_mgr_h->dummy_comp_buff_dma != 0) { - dma_free_coherent(&drvdata->plat_dev->dev, - sizeof(u32), req_mgr_h->dummy_comp_buff, + dma_free_coherent(dev, sizeof(u32), req_mgr_h->dummy_comp_buff, req_mgr_h->dummy_comp_buff_dma); } - SSI_LOG_DEBUG("max_used_hw_slots=%d\n", (req_mgr_h->hw_queue_size - + dev_dbg(dev, "max_used_hw_slots=%d\n", (req_mgr_h->hw_queue_size - req_mgr_h->min_free_hw_slots)); - SSI_LOG_DEBUG("max_used_sw_slots=%d\n", req_mgr_h->max_used_sw_slots); + dev_dbg(dev, "max_used_sw_slots=%d\n", req_mgr_h->max_used_sw_slots); #ifdef COMP_IN_WQ flush_workqueue(req_mgr_h->workq); @@ -98,6 +97,7 @@ void request_mgr_fini(struct ssi_drvdata *drvdata) int request_mgr_init(struct ssi_drvdata *drvdata) { struct ssi_request_mgr_handle *req_mgr_h; + struct device *dev = drvdata_to_dev(drvdata); int rc = 0; req_mgr_h = kzalloc(sizeof(*req_mgr_h), GFP_KERNEL); @@ -110,24 +110,24 @@ int request_mgr_init(struct ssi_drvdata *drvdata) spin_lock_init(&req_mgr_h->hw_lock); #ifdef COMP_IN_WQ - SSI_LOG_DEBUG("Initializing completion workqueue\n"); + dev_dbg(dev, "Initializing completion workqueue\n"); req_mgr_h->workq = create_singlethread_workqueue("arm_cc7x_wq"); if (unlikely(!req_mgr_h->workq)) { - SSI_LOG_ERR("Failed creating work queue\n"); + dev_err(dev, "Failed creating work queue\n"); rc = -ENOMEM; goto req_mgr_init_err; } INIT_DELAYED_WORK(&req_mgr_h->compwork, comp_work_handler); #else - SSI_LOG_DEBUG("Initializing completion tasklet\n"); + dev_dbg(dev, "Initializing completion tasklet\n"); tasklet_init(&req_mgr_h->comptask, comp_handler, (unsigned long)drvdata); #endif - req_mgr_h->hw_queue_size = READ_REGISTER(drvdata->cc_base + - CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_SRAM_SIZE)); - SSI_LOG_DEBUG("hw_queue_size=0x%08X\n", req_mgr_h->hw_queue_size); + req_mgr_h->hw_queue_size = cc_ioread(drvdata, + CC_REG(DSCRPTR_QUEUE_SRAM_SIZE)); + dev_dbg(dev, "hw_queue_size=0x%08X\n", req_mgr_h->hw_queue_size); if (req_mgr_h->hw_queue_size < MIN_HW_QUEUE_SIZE) { - SSI_LOG_ERR("Invalid HW queue size = %u (Min. required is %u)\n", - req_mgr_h->hw_queue_size, MIN_HW_QUEUE_SIZE); + dev_err(dev, "Invalid HW queue size = %u (Min. required is %u)\n", + req_mgr_h->hw_queue_size, MIN_HW_QUEUE_SIZE); rc = -ENOMEM; goto req_mgr_init_err; } @@ -135,13 +135,12 @@ int request_mgr_init(struct ssi_drvdata *drvdata) req_mgr_h->max_used_sw_slots = 0; /* Allocate DMA word for "dummy" completion descriptor use */ - req_mgr_h->dummy_comp_buff = dma_alloc_coherent(&drvdata->plat_dev->dev, - sizeof(u32), + req_mgr_h->dummy_comp_buff = dma_alloc_coherent(dev, sizeof(u32), &req_mgr_h->dummy_comp_buff_dma, GFP_KERNEL); if (!req_mgr_h->dummy_comp_buff) { - SSI_LOG_ERR("Not enough memory to allocate DMA (%zu) dropped " - "buffer\n", sizeof(u32)); + dev_err(dev, "Not enough memory to allocate DMA (%zu) dropped buffer\n", + sizeof(u32)); rc = -ENOMEM; goto req_mgr_init_err; } @@ -168,17 +167,17 @@ static inline void enqueue_seq( int i; for (i = 0; i < seq_len; i++) { - writel_relaxed(seq[i].word[0], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[1], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[2], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[3], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); - writel_relaxed(seq[i].word[4], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[0], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[1], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[2], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[3], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[4], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); wmb(); - writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0))); + writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base + CC_REG(DSCRPTR_QUEUE_WORD0))); #ifdef DX_DUMP_DESCS - SSI_LOG_DEBUG("desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", i, - seq[i].word[0], seq[i].word[1], seq[i].word[2], - seq[i].word[3], seq[i].word[4], seq[i].word[5]); + dev_dbg(dev, "desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", + i, seq[i].word[0], seq[i].word[1], seq[i].word[2], + seq[i].word[3], seq[i].word[4], seq[i].word[5]); #endif } } @@ -198,11 +197,12 @@ static void request_mgr_complete(struct device *dev, void *dx_compl_h, void __io } static inline int request_mgr_queues_status_check( + struct ssi_drvdata *drvdata, struct ssi_request_mgr_handle *req_mgr_h, - void __iomem *cc_base, unsigned int total_seq_len) { unsigned long poll_queue; + struct device *dev = drvdata_to_dev(drvdata); /* SW queue is checked only once as it will not * be chaned during the poll becasue the spinlock_bh @@ -211,8 +211,8 @@ static inline int request_mgr_queues_status_check( if (unlikely(((req_mgr_h->req_queue_head + 1) & (MAX_REQUEST_QUEUE_SIZE - 1)) == req_mgr_h->req_queue_tail)) { - SSI_LOG_ERR("SW FIFO is full. req_queue_head=%d sw_fifo_len=%d\n", - req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE); + dev_err(dev, "SW FIFO is full. req_queue_head=%d sw_fifo_len=%d\n", + req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE); return -EBUSY; } @@ -222,8 +222,7 @@ static inline int request_mgr_queues_status_check( /* Wait for space in HW queue. Poll constant num of iterations. */ for (poll_queue = 0; poll_queue < SSI_MAX_POLL_ITER ; poll_queue++) { req_mgr_h->q_free_slots = - CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, - DSCRPTR_QUEUE_CONTENT)); + cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); if (unlikely(req_mgr_h->q_free_slots < req_mgr_h->min_free_hw_slots)) { req_mgr_h->min_free_hw_slots = req_mgr_h->q_free_slots; @@ -234,16 +233,13 @@ static inline int request_mgr_queues_status_check( return 0; } - SSI_LOG_DEBUG("HW FIFO is full. q_free_slots=%d total_seq_len=%d\n", - req_mgr_h->q_free_slots, total_seq_len); + dev_dbg(dev, "HW FIFO is full. q_free_slots=%d total_seq_len=%d\n", + req_mgr_h->q_free_slots, total_seq_len); } /* No room in the HW queue try again later */ - SSI_LOG_DEBUG("HW FIFO full, timeout. req_queue_head=%d " - "sw_fifo_len=%d q_free_slots=%d total_seq_len=%d\n", - req_mgr_h->req_queue_head, - MAX_REQUEST_QUEUE_SIZE, - req_mgr_h->q_free_slots, - total_seq_len); + dev_dbg(dev, "HW FIFO full, timeout. req_queue_head=%d sw_fifo_len=%d q_free_slots=%d total_seq_len=%d\n", + req_mgr_h->req_queue_head, MAX_REQUEST_QUEUE_SIZE, + req_mgr_h->q_free_slots, total_seq_len); return -EAGAIN; } @@ -270,16 +266,17 @@ int send_request( unsigned int iv_seq_len = 0; unsigned int total_seq_len = len; /*initial sequence length*/ struct cc_hw_desc iv_seq[SSI_IVPOOL_SEQ_LEN]; + struct device *dev = drvdata_to_dev(drvdata); int rc; unsigned int max_required_seq_len = (total_seq_len + ((ssi_req->ivgen_dma_addr_len == 0) ? 0 : SSI_IVPOOL_SEQ_LEN) + - ((is_dout == 0) ? 1 : 0)); + (!is_dout ? 1 : 0)); #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - rc = ssi_power_mgr_runtime_get(&drvdata->plat_dev->dev); + rc = ssi_power_mgr_runtime_get(dev); if (rc != 0) { - SSI_LOG_ERR("ssi_power_mgr_runtime_get returned %x\n", rc); + dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc); return rc; } #endif @@ -291,7 +288,7 @@ int send_request( * in case iv gen add the max size and in case of no dout add 1 * for the internal completion descriptor */ - rc = request_mgr_queues_status_check(req_mgr_h, cc_base, + rc = request_mgr_queues_status_check(drvdata, req_mgr_h, max_required_seq_len); if (likely(rc == 0)) /* There is enough place in the queue */ @@ -304,7 +301,7 @@ int send_request( * (SW queue is full) */ #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev); + ssi_power_mgr_runtime_put_suspend(dev); #endif return rc; } @@ -324,12 +321,12 @@ int send_request( } if (ssi_req->ivgen_dma_addr_len > 0) { - SSI_LOG_DEBUG("Acquire IV from pool into %d DMA addresses %pad, %pad, %pad, IV-size=%u\n", - ssi_req->ivgen_dma_addr_len, - ssi_req->ivgen_dma_addr[0], - ssi_req->ivgen_dma_addr[1], - ssi_req->ivgen_dma_addr[2], - ssi_req->ivgen_size); + dev_dbg(dev, "Acquire IV from pool into %d DMA addresses %pad, %pad, %pad, IV-size=%u\n", + ssi_req->ivgen_dma_addr_len, + &ssi_req->ivgen_dma_addr[0], + &ssi_req->ivgen_dma_addr[1], + &ssi_req->ivgen_dma_addr[2], + ssi_req->ivgen_size); /* Acquire IV from pool */ rc = ssi_ivgen_getiv(drvdata, ssi_req->ivgen_dma_addr, @@ -337,10 +334,10 @@ int send_request( ssi_req->ivgen_size, iv_seq, &iv_seq_len); if (unlikely(rc != 0)) { - SSI_LOG_ERR("Failed to generate IV (rc=%d)\n", rc); + dev_err(dev, "Failed to generate IV (rc=%d)\n", rc); spin_unlock_bh(&req_mgr_h->hw_lock); #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev); + ssi_power_mgr_runtime_put_suspend(dev); #endif return rc; } @@ -357,7 +354,7 @@ int send_request( req_mgr_h->req_queue_head = (req_mgr_h->req_queue_head + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); /* TODO: Use circ_buf.h ? */ - SSI_LOG_DEBUG("Enqueue request head=%u\n", req_mgr_h->req_queue_head); + dev_dbg(dev, "Enqueue request head=%u\n", req_mgr_h->req_queue_head); #ifdef FLUSH_CACHE_ALL flush_cache_all(); @@ -369,11 +366,16 @@ int send_request( enqueue_seq(cc_base, &req_mgr_h->compl_desc, (is_dout ? 0 : 1)); if (unlikely(req_mgr_h->q_free_slots < total_seq_len)) { - /*This means that there was a problem with the resume*/ - BUG(); + /* This situation should never occur. Maybe indicating problem + * with resuming power. Set the free slot count to 0 and hope + * for the best. + */ + dev_err(dev, "HW free slot count mismatch."); + req_mgr_h->q_free_slots = 0; + } else { + /* Update the free slots in HW queue */ + req_mgr_h->q_free_slots -= total_seq_len; } - /* Update the free slots in HW queue */ - req_mgr_h->q_free_slots -= total_seq_len; spin_unlock_bh(&req_mgr_h->hw_lock); @@ -383,10 +385,9 @@ int send_request( */ wait_for_completion(&ssi_req->seq_compl); return 0; - } else { - /* Operation still in process */ - return -EINPROGRESS; } + /* Operation still in process */ + return -EINPROGRESS; } /*! @@ -409,7 +410,8 @@ int send_request_init( int rc = 0; /* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. */ - rc = request_mgr_queues_status_check(req_mgr_h, cc_base, total_seq_len); + rc = request_mgr_queues_status_check(drvdata, req_mgr_h, + total_seq_len); if (unlikely(rc != 0)) return rc; @@ -418,8 +420,8 @@ int send_request_init( enqueue_seq(cc_base, desc, len); /* Update the free slots in HW queue */ - req_mgr_h->q_free_slots = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, - DSCRPTR_QUEUE_CONTENT)); + req_mgr_h->q_free_slots = + cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); return 0; } @@ -448,7 +450,7 @@ static void comp_work_handler(struct work_struct *work) static void proc_completions(struct ssi_drvdata *drvdata) { struct ssi_crypto_req *ssi_req; - struct platform_device *plat_dev = drvdata->plat_dev; + struct device *dev = drvdata_to_dev(drvdata); struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) @@ -460,8 +462,13 @@ static void proc_completions(struct ssi_drvdata *drvdata) /* Dequeue request */ if (unlikely(request_mgr_handle->req_queue_head == request_mgr_handle->req_queue_tail)) { - SSI_LOG_ERR("Request queue is empty req_queue_head==req_queue_tail==%u\n", request_mgr_handle->req_queue_head); - BUG(); + /* We are supposed to handle a completion but our + * queue is empty. This is not normal. Return and + * hope for the best. + */ + dev_err(dev, "Request queue is empty head == tail %u\n", + request_mgr_handle->req_queue_head); + break; } ssi_req = &request_mgr_handle->req_queue[request_mgr_handle->req_queue_tail]; @@ -476,39 +483,40 @@ static void proc_completions(struct ssi_drvdata *drvdata) u32 axi_err; int i; - SSI_LOG_INFO("Delay\n"); + dev_info(dev, "Delay\n"); for (i = 0; i < 1000000; i++) - axi_err = READ_REGISTER(drvdata->cc_base + CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR)); + axi_err = cc_ioread(drvdata, + CC_REG(AXIM_MON_ERR)); } #endif /* COMPLETION_DELAY */ if (likely(ssi_req->user_cb)) - ssi_req->user_cb(&plat_dev->dev, ssi_req->user_arg, drvdata->cc_base); + ssi_req->user_cb(dev, ssi_req->user_arg, + drvdata->cc_base); request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1); - SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail); - SSI_LOG_DEBUG("Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed); + dev_dbg(dev, "Dequeue request tail=%u\n", + request_mgr_handle->req_queue_tail); + dev_dbg(dev, "Request completed. axi_completed=%d\n", + request_mgr_handle->axi_completed); #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP) - rc = ssi_power_mgr_runtime_put_suspend(&plat_dev->dev); + rc = ssi_power_mgr_runtime_put_suspend(dev); if (rc != 0) - SSI_LOG_ERR("Failed to set runtime suspension %d\n", rc); + dev_err(dev, "Failed to set runtime suspension %d\n", + rc); #endif } } -static inline u32 cc_axi_comp_count(void __iomem *cc_base) +static inline u32 cc_axi_comp_count(struct ssi_drvdata *drvdata) { - /* The CC_HAL_READ_REGISTER macro implictly requires and uses - * a base MMIO register address variable named cc_base. - */ return FIELD_GET(AXIM_MON_COMP_VALUE, - CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET)); + cc_ioread(drvdata, CC_REG(AXIM_MON_COMP))); } /* Deferred service handler, run as interrupt-fired tasklet */ static void comp_handler(unsigned long devarg) { struct ssi_drvdata *drvdata = (struct ssi_drvdata *)devarg; - void __iomem *cc_base = drvdata->cc_base; struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle; @@ -517,12 +525,16 @@ static void comp_handler(unsigned long devarg) irq = (drvdata->irq & SSI_COMP_IRQ_MASK); if (irq & SSI_COMP_IRQ_MASK) { - /* To avoid the interrupt from firing as we unmask it, we clear it now */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), SSI_COMP_IRQ_MASK); + /* To avoid the interrupt from firing as we unmask it, + * we clear it now + */ + cc_iowrite(drvdata, CC_REG(HOST_ICR), SSI_COMP_IRQ_MASK); - /* Avoid race with above clear: Test completion counter once more */ + /* Avoid race with above clear: Test completion counter + * once more + */ request_mgr_handle->axi_completed += - cc_axi_comp_count(cc_base); + cc_axi_comp_count(drvdata); while (request_mgr_handle->axi_completed) { do { @@ -531,20 +543,21 @@ static void comp_handler(unsigned long devarg) * request_mgr_handle->axi_completed is 0. */ request_mgr_handle->axi_completed = - cc_axi_comp_count(cc_base); + cc_axi_comp_count(drvdata); } while (request_mgr_handle->axi_completed > 0); - /* To avoid the interrupt from firing as we unmask it, we clear it now */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), SSI_COMP_IRQ_MASK); + cc_iowrite(drvdata, CC_REG(HOST_ICR), + SSI_COMP_IRQ_MASK); - /* Avoid race with above clear: Test completion counter once more */ request_mgr_handle->axi_completed += - cc_axi_comp_count(cc_base); + cc_axi_comp_count(drvdata); } } - /* after verifing that there is nothing to do, Unmask AXI completion interrupt */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), - CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR)) & ~irq); + /* after verifing that there is nothing to do, + * unmask AXI completion interrupt + */ + cc_iowrite(drvdata, CC_REG(HOST_IMR), + cc_ioread(drvdata, CC_REG(HOST_IMR)) & ~irq); } /* diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c index f11116afe89a..07260d168c91 100644 --- a/drivers/staging/ccree/ssi_sram_mgr.c +++ b/drivers/staging/ccree/ssi_sram_mgr.c @@ -50,28 +50,14 @@ void ssi_sram_mgr_fini(struct ssi_drvdata *drvdata) */ int ssi_sram_mgr_init(struct ssi_drvdata *drvdata) { - struct ssi_sram_mgr_ctx *smgr_ctx; - int rc; - /* Allocate "this" context */ - drvdata->sram_mgr_handle = kzalloc( - sizeof(struct ssi_sram_mgr_ctx), GFP_KERNEL); - if (!drvdata->sram_mgr_handle) { - SSI_LOG_ERR("Not enough memory to allocate SRAM_MGR ctx (%zu)\n", - sizeof(struct ssi_sram_mgr_ctx)); - rc = -ENOMEM; - goto out; - } - smgr_ctx = drvdata->sram_mgr_handle; + drvdata->sram_mgr_handle = kzalloc(sizeof(struct ssi_sram_mgr_ctx), + GFP_KERNEL); - /* Pool starts at start of SRAM */ - smgr_ctx->sram_free_offset = 0; + if (!drvdata->sram_mgr_handle) + return -ENOMEM; return 0; - -out: - ssi_sram_mgr_fini(drvdata); - return rc; } /*! @@ -86,22 +72,23 @@ out: ssi_sram_addr_t ssi_sram_mgr_alloc(struct ssi_drvdata *drvdata, u32 size) { struct ssi_sram_mgr_ctx *smgr_ctx = drvdata->sram_mgr_handle; + struct device *dev = drvdata_to_dev(drvdata); ssi_sram_addr_t p; if (unlikely((size & 0x3) != 0)) { - SSI_LOG_ERR("Requested buffer size (%u) is not multiple of 4", - size); + dev_err(dev, "Requested buffer size (%u) is not multiple of 4", + size); return NULL_SRAM_ADDR; } if (unlikely(size > (SSI_CC_SRAM_SIZE - smgr_ctx->sram_free_offset))) { - SSI_LOG_ERR("Not enough space to allocate %u B (at offset %llu)\n", - size, smgr_ctx->sram_free_offset); + dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n", + size, smgr_ctx->sram_free_offset); return NULL_SRAM_ADDR; } p = smgr_ctx->sram_free_offset; smgr_ctx->sram_free_offset += size; - SSI_LOG_DEBUG("Allocated %u B @ %u\n", size, (unsigned int)p); + dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p); return p; } diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c index 0655658bba4d..5d39f15cdb59 100644 --- a/drivers/staging/ccree/ssi_sysfs.c +++ b/drivers/staging/ccree/ssi_sysfs.c @@ -24,277 +24,22 @@ static struct ssi_drvdata *sys_get_drvdata(void); -#ifdef CC_CYCLE_COUNT - -#include <asm/timex.h> - -struct stat_item { - unsigned int min; - unsigned int max; - cycles_t sum; - unsigned int count; -}; - -struct stat_name { - const char *op_type_name; - const char *stat_phase_name[MAX_STAT_PHASES]; -}; - -static struct stat_name stat_name_db[MAX_STAT_OP_TYPES] = { - { - /* STAT_OP_TYPE_NULL */ - .op_type_name = "NULL", - .stat_phase_name = {NULL}, - }, - { - .op_type_name = "Encode", - .stat_phase_name[STAT_PHASE_0] = "Init and sanity checks", - .stat_phase_name[STAT_PHASE_1] = "Map buffers", - .stat_phase_name[STAT_PHASE_2] = "Create sequence", - .stat_phase_name[STAT_PHASE_3] = "Send Request", - .stat_phase_name[STAT_PHASE_4] = "HW-Q push", - .stat_phase_name[STAT_PHASE_5] = "Sequence completion", - .stat_phase_name[STAT_PHASE_6] = "HW cycles", - }, - { .op_type_name = "Decode", - .stat_phase_name[STAT_PHASE_0] = "Init and sanity checks", - .stat_phase_name[STAT_PHASE_1] = "Map buffers", - .stat_phase_name[STAT_PHASE_2] = "Create sequence", - .stat_phase_name[STAT_PHASE_3] = "Send Request", - .stat_phase_name[STAT_PHASE_4] = "HW-Q push", - .stat_phase_name[STAT_PHASE_5] = "Sequence completion", - .stat_phase_name[STAT_PHASE_6] = "HW cycles", - }, - { .op_type_name = "Setkey", - .stat_phase_name[STAT_PHASE_0] = "Init and sanity checks", - .stat_phase_name[STAT_PHASE_1] = "Copy key to ctx", - .stat_phase_name[STAT_PHASE_2] = "Create sequence", - .stat_phase_name[STAT_PHASE_3] = "Send Request", - .stat_phase_name[STAT_PHASE_4] = "HW-Q push", - .stat_phase_name[STAT_PHASE_5] = "Sequence completion", - .stat_phase_name[STAT_PHASE_6] = "HW cycles", - }, - { - .op_type_name = "Generic", - .stat_phase_name[STAT_PHASE_0] = "Interrupt", - .stat_phase_name[STAT_PHASE_1] = "ISR-to-Tasklet", - .stat_phase_name[STAT_PHASE_2] = "Tasklet start-to-end", - .stat_phase_name[STAT_PHASE_3] = "Tasklet:user_cb()", - .stat_phase_name[STAT_PHASE_4] = "Tasklet:dx_X_complete() - w/o X_complete()", - .stat_phase_name[STAT_PHASE_5] = "", - .stat_phase_name[STAT_PHASE_6] = "HW cycles", - } -}; - -/* - * Structure used to create a directory - * and its attributes in sysfs. - */ -struct sys_dir { - struct kobject *sys_dir_kobj; - struct attribute_group sys_dir_attr_group; - struct attribute **sys_dir_attr_list; - u32 num_of_attrs; - struct ssi_drvdata *drvdata; /* Associated driver context */ -}; - -/* top level directory structures */ -struct sys_dir sys_top_dir; - -static DEFINE_SPINLOCK(stat_lock); - -/* List of DBs */ -static struct stat_item stat_host_db[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]; -static struct stat_item stat_cc_db[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]; - -static void init_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]) -{ - unsigned int i, j; - - /* Clear db */ - for (i = 0; i < MAX_STAT_OP_TYPES; i++) { - for (j = 0; j < MAX_STAT_PHASES; j++) { - item[i][j].min = 0xFFFFFFFF; - item[i][j].max = 0; - item[i][j].sum = 0; - item[i][j].count = 0; - } - } -} - -static void update_db(struct stat_item *item, unsigned int result) -{ - item->count++; - item->sum += result; - if (result < item->min) - item->min = result; - if (result > item->max) - item->max = result; -} - -static void display_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]) -{ - unsigned int i, j; - u64 avg; - - for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) { - for (j = 0; j < MAX_STAT_PHASES; j++) { - if (item[i][j].count > 0) { - avg = (u64)item[i][j].sum; - do_div(avg, item[i][j].count); - SSI_LOG_ERR("%s, %s: min=%d avg=%d max=%d sum=%lld count=%d\n", - stat_name_db[i].op_type_name, - stat_name_db[i].stat_phase_name[j], - item[i][j].min, (int)avg, - item[i][j].max, - (long long)item[i][j].sum, - item[i][j].count); - } - } - } -} - -/************************************** - * Attributes show functions section * - **************************************/ - -static ssize_t ssi_sys_stats_host_db_clear(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, size_t count) -{ - init_db(stat_host_db); - return count; -} - -static ssize_t ssi_sys_stats_cc_db_clear(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, size_t count) -{ - init_db(stat_cc_db); - return count; -} - -static ssize_t ssi_sys_stat_host_db_show(struct kobject *kobj, - struct kobj_attribute *attr, char *buf) -{ - int i, j; - char line[512]; - u32 min_cyc, max_cyc; - u64 avg; - ssize_t buf_len, tmp_len = 0; - - buf_len = scnprintf(buf, PAGE_SIZE, - "phase\t\t\t\t\t\t\tmin[cy]\tavg[cy]\tmax[cy]\t#samples\n"); - if (buf_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/ - return buf_len; - for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) { - for (j = 0; j < MAX_STAT_PHASES - 1; j++) { - if (stat_host_db[i][j].count > 0) { - avg = (u64)stat_host_db[i][j].sum; - do_div(avg, stat_host_db[i][j].count); - min_cyc = stat_host_db[i][j].min; - max_cyc = stat_host_db[i][j].max; - } else { - avg = min_cyc = max_cyc = 0; - } - tmp_len = scnprintf(line, 512, - "%s::%s\t\t\t\t\t%6u\t%6u\t%6u\t%7u\n", - stat_name_db[i].op_type_name, - stat_name_db[i].stat_phase_name[j], - min_cyc, (unsigned int)avg, max_cyc, - stat_host_db[i][j].count); - if (tmp_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/ - return buf_len; - if (buf_len + tmp_len >= PAGE_SIZE) - return buf_len; - buf_len += tmp_len; - strncat(buf, line, 512); - } - } - return buf_len; -} - -static ssize_t ssi_sys_stat_cc_db_show(struct kobject *kobj, - struct kobj_attribute *attr, char *buf) -{ - int i; - char line[256]; - u32 min_cyc, max_cyc; - u64 avg; - ssize_t buf_len, tmp_len = 0; - - buf_len = scnprintf(buf, PAGE_SIZE, - "phase\tmin[cy]\tavg[cy]\tmax[cy]\t#samples\n"); - if (buf_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/ - return buf_len; - for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) { - if (stat_cc_db[i][STAT_PHASE_6].count > 0) { - avg = (u64)stat_cc_db[i][STAT_PHASE_6].sum; - do_div(avg, stat_cc_db[i][STAT_PHASE_6].count); - min_cyc = stat_cc_db[i][STAT_PHASE_6].min; - max_cyc = stat_cc_db[i][STAT_PHASE_6].max; - } else { - avg = min_cyc = max_cyc = 0; - } - tmp_len = scnprintf(line, 256, "%s\t%6u\t%6u\t%6u\t%7u\n", - stat_name_db[i].op_type_name, min_cyc, - (unsigned int)avg, max_cyc, - stat_cc_db[i][STAT_PHASE_6].count); - - if (tmp_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/ - return buf_len; - - if (buf_len + tmp_len >= PAGE_SIZE) - return buf_len; - buf_len += tmp_len; - strncat(buf, line, 256); - } - return buf_len; -} - -void update_host_stat(unsigned int op_type, unsigned int phase, cycles_t result) -{ - unsigned long flags; - - spin_lock_irqsave(&stat_lock, flags); - update_db(&stat_host_db[op_type][phase], (unsigned int)result); - spin_unlock_irqrestore(&stat_lock, flags); -} - -void update_cc_stat( - unsigned int op_type, - unsigned int phase, - unsigned int elapsed_cycles) -{ - update_db(&stat_cc_db[op_type][phase], elapsed_cycles); -} - -void display_all_stat_db(void) -{ - SSI_LOG_ERR("\n======= CYCLE COUNT STATS =======\n"); - display_db(stat_host_db); - SSI_LOG_ERR("\n======= CC HW CYCLE COUNT STATS =======\n"); - display_db(stat_cc_db); -} -#endif /*CC_CYCLE_COUNT*/ - static ssize_t ssi_sys_regdump_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { struct ssi_drvdata *drvdata = sys_get_drvdata(); u32 register_value; - void __iomem *cc_base = drvdata->cc_base; int offset = 0; - register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE)); + register_value = cc_ioread(drvdata, CC_REG(HOST_SIGNATURE)); offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE ", DX_HOST_SIGNATURE_REG_OFFSET, register_value); - register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR)); + register_value = cc_ioread(drvdata, CC_REG(HOST_IRR)); offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_IRR ", DX_HOST_IRR_REG_OFFSET, register_value); - register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN)); + register_value = cc_ioread(drvdata, CC_REG(HOST_POWER_DOWN_EN)); offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "HOST_POWER_DOWN_EN ", DX_HOST_POWER_DOWN_EN_REG_OFFSET, register_value); - register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR)); + register_value = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR)); offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "AXIM_MON_ERR ", DX_AXIM_MON_ERR_REG_OFFSET, register_value); - register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_CONTENT)); + register_value = cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 0x%08X\n", "DSCRPTR_QUEUE_CONTENT", DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET, register_value); return offset; } @@ -304,12 +49,6 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj, { char *help_str[] = { "cat reg_dump ", "Print several of CC register values", - #if defined CC_CYCLE_COUNT - "cat stats_host ", "Print host statistics", - "echo <number> > stats_host", "Clear host statistics database", - "cat stats_cc ", "Print CC statistics", - "echo <number> > stats_cc ", "Clear CC statistics database", - #endif }; int i = 0, offset = 0; @@ -376,7 +115,7 @@ static int sys_init_dir(struct sys_dir *sys_dir, struct ssi_drvdata *drvdata, return -ENOMEM; /* allocate memory for directory's attributes list */ sys_dir->sys_dir_attr_list = - kzalloc(sizeof(struct attribute *) * (num_of_attrs + 1), + kcalloc(num_of_attrs + 1, sizeof(struct attribute *), GFP_KERNEL); if (!(sys_dir->sys_dir_attr_list)) { @@ -413,14 +152,9 @@ static void sys_free_dir(struct sys_dir *sys_dir) int ssi_sysfs_init(struct kobject *sys_dev_obj, struct ssi_drvdata *drvdata) { int retval; + struct device *dev = drvdata_to_dev(drvdata); -#if defined CC_CYCLE_COUNT - /* Init. statistics */ - init_db(stat_host_db); - init_db(stat_cc_db); -#endif - - SSI_LOG_ERR("setup sysfs under %s\n", sys_dev_obj->name); + dev_info(dev, "setup sysfs under %s\n", sys_dev_obj->name); /* Initialize top directory */ retval = sys_init_dir(&sys_top_dir, drvdata, sys_dev_obj, "cc_info", |