diff options
Diffstat (limited to 'drivers/staging')
299 files changed, 8294 insertions, 19199 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 59af251e7576..8d41fdd40657 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -66,8 +66,6 @@ source "drivers/staging/gdm724x/Kconfig" source "drivers/staging/fwserial/Kconfig" -source "drivers/staging/netlogic/Kconfig" - source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" @@ -86,10 +84,6 @@ source "drivers/staging/vc04_services/Kconfig" source "drivers/staging/pi433/Kconfig" -source "drivers/staging/mt7621-dma/Kconfig" - -source "drivers/staging/ralink-gdma/Kconfig" - source "drivers/staging/mt7621-dts/Kconfig" source "drivers/staging/axis-fifo/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 76f413470bc8..02b01949b94e 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -10,7 +10,6 @@ obj-$(CONFIG_RTL8723BS) += rtl8723bs/ obj-$(CONFIG_R8712U) += rtl8712/ obj-$(CONFIG_R8188EU) += r8188eu/ obj-$(CONFIG_RTS5208) += rts5208/ -obj-$(CONFIG_NETLOGIC_XLR_NET) += netlogic/ obj-$(CONFIG_OCTEON_ETHERNET) += octeon/ obj-$(CONFIG_OCTEON_USB) += octeon-usb/ obj-$(CONFIG_VT6655) += vt6655/ @@ -33,8 +32,6 @@ obj-$(CONFIG_KS7010) += ks7010/ obj-$(CONFIG_GREYBUS) += greybus/ obj-$(CONFIG_BCM2835_VCHIQ) += vc04_services/ obj-$(CONFIG_PI433) += pi433/ -obj-$(CONFIG_SOC_MT7621) += mt7621-dma/ -obj-$(CONFIG_DMA_RALINK) += ralink-gdma/ obj-$(CONFIG_SOC_MT7621) += mt7621-dts/ obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/ obj-$(CONFIG_FIELDBUS_DEV) += fieldbus/ diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c index 632f140dddbc..dfd2b357f484 100644 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ b/drivers/staging/axis-fifo/axis-fifo.c @@ -809,7 +809,6 @@ end: static int axis_fifo_probe(struct platform_device *pdev) { - struct resource *r_irq; /* interrupt resources */ struct resource *r_mem; /* IO mem resources */ struct device *dev = &pdev->dev; /* OS device (from device tree) */ struct axis_fifo *fifo = NULL; @@ -882,16 +881,12 @@ static int axis_fifo_probe(struct platform_device *pdev) */ /* get IRQ resource */ - r_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!r_irq) { - dev_err(fifo->dt_device, "no IRQ found for 0x%pa\n", - &r_mem->start); - rc = -EIO; + rc = platform_get_irq(pdev, 0); + if (rc < 0) goto err_initial; - } /* request IRQ */ - fifo->irq = r_irq->start; + fifo->irq = rc; rc = devm_request_irq(fifo->dt_device, fifo->irq, &axis_fifo_irq, 0, DRIVER_NAME, fifo); if (rc) { diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig index dad1ddcd7b0c..4d29e8c1014e 100644 --- a/drivers/staging/fbtft/Kconfig +++ b/drivers/staging/fbtft/Kconfig @@ -200,9 +200,3 @@ config FB_TFT_UPD161704 depends on FB_TFT help Generic Framebuffer support for uPD161704 - -config FB_TFT_WATTEROTT - tristate "FB driver for the WATTEROTT LCD Controller" - depends on FB_TFT - help - Generic Framebuffer support for WATTEROTT diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile index e87193f7df14..e9cdf0f0a7da 100644 --- a/drivers/staging/fbtft/Makefile +++ b/drivers/staging/fbtft/Makefile @@ -36,4 +36,3 @@ obj-$(CONFIG_FB_TFT_TLS8204) += fb_tls8204.o obj-$(CONFIG_FB_TFT_UC1611) += fb_uc1611.o obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o -obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o diff --git a/drivers/staging/fbtft/fb_sh1106.c b/drivers/staging/fbtft/fb_sh1106.c index 7b9ab39e1c1a..9685ca516a0e 100644 --- a/drivers/staging/fbtft/fb_sh1106.c +++ b/drivers/staging/fbtft/fb_sh1106.c @@ -173,12 +173,7 @@ static struct fbtft_display display = { }, }; -FBTFT_REGISTER_DRIVER(DRVNAME, "sinowealth,sh1106", &display); - -MODULE_ALIAS("spi:" DRVNAME); -MODULE_ALIAS("platform:" DRVNAME); -MODULE_ALIAS("spi:sh1106"); -MODULE_ALIAS("platform:sh1106"); +FBTFT_REGISTER_SPI_DRIVER(DRVNAME, "sinowealth", "sh1106", &display); MODULE_DESCRIPTION("SH1106 OLED Driver"); MODULE_AUTHOR("Heiner Kallweit"); diff --git a/drivers/staging/fbtft/fb_ssd1351.c b/drivers/staging/fbtft/fb_ssd1351.c index cf263a58a148..6fd549a424d5 100644 --- a/drivers/staging/fbtft/fb_ssd1351.c +++ b/drivers/staging/fbtft/fb_ssd1351.c @@ -187,7 +187,6 @@ static struct fbtft_display display = { }, }; -#ifdef CONFIG_FB_BACKLIGHT static int update_onboard_backlight(struct backlight_device *bd) { struct fbtft_par *par = bl_get_data(bd); @@ -231,9 +230,6 @@ static void register_onboard_backlight(struct fbtft_par *par) if (!par->fbtftops.unregister_backlight) par->fbtftops.unregister_backlight = fbtft_unregister_backlight; } -#else -static void register_onboard_backlight(struct fbtft_par *par) { }; -#endif FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1351", &display); diff --git a/drivers/staging/fbtft/fb_watterott.c b/drivers/staging/fbtft/fb_watterott.c deleted file mode 100644 index a57e1f4feef3..000000000000 --- a/drivers/staging/fbtft/fb_watterott.c +++ /dev/null @@ -1,302 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * FB driver for the Watterott LCD Controller - * - * Copyright (C) 2013 Noralf Tronnes - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> - -#include "fbtft.h" - -#define DRVNAME "fb_watterott" -#define WIDTH 320 -#define HEIGHT 240 -#define FPS 5 -#define TXBUFLEN 1024 -#define DEFAULT_BRIGHTNESS 50 - -#define CMD_VERSION 0x01 -#define CMD_LCD_LED 0x10 -#define CMD_LCD_RESET 0x11 -#define CMD_LCD_ORIENTATION 0x20 -#define CMD_LCD_DRAWIMAGE 0x27 -#define COLOR_RGB323 8 -#define COLOR_RGB332 9 -#define COLOR_RGB233 10 -#define COLOR_RGB565 16 - -static short mode = 565; -module_param(mode, short, 0000); -MODULE_PARM_DESC(mode, "RGB color transfer mode: 332, 565 (default)"); - -static void write_reg8_bus8(struct fbtft_par *par, int len, ...) -{ - va_list args; - int i, ret; - u8 *buf = par->buf; - - va_start(args, len); - for (i = 0; i < len; i++) - *buf++ = (u8)va_arg(args, unsigned int); - va_end(args); - - fbtft_par_dbg_hex(DEBUG_WRITE_REGISTER, par, - par->info->device, u8, par->buf, - len, "%s: ", __func__); - - ret = par->fbtftops.write(par, par->buf, len); - if (ret < 0) { - dev_err(par->info->device, - "write() failed and returned %d\n", ret); - return; - } -} - -static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) -{ - unsigned int start_line, end_line; - u16 *vmem16 = (u16 *)(par->info->screen_buffer + offset); - __be16 *pos = par->txbuf.buf + 1; - __be16 *buf16 = par->txbuf.buf + 10; - int i, j; - int ret = 0; - - start_line = offset / par->info->fix.line_length; - end_line = start_line + (len / par->info->fix.line_length) - 1; - - /* Set command header. pos: x, y, w, h */ - ((u8 *)par->txbuf.buf)[0] = CMD_LCD_DRAWIMAGE; - pos[0] = 0; - pos[2] = cpu_to_be16(par->info->var.xres); - pos[3] = cpu_to_be16(1); - ((u8 *)par->txbuf.buf)[9] = COLOR_RGB565; - - for (i = start_line; i <= end_line; i++) { - pos[1] = cpu_to_be16(i); - for (j = 0; j < par->info->var.xres; j++) - buf16[j] = cpu_to_be16(*vmem16++); - ret = par->fbtftops.write(par, - par->txbuf.buf, 10 + par->info->fix.line_length); - if (ret < 0) - return ret; - udelay(300); - } - - return 0; -} - -static inline int rgb565_to_rgb332(u16 c) -{ - return ((c & 0xE000) >> 8) | ((c & 000700) >> 6) | ((c & 0x0018) >> 3); -} - -static int write_vmem_8bit(struct fbtft_par *par, size_t offset, size_t len) -{ - unsigned int start_line, end_line; - u16 *vmem16 = (u16 *)(par->info->screen_buffer + offset); - __be16 *pos = par->txbuf.buf + 1; - u8 *buf8 = par->txbuf.buf + 10; - int i, j; - int ret = 0; - - start_line = offset / par->info->fix.line_length; - end_line = start_line + (len / par->info->fix.line_length) - 1; - - /* Set command header. pos: x, y, w, h */ - ((u8 *)par->txbuf.buf)[0] = CMD_LCD_DRAWIMAGE; - pos[0] = 0; - pos[2] = cpu_to_be16(par->info->var.xres); - pos[3] = cpu_to_be16(1); - ((u8 *)par->txbuf.buf)[9] = COLOR_RGB332; - - for (i = start_line; i <= end_line; i++) { - pos[1] = cpu_to_be16(i); - for (j = 0; j < par->info->var.xres; j++) { - buf8[j] = rgb565_to_rgb332(*vmem16); - vmem16++; - } - ret = par->fbtftops.write(par, - par->txbuf.buf, 10 + par->info->var.xres); - if (ret < 0) - return ret; - udelay(700); - } - - return 0; -} - -static unsigned int firmware_version(struct fbtft_par *par) -{ - u8 rxbuf[4] = {0, }; - - write_reg(par, CMD_VERSION); - par->fbtftops.read(par, rxbuf, 4); - if (rxbuf[1] != '.') - return 0; - - return (rxbuf[0] - '0') << 8 | (rxbuf[2] - '0') << 4 | (rxbuf[3] - '0'); -} - -static int init_display(struct fbtft_par *par) -{ - int ret; - unsigned int version; - u8 save_mode; - - /* enable SPI interface by having CS and MOSI low during reset */ - save_mode = par->spi->mode; - /* - * Set CS active inverse polarity: just setting SPI_CS_HIGH does not - * work with GPIO based chip selects that are logically active high - * but inverted inside the GPIO library, so enforce inverted - * semantics. - */ - par->spi->mode ^= SPI_CS_HIGH; - ret = spi_setup(par->spi); - if (ret) { - dev_err(par->info->device, - "Could not set inverse CS polarity\n"); - return ret; - } - write_reg(par, 0x00); /* make sure mode is set */ - - mdelay(50); - par->fbtftops.reset(par); - mdelay(1000); - par->spi->mode = save_mode; - ret = spi_setup(par->spi); - if (ret) { - dev_err(par->info->device, "Could not restore SPI mode\n"); - return ret; - } - write_reg(par, 0x00); - - version = firmware_version(par); - fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "Firmware version: %x.%02x\n", - version >> 8, version & 0xFF); - - if (mode == 332) - par->fbtftops.write_vmem = write_vmem_8bit; - return 0; -} - -static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) -{ - /* not used on this controller */ -} - -static int set_var(struct fbtft_par *par) -{ - u8 rotate; - - /* this controller rotates clock wise */ - switch (par->info->var.rotate) { - case 90: - rotate = 27; - break; - case 180: - rotate = 18; - break; - case 270: - rotate = 9; - break; - default: - rotate = 0; - } - write_reg(par, CMD_LCD_ORIENTATION, rotate); - - return 0; -} - -static int verify_gpios(struct fbtft_par *par) -{ - if (!par->gpio.reset) { - dev_err(par->info->device, "Missing 'reset' gpio. Aborting.\n"); - return -EINVAL; - } - return 0; -} - -#ifdef CONFIG_FB_BACKLIGHT -static int backlight_chip_update_status(struct backlight_device *bd) -{ - struct fbtft_par *par = bl_get_data(bd); - int brightness = bd->props.brightness; - - fbtft_par_dbg(DEBUG_BACKLIGHT, par, - "%s: brightness=%d, power=%d, fb_blank=%d\n", __func__, - bd->props.brightness, bd->props.power, - bd->props.fb_blank); - - if (bd->props.power != FB_BLANK_UNBLANK) - brightness = 0; - - if (bd->props.fb_blank != FB_BLANK_UNBLANK) - brightness = 0; - - write_reg(par, CMD_LCD_LED, brightness); - - return 0; -} - -static const struct backlight_ops bl_ops = { - .update_status = backlight_chip_update_status, -}; - -static void register_chip_backlight(struct fbtft_par *par) -{ - struct backlight_device *bd; - struct backlight_properties bl_props = { 0, }; - - bl_props.type = BACKLIGHT_RAW; - bl_props.power = FB_BLANK_POWERDOWN; - bl_props.max_brightness = 100; - bl_props.brightness = DEFAULT_BRIGHTNESS; - - bd = backlight_device_register(dev_driver_string(par->info->device), - par->info->device, par, &bl_ops, - &bl_props); - if (IS_ERR(bd)) { - dev_err(par->info->device, - "cannot register backlight device (%ld)\n", - PTR_ERR(bd)); - return; - } - par->info->bl_dev = bd; - - if (!par->fbtftops.unregister_backlight) - par->fbtftops.unregister_backlight = fbtft_unregister_backlight; -} -#else -#define register_chip_backlight NULL -#endif - -static struct fbtft_display display = { - .regwidth = 8, - .buswidth = 8, - .width = WIDTH, - .height = HEIGHT, - .fps = FPS, - .txbuflen = TXBUFLEN, - .fbtftops = { - .write_register = write_reg8_bus8, - .write_vmem = write_vmem, - .init_display = init_display, - .set_addr_win = set_addr_win, - .set_var = set_var, - .verify_gpios = verify_gpios, - .register_backlight = register_chip_backlight, - }, -}; - -FBTFT_REGISTER_DRIVER(DRVNAME, "watterott,openlcd", &display); - -MODULE_ALIAS("spi:" DRVNAME); - -MODULE_DESCRIPTION("FB driver for the Watterott LCD Controller"); -MODULE_AUTHOR("Noralf Tronnes"); -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index ecb5f75f6dd5..f2684d2d6851 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -128,7 +128,6 @@ static int fbtft_request_gpios(struct fbtft_par *par) return 0; } -#ifdef CONFIG_FB_BACKLIGHT static int fbtft_backlight_update_status(struct backlight_device *bd) { struct fbtft_par *par = bl_get_data(bd); @@ -161,6 +160,7 @@ void fbtft_unregister_backlight(struct fbtft_par *par) par->info->bl_dev = NULL; } } +EXPORT_SYMBOL(fbtft_unregister_backlight); static const struct backlight_ops fbtft_bl_ops = { .get_brightness = fbtft_backlight_get_brightness, @@ -198,12 +198,7 @@ void fbtft_register_backlight(struct fbtft_par *par) if (!par->fbtftops.unregister_backlight) par->fbtftops.unregister_backlight = fbtft_unregister_backlight; } -#else -void fbtft_register_backlight(struct fbtft_par *par) { }; -void fbtft_unregister_backlight(struct fbtft_par *par) { }; -#endif EXPORT_SYMBOL(fbtft_register_backlight); -EXPORT_SYMBOL(fbtft_unregister_backlight); static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) @@ -853,13 +848,11 @@ int fbtft_register_framebuffer(struct fb_info *fb_info) fb_info->fix.smem_len >> 10, text1, HZ / fb_info->fbdefio->delay, text2); -#ifdef CONFIG_FB_BACKLIGHT /* Turn on backlight if available */ if (fb_info->bl_dev) { fb_info->bl_dev->props.power = FB_BLANK_UNBLANK; fb_info->bl_dev->ops->update_status(fb_info->bl_dev); } -#endif return 0; diff --git a/drivers/staging/fbtft/fbtft.h b/drivers/staging/fbtft/fbtft.h index 6869f3603b0e..4cdec34e23d2 100644 --- a/drivers/staging/fbtft/fbtft.h +++ b/drivers/staging/fbtft/fbtft.h @@ -346,6 +346,47 @@ static void __exit fbtft_driver_module_exit(void) \ module_init(fbtft_driver_module_init); \ module_exit(fbtft_driver_module_exit); +#define FBTFT_REGISTER_SPI_DRIVER(_name, _comp_vend, _comp_dev, _display) \ + \ +static int fbtft_driver_probe_spi(struct spi_device *spi) \ +{ \ + return fbtft_probe_common(_display, spi, NULL); \ +} \ + \ +static int fbtft_driver_remove_spi(struct spi_device *spi) \ +{ \ + struct fb_info *info = spi_get_drvdata(spi); \ + \ + fbtft_remove_common(&spi->dev, info); \ + return 0; \ +} \ + \ +static const struct of_device_id dt_ids[] = { \ + { .compatible = _comp_vend "," _comp_dev }, \ + {}, \ +}; \ + \ +MODULE_DEVICE_TABLE(of, dt_ids); \ + \ +static const struct spi_device_id spi_ids[] = { \ + { .name = _comp_dev }, \ + {}, \ +}; \ + \ +MODULE_DEVICE_TABLE(spi, spi_ids); \ + \ +static struct spi_driver fbtft_driver_spi_driver = { \ + .driver = { \ + .name = _name, \ + .of_match_table = dt_ids, \ + }, \ + .id_table = spi_ids, \ + .probe = fbtft_driver_probe_spi, \ + .remove = fbtft_driver_remove_spi, \ +}; \ + \ +module_spi_driver(fbtft_driver_spi_driver); + /* Debug macros */ /* shorthand debug levels */ diff --git a/drivers/staging/greybus/audio_helper.c b/drivers/staging/greybus/audio_helper.c index 1ed4772d2771..843760675876 100644 --- a/drivers/staging/greybus/audio_helper.c +++ b/drivers/staging/greybus/audio_helper.c @@ -192,7 +192,11 @@ int gbaudio_remove_component_controls(struct snd_soc_component *component, unsigned int num_controls) { struct snd_card *card = component->card->snd_card; + int err; - return gbaudio_remove_controls(card, component->dev, controls, - num_controls, component->name_prefix); + down_write(&card->controls_rwsem); + err = gbaudio_remove_controls(card, component->dev, controls, + num_controls, component->name_prefix); + up_write(&card->controls_rwsem); + return err; } diff --git a/drivers/staging/greybus/audio_manager_module.c b/drivers/staging/greybus/audio_manager_module.c index 525cf8f8394f..0a0f0a394c84 100644 --- a/drivers/staging/greybus/audio_manager_module.c +++ b/drivers/staging/greybus/audio_manager_module.c @@ -142,11 +142,12 @@ static struct attribute *gb_audio_module_default_attrs[] = { &gb_audio_module_op_devices_attribute.attr, NULL, /* need to NULL terminate the list of attributes */ }; +ATTRIBUTE_GROUPS(gb_audio_module_default); static struct kobj_type gb_audio_module_type = { .sysfs_ops = &gb_audio_module_sysfs_ops, .release = gb_audio_module_release, - .default_attrs = gb_audio_module_default_attrs, + .default_groups = gb_audio_module_default_groups, }; static void send_add_uevent(struct gb_audio_manager_module *module) diff --git a/drivers/staging/greybus/audio_topology.c b/drivers/staging/greybus/audio_topology.c index 1e613d42d823..62d7674852be 100644 --- a/drivers/staging/greybus/audio_topology.c +++ b/drivers/staging/greybus/audio_topology.c @@ -147,6 +147,9 @@ static const char **gb_generate_enum_strings(struct gbaudio_module_info *gb, items = le32_to_cpu(gbenum->items); strings = devm_kcalloc(gb->dev, items, sizeof(char *), GFP_KERNEL); + if (!strings) + return NULL; + data = gbenum->names; for (i = 0; i < items; i++) { @@ -655,6 +658,8 @@ static int gbaudio_tplg_create_enum_kctl(struct gbaudio_module_info *gb, /* since count=1, and reg is dummy */ gbe->items = le32_to_cpu(gb_enum->items); gbe->texts = gb_generate_enum_strings(gb, gb_enum); + if (!gbe->texts) + return -ENOMEM; /* debug enum info */ dev_dbg(gb->dev, "Max:%d, name_length:%d\n", gbe->items, @@ -862,6 +867,8 @@ static int gbaudio_tplg_create_enum_ctl(struct gbaudio_module_info *gb, /* since count=1, and reg is dummy */ gbe->items = le32_to_cpu(gb_enum->items); gbe->texts = gb_generate_enum_strings(gb, gb_enum); + if (!gbe->texts) + return -ENOMEM; /* debug enum info */ dev_dbg(gb->dev, "Max:%d, name_length:%d\n", gbe->items, @@ -974,6 +981,44 @@ static int gbaudio_widget_event(struct snd_soc_dapm_widget *w, return ret; } +static const struct snd_soc_dapm_widget gbaudio_widgets[] = { + [snd_soc_dapm_spk] = SND_SOC_DAPM_SPK(NULL, gbcodec_event_spk), + [snd_soc_dapm_hp] = SND_SOC_DAPM_HP(NULL, gbcodec_event_hp), + [snd_soc_dapm_mic] = SND_SOC_DAPM_MIC(NULL, gbcodec_event_int_mic), + [snd_soc_dapm_output] = SND_SOC_DAPM_OUTPUT(NULL), + [snd_soc_dapm_input] = SND_SOC_DAPM_INPUT(NULL), + [snd_soc_dapm_switch] = SND_SOC_DAPM_SWITCH_E(NULL, SND_SOC_NOPM, + 0, 0, NULL, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + [snd_soc_dapm_pga] = SND_SOC_DAPM_PGA_E(NULL, SND_SOC_NOPM, + 0, 0, NULL, 0, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + [snd_soc_dapm_mixer] = SND_SOC_DAPM_MIXER_E(NULL, SND_SOC_NOPM, + 0, 0, NULL, 0, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + [snd_soc_dapm_mux] = SND_SOC_DAPM_MUX_E(NULL, SND_SOC_NOPM, + 0, 0, NULL, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + [snd_soc_dapm_aif_in] = SND_SOC_DAPM_AIF_IN_E(NULL, NULL, 0, + SND_SOC_NOPM, 0, 0, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + [snd_soc_dapm_aif_out] = SND_SOC_DAPM_AIF_OUT_E(NULL, NULL, 0, + SND_SOC_NOPM, 0, 0, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), +}; + static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, struct snd_soc_dapm_widget *dw, struct gb_audio_widget *w, int *w_size) @@ -1034,6 +1079,10 @@ static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, csize += le16_to_cpu(gbenum->names_length); control->texts = (const char * const *) gb_generate_enum_strings(module, gbenum); + if (!control->texts) { + ret = -ENOMEM; + goto error; + } control->items = le32_to_cpu(gbenum->items); } else { csize = sizeof(struct gb_audio_control); @@ -1052,77 +1101,37 @@ static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, switch (w->type) { case snd_soc_dapm_spk: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_SPK(w->name, gbcodec_event_spk); + *dw = gbaudio_widgets[w->type]; module->op_devices |= GBAUDIO_DEVICE_OUT_SPEAKER; break; case snd_soc_dapm_hp: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_HP(w->name, gbcodec_event_hp); + *dw = gbaudio_widgets[w->type]; module->op_devices |= (GBAUDIO_DEVICE_OUT_WIRED_HEADSET | GBAUDIO_DEVICE_OUT_WIRED_HEADPHONE); module->ip_devices |= GBAUDIO_DEVICE_IN_WIRED_HEADSET; break; case snd_soc_dapm_mic: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_MIC(w->name, gbcodec_event_int_mic); + *dw = gbaudio_widgets[w->type]; module->ip_devices |= GBAUDIO_DEVICE_IN_BUILTIN_MIC; break; case snd_soc_dapm_output: - *dw = (struct snd_soc_dapm_widget)SND_SOC_DAPM_OUTPUT(w->name); - break; case snd_soc_dapm_input: - *dw = (struct snd_soc_dapm_widget)SND_SOC_DAPM_INPUT(w->name); - break; case snd_soc_dapm_switch: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_SWITCH_E(w->name, SND_SOC_NOPM, 0, 0, - widget_kctls, - gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); - break; case snd_soc_dapm_pga: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_PGA_E(w->name, SND_SOC_NOPM, 0, 0, NULL, 0, - gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); - break; case snd_soc_dapm_mixer: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_MIXER_E(w->name, SND_SOC_NOPM, 0, 0, NULL, - 0, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); - break; case snd_soc_dapm_mux: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_MUX_E(w->name, SND_SOC_NOPM, 0, 0, - widget_kctls, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); + *dw = gbaudio_widgets[w->type]; break; case snd_soc_dapm_aif_in: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_AIF_IN_E(w->name, w->sname, 0, - SND_SOC_NOPM, - 0, 0, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); - break; case snd_soc_dapm_aif_out: - *dw = (struct snd_soc_dapm_widget) - SND_SOC_DAPM_AIF_OUT_E(w->name, w->sname, 0, - SND_SOC_NOPM, - 0, 0, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); + *dw = gbaudio_widgets[w->type]; + dw->sname = w->sname; break; default: ret = -EINVAL; goto error; } + dw->name = w->name; dev_dbg(module->dev, "%s: widget of type %d created\n", dw->name, dw->id); @@ -1183,6 +1192,10 @@ static int gbaudio_tplg_process_kcontrols(struct gbaudio_module_info *module, csize += le16_to_cpu(gbenum->names_length); control->texts = (const char * const *) gb_generate_enum_strings(module, gbenum); + if (!control->texts) { + ret = -ENOMEM; + goto error; + } control->items = le32_to_cpu(gbenum->items); } else { csize = sizeof(struct gb_audio_control); diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index e3aaae920847..b81cfa74edb7 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -26,6 +26,8 @@ source "drivers/staging/media/hantro/Kconfig" source "drivers/staging/media/imx/Kconfig" +source "drivers/staging/media/max96712/Kconfig" + source "drivers/staging/media/meson/vdec/Kconfig" source "drivers/staging/media/omap4iss/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 5b5afc5b03a0..7e2c86e3695d 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_INTEL_ATOMISP) += atomisp/ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ +obj-$(CONFIG_VIDEO_MAX96712) += max96712/ obj-$(CONFIG_VIDEO_MESON_VDEC) += meson/vdec/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rkvdec/ diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 606b7754fdfd..2485d7b3fee2 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -27,20 +27,16 @@ atomisp-objs += \ pci/sh_css_firmware.o \ pci/sh_css_host_data.o \ pci/sh_css_hrt.o \ - pci/sh_css_metadata.o \ pci/sh_css_metrics.o \ pci/sh_css_mipi.o \ pci/sh_css_mmu.o \ - pci/sh_css_morph.o \ pci/sh_css.o \ pci/sh_css_param_dvs.o \ pci/sh_css_param_shading.o \ pci/sh_css_params.o \ pci/sh_css_properties.o \ - pci/sh_css_shading.o \ pci/sh_css_sp.o \ pci/sh_css_stream_format.o \ - pci/sh_css_stream.o \ pci/sh_css_version.o \ pci/base/circbuf/src/circbuf.o \ pci/base/refcount/src/refcount.o \ @@ -53,6 +49,9 @@ atomisp-objs += \ pci/hmm/hmm.o \ pci/hmm/hmm_reserved_pool.o \ pci/ia_css_device_access.o \ + pci/ia_css_isp_configs.o \ + pci/ia_css_isp_states.o \ + pci/ia_css_isp_params.o \ pci/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.o \ pci/isp/kernels/anr/anr_2/ia_css_anr2.host.o \ @@ -154,21 +153,13 @@ atomisp-objs += \ pci/hive_isp_css_common/host/timed_ctrl.o \ pci/hive_isp_css_common/host/vmem.o \ pci/hive_isp_css_shared/host/tag.o \ - pci/system_local.o \ - -obj-byt = \ - pci/css_2400_system/hive/ia_css_isp_configs.o \ - pci/css_2400_system/hive/ia_css_isp_params.o \ - pci/css_2400_system/hive/ia_css_isp_states.o \ + pci/system_local.o # These will be needed when clean merge CHT support nicely into the driver # Keep them here handy for when we get to that point # obj-cht = \ - pci/css_2401_system/hive/ia_css_isp_configs.o \ - pci/css_2401_system/hive/ia_css_isp_params.o \ - pci/css_2401_system/hive/ia_css_isp_states.o \ pci/css_2401_system/host/csi_rx.o \ pci/css_2401_system/host/ibuf_ctrl.o \ pci/css_2401_system/host/isys_dma.o \ @@ -306,10 +297,8 @@ INCLUDES += \ -I$(atomisp)/pci/runtime/rmgr/interface/ \ -I$(atomisp)/pci/runtime/spctrl/interface/ \ -I$(atomisp)/pci/runtime/tagger/interface/ \ - -I$(atomisp)/pci/css_2400_system/hive/ \ -I$(atomisp)/pci/css_2401_system/ \ -I$(atomisp)/pci/css_2401_system/host/ \ - -I$(atomisp)/pci/css_2401_system/hive/ \ -I$(atomisp)/pci/css_2401_system/hrt/ DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ @@ -324,10 +313,7 @@ ifeq ($(CONFIG_VIDEO_ATOMISP_ISP2401),y) atomisp-objs += \ $(obj-cht) \ pci/runtime/isys/src/ibuf_ctrl_rmgr.o -DEFINES += -DISP2401 -DISP2401_NEW_INPUT_SYSTEM -DSYSTEM_hive_isp_css_2401_system -else -atomisp-objs += $(obj-byt) -DEFINES += -DISP2400 -DSYSTEM_hive_isp_css_2400_system +DEFINES += -DISP2401 endif ccflags-y += $(INCLUDES) $(DEFINES) -fno-common diff --git a/drivers/staging/media/atomisp/TODO b/drivers/staging/media/atomisp/TODO index 2d1ef9eb262a..43b842043f29 100644 --- a/drivers/staging/media/atomisp/TODO +++ b/drivers/staging/media/atomisp/TODO @@ -1,92 +1,161 @@ +For both Cherrytrail (CHT) and Baytrail (BHT) the driver +requires the "candrpv_0415_20150521_0458" firmware version. +It should be noticed that the firmware file is different, +depending on the ISP model, so they're stored with different +names: + +- for BHT: /lib/firmware/shisp_2400b0_v21.bin + + Warning: The driver was not tested yet for BHT. + +- for CHT: /lib/firmware/shisp_2401a0_v21.bin + + https://github.com/intel-aero/meta-intel-aero-base/blob/master/recipes-kernel/linux/linux-yocto/shisp_2401a0_v21.bin + NOTE: ===== -While the driver probes the hardware and reports itself as a -V4L2 driver, there are still some issues preventing it to -stream (at least it doesn't with the standard V4L2 applications. -Didn't test yet with some custom-made app for this driver). -Solving the related bugs and issues preventing it to work is -needed (items 6 and 7 from the list below). +This driver currently doesn't work with most V4L2 applications, +as there are still some issues with regards to implementing +certain APIs at the standard way. + +Also, currently only USERPTR streaming mode is working. + +In order to test, it is needed to know what's the sensor's +resolution. This can be checked with: + +$ v4l2-ctl --get-fmt-video + Format Video Capture: + Width/Height : 1600/1200 + ... + +It is known to work with: + +- v4l2grab at contrib/test directory at https://git.linuxtv.org/v4l-utils.git/ + + The resolution should not be bigger than the max resolution + supported by the sensor, or it will fail. So, if the sensor + reports: + + The driver can be tested with: + + v4l2grab -f YUYV -x 1600 -y 1200 -d /dev/video2 -u + +- NVT at https://github.com/intel/nvt + + $ ./v4l2n -o testimage_@.raw \ + --device /dev/video2 \ + --input 0 \ + --exposure=30000,30000,30000,30000 \ + --parm type=1,capturemode=CI_MODE_PREVIEW \ + --fmt type=1,width=1600,height=1200,pixelformat=YUYV \ + --reqbufs count=2,memory=USERPTR \ + --parameters=wb_config.r=32768,wb_config.gr=21043,wb_config.gb=21043,wb_config.b=30863 \ + --capture=20 + + As the output is in raw format, images need to be converted with: + + $ for i in $(seq 0 19); do + name="testimage_$(printf "%03i" $i)" + ./raw2pnm -x$WIDTH -y$HEIGHT -f$FORMAT $name.raw $name.pnm + rm $name.raw + done TODO ==== -1. The atomisp doesn't rely at the usual i2c stuff to discover the - sensors. Instead, it calls a function from atomisp_gmin_platform.c. - There are some hacks added there for it to wait for sensors to be - probed (with a timeout of 2 seconds or so). - This should be converted to the usual way, using V4L2 async subdev - framework to wait for cameras to be probed; +1. Fix support for MMAP streaming mode. This is required for most + V4L2 applications; -2. Use ACPI _DSM table - DONE! +2. Implement and/or fix V4L2 ioctls in order to allow a normal app to + use it; -3. Switch the driver to use pm_runtime stuff. Right now, it probes the - existing PMIC code and sensors call it directly. +3. Ensure that the driver will pass v4l2-compliance tests; -4. There's a problem at the sensor drivers: when trying to set a video - format, the atomisp main driver calls the sensor drivers with the - sensor turned off. This causes them to fail. +4. Get manufacturer's authorization to redistribute the binaries for + the firmware files; - The only exception is the atomisp-ov2880, which has a hack inside it - to turn it on when VIDIOC_S_FMT is called. +5. remove VIDEO_ATOMISP_ISP2401, making the driver to auto-detect the + register address differences between ISP2400 and ISP2401; - The right fix seems to power on the sensor when a video device is - opened (or at the first VIDIOC_ ioctl - except for VIDIOC_QUERYCAP), - powering it down at close() syscall. +6. Cleanup the driver code, removing the abstraction layers inside it; - Such kind of control would need to be done inside the atomisp driver, - not at the sensors code. +7. The atomisp doesn't rely at the usual i2c stuff to discover the + sensors. Instead, it calls a function from atomisp_gmin_platform.c. + There are some hacks added there for it to wait for sensors to be + probed (with a timeout of 2 seconds or so). This should be converted + to the usual way, using V4L2 async subdev framework to wait for + cameras to be probed; -5. There are several issues related to memory management, causing - crashes. The atomisp splits the memory management on three separate - regions: +8. Switch to standard V4L2 sub-device API for sensor and lens. In + particular, the user space API needs to support V4L2 controls as + defined in the V4L2 spec and references to atomisp must be removed from + these drivers. + +9. Use LED flash API for flash LED drivers such as LM3554 (which already + has a LED class driver). + +10. Migrate the sensor drivers out of staging or re-using existing + drivers; + +11. Switch the driver to use pm_runtime stuff. Right now, it probes the + existing PMIC code and sensors call it directly. + +12. There's a problem on sensor drivers: when trying to set a video + format, the atomisp main driver calls the sensor drivers with the + sensor turned off. This causes them to fail. + + This was fixed at atomisp-ov2880, which has a hack inside it + to turn it on when VIDIOC_S_FMT is called, but this has to be + cheked on other drivers as well. + + The right fix seems to power on the sensor when a video device is + opened (or at the first VIDIOC_ ioctl - except for VIDIOC_QUERYCAP), + powering it down at close() syscall. + + Such kind of control would need to be done inside the atomisp driver, + not at the sensors code. + +13. There are several issues related to memory management, that can + cause crashes and/or memory leaks. The atomisp splits the memory + management on three separate regions: - dynamic pool; - reserved pool; - generic pool - The code implementing it is at: + The code implementing it is at: drivers/staging/media/atomisp/pci/hmm/ - It also has a separate code for managing DMA buffers at: + It also has a separate code for managing DMA buffers at: drivers/staging/media/atomisp/pci/mmu/ - The code there is really dirty, ugly and probably wrong. I fixed - one bug there already, but the best would be to just trash it and use - something else. Maybe the code from the newer intel driver could - serve as a model: + The code there is really dirty, ugly and probably wrong. I fixed + one bug there already, but the best would be to just trash it and use + something else. Maybe the code from the newer intel driver could + serve as a model: drivers/staging/media/ipu3/ipu3-mmu.c - But converting it to use something like that is painful and may - cause some breakages. - -6. There is some issues at the frame receive logic, causing the - DQBUF ioctls to fail. - -7. A single AtomISP driver needs to be implemented to support both - Baytrail (BYT) and Cherrytail (CHT) platforms at the same time. - The current driver is a mechanical and hand combined merge of the - two using several runtime macros, plus some ifdef ISP2401 to select the - CHT version. Yet, there are some ISP-specific headers that change the - driver's behavior during compile time. + But converting it to use something like that is painful and may + cause some breakages. -8. The file structure needs to get tidied up to resemble a normal Linux - driver. +14. The file structure needs to get tidied up to resemble a normal Linux + driver. -9. Lots of the midlayer glue. unused code and abstraction needs removing. +15. Lots of the midlayer glue. Unused code and abstraction needs removing. -10. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) +16. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) and controls that require some cleanup. Some of those code may have been removed during the cleanups. They could be needed in order to - properly support 3A algorithms + properly support 3A algorithms. Such IOCTL interface needs more documentation. The better would be to use something close to the interface used by the IPU3 IMGU driver. -11. The ISP code has some dependencies of the exact FW version. +17. The ISP code has some dependencies of the exact FW version. The version defined in pci/sh_css_firmware.c: BYT (isp2400): "irci_stable_candrpv_0415_20150521_0458" @@ -106,24 +175,16 @@ TODO there are any specific things that can be done to fold in support for multiple firmware versions. -12. Switch to standard V4L2 sub-device API for sensor and lens. In - particular, the user space API needs to support V4L2 controls as - defined in the V4L2 spec and references to atomisp must be removed from - these drivers. - -13. Use LED flash API for flash LED drivers such as LM3554 (which already - has a LED class driver). -14. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! +18. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! -15. Correct Coding Style. Please refrain sending coding style patches +19. Correct Coding Style. Please refrain sending coding style patches for this driver until the other work is done, as there will be a lot of code churn until this driver becomes functional again. -16. Fix private ioctls to not need a compat_ioctl handler for running - 32-bit tasks. The compat code has been removed because of bugs, - and should not be needed for modern drivers. Fixing this properly - unfortunately means an incompatible ABI change. +20. Remove the logic which sets up pipelines inside it, moving it to + libcamera and implement MC support. + Limitations =========== diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index 687888d643df..cbc8b1d91995 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -266,7 +266,7 @@ static int gc0310_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) { struct gc0310_device *dev = to_gc0310_sensor(sd); - *val = gc0310_res[dev->fmt_idx].bin_factor_x; + *val = dev->res->bin_factor_x; return 0; } @@ -275,7 +275,7 @@ static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) { struct gc0310_device *dev = to_gc0310_sensor(sd); - *val = gc0310_res[dev->fmt_idx].bin_factor_y; + *val = dev->res->bin_factor_y; return 0; } @@ -878,76 +878,6 @@ static int gc0310_s_power(struct v4l2_subdev *sd, int on) return gc0310_init(sd); } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct gc0310_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct gc0310_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &gc0310_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != gc0310_res[i].width) - continue; - if (h != gc0310_res[i].height) - continue; - - return i; - } - - return -1; -} - /* TODO: remove it. */ static int startup(struct v4l2_subdev *sd) { @@ -955,7 +885,7 @@ static int startup(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret = 0; - ret = gc0310_write_reg_array(client, gc0310_res[dev->fmt_idx].regs); + ret = gc0310_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "gc0310 write register err.\n"); return ret; @@ -972,8 +902,8 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, struct gc0310_device *dev = to_gc0310_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *gc0310_info = NULL; + struct gc0310_resolution *res; int ret = 0; - int idx = 0; if (format->pad) return -EINVAL; @@ -987,15 +917,16 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = gc0310_res[N_RES - 1].width; - fmt->height = gc0310_res[N_RES - 1].height; - } else { - fmt->width = gc0310_res[idx].width; - fmt->height = gc0310_res[idx].height; - } + res = v4l2_find_nearest_size(gc0310_res_preview, + ARRAY_SIZE(gc0310_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc0310_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { @@ -1004,23 +935,15 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev_dbg(&client->dev, "%s: before gc0310_write_reg_array %s\n", - __func__, gc0310_res[dev->fmt_idx].desc); + __func__, dev->res->desc); ret = startup(sd); if (ret) { dev_err(&client->dev, "gc0310 startup err\n"); goto err; } - ret = gc0310_get_intg_factor(client, gc0310_info, - &gc0310_res[dev->fmt_idx]); + ret = gc0310_get_intg_factor(client, gc0310_info, dev->res); if (ret) { dev_err(&client->dev, "failed to get integration_factor\n"); goto err; @@ -1044,8 +967,8 @@ static int gc0310_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = gc0310_res[dev->fmt_idx].width; - fmt->height = gc0310_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; return 0; @@ -1199,7 +1122,7 @@ static int gc0310_g_frame_interval(struct v4l2_subdev *sd, struct gc0310_device *dev = to_gc0310_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = gc0310_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1237,7 +1160,7 @@ static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct gc0310_device *dev = to_gc0310_sensor(sd); mutex_lock(&dev->input_lock); - *frames = gc0310_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1301,7 +1224,7 @@ static int gc0310_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &gc0310_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops); pdata = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index 4d769590f2d3..0e6b2e6100d1 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -570,14 +570,16 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag) static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) { struct gc2235_device *dev = to_gc2235_sensor(sd); - int ret = -1; + int ret; if (!dev || !dev->platform_data) return -ENODEV; - ret |= dev->platform_data->gpio1_ctrl(sd, !flag); + ret = dev->platform_data->gpio1_ctrl(sd, !flag); usleep_range(60, 90); - return dev->platform_data->gpio0_ctrl(sd, flag); + ret |= dev->platform_data->gpio0_ctrl(sd, flag); + + return ret; } static int power_up(struct v4l2_subdev *sd) @@ -670,76 +672,6 @@ static int gc2235_s_power(struct v4l2_subdev *sd, int on) return ret; } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct gc2235_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct gc2235_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &gc2235_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != gc2235_res[i].width) - continue; - if (h != gc2235_res[i].height) - continue; - - return i; - } - - return -1; -} - static int startup(struct v4l2_subdev *sd) { struct gc2235_device *dev = to_gc2235_sensor(sd); @@ -758,7 +690,7 @@ static int startup(struct v4l2_subdev *sd) gc2235_write_reg_array(client, gc2235_init_settings); } - ret = gc2235_write_reg_array(client, gc2235_res[dev->fmt_idx].regs); + ret = gc2235_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "gc2235 write register err.\n"); return ret; @@ -776,8 +708,8 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, struct gc2235_device *dev = to_gc2235_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *gc2235_info = NULL; + struct gc2235_resolution *res; int ret = 0; - int idx; gc2235_info = v4l2_get_subdev_hostdata(sd); if (!gc2235_info) @@ -786,16 +718,18 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, return -EINVAL; if (!fmt) return -EINVAL; + mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = gc2235_res[N_RES - 1].width; - fmt->height = gc2235_res[N_RES - 1].height; - } else { - fmt->width = gc2235_res[idx].width; - fmt->height = gc2235_res[idx].height; - } + res = v4l2_find_nearest_size(gc2235_res_preview, + ARRAY_SIZE(gc2235_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc2235_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; @@ -803,13 +737,6 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - ret = startup(sd); if (ret) { dev_err(&client->dev, "gc2235 startup err\n"); @@ -817,7 +744,7 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, } ret = gc2235_get_intg_factor(client, gc2235_info, - &gc2235_res[dev->fmt_idx]); + dev->res); if (ret) dev_err(&client->dev, "failed to get integration_factor\n"); @@ -839,8 +766,8 @@ static int gc2235_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = gc2235_res[dev->fmt_idx].width; - fmt->height = gc2235_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; return 0; @@ -953,7 +880,7 @@ static int gc2235_g_frame_interval(struct v4l2_subdev *sd, struct gc2235_device *dev = to_gc2235_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = gc2235_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -991,7 +918,7 @@ static int gc2235_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct gc2235_device *dev = to_gc2235_sensor(sd); mutex_lock(&dev->input_lock); - *frames = gc2235_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1055,7 +982,7 @@ static int gc2235_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &gc2235_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops); gcpdev = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 49f4090856d3..00d6842c07d6 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -579,107 +579,6 @@ static int mt9m114_s_power(struct v4l2_subdev *sd, int power) return mt9m114_init_common(sd); } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 600 -static int distance(struct mt9m114_res_struct const *res, u32 w, u32 h) -{ - unsigned int w_ratio; - unsigned int h_ratio; - int match; - - if (w == 0) - return -1; - w_ratio = (res->width << 13) / w; - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - const struct mt9m114_res_struct *tmp_res = NULL; - - for (i = 0; i < ARRAY_SIZE(mt9m114_res); i++) { - tmp_res = &mt9m114_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int mt9m114_try_res(u32 *w, u32 *h) -{ - int idx = 0; - - if ((*w > MT9M114_RES_960P_SIZE_H) - || (*h > MT9M114_RES_960P_SIZE_V)) { - *w = MT9M114_RES_960P_SIZE_H; - *h = MT9M114_RES_960P_SIZE_V; - } else { - idx = nearest_resolution_index(*w, *h); - - /* - * nearest_resolution_index() doesn't return smaller - * resolutions. If it fails, it means the requested - * resolution is higher than wecan support. Fallback - * to highest possible resolution in this case. - */ - if (idx == -1) - idx = ARRAY_SIZE(mt9m114_res) - 1; - - *w = mt9m114_res[idx].width; - *h = mt9m114_res[idx].height; - } - - return 0; -} - -static struct mt9m114_res_struct *mt9m114_to_res(u32 w, u32 h) -{ - int index; - - for (index = 0; index < N_RES; index++) { - if ((mt9m114_res[index].width == w) && - (mt9m114_res[index].height == h)) - break; - } - - /* No mode found */ - if (index >= N_RES) - return NULL; - - return &mt9m114_res[index]; -} - static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) { struct mt9m114_device *dev = to_mt9m114_sensor(sd); @@ -829,7 +728,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt = &format->format; struct i2c_client *c = v4l2_get_subdevdata(sd); struct mt9m114_device *dev = to_mt9m114_sensor(sd); - struct mt9m114_res_struct *res_index; + struct mt9m114_res_struct *res; u32 width = fmt->width; u32 height = fmt->height; struct camera_mipi_info *mt9m114_info = NULL; @@ -845,20 +744,21 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, if (!mt9m114_info) return -EINVAL; - mt9m114_try_res(&width, &height); + res = v4l2_find_nearest_size(mt9m114_res, + ARRAY_SIZE(mt9m114_res), width, + height, fmt->width, fmt->height); + if (!res) + res = &mt9m114_res[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; return 0; } - res_index = mt9m114_to_res(width, height); - - /* Sanity check */ - if (unlikely(!res_index)) { - WARN_ON(1); - return -EINVAL; - } - switch (res_index->res) { + switch (res->res) { case MT9M114_RES_736P: ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING); ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, @@ -876,7 +776,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); break; default: - v4l2_err(sd, "set resolution: %d failed!\n", res_index->res); + v4l2_err(sd, "set resolution: %d failed!\n", res->res); return -EINVAL; } @@ -890,7 +790,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, if (mt9m114_set_suspend(sd)) return -EINVAL; - if (dev->res != res_index->res) { + if (dev->res != res->res) { int index; /* Switch to different size */ @@ -922,7 +822,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, } } ret = mt9m114_get_intg_factor(c, mt9m114_info, - &mt9m114_res[res_index->res]); + &mt9m114_res[res->res]); if (ret) { dev_err(&c->dev, "failed to get integration_factor\n"); return -EINVAL; @@ -931,7 +831,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, * mt9m114 - we don't poll for context switch * because it does not happen with streaming disabled. */ - dev->res = res_index->res; + dev->res = res->res; fmt->width = width; fmt->height = height; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 2111e4a478c1..4ba99c660681 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -48,7 +48,7 @@ static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { /* i2c read/write stuff */ static int ov2680_read_reg(struct i2c_client *client, - int len, u16 reg, u16 *val) + int len, u16 reg, u32 *val) { struct i2c_msg msgs[2]; u8 addr_buf[2] = { reg >> 8, reg & 0xff }; @@ -86,7 +86,7 @@ static int ov2680_write_reg(struct i2c_client *client, unsigned int len, int ret; if (len == 2) - put_unaligned_be16(val << (8 * (4 - len)), buf + 2); + put_unaligned_be16(val, buf + 2); else if (len == 1) buf[2] = val; else @@ -147,7 +147,7 @@ static int ov2680_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) struct i2c_client *client = v4l2_get_subdevdata(sd); dev_dbg(&client->dev, "++++ov2680_g_bin_factor_x\n"); - *val = ov2680_res[dev->fmt_idx].bin_factor_x; + *val = dev->res->bin_factor_x; return 0; } @@ -157,7 +157,7 @@ static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) struct ov2680_device *dev = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); - *val = ov2680_res[dev->fmt_idx].bin_factor_y; + *val = dev->res->bin_factor_y; dev_dbg(&client->dev, "++++ov2680_g_bin_factor_y\n"); return 0; } @@ -166,11 +166,9 @@ static int ov2680_get_intg_factor(struct i2c_client *client, struct camera_mipi_info *info, const struct ov2680_resolution *res) { - struct v4l2_subdev *sd = i2c_get_clientdata(client); - struct ov2680_device *dev = to_ov2680_sensor(sd); struct atomisp_sensor_mode_data *buf = &info->data; unsigned int pix_clk_freq_hz; - u16 reg_val; + u32 reg_val; int ret; dev_dbg(&client->dev, "++++ov2680_get_intg_factor\n"); @@ -180,7 +178,6 @@ static int ov2680_get_intg_factor(struct i2c_client *client, /* pixel clock */ pix_clk_freq_hz = res->pix_clk_freq * 1000000; - dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; /* get integration time */ @@ -254,7 +251,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, "+++++++__ov2680_set_exposure coarse_itg %d, gain %d, digitgain %d++\n", coarse_itg, gain, digitgain); - vts = ov2680_res[dev->fmt_idx].lines_per_frame; + vts = dev->res->lines_per_frame; /* group hold */ ret = ov2680_write_reg(client, 1, @@ -359,10 +356,17 @@ static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, int gain, int digitgain) { struct ov2680_device *dev = to_ov2680_sensor(sd); - int ret; + int ret = 0; mutex_lock(&dev->input_lock); - ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + + dev->exposure = exposure; + dev->gain = gain; + dev->digitgain = digitgain; + + if (dev->power_on) + ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); return ret; @@ -383,7 +387,6 @@ static long ov2680_s_exposure(struct v4l2_subdev *sd, return -EINVAL; } - // EXPOSURE CONTROL DISABLED FOR INITIAL CHECKIN, TUNING DOESN'T WORK return ov2680_set_exposure(sd, coarse_itg, analog_gain, digital_gain); } @@ -406,56 +409,25 @@ static long ov2680_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) { struct i2c_client *client = v4l2_get_subdevdata(sd); - u16 reg_v, reg_v2; + u32 reg_val; int ret; /* get exposure */ - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_L, - ®_v); + ret = ov2680_read_reg(client, 3, OV2680_EXPOSURE_H, ®_val); if (ret) - goto err; - - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_M, - ®_v2); - if (ret) - goto err; - - reg_v += reg_v2 << 8; - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_H, - ®_v2); - if (ret) - goto err; - - *value = reg_v + (((u32)reg_v2 << 16)); -err: - return ret; -} + return ret; -static u32 ov2680_translate_bayer_order(enum atomisp_bayer_order code) -{ - switch (code) { - case atomisp_bayer_order_rggb: - return MEDIA_BUS_FMT_SRGGB10_1X10; - case atomisp_bayer_order_grbg: - return MEDIA_BUS_FMT_SGRBG10_1X10; - case atomisp_bayer_order_bggr: - return MEDIA_BUS_FMT_SBGGR10_1X10; - case atomisp_bayer_order_gbrg: - return MEDIA_BUS_FMT_SGBRG10_1X10; - } + /* Lower four bits are not part of the exposure val (always 0) */ + *value = reg_val >> 4; return 0; } static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) { - struct ov2680_device *dev = to_ov2680_sensor(sd); struct camera_mipi_info *ov2680_info = NULL; struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - u16 val; + u32 val; u8 index; dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); @@ -476,19 +448,16 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; - dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); } return ret; } static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) { - struct ov2680_device *dev = to_ov2680_sensor(sd); struct camera_mipi_info *ov2680_info = NULL; struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - u16 val; + u32 val; u8 index; dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); @@ -510,8 +479,6 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; - dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); } return ret; } @@ -677,25 +644,6 @@ static int ov2680_init_registers(struct v4l2_subdev *sd) return ret; } -static int ov2680_init(struct v4l2_subdev *sd) -{ - struct ov2680_device *dev = to_ov2680_sensor(sd); - - int ret; - - mutex_lock(&dev->input_lock); - - /* restore settings */ - ov2680_res = ov2680_res_preview; - N_RES = N_RES_PREVIEW; - - ret = ov2680_init_registers(sd); - - mutex_unlock(&dev->input_lock); - - return ret; -} - static int power_ctrl(struct v4l2_subdev *sd, bool flag) { int ret = 0; @@ -760,6 +708,9 @@ static int power_up(struct v4l2_subdev *sd) return -ENODEV; } + if (dev->power_on) + return 0; /* Already on */ + /* power control */ ret = power_ctrl(sd, 1); if (ret) @@ -784,8 +735,19 @@ static int power_up(struct v4l2_subdev *sd) /* according to DS, 20ms is needed between PWDN and i2c access */ msleep(20); + ret = ov2680_init_registers(sd); + if (ret) + goto fail_init_registers; + + ret = __ov2680_set_exposure(sd, dev->exposure, dev->gain, dev->digitgain); + if (ret) + goto fail_init_registers; + + dev->power_on = true; return 0; +fail_init_registers: + dev->platform_data->flisclk_ctrl(sd, 0); fail_clk: gpio_ctrl(sd, 0); fail_power: @@ -809,6 +771,9 @@ static int power_down(struct v4l2_subdev *sd) return -ENODEV; } + if (!dev->power_on) + return 0; /* Already off */ + ret = dev->platform_data->flisclk_ctrl(sd, 0); if (ret) dev_err(&client->dev, "flisclk failed\n"); @@ -823,94 +788,31 @@ static int power_down(struct v4l2_subdev *sd) /* power control */ ret = power_ctrl(sd, 0); - if (ret) + if (ret) { dev_err(&client->dev, "vprog failed.\n"); + return ret; + } - return ret; + dev->power_on = false; + return 0; } static int ov2680_s_power(struct v4l2_subdev *sd, int on) { + struct ov2680_device *dev = to_ov2680_sensor(sd); int ret; + mutex_lock(&dev->input_lock); + if (on == 0) { ret = power_down(sd); } else { ret = power_up(sd); - if (!ret) - return ov2680_init(sd); } - return ret; -} - -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 600 -static int distance(struct ov2680_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct ov2680_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &ov2680_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != ov2680_res[i].width) - continue; - if (h != ov2680_res[i].height) - continue; - - return i; - } + mutex_unlock(&dev->input_lock); - return -1; + return ret; } static int ov2680_set_fmt(struct v4l2_subdev *sd, @@ -921,8 +823,8 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, struct ov2680_device *dev = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *ov2680_info = NULL; - int ret = 0; - int idx = 0; + struct ov2680_resolution *res; + int vts, ret = 0; dev_dbg(&client->dev, "%s: %s: pad: %d, fmt: %p\n", __func__, @@ -940,41 +842,44 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, return -EINVAL; mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = ov2680_res[N_RES - 1].width; - fmt->height = ov2680_res[N_RES - 1].height; - } else { - fmt->width = ov2680_res[idx].width; - fmt->height = ov2680_res[idx].height; - } + + res = v4l2_find_nearest_size(ov2680_res_preview, + ARRAY_SIZE(ov2680_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2680_res_preview[N_RES_PREVIEW - 1]; + + fmt->width = res->width; + fmt->height = res->height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; mutex_unlock(&dev->input_lock); return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - dev_dbg(&client->dev, "%s: Resolution index: %d\n", - __func__, dev->fmt_idx); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev_dbg(&client->dev, "%s: i=%d, w=%d, h=%d\n", - __func__, dev->fmt_idx, fmt->width, fmt->height); - // IS IT NEEDED? + dev_dbg(&client->dev, "%s: %dx%d\n", + __func__, fmt->width, fmt->height); + + /* s_power has not been called yet for std v4l2 clients (camorama) */ power_up(sd); - ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); + ret = ov2680_write_reg_array(client, dev->res->regs); if (ret) dev_err(&client->dev, "ov2680 write resolution register err: %d\n", ret); - ret = ov2680_get_intg_factor(client, ov2680_info, - &ov2680_res[dev->fmt_idx]); + vts = dev->res->lines_per_frame; + + /* If necessary increase the VTS to match exposure + MARGIN */ + if (dev->exposure > vts - OV2680_INTEGRATION_TIME_MARGIN) + vts = dev->exposure + OV2680_INTEGRATION_TIME_MARGIN; + + ret = ov2680_write_reg(client, 2, OV2680_TIMING_VTS_H, vts); + if (ret) + dev_err(&client->dev, "ov2680 write vts err: %d\n", ret); + + ret = ov2680_get_intg_factor(client, ov2680_info, res); if (ret) { dev_err(&client->dev, "failed to get integration factor\n"); goto err; @@ -989,8 +894,6 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, if (v_flag) ov2680_v_flip(sd, v_flag); - v4l2_info(client, "\n%s idx %d\n", __func__, dev->fmt_idx); - /* * ret = startup(sd); * if (ret) @@ -1014,8 +917,8 @@ static int ov2680_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = ov2680_res[dev->fmt_idx].width; - fmt->height = ov2680_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; return 0; @@ -1024,7 +927,7 @@ static int ov2680_get_fmt(struct v4l2_subdev *sd, static int ov2680_detect(struct i2c_client *client) { struct i2c_adapter *adapter = client->adapter; - u16 high, low; + u32 high, low; int ret; u16 id; u8 revision; @@ -1072,11 +975,6 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) ret = ov2680_write_reg(client, 1, OV2680_SW_STREAM, enable ? OV2680_START_STREAMING : OV2680_STOP_STREAMING); -#if 0 - /* restore settings */ - ov2680_res = ov2680_res_preview; - N_RES = N_RES_PREVIEW; -#endif //otp valid at stream on state //if(!dev->otp_data) @@ -1101,16 +999,6 @@ static int ov2680_s_config(struct v4l2_subdev *sd, (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); - /* - * power off the module, then power on it in future - * as first power on by board may not fulfill the - * power on sequqence needed by the module - */ - ret = power_down(sd); - if (ret) { - dev_err(&client->dev, "ov2680 power-off err.\n"); - goto fail_power_off; - } ret = power_up(sd); if (ret) { @@ -1144,7 +1032,6 @@ fail_csi_cfg: fail_power_on: power_down(sd); dev_err(&client->dev, "sensor power-gating failed\n"); -fail_power_off: mutex_unlock(&dev->input_lock); return ret; } @@ -1155,7 +1042,7 @@ static int ov2680_g_frame_interval(struct v4l2_subdev *sd, struct ov2680_device *dev = to_ov2680_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = ov2680_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1177,13 +1064,33 @@ static int ov2680_enum_frame_size(struct v4l2_subdev *sd, { int index = fse->index; - if (index >= N_RES) + if (index >= N_RES_PREVIEW) return -EINVAL; - fse->min_width = ov2680_res[index].width; - fse->min_height = ov2680_res[index].height; - fse->max_width = ov2680_res[index].width; - fse->max_height = ov2680_res[index].height; + fse->min_width = ov2680_res_preview[index].width; + fse->min_height = ov2680_res_preview[index].height; + fse->max_width = ov2680_res_preview[index].width; + fse->max_height = ov2680_res_preview[index].height; + + return 0; +} + +static int ov2680_enum_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct v4l2_fract fract; + + if (fie->index >= N_RES_PREVIEW || + fie->width > ov2680_res_preview[0].width || + fie->height > ov2680_res_preview[0].height || + fie->which > V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + fract.denominator = ov2680_res_preview[fie->index].fps; + fract.numerator = 1; + + fie->interval = fract; return 0; } @@ -1193,7 +1100,7 @@ static int ov2680_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct ov2680_device *dev = to_ov2680_sensor(sd); mutex_lock(&dev->input_lock); - *frames = ov2680_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1216,6 +1123,7 @@ static const struct v4l2_subdev_core_ops ov2680_core_ops = { static const struct v4l2_subdev_pad_ops ov2680_pad_ops = { .enum_mbus_code = ov2680_enum_mbus_code, .enum_frame_size = ov2680_enum_frame_size, + .enum_frame_interval = ov2680_enum_frame_interval, .get_fmt = ov2680_get_fmt, .set_fmt = ov2680_set_fmt, }; @@ -1257,7 +1165,9 @@ static int ov2680_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &ov2680_res_preview[0]; + dev->exposure = dev->res->lines_per_frame - OV2680_INTEGRATION_TIME_MARGIN; + dev->gain = 250; /* 0-2047 */ v4l2_i2c_subdev_init(&dev->sd, client, &ov2680_ops); pdata = gmin_camera_platform_data(&dev->sd, @@ -1278,7 +1188,6 @@ static int ov2680_probe(struct i2c_client *client) dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; dev->pad.flags = MEDIA_PAD_FL_SOURCE; - dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; ret = v4l2_ctrl_handler_init(&dev->ctrl_handler, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index 90d0871a78a3..da98094d7094 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -557,7 +557,7 @@ static int ov2722_g_volatile_ctrl(struct v4l2_ctrl *ctrl) ret = ov2722_g_fnumber_range(&dev->sd, &ctrl->val); break; case V4L2_CID_LINK_FREQ: - val = ov2722_res[dev->fmt_idx].mipi_freq; + val = dev->res->mipi_freq; if (val == 0) return -EINVAL; @@ -782,76 +782,6 @@ static int ov2722_s_power(struct v4l2_subdev *sd, int on) return ret; } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct ov2722_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct ov2722_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &ov2722_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != ov2722_res[i].width) - continue; - if (h != ov2722_res[i].height) - continue; - - return i; - } - - return -1; -} - /* TODO: remove it. */ static int startup(struct v4l2_subdev *sd) { @@ -866,7 +796,7 @@ static int startup(struct v4l2_subdev *sd) return ret; } - ret = ov2722_write_reg_array(client, ov2722_res[dev->fmt_idx].regs); + ret = ov2722_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "ov2722 write register err.\n"); return ret; @@ -882,9 +812,9 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt = &format->format; struct ov2722_device *dev = to_ov2722_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2722_resolution *res; struct camera_mipi_info *ov2722_info = NULL; int ret = 0; - int idx; if (format->pad) return -EINVAL; @@ -895,15 +825,16 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, return -EINVAL; mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = ov2722_res[N_RES - 1].width; - fmt->height = ov2722_res[N_RES - 1].height; - } else { - fmt->width = ov2722_res[idx].width; - fmt->height = ov2722_res[idx].height; - } + res = v4l2_find_nearest_size(ov2722_res_preview, + ARRAY_SIZE(ov2722_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2722_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; @@ -911,15 +842,9 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev->pixels_per_line = ov2722_res[dev->fmt_idx].pixels_per_line; - dev->lines_per_frame = ov2722_res[dev->fmt_idx].lines_per_frame; + dev->pixels_per_line = dev->res->pixels_per_line; + dev->lines_per_frame = dev->res->lines_per_frame; ret = startup(sd); if (ret) { @@ -950,8 +875,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, } } - ret = ov2722_get_intg_factor(client, ov2722_info, - &ov2722_res[dev->fmt_idx]); + ret = ov2722_get_intg_factor(client, ov2722_info, dev->res); if (ret) dev_err(&client->dev, "failed to get integration_factor\n"); @@ -972,8 +896,8 @@ static int ov2722_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = ov2722_res[dev->fmt_idx].width; - fmt->height = ov2722_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; return 0; @@ -1098,7 +1022,7 @@ static int ov2722_g_frame_interval(struct v4l2_subdev *sd, struct ov2722_device *dev = to_ov2722_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = ov2722_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1136,7 +1060,7 @@ static int ov2722_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct ov2722_device *dev = to_ov2722_sensor(sd); mutex_lock(&dev->input_lock); - *frames = ov2722_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1220,7 +1144,7 @@ static int ov2722_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &ov2722_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &ov2722_ops); ovpdev = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h index 2fe3de115083..db643ebc3909 100644 --- a/drivers/staging/media/atomisp/i2c/gc0310.h +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -150,8 +150,7 @@ struct gc0310_device { struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; - u8 res; + struct gc0310_resolution *res; u8 type; }; diff --git a/drivers/staging/media/atomisp/i2c/gc2235.h b/drivers/staging/media/atomisp/i2c/gc2235.h index ba5db1230033..806be5dff7a5 100644 --- a/drivers/staging/media/atomisp/i2c/gc2235.h +++ b/drivers/staging/media/atomisp/i2c/gc2235.h @@ -158,11 +158,10 @@ struct gc2235_device { struct v4l2_mbus_framefmt format; struct mutex input_lock; struct v4l2_ctrl_handler ctrl_handler; + struct gc2235_resolution *res; struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; - u8 res; u8 type; }; diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index 874115f35fca..4e351196fe34 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -141,7 +141,6 @@ struct regval_list { }; struct ov2680_resolution { - u8 *desc; const struct ov2680_reg *regs; int res; int width; @@ -154,7 +153,6 @@ struct ov2680_resolution { u8 bin_factor_x; u8 bin_factor_y; u8 bin_mode; - bool used; }; struct ov2680_format { @@ -169,15 +167,14 @@ struct ov2680_format { struct ov2680_device { struct v4l2_subdev sd; struct media_pad pad; - struct v4l2_mbus_framefmt format; struct mutex input_lock; struct v4l2_ctrl_handler ctrl_handler; + struct ov2680_resolution *res; struct camera_sensor_platform_data *platform_data; - int vt_pix_clk_freq_mhz; - int fmt_idx; - int run_mode; - u8 res; - u8 type; + bool power_on; + u16 exposure; + u16 gain; + u16 digitgain; }; /** @@ -283,14 +280,11 @@ static struct ov2680_reg const ov2680_global_setting[] = { {} }; -#if 0 /* None of the definitions below are used currently */ /* * 176x144 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QCIF_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -305,8 +299,6 @@ static struct ov2680_reg const ov2680_QCIF_30fps[] = { {0x380b, 0xa0}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -334,8 +326,6 @@ static struct ov2680_reg const ov2680_QCIF_30fps[] = { */ static struct ov2680_reg const ov2680_CIF_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -350,8 +340,6 @@ static struct ov2680_reg const ov2680_CIF_30fps[] = { {0x380b, 0x30}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -377,8 +365,6 @@ static struct ov2680_reg const ov2680_CIF_30fps[] = { */ static struct ov2680_reg const ov2680_QVGA_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -393,8 +379,6 @@ static struct ov2680_reg const ov2680_QVGA_30fps[] = { {0x380b, 0x00}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -420,8 +404,6 @@ static struct ov2680_reg const ov2680_QVGA_30fps[] = { */ static struct ov2680_reg const ov2680_656x496_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -436,8 +418,6 @@ static struct ov2680_reg const ov2680_656x496_30fps[] = { {0x380b, 0xf0}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -459,12 +439,10 @@ static struct ov2680_reg const ov2680_656x496_30fps[] = { }; /* - * 800x600 30fps VBlanking 1lane 10Bit (binning) + * 720x592 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_720x592_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x26}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0x00}, // X_ADDR_START; {0x3802, 0x00}, @@ -479,8 +457,6 @@ static struct ov2680_reg const ov2680_720x592_30fps[] = { {0x380b, 0x50}, // Y_OUTPUT_SIZE; {0x380c, 0x06}, {0x380d, 0xac}, // HTS; - {0x380e, 0x02}, - {0x380f, 0x84}, // VTS; {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -508,8 +484,6 @@ static struct ov2680_reg const ov2680_720x592_30fps[] = { */ static struct ov2680_reg const ov2680_800x600_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x26}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -524,8 +498,6 @@ static struct ov2680_reg const ov2680_800x600_30fps[] = { {0x380b, 0x58}, {0x380c, 0x06}, {0x380d, 0xac}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -551,8 +523,6 @@ static struct ov2680_reg const ov2680_800x600_30fps[] = { */ static struct ov2680_reg const ov2680_720p_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -567,8 +537,6 @@ static struct ov2680_reg const ov2680_720p_30fps[] = { {0x380b, 0xe0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -594,8 +562,6 @@ static struct ov2680_reg const ov2680_720p_30fps[] = { */ static struct ov2680_reg const ov2680_1296x976_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -610,8 +576,6 @@ static struct ov2680_reg const ov2680_1296x976_30fps[] = { {0x380b, 0xd0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -637,8 +601,6 @@ static struct ov2680_reg const ov2680_1296x976_30fps[] = { */ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x90}, {0x3802, 0x00}, @@ -653,8 +615,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { {0x380b, 0x48}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -674,7 +634,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { // {0x5090, 0x0c}, {} }; -#endif /* *1616x916 30fps VBlanking 1lane 10bit @@ -682,8 +641,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { static struct ov2680_reg const ov2680_1616x916_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -698,8 +655,6 @@ static struct ov2680_reg const ov2680_1616x916_30fps[] = { {0x380b, 0x94}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -721,13 +676,10 @@ static struct ov2680_reg const ov2680_1616x916_30fps[] = { }; /* - * 1612x1212 30fps VBlanking 1lane 10Bit + * 1616x1082 30fps VBlanking 1lane 10Bit */ -#if 0 static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -742,8 +694,6 @@ static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x380b, 0x3a}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -763,14 +713,12 @@ static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x5081, 0x41}, {} }; -#endif + /* * 1616x1216 30fps VBlanking 1lane 10Bit */ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -785,8 +733,6 @@ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { {0x380b, 0xc0},//c0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -809,12 +755,10 @@ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { static struct ov2680_resolution ov2680_res_preview[] = { { - .desc = "ov2680_1616x1216_30fps", .width = 1616, .height = 1216, .pix_clk_freq = 66, .fps = 30, - .used = 0, .pixels_per_line = 1698,//1704, .lines_per_frame = 1294, .bin_factor_x = 0, @@ -824,12 +768,23 @@ static struct ov2680_resolution ov2680_res_preview[] = { .regs = ov2680_1616x1216_30fps, }, { - .desc = "ov2680_1616x916_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 66, + .fps = 30, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x1082_30fps, + }, + { .width = 1616, .height = 916, .fps = 30, .pix_clk_freq = 66, - .used = 0, .pixels_per_line = 1698,//1704, .lines_per_frame = 1294, .bin_factor_x = 0, @@ -838,11 +793,125 @@ static struct ov2680_resolution ov2680_res_preview[] = { .skip_frames = 3, .regs = ov2680_1616x916_30fps, }, + { + .width = 1456, + .height = 1096, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1456x1096_30fps, + }, + { + .width = 1296, + .height = 976, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1296x976_30fps, + }, + { + .width = 1280, + .height = 720, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720p_30fps, + }, + { + .width = 800, + .height = 600, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_800x600_30fps, + }, + { + .width = 720, + .height = 592, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720x592_30fps, + }, + { + .width = 656, + .height = 496, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_656x496_30fps, + }, + { + .width = 336, + .height = 256, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QVGA_30fps, + }, + { + .width = 352, + .height = 288, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_CIF_30fps, + }, + { + .width = 176, + .height = 144, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QCIF_30fps, + }, }; #define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview)) -static struct ov2680_resolution *ov2680_res = ov2680_res_preview; -static unsigned long N_RES = N_RES_PREVIEW; - #endif diff --git a/drivers/staging/media/atomisp/i2c/ov2722.h b/drivers/staging/media/atomisp/i2c/ov2722.h index 7b0debb6c53d..d6e2510bc01c 100644 --- a/drivers/staging/media/atomisp/i2c/ov2722.h +++ b/drivers/staging/media/atomisp/i2c/ov2722.h @@ -201,14 +201,13 @@ struct ov2722_device { struct media_pad pad; struct v4l2_mbus_framefmt format; struct mutex input_lock; + struct ov2722_resolution *res; struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; int run_mode; u16 pixels_per_line; u16 lines_per_frame; - u8 res; u8 type; struct v4l2_ctrl_handler ctrl_handler; diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp_cmd.c index 366161cff560..97d5a528969b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.c @@ -857,7 +857,8 @@ static struct atomisp_video_pipe *__atomisp_get_pipe( } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { /* For online video or SDV video pipe. */ if (css_pipe_id == IA_CSS_PIPE_ID_VIDEO || - css_pipe_id == IA_CSS_PIPE_ID_COPY) { + css_pipe_id == IA_CSS_PIPE_ID_COPY || + css_pipe_id == IA_CSS_PIPE_ID_YUVPP) { if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) return &asd->video_out_video_capture; return &asd->video_out_preview; @@ -865,7 +866,8 @@ static struct atomisp_video_pipe *__atomisp_get_pipe( } else if (asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { /* For online preview or ZSL preview pipe. */ if (css_pipe_id == IA_CSS_PIPE_ID_PREVIEW || - css_pipe_id == IA_CSS_PIPE_ID_COPY) + css_pipe_id == IA_CSS_PIPE_ID_COPY || + css_pipe_id == IA_CSS_PIPE_ID_YUVPP) return &asd->video_out_preview; } /* For capture pipe. */ @@ -1046,13 +1048,8 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, asd->pending_capture_request--; - if (IS_ISP2401) - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", err); - } else if (IS_ISP2401) { - asd->re_trigger_capture = true; } break; case IA_CSS_BUFFER_TYPE_OUTPUT_FRAME: @@ -1474,7 +1471,7 @@ void atomisp_wdt_work(struct work_struct *work) wdt_work); int i; unsigned int pipe_wdt_cnt[MAX_STREAM_NUM][4] = { {0} }; - bool css_recover = false; + bool css_recover = true; rt_mutex_lock(&isp->mutex); if (!atomisp_streaming_count(isp)) { @@ -1487,12 +1484,7 @@ void atomisp_wdt_work(struct work_struct *work) dev_err(isp->dev, "timeout %d of %d\n", atomic_read(&isp->wdt_count) + 1, ATOMISP_ISP_MAX_TIMEOUT_COUNT); - - if (atomic_inc_return(&isp->wdt_count) < ATOMISP_ISP_MAX_TIMEOUT_COUNT) - css_recover = true; } else { - css_recover = true; - for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; @@ -1715,6 +1707,12 @@ void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, { unsigned long next; + if (!pipe->asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (delay != ATOMISP_WDT_KEEP_CURRENT_DELAY) pipe->wdt_duration = delay; @@ -1777,6 +1775,12 @@ void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) /* ISP2401 */ void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync) { + if (!pipe->asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (!atomisp_is_wdt_running(pipe)) return; @@ -1869,7 +1873,7 @@ irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr) /* * The standard CSS2.0 API tells the following calling sequence of * dequeue ready buffers: - * while (ia_css_dequeue_event(...)) { + * while (ia_css_dequeue_psys_event(...)) { * switch (event.type) { * ... * ia_css_pipe_dequeue_buffer() @@ -1920,22 +1924,6 @@ out: } /* - * utils for buffer allocation/free - */ - -int atomisp_get_frame_pgnr(struct atomisp_device *isp, - const struct ia_css_frame *frame, u32 *p_pgnr) -{ - if (!frame) { - dev_err(isp->dev, "%s: NULL frame pointer ERROR.\n", __func__); - return -EINVAL; - } - - *p_pgnr = DIV_ROUND_UP(frame->data_bytes, PAGE_SIZE); - return 0; -} - -/* * Get internal fmt according to V4L2 fmt */ static enum ia_css_frame_format @@ -1968,9 +1956,11 @@ v4l2_fmt_to_sh_fmt(u32 fmt) return IA_CSS_FRAME_FORMAT_RGBA888; case V4L2_PIX_FMT_RGB565: return IA_CSS_FRAME_FORMAT_RGB565; +#if 0 case V4L2_PIX_FMT_JPEG: case V4L2_PIX_FMT_CUSTOM_M10MO_RAW: return IA_CSS_FRAME_FORMAT_BINARY_8; +#endif case V4L2_PIX_FMT_SBGGR16: case V4L2_PIX_FMT_SBGGR10: case V4L2_PIX_FMT_SGBRG10: @@ -2022,7 +2012,7 @@ static int raw_output_format_match_input(u32 input, u32 output) return -EINVAL; } -static u32 get_pixel_depth(u32 pixelformat) +u32 atomisp_get_pixel_depth(u32 pixelformat) { switch (pixelformat) { case V4L2_PIX_FMT_YUV420: @@ -3619,18 +3609,10 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (!IS_ISP2401) { - if (st->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); - return -EINVAL; - } - } else { - if (st->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); - return -EINVAL; - } + if (st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); + return -EINVAL; } shading_table = atomisp_css_shading_table_alloc(st->width, st->height); @@ -4109,6 +4091,12 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) unsigned long irqflags; bool need_to_enqueue_buffer = false; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (atomisp_is_vf_pipe(pipe)) return; @@ -4196,6 +4184,12 @@ int atomisp_set_parameters(struct video_device *vdev, struct atomisp_css_params *css_param = &asd->params.css_param; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { dev_err(asd->isp->dev, "%s: internal error!\n", __func__); return -EINVAL; @@ -4792,15 +4786,6 @@ int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, return 0; } -int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f) -{ - struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); - - f->fmt.pix = pipe->pix; - - return 0; -} - static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, u16 stream_index, struct atomisp_input_stream_info *stream_info) { @@ -4857,6 +4842,12 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_pix_format *f, int source_pad = atomisp_subdev_source_pad(vdev); int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!isp->inputs[asd->input_curr].camera) return -EINVAL; @@ -4943,7 +4934,7 @@ atomisp_try_fmt_file(struct atomisp_device *isp, struct v4l2_format *f) return -EINVAL; } - depth = get_pixel_depth(pixelformat); + depth = atomisp_get_pixel_depth(pixelformat); if (field == V4L2_FIELD_ANY) { field = V4L2_FIELD_NONE; @@ -5133,11 +5124,11 @@ static int css_input_resolution_changed(struct atomisp_sub_device *asd, dev_dbg(asd->isp->dev, "css_input_resolution_changed to %ux%u\n", ffmt->width, ffmt->height); -#if defined(ISP2401_NEW_INPUT_SYSTEM) - atomisp_css_input_set_two_pixels_per_clock(asd, false); -#else - atomisp_css_input_set_two_pixels_per_clock(asd, true); -#endif + if (IS_ISP2401) + atomisp_css_input_set_two_pixels_per_clock(asd, false); + else + atomisp_css_input_set_two_pixels_per_clock(asd, true); + if (asd->continuous_mode->val) { /* Note for all checks: ffmt includes pad_w+pad_h */ if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO || @@ -5194,10 +5185,17 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, int (*configure_pp_input)(struct atomisp_sub_device *asd, unsigned int width, unsigned int height) = configure_pp_input_nop; - u16 stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_index; const struct atomisp_in_fmt_conv *fc; int ret, i; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + v4l2_fh_init(&fh.vfh, vdev); isp_sink_crop = atomisp_subdev_get_rect( @@ -5417,9 +5415,9 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, else ret = get_frame_info(asd, output_info); if (ret) { - dev_err(isp->dev, "get_frame_info %ux%u (padded to %u)\n", - pix->width, pix->height, pix->bytesperline); - return -EINVAL; + dev_err(isp->dev, "__get_frame_info %ux%u (padded to %u) returned %d\n", + pix->width, pix->height, pix->bytesperline, ret); + return ret; } atomisp_update_grid_info(asd, pipe_id, source_pad); @@ -5465,9 +5463,14 @@ static void atomisp_get_dis_envelop(struct atomisp_sub_device *asd, static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, int source_pad, struct v4l2_pix_format *f) { -#if defined(ISP2401_NEW_INPUT_SYSTEM) struct v4l2_mbus_framefmt *sink, *src; + if (!IS_ISP2401) { + /* Only used for the new input system */ + asd->copy_mode = false; + return; + } + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); src = atomisp_subdev_get_ffmt(&asd->subdev, NULL, @@ -5481,8 +5484,6 @@ static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, sensor[asd->sensor_curr].stream_num > 1))) asd->copy_mode = true; else -#endif - /* Only used for the new input system */ asd->copy_mode = false; dev_dbg(asd->isp->dev, "copy_mode: %d\n", asd->copy_mode); @@ -5493,7 +5494,8 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, unsigned int padding_w, unsigned int padding_h, unsigned int dvs_env_w, unsigned int dvs_env_h) { - struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; const struct atomisp_format_bridge *format; struct v4l2_subdev_pad_config pad_cfg; struct v4l2_subdev_state pad_state = { @@ -5504,7 +5506,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, }; struct v4l2_mbus_framefmt *ffmt = &vformat.format; struct v4l2_mbus_framefmt *req_ffmt; - struct atomisp_device *isp = asd->isp; + struct atomisp_device *isp; struct atomisp_input_stream_info *stream_info = (struct atomisp_input_stream_info *)ffmt->reserved; u16 stream_index = ATOMISP_INPUT_STREAM_GENERAL; @@ -5512,6 +5514,14 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + + isp = asd->isp; + v4l2_fh_init(&fh.vfh, vdev); stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); @@ -5540,6 +5550,10 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, pad, set_fmt, &pad_state, &vformat); if (ret) return ret; + + dev_dbg(isp->dev, "video dis: sensor width: %d, height: %d\n", + ffmt->width, ffmt->height); + if (ffmt->width < req_ffmt->width || ffmt->height < req_ffmt->height) { req_ffmt->height -= dvs_env_h; @@ -5550,8 +5564,6 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, asd->params.video_dis_en = false; } } - dev_dbg(isp->dev, "sensor width: %d, height: %d\n", - ffmt->width, ffmt->height); vformat.which = V4L2_SUBDEV_FORMAT_ACTIVE; ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, set_fmt, NULL, &vformat); @@ -5590,18 +5602,28 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) const struct atomisp_format_bridge *format_bridge; const struct atomisp_format_bridge *snr_format_bridge; struct ia_css_frame_info output_info, raw_output_info; - struct v4l2_pix_format snr_fmt = f->fmt.pix; - struct v4l2_pix_format backup_fmt = snr_fmt, s_fmt; + struct v4l2_pix_format snr_fmt; + struct v4l2_pix_format backup_fmt, s_fmt; unsigned int dvs_env_w = 0, dvs_env_h = 0; unsigned int padding_w = pad_w, padding_h = pad_h; bool res_overflow = false, crop_needs_override = false; struct v4l2_mbus_framefmt *isp_sink_fmt; struct v4l2_mbus_framefmt isp_source_fmt = {0}; + struct v4l2_subdev_format vformat = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + struct v4l2_mbus_framefmt *ffmt = &vformat.format; struct v4l2_rect isp_sink_crop; u16 source_pad = atomisp_subdev_source_pad(vdev); struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (source_pad >= ATOMISP_SUBDEV_PADS_NUM) return -EINVAL; @@ -5621,9 +5643,38 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (!format_bridge) return -EINVAL; + /* Currently, raw formats are broken!!! */ + + if (format_bridge->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) { + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + } pipe->sh_fmt = format_bridge->sh_fmt; pipe->pix.pixelformat = f->fmt.pix.pixelformat; + /* Ensure that the resolution is equal or below the maximum supported */ + + vformat.which = V4L2_SUBDEV_FORMAT_ACTIVE; + v4l2_fill_mbus_format(ffmt, &f->fmt.pix, format_bridge->mbus_code); + ffmt->height += padding_h; + ffmt->width += padding_w; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, + set_fmt, NULL, &vformat); + if (ret) + return ret; + + f->fmt.pix.width = ffmt->width - padding_w; + f->fmt.pix.height = ffmt->height - padding_h; + + snr_fmt = f->fmt.pix; + backup_fmt = snr_fmt; + + /**********************************************************************/ + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VF || (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO)) { @@ -5945,7 +5996,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) * which appears to be related by a hardware * performance limitation. It's unclear why this * particular code triggers the issue. */ - if (!IS_ISP2401 || crop_needs_override) { + if (crop_needs_override) { if (isp_sink_crop.width * main_compose.height > isp_sink_crop.height * main_compose.width) { sink_crop.height = isp_sink_crop.height; @@ -5987,6 +6038,14 @@ done: pipe->pix.width = f->fmt.pix.width; pipe->pix.height = f->fmt.pix.height; pipe->pix.pixelformat = f->fmt.pix.pixelformat; + /* + * FIXME: do we need to setup this differently, depending on the + * sensor or the pipeline? + */ + pipe->pix.colorspace = V4L2_COLORSPACE_REC709; + pipe->pix.ycbcr_enc = V4L2_YCBCR_ENC_709; + pipe->pix.xfer_func = V4L2_XFER_FUNC_709; + if (format_bridge->planar) { pipe->pix.bytesperline = output_info.padded_width; pipe->pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * @@ -6021,6 +6080,15 @@ done: else isp->need_gfx_throttle = true; + /* Report the needed sizes */ + f->fmt.pix.sizeimage = pipe->pix.sizeimage; + f->fmt.pix.bytesperline = pipe->pix.bytesperline; + + dev_dbg(isp->dev, "%s: %dx%d, image size: %d, %d bytes per line\n", + __func__, + f->fmt.pix.width, f->fmt.pix.height, + f->fmt.pix.sizeimage, f->fmt.pix.bytesperline); + return 0; } @@ -6034,6 +6102,12 @@ int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + v4l2_fh_init(&fh.vfh, vdev); dev_dbg(isp->dev, "setting fmt %ux%u 0x%x for file inject\n", @@ -6092,15 +6166,9 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (!IS_ISP2401) { - if (user_shading_table->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - user_shading_table->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) - return -EINVAL; - } else { - if (user_shading_table->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - user_shading_table->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) - return -EINVAL; - } + if (user_shading_table->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + user_shading_table->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) + return -EINVAL; shading_table = atomisp_css_shading_table_alloc( user_shading_table->width, user_shading_table->height); @@ -6359,6 +6427,12 @@ bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe) { struct atomisp_sub_device *asd = pipe->asd; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return false; + } + if (pipe == &asd->video_out_vf) return true; @@ -6572,6 +6646,12 @@ static int atomisp_get_pipe_id(struct atomisp_video_pipe *pipe) { struct atomisp_sub_device *asd = pipe->asd; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return -EINVAL; + } + if (ATOMISP_USE_YUVPP(asd)) { return IA_CSS_PIPE_ID_YUVPP; } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { @@ -6609,6 +6689,12 @@ int atomisp_get_invalid_frame_num(struct video_device *vdev, struct ia_css_pipe_info p_info; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (asd->isp->inputs[asd->input_curr].camera_caps-> sensor[asd->sensor_curr].stream_num > 1) { /* External ISP */ diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp_cmd.h index e8bdd264d31b..ebc729468f87 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.h +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.h @@ -74,8 +74,6 @@ irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr); const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus( u32 mbus_code); bool atomisp_is_mbuscode_raw(uint32_t code); -int atomisp_get_frame_pgnr(struct atomisp_device *isp, - const struct ia_css_frame *frame, u32 *p_pgnr); void atomisp_delayed_init_work(struct work_struct *work); /* Get internal fmt according to V4L2 fmt */ @@ -266,8 +264,6 @@ int atomisp_compare_grid(struct atomisp_sub_device *asd, int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, struct atomisp_sensor_mode_data *config); -int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f); - /* This function looks up the closest available resolution. */ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_pix_format *f, bool *res_overflow); @@ -341,6 +337,8 @@ enum atomisp_metadata_type atomisp_get_metadata_type(struct atomisp_sub_device *asd, enum ia_css_pipe_id pipe_id); +u32 atomisp_get_pixel_depth(u32 pixelformat); + /* Function for HAL to inject a fake event to wake up poll thread */ int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event); diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp_compat.h index c16eaf3d126f..64c1bf0943e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat.h +++ b/drivers/staging/media/atomisp/pci/atomisp_compat.h @@ -133,8 +133,6 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, struct atomisp_css_buffer *isp_css_buffer, struct ia_css_isp_dvs_statistics_map *dvs_map); -int atomisp_css_dequeue_event(struct atomisp_css_event *current_event); - void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, struct atomisp_css_event *current_event); diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c index 99a632f33d2d..1173be0e72b0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c @@ -611,15 +611,6 @@ static void __apply_additional_pipe_config( if (stream_env->pipe_configs[pipe_id]. default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW) stream_env->pipe_configs[pipe_id].enable_dz = false; - - if (IS_ISP2401) { - /* the isp default to use ISP2.2 and the camera hal will - * control whether use isp2.7 */ - if (asd->select_isp_version->val == ATOMISP_CSS_ISP_PIPE_VERSION_2_7) - stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_7; - else - stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_2; - } break; case IA_CSS_PIPE_ID_VIDEO: /* enable reduced pipe to have binary @@ -972,7 +963,7 @@ int atomisp_css_irq_translate(struct atomisp_device *isp, void atomisp_css_rx_get_irq_info(enum mipi_port_id port, unsigned int *infos) { -#ifndef ISP2401_NEW_INPUT_SYSTEM +#ifndef IS_ISP2401 ia_css_isys_rx_get_irq_info(port, infos); #else *infos = 0; @@ -982,7 +973,7 @@ void atomisp_css_rx_get_irq_info(enum mipi_port_id port, void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, unsigned int infos) { -#ifndef ISP2401_NEW_INPUT_SYSTEM +#ifndef IS_ISP2401 ia_css_isys_rx_clear_irq_info(port, infos); #endif } @@ -1633,14 +1624,6 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, } } -int atomisp_css_dequeue_event(struct atomisp_css_event *current_event) -{ - if (ia_css_dequeue_event(¤t_event->event)) - return -EINVAL; - - return 0; -} - void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, struct atomisp_css_event *current_event) { @@ -2657,41 +2640,50 @@ static int __get_frame_info(struct atomisp_sub_device *asd, if (__destroy_pipes(asd, true)) dev_warn(isp->dev, "destroy pipe failed.\n"); - if (__create_pipes(asd)) + if (__create_pipes(asd)) { + dev_err(isp->dev, "can't create pipes\n"); return -EINVAL; + } - if (__create_streams(asd)) + if (__create_streams(asd)) { + dev_err(isp->dev, "can't create streams\n"); goto stream_err; + } - ret = ia_css_pipe_get_info( - asd->stream_env[stream_index] - .pipes[pipe_id], &p_info); - if (!ret) { - switch (type) { - case ATOMISP_CSS_VF_FRAME: - *info = p_info.vf_output_info[0]; - dev_dbg(isp->dev, "getting vf frame info.\n"); - break; - case ATOMISP_CSS_SECOND_VF_FRAME: - *info = p_info.vf_output_info[1]; - dev_dbg(isp->dev, "getting second vf frame info.\n"); - break; - case ATOMISP_CSS_OUTPUT_FRAME: - *info = p_info.output_info[0]; - dev_dbg(isp->dev, "getting main frame info.\n"); - break; - case ATOMISP_CSS_SECOND_OUTPUT_FRAME: - *info = p_info.output_info[1]; - dev_dbg(isp->dev, "getting second main frame info.\n"); - break; - case ATOMISP_CSS_RAW_FRAME: - *info = p_info.raw_output_info; - dev_dbg(isp->dev, "getting raw frame info.\n"); - } - dev_dbg(isp->dev, "get frame info: w=%d, h=%d, num_invalid_frames %d.\n", - info->res.width, info->res.height, p_info.num_invalid_frames); - return 0; + ret = ia_css_pipe_get_info(asd->stream_env[stream_index].pipes[pipe_id], + &p_info); + if (ret) { + dev_err(isp->dev, "can't get info from pipe\n"); + goto stream_err; + } + + switch (type) { + case ATOMISP_CSS_VF_FRAME: + *info = p_info.vf_output_info[0]; + dev_dbg(isp->dev, "getting vf frame info.\n"); + break; + case ATOMISP_CSS_SECOND_VF_FRAME: + *info = p_info.vf_output_info[1]; + dev_dbg(isp->dev, "getting second vf frame info.\n"); + break; + case ATOMISP_CSS_OUTPUT_FRAME: + *info = p_info.output_info[0]; + dev_dbg(isp->dev, "getting main frame info.\n"); + break; + case ATOMISP_CSS_SECOND_OUTPUT_FRAME: + *info = p_info.output_info[1]; + dev_dbg(isp->dev, "getting second main frame info.\n"); + break; + default: + case ATOMISP_CSS_RAW_FRAME: + *info = p_info.raw_output_info; + dev_dbg(isp->dev, "getting raw frame info.\n"); + break; } + dev_dbg(isp->dev, "get frame info: w=%d, h=%d, num_invalid_frames %d.\n", + info->res.width, info->res.height, p_info.num_invalid_frames); + + return 0; stream_err: __destroy_pipes(asd, true); @@ -4111,7 +4103,7 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, bool reset_wdt_timer[MAX_STREAM_NUM] = {false}; int i; - while (!atomisp_css_dequeue_event(¤t_event)) { + while (!ia_css_dequeue_psys_event(¤t_event.event)) { if (current_event.event.type == IA_CSS_EVENT_TYPE_FW_ASSERT) { /* diff --git a/drivers/staging/media/atomisp/pci/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp_fops.c index f82bf082aa79..be6a74d5ac19 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp_fops.c @@ -464,13 +464,11 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) css_capture_pipe_id = IA_CSS_PIPE_ID_CAPTURE; } -#ifdef ISP2401_NEW_INPUT_SYSTEM - if (asd->copy_mode) { + if (IS_ISP2401 && asd->copy_mode) { css_capture_pipe_id = IA_CSS_PIPE_ID_COPY; css_preview_pipe_id = IA_CSS_PIPE_ID_COPY; css_video_pipe_id = IA_CSS_PIPE_ID_COPY; } -#endif if (asd->yuvpp_mode) { capture_pipe = &asd->video_out_capture; @@ -772,6 +770,30 @@ static int atomisp_open(struct file *file) dev_dbg(isp->dev, "open device %s\n", vdev->name); + /* + * Ensure that if we are still loading we block. Once the loading + * is over we can proceed. We can't blindly hold the lock until + * that occurs as if the load fails we'll deadlock the unload + */ + rt_mutex_lock(&isp->loading); + /* + * FIXME: revisit this with a better check once the code structure + * is cleaned up a bit more + */ + ret = v4l2_fh_open(file); + if (ret) { + dev_err(isp->dev, + "%s: v4l2_fh_open() returned error %d\n", + __func__, ret); + rt_mutex_unlock(&isp->loading); + return ret; + } + if (!isp->ready) { + rt_mutex_unlock(&isp->loading); + return -ENXIO; + } + rt_mutex_unlock(&isp->loading); + rt_mutex_lock(&isp->mutex); acc_node = !strcmp(vdev->name, "ATOMISP ISP ACC"); @@ -877,6 +899,11 @@ done: else pipe->users++; rt_mutex_unlock(&isp->mutex); + + /* Ensure that a mode is set */ + if (!acc_node) + v4l2_ctrl_s_ctrl(asd->run_mode, pipe->default_run_mode); + return 0; css_error: @@ -1025,7 +1052,7 @@ done: rt_mutex_unlock(&isp->mutex); mutex_unlock(&isp->streamoff_mutex); - return 0; + return v4l2_fh_release(file); } /* @@ -1067,7 +1094,7 @@ static int frame_mmap(struct atomisp_device *isp, host_virt = vma->vm_start; isp_virt = frame->data; - atomisp_get_frame_pgnr(isp, frame, &pgnr); + pgnr = DIV_ROUND_UP(frame->data_bytes, PAGE_SIZE); if (do_isp_mm_remap(isp, vma, isp_virt, host_virt, pgnr)) return -EAGAIN; @@ -1171,6 +1198,12 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) u32 origin_size, new_size; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!(vma->vm_flags & (VM_WRITE | VM_READ))) return -EACCES; diff --git a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c index d8c9e31314b2..1cc581074ba7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c @@ -321,6 +321,18 @@ static struct gmin_cfg_var i8880_vars[] = { {}, }; +/* + * Surface 3 does not describe CsiPort/CsiLanes in both DSDT and EFI. + */ +static struct gmin_cfg_var surface3_vars[] = { + {"APTA0330:00_CsiPort", "0"}, + {"APTA0330:00_CsiLanes", "2"}, + + {"OVTI8835:00_CsiPort", "1"}, + {"OVTI8835:00_CsiLanes", "4"}, + {}, +}; + static const struct dmi_system_id gmin_vars[] = { { .ident = "BYT-T FFD8", @@ -358,6 +370,13 @@ static const struct dmi_system_id gmin_vars[] = { }, .driver_data = i8880_vars, }, + { + .ident = "Surface 3", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "Surface 3"), + }, + .driver_data = surface3_vars, + }, {} }; @@ -481,7 +500,7 @@ fail: static u8 gmin_get_pmic_id_and_addr(struct device *dev) { - struct i2c_client *power; + struct i2c_client *power = NULL; static u8 pmic_i2c_addr; if (pmic_id) diff --git a/drivers/staging/media/atomisp/pci/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp_internal.h index c01db10bb735..f71ab1ee6e19 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp_internal.h @@ -247,6 +247,13 @@ struct atomisp_device { * structures and css API calls. */ struct rt_mutex mutex; /* + * This mutex ensures that we don't allow an open to succeed while + * the initialization process is incomplete + */ + struct rt_mutex loading; + /* Set once the ISP is ready to allow opens */ + bool ready; + /* * Serialise streamoff: mutex is dropped during streamoff to * cancel the watchdog queue. MUST be acquired BEFORE * "mutex". diff --git a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c index c8a625667e81..8fd470efd658 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c @@ -492,23 +492,22 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = { .mbus_code = MEDIA_BUS_FMT_BGR565_2X8_LE, .sh_fmt = IA_CSS_FRAME_FORMAT_RGB565, .description = "16 RGB 5-6-5" +#if 0 }, { .pixelformat = V4L2_PIX_FMT_JPEG, .depth = 8, .mbus_code = MEDIA_BUS_FMT_JPEG_1X8, .sh_fmt = IA_CSS_FRAME_FORMAT_BINARY_8, .description = "JPEG" - }, -#if 0 - { + }, { /* This is a custom format being used by M10MO to send the RAW data */ .pixelformat = V4L2_PIX_FMT_CUSTOM_M10MO_RAW, .depth = 8, .mbus_code = V4L2_MBUS_FMT_CUSTOM_M10MO_RAW, .sh_fmt = IA_CSS_FRAME_FORMAT_BINARY_8, .description = "Custom RAW for M10MO" - }, #endif + }, }; const struct atomisp_format_bridge * @@ -646,6 +645,12 @@ static int atomisp_g_input(struct file *file, void *fh, unsigned int *input) struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); *input = asd->input_curr; rt_mutex_unlock(&isp->mutex); @@ -665,6 +670,12 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) struct v4l2_subdev *motor; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (input >= ATOM_ISP_MAX_INPUTS || input >= isp->input_cnt) { dev_dbg(isp->dev, "input_cnt: %d\n", isp->input_cnt); @@ -755,24 +766,91 @@ error: return ret; } +static int atomisp_enum_framesizes(struct file *file, void *priv, + struct v4l2_frmsizeenum *fsize) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_frame_size_enum fse = { + .index = fsize->index, + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + int ret; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, enum_frame_size, NULL, &fse); + if (ret) + return ret; + + fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; + fsize->discrete.width = fse.max_width - pad_w; + fsize->discrete.height = fse.max_height - pad_h; + + return 0; +} + +static int atomisp_enum_frameintervals(struct file *file, void *priv, + struct v4l2_frmivalenum *fival) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_frame_interval_enum fie = { + .code = atomisp_in_fmt_conv[0].code, + .index = fival->index, + .width = fival->width, + .height = fival->height, + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + int ret; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, enum_frame_interval, NULL, + &fie); + if (ret) + return ret; + + fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; + fival->discrete = fie.interval; + + return ret; +} + static int atomisp_enum_fmt_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; - struct v4l2_subdev_mbus_code_enum code = { 0 }; + struct v4l2_subdev_mbus_code_enum code = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + const struct atomisp_format_bridge *format; + struct v4l2_subdev *camera; unsigned int i, fi = 0; int rval; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + + camera = isp->inputs[asd->input_curr].camera; + if(!camera) { + dev_err(isp->dev, "%s(): camera is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); - rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, - enum_mbus_code, NULL, &code); + + rval = v4l2_subdev_call(camera, pad, enum_mbus_code, NULL, &code); if (rval == -ENOIOCTLCMD) { dev_warn(isp->dev, - "enum_mbus_code pad op not supported. Please fix your sensor driver!\n"); - // rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - // video, enum_mbus_fmt, 0, &code.code); + "enum_mbus_code pad op not supported by %s. Please fix your sensor driver!\n", + camera->name); } rt_mutex_unlock(&isp->mutex); @@ -780,15 +858,15 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, return rval; for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { - const struct atomisp_format_bridge *format = - &atomisp_output_fmts[i]; + format = &atomisp_output_fmts[i]; /* * Is the atomisp-supported format is valid for the * sensor (configuration)? If not, skip it. + * + * FIXME: fix the pipeline to allow sensor format too. */ - if (format->sh_fmt == IA_CSS_FRAME_FORMAT_RAW - && format->mbus_code != code.code) + if (format->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) continue; /* Found a match. Now let's pick f->index'th one. */ @@ -806,20 +884,6 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, return -EINVAL; } -static int atomisp_g_fmt_cap(struct file *file, void *fh, - struct v4l2_format *f) -{ - struct video_device *vdev = video_devdata(file); - struct atomisp_device *isp = video_get_drvdata(vdev); - - int ret; - - rt_mutex_lock(&isp->mutex); - ret = atomisp_get_fmt(vdev, f); - rt_mutex_unlock(&isp->mutex); - return ret; -} - static int atomisp_g_fmt_file(struct file *file, void *fh, struct v4l2_format *f) { @@ -834,6 +898,72 @@ static int atomisp_g_fmt_file(struct file *file, void *fh, return 0; } +static int atomisp_adjust_fmt(struct v4l2_format *f) +{ + const struct atomisp_format_bridge *format_bridge; + u32 padded_width; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + + padded_width = f->fmt.pix.width + pad_w; + + if (format_bridge->planar) { + f->fmt.pix.bytesperline = padded_width; + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * + DIV_ROUND_UP(format_bridge->depth * + padded_width, 8)); + } else { + f->fmt.pix.bytesperline = DIV_ROUND_UP(format_bridge->depth * + padded_width, 8); + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * f->fmt.pix.bytesperline); + } + + if (f->fmt.pix.field == V4L2_FIELD_ANY) + f->fmt.pix.field = V4L2_FIELD_NONE; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + + /* Currently, raw formats are broken!!! */ + if (format_bridge->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) { + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + } + + padded_width = f->fmt.pix.width + pad_w; + + if (format_bridge->planar) { + f->fmt.pix.bytesperline = padded_width; + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * + DIV_ROUND_UP(format_bridge->depth * + padded_width, 8)); + } else { + f->fmt.pix.bytesperline = DIV_ROUND_UP(format_bridge->depth * + padded_width, 8); + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * f->fmt.pix.bytesperline); + } + + if (f->fmt.pix.field == V4L2_FIELD_ANY) + f->fmt.pix.field = V4L2_FIELD_NONE; + + /* + * FIXME: do we need to setup this differently, depending on the + * sensor or the pipeline? + */ + f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709; + f->fmt.pix.ycbcr_enc = V4L2_YCBCR_ENC_709; + f->fmt.pix.xfer_func = V4L2_XFER_FUNC_709; + + f->fmt.pix.width -= pad_w; + f->fmt.pix.height -= pad_h; + + return 0; +} + /* This function looks up the closest available resolution. */ static int atomisp_try_fmt_cap(struct file *file, void *fh, struct v4l2_format *f) @@ -845,7 +975,35 @@ static int atomisp_try_fmt_cap(struct file *file, void *fh, rt_mutex_lock(&isp->mutex); ret = atomisp_try_fmt(vdev, &f->fmt.pix, NULL); rt_mutex_unlock(&isp->mutex); - return ret; + + if (ret) + return ret; + + return atomisp_adjust_fmt(f); +} + +static int atomisp_g_fmt_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe; + + rt_mutex_lock(&isp->mutex); + pipe = atomisp_to_video_pipe(vdev); + rt_mutex_unlock(&isp->mutex); + + f->fmt.pix = pipe->pix; + + /* If s_fmt was issued, just return whatever is was previouly set */ + if (f->fmt.pix.sizeimage) + return 0; + + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV; + f->fmt.pix.width = 10000; + f->fmt.pix.height = 10000; + + return atomisp_try_fmt_cap(file, fh, f); } static int atomisp_s_fmt_cap(struct file *file, void *fh, @@ -1024,9 +1182,16 @@ int __atomisp_reqbufs(struct file *file, void *fh, struct ia_css_frame *frame; struct videobuf_vmalloc_memory *vm_mem; u16 source_pad = atomisp_subdev_source_pad(vdev); - u16 stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_id; int ret = 0, i = 0; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + if (req->count == 0) { mutex_lock(&pipe->capq.vb_lock); if (!list_empty(&pipe->capq.stream)) @@ -1154,6 +1319,12 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) u32 pgnr; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (isp->isp_fatal_error) { ret = -EIO; @@ -1287,25 +1458,8 @@ done: pipe->capq.streaming && !asd->enable_raw_buffer_lock->val && asd->params.offline_parm.num_captures == 1) { - if (!IS_ISP2401) { asd->pending_capture_request++; dev_dbg(isp->dev, "Add one pending capture request.\n"); - } else { - if (asd->re_trigger_capture) { - ret = atomisp_css_offline_capture_configure(asd, - asd->params.offline_parm.num_captures, - asd->params.offline_parm.skip_frames, - asd->params.offline_parm.offset); - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", - __func__, ret); - - } else { - asd->pending_capture_request++; - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "Add one pending capture request.\n"); - } - } } rt_mutex_unlock(&isp->mutex); @@ -1389,6 +1543,12 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) struct atomisp_device *isp = video_get_drvdata(vdev); int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (isp->isp_fatal_error) { @@ -1640,6 +1800,12 @@ static int atomisp_streamon(struct file *file, void *fh, int ret = 0; unsigned long irqflags; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + dev_dbg(isp->dev, "Start stream on pad %d for asd%d\n", atomisp_subdev_source_pad(vdev), asd->index); @@ -1686,8 +1852,6 @@ static int atomisp_streamon(struct file *file, void *fh, /* Reset pending capture request count. */ asd->pending_capture_request = 0; - if (IS_ISP2401) - asd->re_trigger_capture = false; if ((atomisp_subdev_streaming_count(asd) > sensor_start_stream) && (!isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl)) { @@ -1901,6 +2065,12 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) unsigned long flags; bool first_streamoff = false; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + dev_dbg(isp->dev, "Stop stream on pad %d for asd%d\n", atomisp_subdev_source_pad(vdev), asd->index); @@ -2150,6 +2320,12 @@ static int atomisp_g_ctrl(struct file *file, void *fh, struct atomisp_device *isp = video_get_drvdata(vdev); int i, ret = -EINVAL; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + for (i = 0; i < ctrls_num; i++) { if (ci_v4l2_controls[i].id == control->id) { ret = 0; @@ -2229,6 +2405,12 @@ static int atomisp_s_ctrl(struct file *file, void *fh, struct atomisp_device *isp = video_get_drvdata(vdev); int i, ret = -EINVAL; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + for (i = 0; i < ctrls_num; i++) { if (ci_v4l2_controls[i].id == control->id) { ret = 0; @@ -2310,6 +2492,12 @@ static int atomisp_queryctl(struct file *file, void *fh, struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + switch (qc->id) { case V4L2_CID_FOCUS_ABSOLUTE: case V4L2_CID_FOCUS_RELATIVE: @@ -2355,6 +2543,12 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, int i; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!IS_ISP2401) motor = isp->inputs[asd->input_curr].motor; else @@ -2466,6 +2660,12 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, int i; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!IS_ISP2401) motor = isp->inputs[asd->input_curr].motor; else @@ -2591,6 +2791,12 @@ static int atomisp_g_parm(struct file *file, void *fh, struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { dev_err(isp->dev, "unsupported v4l2 buf type\n"); return -EINVAL; @@ -2613,6 +2819,12 @@ static int atomisp_s_parm(struct file *file, void *fh, int rval; int fps; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { dev_err(isp->dev, "unsupported v4l2 buf type\n"); return -EINVAL; @@ -3035,6 +3247,8 @@ const struct v4l2_ioctl_ops atomisp_ioctl_ops = { .vidioc_g_ctrl = atomisp_g_ctrl, .vidioc_s_ext_ctrls = atomisp_s_ext_ctrls, .vidioc_g_ext_ctrls = atomisp_g_ext_ctrls, + .vidioc_enum_framesizes = atomisp_enum_framesizes, + .vidioc_enum_frameintervals = atomisp_enum_frameintervals, .vidioc_enum_fmt_vid_cap = atomisp_enum_fmt_cap, .vidioc_try_fmt_vid_cap = atomisp_try_fmt_cap, .vidioc_g_fmt_vid_cap = atomisp_g_fmt_cap, diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp_subdev.c index 12f22ad007c7..1807cfa786a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.c @@ -1058,24 +1058,6 @@ static const struct v4l2_ctrl_config ctrl_depth_mode = { .def = 0, }; -/* - * Control for selectting ISP version - * - * When enabled, that means ISP version will be used ISP2.7. when disable, the - * isp will default to use ISP2.2. - * Note: Make sure set this configuration before creating stream. - */ -static const struct v4l2_ctrl_config ctrl_select_isp_version = { - .ops = &ctrl_ops, - .id = V4L2_CID_ATOMISP_SELECT_ISP_VERSION, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Select Isp version", - .min = 0, - .max = 1, - .step = 1, - .def = 0, -}; - static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) { @@ -1164,23 +1146,28 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) atomisp_init_acc_pipe(asd, &asd->video_acc); - ret = atomisp_video_init(&asd->video_in, "MEMORY"); + ret = atomisp_video_init(&asd->video_in, "MEMORY", + ATOMISP_RUN_MODE_SDV); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_capture, "CAPTURE"); + ret = atomisp_video_init(&asd->video_out_capture, "CAPTURE", + ATOMISP_RUN_MODE_STILL_CAPTURE); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_vf, "VIEWFINDER"); + ret = atomisp_video_init(&asd->video_out_vf, "VIEWFINDER", + ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_preview, "PREVIEW"); + ret = atomisp_video_init(&asd->video_out_preview, "PREVIEW", + ATOMISP_RUN_MODE_PREVIEW); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_video_capture, "VIDEO"); + ret = atomisp_video_init(&asd->video_out_video_capture, "VIDEO", + ATOMISP_RUN_MODE_VIDEO); if (ret < 0) return ret; @@ -1218,11 +1205,6 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) v4l2_ctrl_new_custom(&asd->ctrl_handler, &ctrl_disable_dz, NULL); - if (IS_ISP2401) { - asd->select_isp_version = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_select_isp_version, - NULL); - } /* Make controls visible on subdev as well. */ asd->subdev.ctrl_handler = &asd->ctrl_handler; @@ -1351,6 +1333,14 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, if (ret < 0) goto error; + asd->video_out_preview.vdev.v4l2_dev = vdev; + asd->video_out_preview.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_preview.vdev, + VFL_TYPE_VIDEO, -1); + if (ret < 0) + goto error; + asd->video_out_capture.vdev.v4l2_dev = vdev; asd->video_out_capture.vdev.device_caps = device_caps | V4L2_CAP_VIDEO_OUTPUT; @@ -1366,13 +1356,7 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - asd->video_out_preview.vdev.v4l2_dev = vdev; - asd->video_out_preview.vdev.device_caps = device_caps | - V4L2_CAP_VIDEO_OUTPUT; - ret = video_register_device(&asd->video_out_preview.vdev, - VFL_TYPE_VIDEO, -1); - if (ret < 0) - goto error; + asd->video_out_video_capture.vdev.v4l2_dev = vdev; asd->video_out_video_capture.vdev.device_caps = device_caps | V4L2_CAP_VIDEO_OUTPUT; diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp_subdev.h index d6fcfab6352d..7d731f1fee72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_subdev.h +++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.h @@ -81,6 +81,9 @@ struct atomisp_video_pipe { /* the link list to store per_frame parameters */ struct list_head per_frame_params; + /* Store here the initial run mode */ + unsigned int default_run_mode; + unsigned int buffers_in_css; /* irq_lock is used to protect video buffer state change operations and @@ -316,7 +319,6 @@ struct atomisp_sub_device { /* ISP2401 */ struct v4l2_ctrl *ion_dev_fd; - struct v4l2_ctrl *select_isp_version; struct v4l2_ctrl *disable_dz; diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 1e324f1f656e..1b240891a6e2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -447,7 +447,8 @@ const struct atomisp_dfs_config dfs_config_cht_soc = { .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc), }; -int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name, + unsigned int run_mode) { int ret; const char *direction; @@ -478,6 +479,7 @@ int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) "ATOMISP ISP %s %s", name, direction); video->vdev.release = video_device_release_empty; video_set_drvdata(&video->vdev, video->isp); + video->default_run_mode = run_mode; return 0; } @@ -711,15 +713,15 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off"); - /*WA:Enable DVFS*/ + /* WA for P-Unit, if DVFS enabled, ISP timeout observed */ if (IS_CHT && enable) - punit_ddr_dvfs_enable(true); + punit_ddr_dvfs_enable(false); /* * FIXME:WA for ECS28A, with this sleep, CTS * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort * PASS, no impact on other platforms - */ + */ if (IS_BYT && enable) msleep(10); @@ -727,7 +729,7 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, val, MRFLD_ISPSSPM0_ISPSSC_MASK); - /*WA:Enable DVFS*/ + /* WA:Enable DVFS */ if (IS_CHT && !enable) punit_ddr_dvfs_enable(true); @@ -1182,6 +1184,7 @@ static void atomisp_unregister_entities(struct atomisp_device *isp) v4l2_device_unregister(&isp->v4l2_dev); media_device_unregister(&isp->media_dev); + media_device_cleanup(&isp->media_dev); } static int atomisp_register_entities(struct atomisp_device *isp) @@ -1566,6 +1569,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base); rt_mutex_init(&isp->mutex); + rt_mutex_init(&isp->loading); mutex_init(&isp->streamoff_mutex); spin_lock_init(&isp->lock); @@ -1633,12 +1637,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i pdev->d3cold_delay = 0; break; case ATOMISP_PCI_DEVICE_SOC_ANN: - isp->media_dev.hw_revision = ( -#ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 -#else - ATOMISP_HW_REVISION_ISP2401_LEGACY -#endif + isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= pdev->revision < 2 ? ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; @@ -1646,12 +1645,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i isp->hpll_freq = HPLL_FREQ_1600MHZ; break; case ATOMISP_PCI_DEVICE_SOC_CHT: - isp->media_dev.hw_revision = ( -#ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 -#else - ATOMISP_HW_REVISION_ISP2401_LEGACY -#endif + isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= pdev->revision < 2 ? ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; @@ -1748,6 +1742,8 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim); } + rt_mutex_lock(&isp->loading); + err = atomisp_initialize_modules(isp); if (err < 0) { dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err); @@ -1805,6 +1801,8 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i release_firmware(isp->firmware); isp->firmware = NULL; isp->css_env.isp_css_fw.data = NULL; + isp->ready = true; + rt_mutex_unlock(&isp->loading); atomisp_drvfs_init(isp); @@ -1824,6 +1822,7 @@ wdt_work_queue_fail: register_entities_fail: atomisp_uninitialize_modules(isp); initialize_modules_fail: + rt_mutex_unlock(&isp->loading); cpu_latency_qos_remove_request(&isp->pm_qos); atomisp_msi_irq_uninit(isp); pci_free_irq_vectors(pdev); diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h index 81bb356b8172..72611b8286a4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h @@ -27,7 +27,8 @@ struct v4l2_device; struct atomisp_device; struct firmware; -int atomisp_video_init(struct atomisp_video_pipe *video, const char *name); +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name, + unsigned int run_mode); void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name); void atomisp_video_unregister(struct atomisp_video_pipe *video); void atomisp_acc_unregister(struct atomisp_acc_pipe *video); diff --git a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c index f20c9b02fbe0..7dd0e4a53c8b 100644 --- a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c +++ b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c @@ -58,7 +58,6 @@ static void pipe_binarydesc_get_offline( descr->enable_dz = true; descr->enable_xnr = false; descr->enable_dpc = false; - descr->enable_luma_only = false; descr->enable_tnr = false; descr->enable_capture_pp_bli = false; descr->enable_fractional_ds = false; @@ -390,8 +389,6 @@ int ia_css_pipe_get_video_binarydesc( pipe->extra_config.enable_fractional_ds; video_descr->enable_dpc = pipe->config.enable_dpc; - video_descr->enable_luma_only = - pipe->config.enable_luma_only; video_descr->enable_tnr = pipe->config.enable_tnr; @@ -574,11 +571,9 @@ void ia_css_pipe_get_primary_binarydesc( in_info->res = pipe->config.input_effective_res; in_info->padded_width = in_info->res.width; -#if !defined(HAS_NO_PACKED_RAW_PIXELS) if (pipe->stream->config.pack_raw_pixels) in_info->format = IA_CSS_FRAME_FORMAT_RAW_PACKED; else -#endif in_info->format = IA_CSS_FRAME_FORMAT_RAW; in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); @@ -600,24 +595,15 @@ void ia_css_pipe_get_primary_binarydesc( prim_descr->isp_pipe_version = pipe->config.isp_pipe_version; prim_descr->enable_fractional_ds = pipe->extra_config.enable_fractional_ds; - prim_descr->enable_luma_only = - pipe->config.enable_luma_only; /* We have both striped and non-striped primary binaries, * if continuous viewfinder is required, then we must select * a striped one. Otherwise we prefer to use a non-striped * since it has better performance. */ if (pipe_version == IA_CSS_PIPE_VERSION_2_6_1) prim_descr->striped = false; - else if (!IS_ISP2401) { + else prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); - } else { - prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf; - - if ((pipe->config.default_capture_config.enable_xnr != 0) && - (pipe->extra_config.enable_dvs_6axis == true)) - prim_descr->enable_xnr = true; - } } IA_CSS_LEAVE_PRIVATE(""); } @@ -849,14 +835,7 @@ void ia_css_pipe_get_ldc_binarydesc( assert(out_info); IA_CSS_ENTER_PRIVATE(""); - if (!IS_ISP2401) { - *in_info = *out_info; - } else { - if (pipe->out_yuv_ds_input_info.res.width) - *in_info = pipe->out_yuv_ds_input_info; - else - *in_info = *out_info; - } + *in_info = *out_info; in_info->format = IA_CSS_FRAME_FORMAT_YUV420; in_info->raw_bit_depth = 0; diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c deleted file mode 100644 index 1a021ae841fe..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c +++ /dev/null @@ -1,386 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c deleted file mode 100644 index b786247b322b..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c +++ /dev/null @@ -1,3420 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#define IA_CSS_INCLUDE_PARAMETERS -#include "sh_css_params.h" -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" -#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" -#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" -#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" -#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" -#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" -#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" -#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/de/de_2/ia_css_de2.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" -#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" -#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" -#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" -#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" -#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" -#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" -#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" -#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" -#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -#include "isp/kernels/bnlm/ia_css_bnlm.host.h" -#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_params.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; - - if (size) { - struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - t->strength = params->aa_config.strength; - } - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() enter:\n"); - - ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() enter:\n"); - - ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() enter:\n"); - - ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() enter:\n"); - - ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() enter:\n"); - - ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); - - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() enter:\n"); - - ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); - - ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() enter:\n"); - - ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() enter:\n"); - - ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() enter:\n"); - - ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); - - ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() enter:\n"); - - ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() enter:\n"); - - ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() enter:\n"); - - ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() enter:\n"); - - ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() enter:\n"); - - ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; - - if (size) { - struct sh_css_sp_uds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() enter:\n"); - - p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->crop_pos = params->uds_config.crop_pos; - p->uds = params->uds_config.uds; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() enter:\n"); - - ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() enter:\n"); - - ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() enter:\n"); - - ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); - - ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; - - if (size) { - struct sh_css_isp_bds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() enter:\n"); - - p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->baf_strength = params->bds_config.strength; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() enter:\n"); - - ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() enter:\n"); - - ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() enter:\n"); - - ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() enter:\n"); - - ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() enter:\n"); - - ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() enter:\n"); - - ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() enter:\n"); - - ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() enter:\n"); - - ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() enter:\n"); - - ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() enter:\n"); - - ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); - - ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); - - ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() enter:\n"); - - ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() enter:\n"); - - ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); - - ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() enter:\n"); - - ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() enter:\n"); - - ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { - ia_css_process_aa, - ia_css_process_anr, - ia_css_process_anr2, - ia_css_process_bh, - ia_css_process_cnr, - ia_css_process_crop, - ia_css_process_csc, - ia_css_process_dp, - ia_css_process_bnr, - ia_css_process_de, - ia_css_process_ecd, - ia_css_process_formats, - ia_css_process_fpn, - ia_css_process_gc, - ia_css_process_ce, - ia_css_process_yuv2rgb, - ia_css_process_rgb2yuv, - ia_css_process_r_gamma, - ia_css_process_g_gamma, - ia_css_process_b_gamma, - ia_css_process_uds, - ia_css_process_raa, - ia_css_process_s3a, - ia_css_process_ob, - ia_css_process_output, - ia_css_process_sc, - ia_css_process_bds, - ia_css_process_tnr, - ia_css_process_macc, - ia_css_process_sdis_horicoef, - ia_css_process_sdis_vertcoef, - ia_css_process_sdis_horiproj, - ia_css_process_sdis_vertproj, - ia_css_process_sdis2_horicoef, - ia_css_process_sdis2_vertcoef, - ia_css_process_sdis2_horiproj, - ia_css_process_sdis2_vertproj, - ia_css_process_wb, - ia_css_process_nr, - ia_css_process_yee, - ia_css_process_ynr, - ia_css_process_fc, - ia_css_process_ctc, - ia_css_process_xnr_table, - ia_css_process_xnr, - ia_css_process_xnr3, -}; - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() enter: config=%p\n", - config); - - *config = params->dp_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() leave\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dp_config = *config; - params->config_changed[IA_CSS_DP_ID] = true; - params->config_changed[IA_CSS_DP_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_dp_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() enter: config=%p\n", - config); - - *config = params->wb_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() leave\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->wb_config = *config; - params->config_changed[IA_CSS_WB_ID] = true; - params->config_changed[IA_CSS_WB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_wb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() enter: config=%p\n", - config); - - *config = params->tnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() leave\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->tnr_config = *config; - params->config_changed[IA_CSS_TNR_ID] = true; - params->config_changed[IA_CSS_TNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_tnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() enter: config=%p\n", - config); - - *config = params->ob_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() leave\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ob_config = *config; - params->config_changed[IA_CSS_OB_ID] = true; - params->config_changed[IA_CSS_OB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ob_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() enter: config=%p\n", - config); - - *config = params->de_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() leave\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->de_config = *config; - params->config_changed[IA_CSS_DE_ID] = true; - params->config_changed[IA_CSS_DE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_de_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() enter: config=%p\n", - config); - - *config = params->anr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() leave\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_config = *config; - params->config_changed[IA_CSS_ANR_ID] = true; - params->config_changed[IA_CSS_ANR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() enter: config=%p\n", - config); - - *config = params->anr_thres; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() leave\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_thres = *config; - params->config_changed[IA_CSS_ANR2_ID] = true; - params->config_changed[IA_CSS_ANR2_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr2_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() enter: config=%p\n", - config); - - *config = params->ce_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() leave\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ce_config = *config; - params->config_changed[IA_CSS_CE_ID] = true; - params->config_changed[IA_CSS_CE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ce_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() enter: config=%p\n", - config); - - *config = params->ecd_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() leave\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ecd_config = *config; - params->config_changed[IA_CSS_ECD_ID] = true; - params->config_changed[IA_CSS_ECD_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ecd_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() enter: config=%p\n", - config); - - *config = params->ynr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() leave\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ynr_config = *config; - params->config_changed[IA_CSS_YNR_ID] = true; - params->config_changed[IA_CSS_YNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ynr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() enter: config=%p\n", - config); - - *config = params->fc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() leave\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->fc_config = *config; - params->config_changed[IA_CSS_FC_ID] = true; - params->config_changed[IA_CSS_FC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_fc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() enter: config=%p\n", - config); - - *config = params->cnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() leave\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cnr_config = *config; - params->config_changed[IA_CSS_CNR_ID] = true; - params->config_changed[IA_CSS_CNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_cnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() enter: config=%p\n", - config); - - *config = params->macc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() leave\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->macc_config = *config; - params->config_changed[IA_CSS_MACC_ID] = true; - params->config_changed[IA_CSS_MACC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_macc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() enter: config=%p\n", - config); - - *config = params->ctc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() leave\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ctc_config = *config; - params->config_changed[IA_CSS_CTC_ID] = true; - params->config_changed[IA_CSS_CTC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ctc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() enter: config=%p\n", - config); - - *config = params->aa_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() leave\n"); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); - params->aa_config = *config; - params->config_changed[IA_CSS_AA_ID] = true; - params->config_changed[IA_CSS_AA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_aa_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); - - *config = params->yuv2rgb_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() leave\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->yuv2rgb_cc_config = *config; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_yuv2rgb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); - - *config = params->rgb2yuv_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() leave\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->rgb2yuv_cc_config = *config; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_rgb2yuv_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() enter: config=%p\n", - config); - - *config = params->cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() leave\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cc_config = *config; - params->config_changed[IA_CSS_CSC_ID] = true; - params->config_changed[IA_CSS_CSC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_csc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() enter: config=%p\n", - config); - - *config = params->nr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() leave\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->nr_config = *config; - params->config_changed[IA_CSS_BNR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_nr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() enter: config=%p\n", - config); - - *config = params->gc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() leave\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->gc_config = *config; - params->config_changed[IA_CSS_GC_ID] = true; - params->config_changed[IA_CSS_GC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_gc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() leave\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horicoef_config() enter:\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() leave\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertcoef_config() enter:\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() leave\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horiproj_config() enter:\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() leave\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertproj_config() enter:\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() leave\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horicoef_config() enter:\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() leave\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertcoef_config() enter:\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() leave\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horiproj_config() enter:\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() leave\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertproj_config() enter:\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() enter: config=%p\n", - config); - - *config = params->r_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() leave\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->r_gamma_table = *config; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_r_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() enter: config=%p\n", - config); - - *config = params->g_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() leave\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->g_gamma_table = *config; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_g_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() enter: config=%p\n", - config); - - *config = params->b_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() leave\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->b_gamma_table = *config; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_b_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() enter: config=%p\n", - config); - - *config = params->xnr_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() leave\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_xnr_table_config() enter:\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_table = *config; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_table_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() enter: config=%p\n", - config); - - *config = params->formats_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() leave\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->formats_config = *config; - params->config_changed[IA_CSS_FORMATS_ID] = true; - params->config_changed[IA_CSS_FORMATS_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_formats_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() enter: config=%p\n", - config); - - *config = params->xnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() leave\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_config = *config; - params->config_changed[IA_CSS_XNR_ID] = true; - params->config_changed[IA_CSS_XNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() enter: config=%p\n", - config); - - *config = params->xnr3_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() leave\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr3_config = *config; - params->config_changed[IA_CSS_XNR3_ID] = true; - params->config_changed[IA_CSS_XNR3_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr3_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() enter: config=%p\n", - config); - - *config = params->s3a_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() leave\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->s3a_config = *config; - params->config_changed[IA_CSS_BH_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_s3a_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() enter: config=%p\n", - config); - - *config = params->output_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() leave\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->output_config = *config; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_output_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_get_dp_config(params, config->dp_config); - ia_css_get_wb_config(params, config->wb_config); - ia_css_get_tnr_config(params, config->tnr_config); - ia_css_get_ob_config(params, config->ob_config); - ia_css_get_de_config(params, config->de_config); - ia_css_get_anr_config(params, config->anr_config); - ia_css_get_anr2_config(params, config->anr_thres); - ia_css_get_ce_config(params, config->ce_config); - ia_css_get_ecd_config(params, config->ecd_config); - ia_css_get_ynr_config(params, config->ynr_config); - ia_css_get_fc_config(params, config->fc_config); - ia_css_get_cnr_config(params, config->cnr_config); - ia_css_get_macc_config(params, config->macc_config); - ia_css_get_ctc_config(params, config->ctc_config); - ia_css_get_aa_config(params, config->aa_config); - ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_get_csc_config(params, config->cc_config); - ia_css_get_nr_config(params, config->nr_config); - ia_css_get_gc_config(params, config->gc_config); - ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_get_r_gamma_config(params, config->r_gamma_table); - ia_css_get_g_gamma_config(params, config->g_gamma_table); - ia_css_get_b_gamma_config(params, config->b_gamma_table); - ia_css_get_xnr_table_config(params, config->xnr_table); - ia_css_get_formats_config(params, config->formats_config); - ia_css_get_xnr_config(params, config->xnr_config); - ia_css_get_xnr3_config(params, config->xnr3_config); - ia_css_get_s3a_config(params, config->s3a_config); - ia_css_get_output_config(params, config->output_config); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_set_dp_config(params, config->dp_config); - ia_css_set_wb_config(params, config->wb_config); - ia_css_set_tnr_config(params, config->tnr_config); - ia_css_set_ob_config(params, config->ob_config); - ia_css_set_de_config(params, config->de_config); - ia_css_set_anr_config(params, config->anr_config); - ia_css_set_anr2_config(params, config->anr_thres); - ia_css_set_ce_config(params, config->ce_config); - ia_css_set_ecd_config(params, config->ecd_config); - ia_css_set_ynr_config(params, config->ynr_config); - ia_css_set_fc_config(params, config->fc_config); - ia_css_set_cnr_config(params, config->cnr_config); - ia_css_set_macc_config(params, config->macc_config); - ia_css_set_ctc_config(params, config->ctc_config); - ia_css_set_aa_config(params, config->aa_config); - ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_set_csc_config(params, config->cc_config); - ia_css_set_nr_config(params, config->nr_config); - ia_css_set_gc_config(params, config->gc_config); - ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_set_r_gamma_config(params, config->r_gamma_table); - ia_css_set_g_gamma_config(params, config->g_gamma_table); - ia_css_set_b_gamma_config(params, config->b_gamma_table); - ia_css_set_xnr_table_config(params, config->xnr_table); - ia_css_set_formats_config(params, config->formats_config); - ia_css_set_xnr_config(params, config->xnr_config); - ia_css_set_xnr3_config(params, config->xnr3_config); - ia_css_set_s3a_config(params, config->s3a_config); - ia_css_set_output_config(params, config->output_config); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c deleted file mode 100644 index 1a021ae841fe..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c +++ /dev/null @@ -1,386 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c deleted file mode 100644 index 514ffe0303cb..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c +++ /dev/null @@ -1,224 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_states.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_aa_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; - - if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - 0, size); - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; - - if (size) { - ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; - - if (size) { - ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_dp_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; - - if (size) { - ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_de_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; - - if (size) { - ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; - - if (size) { - ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ref_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; - - if (size) { - ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; - - if (size) { - ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -void (*ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary) = { - ia_css_initialize_aa_state, - ia_css_initialize_cnr_state, - ia_css_initialize_cnr2_state, - ia_css_initialize_dp_state, - ia_css_initialize_de_state, - ia_css_initialize_tnr_state, - ia_css_initialize_ref_state, - ia_css_initialize_ynr_state, -}; diff --git a/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c index 8ed1cffc5384..25e082d6a94a 100644 --- a/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c +++ b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c @@ -28,10 +28,6 @@ static inline void gdc_reg_store( const unsigned int reg, const hrt_data value); -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg); - #ifndef __INLINE_GDC__ #include "gdc_private.h" #endif /* __INLINE_GDC__ */ @@ -117,10 +113,3 @@ static inline void gdc_reg_store( ia_css_device_store_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data), value); return; } - -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg) -{ - return ia_css_device_load_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data)); -} diff --git a/drivers/staging/media/atomisp/pci/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/ia_css_acc_types.h index 36583ab12e3f..d0ce2f8ba653 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/ia_css_acc_types.h @@ -222,11 +222,6 @@ struct ia_css_binary_info { struct ia_css_isp_param_isp_segments mem_initializers; /* MW: Packing (related) bools in an integer ?? */ struct { - /* ISP2401 */ - u8 luma_only; - u8 input_yuv; - u8 input_raw; - u8 reduced_pipe; u8 vf_veceven; u8 dis; diff --git a/drivers/staging/media/atomisp/pci/ia_css_event_public.h b/drivers/staging/media/atomisp/pci/ia_css_event_public.h index 08ea801dd5ac..76219d741d2e 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_event_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_event_public.h @@ -157,21 +157,6 @@ struct ia_css_event { int ia_css_dequeue_psys_event(struct ia_css_event *event); -/* @brief Dequeue an event from the CSS system. - * - * @param[out] event Pointer to the event struct which will be filled by - * this function if an event is available. - * @return -ENODATA if no events are - * available or - * 0 otherwise. - * - * deprecated{Use ia_css_dequeue_psys_event instead}. - * Unless the isys event queue is explicitly enabled, this function will - * dequeue both isys (EOF) and psys events (all others). - */ -int -ia_css_dequeue_event(struct ia_css_event *event); - /* @brief Dequeue an ISYS event from the CSS system. * * @param[out] event Pointer to the event struct which will be filled by @@ -182,7 +167,7 @@ ia_css_dequeue_event(struct ia_css_event *event); * * This function dequeues an event from the ISYS event queue. The queue is * between host and the CSS system. - * Unlike the ia_css_dequeue_event() function, this function can be called + * Unlike the ia_css_dequeue_psys_event() function, this function can be called * directly from an interrupt service routine (ISR) and it is safe to call * this function in parallel with other CSS API functions (but only one * call to this function should be in flight at any point in time). diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c new file mode 100644 index 000000000000..d28a76a68e43 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_pipeline.h" +#include "ia_css_isp_configs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +int ia_css_configure_iterator(const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; + + ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_copy_output(const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; + + ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +int ia_css_configure_crop(const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.crop.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; + + ia_css_crop_config((struct sh_css_isp_crop_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_fpn(const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; + ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_dvs(const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; + ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_qplane(const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; + ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + + return 0; +} + +int ia_css_configure_output0(const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output0.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; + + ia_css_output0_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_output1(const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output1.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; + + ia_css_output1_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_output(const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; + + ia_css_output_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_raw(const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.raw.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; + + ia_css_raw_config((struct sh_css_isp_raw_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_tnr(const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; + + ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_ref(const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.ref.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; + + ia_css_ref_config((struct sh_css_isp_ref_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_vf(const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.vf.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; + + ia_css_vf_config((struct sh_css_isp_vf_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h index 1abb2fd6a913..fffcfc871bd2 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h @@ -23,22 +23,15 @@ #include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" #include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" #include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" - -/* ISP2401 */ -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" - #include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" #include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" #include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" #include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" -#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ -/* Generated code: do not edit or commmit. */ +#endif #ifndef _IA_CSS_ISP_CONFIG_H #define _IA_CSS_ISP_CONFIG_H -/* Code generated by genparam/gencode.c:gen_param_enum() */ - enum ia_css_configuration_ids { IA_CSS_ITERATOR_CONFIG_ID, IA_CSS_COPY_OUTPUT_CONFIG_ID, @@ -60,8 +53,6 @@ enum ia_css_configuration_ids { IA_CSS_NUM_CONFIGURATION_IDS }; -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - struct ia_css_config_memory_offsets { struct { struct ia_css_isp_parameter iterator; @@ -73,10 +64,6 @@ struct ia_css_config_memory_offsets { struct ia_css_isp_parameter output0; struct ia_css_isp_parameter output1; struct ia_css_isp_parameter output; - - /* ISP2401 */ - struct ia_css_isp_parameter sc; - struct ia_css_isp_parameter raw; struct ia_css_isp_parameter tnr; struct ia_css_isp_parameter ref; @@ -88,96 +75,44 @@ struct ia_css_config_memory_offsets { #include "ia_css_stream.h" /* struct ia_css_stream */ #include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_iterator(const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); +int ia_css_configure_copy_output(const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_crop(const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); +int ia_css_configure_fpn(const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_dvs(const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); +int ia_css_configure_qplane(const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); +int ia_css_configure_output0(const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_output1(const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); +int ia_css_configure_output(const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_raw(const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); +int ia_css_configure_tnr(const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_ref(const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); +int ia_css_configure_vf(const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); #endif /* IA_CSS_INCLUDE_CONFIGURATION */ diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/ia_css_isp_params.c index d9c672d8904e..503ac65da69b 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_params.c @@ -1721,29 +1721,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } } /* Code generated by genparam/gencode.c:gen_param_process_table() */ diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/ia_css_isp_params.h index 6e3082b39ed6..c2de689877d1 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_params.h @@ -121,9 +121,6 @@ struct ia_css_memory_offsets { struct ia_css_isp_parameter sdis_vertcoef; struct ia_css_isp_parameter sdis2_horicoef; struct ia_css_isp_parameter sdis2_vertcoef; - - /* ISP2401 */ - struct ia_css_isp_parameter xnr3; } vmem; struct { struct ia_css_isp_parameter bh; diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/ia_css_isp_states.c index a6bc2e9eddea..a6bc2e9eddea 100644 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/ia_css_pipe.h index bb0abf9bffb1..fb58535bff40 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_pipe.h +++ b/drivers/staging/media/atomisp/pci/ia_css_pipe.h @@ -33,7 +33,7 @@ struct ia_css_preview_settings { /* 2401 only for these two - do we in fact use them for anything real */ struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; - struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; struct ia_css_pipe *copy_pipe; struct ia_css_pipe *capture_pipe; @@ -81,7 +81,7 @@ struct ia_css_video_settings { struct ia_css_binary vf_pp_binary; struct ia_css_binary *yuv_scaler_binary; struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; - struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; struct ia_css_frame *vf_pp_in_frame; struct ia_css_pipe *copy_pipe; struct ia_css_pipe *capture_pipe; diff --git a/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h index 4affd21f9e3f..7352cbf779fb 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h @@ -123,9 +123,6 @@ struct ia_css_pipe_config { processing stages. */ /* ISP2401 */ - bool enable_luma_only; - /** Enabling of monochrome mode for a pipeline. If enabled only luma processing - will be done. */ bool enable_tnr; /** Enabling of TNR (temporal noise reduction). This is only applicable to video pipes. Non video-pipes should always set this parameter to false. */ @@ -482,29 +479,6 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, u32 fw_handle, bool *enable); -/* ISP2401 */ -/* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. - * @param[in] pipe Pipe handle. - * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). - * @param[in] css_seg Parameter memory descriptors for CSS segments. - * @param[in] isp_seg Parameter memory descriptors for ISP segments. - * - * @return - * 0 : Success - * -EINVAL : Invalid Parameters - * -EBUSY : Inactive QOS Pipe - * (No active stream with this pipe) - * - * \deprecated{This interface is used to temporarily support a late-developed, - * specific use-case on a specific IPU2 platform. It will not be supported or - * maintained on IPU3 or further.} - */ -int -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, - u32 fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg); - /* @brief Get selected configuration settings * @param[in] pipe The pipe. * @param[out] config Configuration settings. diff --git a/drivers/staging/media/atomisp/pci/ia_css_stream.h b/drivers/staging/media/atomisp/pci/ia_css_stream.h index 70b0378748f1..cf847586dc61 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_stream.h +++ b/drivers/staging/media/atomisp/pci/ia_css_stream.h @@ -18,9 +18,7 @@ #include <type_support.h> #include <system_local.h> -#if !defined(ISP2401) #include <input_system.h> -#endif #include "ia_css_types.h" #include "ia_css_stream_public.h" @@ -30,9 +28,7 @@ struct ia_css_stream { struct ia_css_stream_config config; struct ia_css_stream_info info; -#if !defined(ISP2401) rx_cfg_t csi_rx_config; -#endif bool reconfigure_css_rx; struct ia_css_pipe *last_pipe; int num_pipes; diff --git a/drivers/staging/media/atomisp/pci/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/ia_css_stream_public.h index 83846e417ae5..47846ece8d64 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_stream_public.h @@ -102,12 +102,10 @@ struct ia_css_stream_config { isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; struct ia_css_stream_input_config input_config; - /* Currently, Android and Windows platforms interpret the binning_factor parameter - * differently. In Android, the binning factor is expressed in the form - * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N - * To use the Windows method of specification, the caller has to define - * macro USE_WINDOWS_BINNING_FACTOR. This is for backward compatibility only - * and will be deprecated. In the future,all platforms will use the N*N method + /* + * Currently, Linux and Windows platforms interpret the binning_factor + * parameter differently. In Linux, the binning factor is expressed + * in the form 2^N * 2^N */ /* ISP2401 */ unsigned int sensor_binning_factor; /** Binning factor used by sensor @@ -202,15 +200,6 @@ int ia_css_stream_get_info(const struct ia_css_stream *stream, struct ia_css_stream_info *stream_info); -/* @brief load (rebuild) a stream that was unloaded. - * @param[in] stream The stream - * @return 0 or the error code - * - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - */ -int -ia_css_stream_load(struct ia_css_stream *stream); /* @brief Starts the stream. * @param[in] stream The stream. diff --git a/drivers/staging/media/atomisp/pci/input_system_local.h b/drivers/staging/media/atomisp/pci/input_system_local.h index b33aa2838290..357987d629cd 100644 --- a/drivers/staging/media/atomisp/pci/input_system_local.h +++ b/drivers/staging/media/atomisp/pci/input_system_local.h @@ -4,6 +4,140 @@ * (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> */ +#include "type_support.h" +#include "input_system_global.h" + +typedef enum { + INPUT_SYSTEM_PORT_A = 0, + INPUT_SYSTEM_PORT_B, + INPUT_SYSTEM_PORT_C, + N_INPUT_SYSTEM_PORTS +} input_system_csi_port_t; + +typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; +typedef struct input_system_network_cfg_s input_system_network_cfg_t; +typedef struct target_cfg2400_s target_cfg2400_t; +typedef struct channel_cfg_s channel_cfg_t; +typedef struct backend_channel_cfg_s backend_channel_cfg_t; +typedef struct input_system_cfg2400_s input_system_cfg2400_t; +typedef struct mipi_port_state_s mipi_port_state_t; +typedef struct rx_channel_state_s rx_channel_state_t; +typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; +typedef struct input_switch_cfg_s input_switch_cfg_t; + +struct ctrl_unit_cfg_s { + isp2400_ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; + isp2400_ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; +}; + +struct input_system_network_cfg_s { + input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; + input_system_multiplex_t mux_cfg; + ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; +}; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_isp_cfg_t; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_sp_cfg_t; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_strm2mem_cfg_t; + +struct input_switch_cfg_channel_s { + u32 hsync_data_reg[2]; + u32 vsync_data_reg; +}; + +struct backend_channel_cfg_s { + u32 fmt_control_word_1; // Format config. + u32 fmt_control_word_2; + u32 no_side_band; +}; + +typedef union { + csi_cfg_t csi_cfg; + tpg_cfg_t tpg_cfg; + prbs_cfg_t prbs_cfg; + gpfifo_cfg_t gpfifo_cfg; +} source_cfg_t; + +struct input_switch_cfg_s { + u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; + u32 vsync_data_reg; +}; + +/* + * In 2300 ports can be configured independently and stream + * formats need to be specified. In 2400, there are only 8 + * supported configurations but the HW is fused to support + * only a single one. + * + * In 2300 the compressed format types are programmed by the + * user. In 2400 all stream formats are encoded on the stream. + * + * Use the enum to check validity of a user configuration + */ +typedef enum { + MONO_4L_1L_0L = 0, + MONO_3L_1L_0L, + MONO_2L_1L_0L, + MONO_1L_1L_0L, + STEREO_2L_1L_2L, + STEREO_3L_1L_1L, + STEREO_2L_1L_1L, + STEREO_1L_1L_1L, + N_RX_MODE +} rx_mode_t; + +#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 +#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 +#define COMPRESSED_BITS_PER_PIXEL_6 6 +#define COMPRESSED_BITS_PER_PIXEL_7 7 +#define COMPRESSED_BITS_PER_PIXEL_8 8 +enum mipi_compressor { + MIPI_COMPRESSOR_NONE = 0, + MIPI_COMPRESSOR_10_6_10, + MIPI_COMPRESSOR_10_7_10, + MIPI_COMPRESSOR_10_8_10, + MIPI_COMPRESSOR_12_6_12, + MIPI_COMPRESSOR_12_7_12, + MIPI_COMPRESSOR_12_8_12, + N_MIPI_COMPRESSOR_METHODS +}; + +typedef enum mipi_compressor mipi_compressor_t; + +typedef enum { + MIPI_PREDICTOR_NONE = 0, + MIPI_PREDICTOR_TYPE1, + MIPI_PREDICTOR_TYPE2, + N_MIPI_PREDICTOR_TYPES +} mipi_predictor_t; + +typedef struct rx_cfg_s rx_cfg_t; + +/* + * Applied per port + */ +struct rx_cfg_s { + rx_mode_t mode; /* The HW config */ + enum mipi_port_id port; /* The port ID to apply the control on */ + unsigned int timeout; + unsigned int initcount; + unsigned int synccount; + unsigned int rxcount; + mipi_predictor_t comp; /* Just for backward compatibility */ + bool is_two_ppc; +}; + #ifdef ISP2401 # include "isp2401_input_system_local.h" #else diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c index 82aa69b74677..2091f001502d 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c @@ -13,7 +13,6 @@ * more details. */ -#if !defined(HAS_NO_HMEM) #include "ia_css_types.h" #include "sh_css_internal.h" @@ -63,4 +62,3 @@ ia_css_bh_encode( uDIGIT_FITTING(from->ae_y_coef_b, 16, SH_CSS_AE_YCOEF_SHIFT); } -#endif diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c index 5d34f3256a43..cc415c72ad8f 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c @@ -34,14 +34,12 @@ ia_css_copy_output_config( to->enable = from->enable; } -void -ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable) +int ia_css_copy_output_configure(const struct ia_css_binary *binary, + bool enable) { struct ia_css_copy_output_configuration config = default_config; config.enable = enable; - ia_css_configure_copy_output(binary, &config); + return ia_css_configure_copy_output(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h index 615cb6771884..44e3e45b0ec3 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h @@ -27,9 +27,7 @@ ia_css_copy_output_config( const struct ia_css_copy_output_configuration *from, unsigned int size); -void -ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable); +int ia_css_copy_output_configure(const struct ia_css_binary *binary, + bool enable); #endif /* __IA_CSS_COPY_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c index 38912062edd4..8c1d50f7aae4 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c @@ -36,30 +36,32 @@ ia_css_crop_encode( to->crop_pos = from->crop_pos; } -void -ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size) +int ia_css_crop_config(struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_crop_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_crop_configuration config = default_config; config.info = info; - ia_css_configure_crop(binary, &config); + return ia_css_configure_crop(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h index 21a259d33256..e700149c1e95 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h @@ -28,15 +28,11 @@ ia_css_crop_encode( const struct ia_css_crop_config *from, unsigned int size); -void -ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size); +int ia_css_crop_config(struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size); -void -ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_crop_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_CROP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c index 67f5540b48b5..07ce5b4f0816 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -46,16 +46,14 @@ ia_css_dvs_config( DVS_NUM_BLOCKS_Y(from->info->res.height); } -void -ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_dvs_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_dvs_configuration config = default_config; config.info = info; - ia_css_configure_dvs(binary, &config); + return ia_css_configure_dvs(binary, &config); } static void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h index f9bc17ee0f86..332aa5496c04 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h @@ -35,10 +35,8 @@ ia_css_dvs_config( const struct ia_css_dvs_configuration *from, unsigned int size); -void -ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_dvs_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void convert_dvs_6axis_config( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c index 47b5c7956fbd..57b5e11e1cfe 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c @@ -51,26 +51,28 @@ ia_css_fpn_dump( "fpn_enabled", fpn->enabled); } -void -ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size) +int ia_css_fpn_config(struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_fpn_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; const struct ia_css_fpn_configuration config = { @@ -85,5 +87,5 @@ ia_css_fpn_configure( my_info.raw_bayer_order = info->raw_bayer_order; my_info.crop_info = info->crop_info; - ia_css_configure_fpn(binary, &config); + return ia_css_configure_fpn(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h index 12187d213d90..bd341fa287fe 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h @@ -31,15 +31,11 @@ ia_css_fpn_dump( const struct sh_css_isp_fpn_params *fpn, unsigned int level); -void -ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size); +int ia_css_fpn_config(struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size); -void -ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_fpn_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_FPN_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c index 698550cc2fcc..85a02b6adb52 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h index 04599ab590cd..83277b683c47 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h index 97a89fd3cfda..998c6d801756 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h index 1b4090880201..175c301ee96a 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c index ea8055148fb3..c7d88552dfde 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -22,10 +22,8 @@ #include "ia_css_isp_params.h" #include "ia_css_frame.h" -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) +int ia_css_bayer_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; const struct ia_css_frame **out_frames = (const struct ia_css_frame **) @@ -38,6 +36,7 @@ ia_css_bayer_io_config( ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; + int ret; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; @@ -53,7 +52,9 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() get part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, in_frame_info); + ret = ia_css_dma_configure_from_info(&config, in_frame_info); + if (ret) + return ret; // The base_address of the input frame will be set in the ISP to->width = in_frame_info->res.width; to->height = in_frame_info->res.height; @@ -79,7 +80,9 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() put part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + ret = ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + if (ret) + return ret; to->base_address = out_frames[0]->data; to->width = out_frames[0]->info.res.width; to->height = out_frames[0]->info.res.height; @@ -91,4 +94,5 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() put part leave:\n"); #endif } + return 0; } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 635ccb1b27d0..9c7e5a1ad57b 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -21,9 +21,7 @@ #include "ia_css_binary.h" #include "sh_css_internal.h" -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); +int ia_css_bayer_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c index f8bd207b28e1..7d2ef6e26ee6 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -22,10 +22,8 @@ more details. #include "ia_css_isp_params.h" #include "ia_css_frame.h" -void -ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) +int ia_css_yuv444_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; const struct ia_css_frame **out_frames = (const struct ia_css_frame **) @@ -38,6 +36,7 @@ ia_css_yuv444_io_config( ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; + int ret; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; @@ -53,7 +52,10 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() get part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, in_frame_info); + ret = ia_css_dma_configure_from_info(&config, in_frame_info); + if (ret) + return ret; + // The base_address of the input frame will be set in the ISP to->width = in_frame_info->res.width; to->height = in_frame_info->res.height; @@ -79,7 +81,10 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() put part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + ret = ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + if (ret) + return ret; + to->base_address = out_frames[0]->data; to->width = out_frames[0]->info.res.width; to->height = out_frames[0]->info.res.height; @@ -91,4 +96,5 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() put part leave:\n"); #endif } + return 0; } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h index e7cfd380e108..13e50590f91e 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -21,9 +21,7 @@ more details. #include "ia_css_binary.h" #include "sh_css_internal.h" -void -ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); +int ia_css_yuv444_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__YUV44_IO_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c index 6d8a35a73750..5f186fb03642 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c @@ -38,10 +38,9 @@ ia_css_iterator_config( ia_css_resolution_to_sp_resolution(&to->dvs_envelope, from->dvs_envelope); } -int -ia_css_iterator_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info) { +int ia_css_iterator_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info) +{ struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; struct ia_css_iterator_configuration config = default_config; @@ -75,7 +74,5 @@ ia_css_iterator_configure( my_info.res.height <<= binary->vf_downscale_log2; } - ia_css_configure_iterator(binary, &config); - - return 0; + return ia_css_configure_iterator(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c index c8e074f42353..be9e4ef29fce 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c @@ -52,49 +52,45 @@ ia_css_output_encode( to->enable_vflip = from->enable_vflip; } -void -ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size) +int ia_css_output_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; to->height = from->info ? from->info->res.height : 0; to->enable = from->info != NULL; ia_css_frame_info_to_frame_sp_info(&to->info, from->info); /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size) +int ia_css_output0_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size) { - ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + return ia_css_output_config(to, (const struct ia_css_output_configuration *)from, size); } -void -ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size) +int ia_css_output1_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size) { - ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + return ia_css_output_config(to, (const struct ia_css_output_configuration *)from, size); } -void -ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output_configuration config = @@ -102,14 +98,13 @@ ia_css_output_configure( config.info = info; - ia_css_configure_output(binary, &config); + return ia_css_configure_output(binary, &config); } + return 0; } -void -ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output0_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output0_configuration config = @@ -117,14 +112,13 @@ ia_css_output0_configure( config.info = info; - ia_css_configure_output0(binary, &config); + return ia_css_configure_output0(binary, &config); } + return 0; } -void -ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output1_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output1_configuration config = @@ -132,8 +126,9 @@ ia_css_output1_configure( config.info = info; - ia_css_configure_output1(binary, &config); + return ia_css_configure_output1(binary, &config); } + return 0; } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h index 1f5a2242640e..c8523e95a394 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h @@ -30,38 +30,26 @@ ia_css_output_encode( const struct ia_css_output_config *from, unsigned int size); -void -ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size); +int ia_css_output_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size); -void -ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size); +int ia_css_output0_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size); -void -ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size); +int ia_css_output1_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size); -void -ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); -void -ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output0_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); -void -ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output1_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void ia_css_output_dump( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c index 1603fd44ece3..9fd4435e96b0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c @@ -28,35 +28,37 @@ static const struct ia_css_qplane_configuration default_config = { .pipe = (struct sh_css_sp_pipeline *)NULL, }; -void -ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size) +int ia_css_qplane_config(struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; to->inout_port_config = from->pipe->inout_port_config; to->format = from->info->format; + + return 0; } -void -ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_qplane_configuration config = default_config; config.pipe = pipe; config.info = info; - ia_css_configure_qplane(binary, &config); + return ia_css_configure_qplane(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h index 8d940959f40a..b3f8fa30c8ce 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h @@ -29,16 +29,12 @@ #include "ia_css_qplane_types.h" #include "ia_css_qplane_param.h" -void -ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size); +int ia_css_qplane_config(struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size); -void -ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_QPLANE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c index c505c94a7241..646d6e39c1e5 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c @@ -29,12 +29,6 @@ static const struct ia_css_raw_configuration default_config = { .pipe = (struct sh_css_sp_pipeline *)NULL, }; -static inline unsigned -sh_css_elems_bytes_from_info(unsigned int raw_bit_depth) -{ - return CEIL_DIV(raw_bit_depth, 8); -} - /* MW: These areMIPI / ISYS properties, not camera function properties */ static enum sh_stream_format css2isp_stream_format(enum atomisp_input_format from) { @@ -70,17 +64,15 @@ css2isp_stream_format(enum atomisp_input_format from) { } } -void -ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size) +int ia_css_raw_config(struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; const struct ia_css_frame_info *in_info = from->in_info; const struct ia_css_frame_info *internal_info = from->internal_info; + int ret; - (void)size; #if !defined(ISP2401) /* 2401 input system uses input width width */ in_info = internal_info; @@ -92,7 +84,9 @@ ia_css_raw_config( in_info = internal_info; #endif - ia_css_dma_configure_from_info(&to->port_b, in_info); + ret = ia_css_dma_configure_from_info(&to->port_b, in_info); + if (ret) + return ret; /* Assume divisiblity here, may need to generalize to fixed point. */ assert((in_info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) || @@ -110,16 +104,16 @@ ia_css_raw_config( to->start_line = in_info->crop_info.start_line; to->enable_left_padding = from->enable_left_padding; #endif + + return 0; } -void -ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved) +int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved) { u8 enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); struct ia_css_raw_configuration config = default_config; @@ -132,5 +126,5 @@ ia_css_raw_configure( config.deinterleaved = deinterleaved; config.enable_left_padding = enable_left_padding; - ia_css_configure_raw(binary, &config); + return ia_css_configure_raw(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h index 346928435a8b..23da51aabc8d 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h @@ -21,19 +21,15 @@ #include "ia_css_raw_types.h" #include "ia_css_raw_param.h" -void -ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size); +int ia_css_raw_config(struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size); -void -ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved); +int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved); #endif /* __IA_CSS_RAW_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c index 29c707ecf9f3..9b756daddee0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c @@ -13,7 +13,6 @@ * more details. */ -#if !defined(HAS_NO_HMEM) #include "ia_css_types.h" #include "sh_css_internal.h" @@ -32,4 +31,3 @@ ia_css_raa_encode( (void)from; } -#endif diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c index 061558fbe329..08ed916a7eb8 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c @@ -22,16 +22,17 @@ #include "isp.h" #include "ia_css_ref.host.h" -void -ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size) +int ia_css_ref_config(struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS, i; + int ret; if (from->ref_frames[0]) { - ia_css_dma_configure_from_info(&to->port_b, &from->ref_frames[0]->info); + ret = ia_css_dma_configure_from_info(&to->port_b, &from->ref_frames[0]->info); + if (ret) + return ret; to->width_a_over_b = elems_a / to->port_b.elems; to->dvs_frame_delay = from->dvs_frame_delay; } else { @@ -52,22 +53,25 @@ ia_css_ref_config( } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *ref_frames, - const uint32_t dvs_frame_delay) +int ia_css_ref_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *ref_frames, + const uint32_t dvs_frame_delay) { struct ia_css_ref_configuration config; unsigned int i; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) config.ref_frames[i] = ref_frames[i]; + config.dvs_frame_delay = dvs_frame_delay; - ia_css_configure_ref(binary, &config); + + return ia_css_configure_ref(binary, &config); } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h index 3ce590b436a1..388cd4c367ba 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h @@ -23,17 +23,13 @@ #include "ia_css_ref_param.h" #include "ia_css_ref_state.h" -void -ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size); +int ia_css_ref_config(struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size); -void -ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *ref_frames, - const uint32_t dvs_frame_delay); +int ia_css_ref_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *ref_frames, + const uint32_t dvs_frame_delay); void ia_css_init_ref_state( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c index ba52c80df4a5..bd7b89d9475b 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c @@ -227,10 +227,6 @@ ia_css_s3a_hmem_decode( struct ia_css_3a_statistics *host_stats, const struct ia_css_bh_table *hmem_buf) { -#if defined(HAS_NO_HMEM) - (void)host_stats; - (void)hmem_buf; -#else struct ia_css_3a_rgby_output *out_ptr; int i; @@ -291,7 +287,6 @@ ia_css_s3a_hmem_decode( out_ptr[0].g -= diff; out_ptr[0].b -= diff; out_ptr[0].y -= diff; -#endif } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index f3fb4b9b3c82..6974b3424d91 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -23,35 +23,6 @@ #include "ia_css_sc.host.h" -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -/* ISP2401 */ -static void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} - void ia_css_sc_encode( struct sh_css_isp_sc_params *to, @@ -73,45 +44,6 @@ ia_css_sc_dump( "sc_gain_shift", sc->gain_shift); } -/* ISP2401 */ -void -ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size) -{ - u32 internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; - u32 internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; - u32 slice, rest, i; - - (void)size; - - /* The internal_frame_origin_x_bqs_on_sctbl is separated to 8 times of slice_vec. */ - rest = internal_org_x_bqs; - for (i = 0; i < SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES; i++) { - slice = min(rest, ((uint32_t)ISP_SLICE_NELEMS)); - rest = rest - slice; - to->interped_gain_hor_slice_bqs[i] = slice; - } - - to->internal_frame_origin_y_bqs_on_sctbl = internal_org_y_bqs; -} - -/* ISP2401 */ -void -ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl) -{ - const struct ia_css_sc_configuration config = { - internal_frame_origin_x_bqs_on_sctbl, - internal_frame_origin_y_bqs_on_sctbl - }; - - ia_css_configure_sc(binary, &config); -} - /* ------ deprecated(bz675) : from ------ */ /* It looks like @parameter{} (in *.pipe) is used to generate the process/get/set functions, for parameters which should be used in the isp kernels. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h index f1eb568f23d4..d103103c9a87 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -32,39 +32,6 @@ ia_css_sc_dump( const struct sh_css_isp_sc_params *sc, unsigned int level); -/* @brief Configure the shading correction. - * @param[out] to Parameters used in the shading correction kernel in the isp. - * @param[in] from Parameters passed from the host. - * @param[in] size Size of the sh_css_isp_sc_isp_config structure. - * - * This function passes the parameters for the shading correction from the host to the isp. - */ -/* ISP2401 */ -void -ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size); - -/* @brief Configure the shading correction. - * @param[in] binary The binary, which has the shading correction. - * @param[in] internal_frame_origin_x_bqs_on_sctbl - * X coordinate (in bqs) of the origin of the internal frame on the shading table. - * @param[in] internal_frame_origin_y_bqs_on_sctbl - * Y coordinate (in bqs) of the origin of the internal frame on the shading table. - * - * This function calls the ia_css_configure_sc() function. - * (The ia_css_configure_sc() function is automatically generated in ia_css_isp.configs.c.) - * The ia_css_configure_sc() function calls the ia_css_sc_config() function - * to pass the parameters for the shading correction from the host to the isp. - */ -/* ISP2401 */ -void -ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl); - /* ------ deprecated(bz675) : from ------ */ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h index aae534521b7b..1d70f6b9a0ec 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -118,18 +118,4 @@ struct ia_css_shading_settings { /* ------ deprecated(bz675) : to ------ */ -/* Shading Correction configuration. - * - * NOTE: The shading table size is larger than or equal to the internal frame size. - */ -/* ISP2401 */ -struct ia_css_sc_configuration { - u32 internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ - u32 internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ - /** NOTE: bqs = size in BQ(Bayer Quad) unit. - 1BQ means {Gr,R,B,Gb}(2x2 pixels). - Horizontal 1 bqs corresponds to horizontal 2 pixels. - Vertical 1 bqs corresponds to vertical 2 pixels. */ -}; - #endif /* __IA_CSS_SC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c index ac80e6c6e67e..53050c0c49fc 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -71,40 +71,41 @@ ia_css_tnr_debug_dtrace( config->threshold_y, config->threshold_uv); } -void -ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size) +int ia_css_tnr_config(struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; unsigned int i; + int ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); + ret = ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); + if (ret) + return ret; to->width_a_over_b = elems_a / to->port_b.elems; to->frame_height = from->tnr_frames[0]->info.res.height; - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { to->tnr_frame_addr[i] = from->tnr_frames[i]->data + from->tnr_frames[i]->planes.yuyv.offset; } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *frames) +int ia_css_tnr_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *frames) { struct ia_css_tnr_configuration config; unsigned int i; - for (i = 0; i < NUM_TNR_FRAMES; i++) + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) config.tnr_frames[i] = frames[i]; - ia_css_configure_tnr(binary, &config); + return ia_css_configure_tnr(binary, &config); } void @@ -114,7 +115,7 @@ ia_css_init_tnr_state( { (void)size; - assert(NUM_TNR_FRAMES >= 2); + assert(NUM_VIDEO_TNR_FRAMES >= 2); assert(sizeof(*state) == size); state->tnr_in_buf_idx = 0; state->tnr_out_buf_idx = 1; diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h index 90d6e6b44a8d..acf92052b442 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h @@ -39,16 +39,12 @@ ia_css_tnr_debug_dtrace( const struct ia_css_tnr_config *config, unsigned int level); -void -ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size); +int ia_css_tnr_config(struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size); -void -ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *frames); +int ia_css_tnr_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *frames); void ia_css_init_tnr_state( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h index 60a2542cf685..551dd5cfa9f1 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h @@ -28,14 +28,14 @@ struct sh_css_isp_tnr_params { }; struct ia_css_tnr_configuration { - const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; }; struct sh_css_isp_tnr_isp_config { u32 width_a_over_b; u32 frame_height; struct dma_port_config port_b; - ia_css_ptr tnr_frame_addr[NUM_TNR_FRAMES]; + ia_css_ptr tnr_frame_addr[NUM_VIDEO_TNR_FRAMES]; }; #endif /* __IA_CSS_TNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c index dd3670972936..aecdcbe04ce1 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c @@ -26,26 +26,28 @@ #include "isp.h" -void -ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size) +int ia_css_vf_config(struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; - (void)size; to->vf_downscale_bits = from->vf_downscale_bits; to->enable = from->info != NULL; if (from->info) { ia_css_frame_info_to_frame_sp_info(&to->info, from->info); - ia_css_dma_configure_from_info(&to->dma.port_b, from->info); + ret = ia_css_dma_configure_from_info(&to->dma.port_b, from->info); + if (ret) + return ret; to->dma.width_a_over_b = elems_a / to->dma.port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->dma.port_b.elems == 0); + if (elems_a % to->dma.port_b.elems != 0) + return -EINVAL; } + return 0; } /* compute the log2 of the downscale factor needed to get closest @@ -120,12 +122,11 @@ configure_dma( config->info = vf_info; } -int -ia_css_vf_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2) { +int ia_css_vf_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) +{ int err; struct ia_css_vf_configuration config; const struct ia_css_binary_info *info = &binary->info->sp; @@ -138,7 +139,6 @@ ia_css_vf_configure( if (vf_info) vf_info->raw_bit_depth = info->dma.vfdec_bits_per_pixel; - ia_css_configure_vf(binary, &config); - return 0; + return ia_css_configure_vf(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h index 0e8de034a00e..d6b45d3754b0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h @@ -32,11 +32,9 @@ sh_css_vf_downscale_log2( const struct ia_css_frame_info *vf_info, unsigned int *downscale_log2); -void -ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size); +int ia_css_vf_config(struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size); int ia_css_vf_configure( diff --git a/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h index 11e439d838ae..bfe4f5976771 100644 --- a/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h @@ -36,17 +36,7 @@ more details. #define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8) #define BITS16_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 16) -#if ISP_VEC_NELEMS == 64 #define ISP_NWAY_LOG2 6 -#elif ISP_VEC_NELEMS == 32 -#define ISP_NWAY_LOG2 5 -#elif ISP_VEC_NELEMS == 16 -#define ISP_NWAY_LOG2 4 -#elif ISP_VEC_NELEMS == 8 -#define ISP_NWAY_LOG2 3 -#else -#error "isp_const.h ISP_VEC_NELEMS must be one of {8, 16, 32, 64}" -#endif /* ***************************** * ISP input/output buffer sizes @@ -164,9 +154,9 @@ more details. /* [isp vmem] table size[vectors] per line per color (GR,R,B,GB), multiples of NWAY */ #define ISP2400_SCTBL_VECTORS_PER_LINE_PER_COLOR \ - CEIL_DIV(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) #define ISP2401_SCTBL_VECTORS_PER_LINE_PER_COLOR \ - CEIL_DIV(ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB), multiples of NWAY */ #define SCTBL_VECTORS_PER_LINE \ diff --git a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h index 2614b89b8e34..c3ae5014a039 100644 --- a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h +++ b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h @@ -16,10 +16,6 @@ #ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ #define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#include <type_support.h> - -#include "input_system_global.h" - #include "input_system_defs.h" /* HIVE_ISYS_GPREG_MULTICAST_A_IDX,... */ /* @@ -33,55 +29,6 @@ #include "isp_acquisition_defs.h" #include "input_system_ctrl_defs.h" -typedef enum { - INPUT_SYSTEM_PORT_A = 0, - INPUT_SYSTEM_PORT_B, - INPUT_SYSTEM_PORT_C, - N_INPUT_SYSTEM_PORTS -} input_system_csi_port_t; - -typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; -typedef struct input_system_network_cfg_s input_system_network_cfg_t; -typedef struct target_cfg2400_s target_cfg2400_t; -typedef struct channel_cfg_s channel_cfg_t; -typedef struct backend_channel_cfg_s backend_channel_cfg_t; -typedef struct input_system_cfg2400_s input_system_cfg2400_t; -typedef struct mipi_port_state_s mipi_port_state_t; -typedef struct rx_channel_state_s rx_channel_state_t; -typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; -typedef struct input_switch_cfg_s input_switch_cfg_t; - -struct ctrl_unit_cfg_s { - isp2400_ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; - isp2400_ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; -}; - -struct input_system_network_cfg_s { - input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; - input_system_multiplex_t mux_cfg; - ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; -}; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_isp_cfg_t; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_sp_cfg_t; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_strm2mem_cfg_t; - -struct input_switch_cfg_channel_s { - u32 hsync_data_reg[2]; - u32 vsync_data_reg; -}; - struct target_cfg2400_s { input_switch_cfg_channel_t input_switch_channel_cfg; target_isp_cfg_t target_isp_cfg; @@ -89,24 +36,6 @@ struct target_cfg2400_s { target_strm2mem_cfg_t target_strm2mem_cfg; }; -struct backend_channel_cfg_s { - u32 fmt_control_word_1; // Format config. - u32 fmt_control_word_2; - u32 no_side_band; -}; - -typedef union { - csi_cfg_t csi_cfg; - tpg_cfg_t tpg_cfg; - prbs_cfg_t prbs_cfg; - gpfifo_cfg_t gpfifo_cfg; -} source_cfg_t; - -struct input_switch_cfg_s { - u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; - u32 vsync_data_reg; -}; - // Configuration of a channel. struct channel_cfg_s { u32 ch_id; @@ -238,47 +167,6 @@ typedef struct capture_unit_state_s capture_unit_state_t; typedef struct acquisition_unit_state_s acquisition_unit_state_t; typedef struct ctrl_unit_state_s ctrl_unit_state_t; -/* - * In 2300 ports can be configured independently and stream - * formats need to be specified. In 2400, there are only 8 - * supported configurations but the HW is fused to support - * only a single one. - * - * In 2300 the compressed format types are programmed by the - * user. In 2400 all stream formats are encoded on the stream. - * - * Use the enum to check validity of a user configuration - */ -typedef enum { - MONO_4L_1L_0L = 0, - MONO_3L_1L_0L, - MONO_2L_1L_0L, - MONO_1L_1L_0L, - STEREO_2L_1L_2L, - STEREO_3L_1L_1L, - STEREO_2L_1L_1L, - STEREO_1L_1L_1L, - N_RX_MODE -} rx_mode_t; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - -typedef enum { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -} mipi_compressor_t; - typedef enum { MIPI_FORMAT_RGB888 = 0, MIPI_FORMAT_RGB555, @@ -339,22 +227,6 @@ typedef enum { RX_IRQ_INFO_ERR_LINE_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT, } rx_irq_info_t; -typedef struct rx_cfg_s rx_cfg_t; - -/* - * Applied per port - */ -struct rx_cfg_s { - rx_mode_t mode; /* The HW config */ - enum mipi_port_id port; /* The port ID to apply the control on */ - unsigned int timeout; - unsigned int initcount; - unsigned int synccount; - unsigned int rxcount; - mipi_predictor_t comp; /* Just for backward compatibility */ - bool is_two_ppc; -}; - /* NOTE: The base has already an offset of 0x0100 */ static const hrt_address __maybe_unused MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = { 0x00000000UL, diff --git a/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h index f38773842646..e3c86069b390 100644 --- a/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h +++ b/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h @@ -44,11 +44,6 @@ typedef enum { N_INPUT_SYSTEM_SOURCE_TYPE } input_system_source_type_t; -typedef enum { - INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME, - INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST, -} input_system_polling_mode_t; - typedef struct input_system_channel_s input_system_channel_t; struct input_system_channel_s { stream2mmio_ID_t stream2mmio_id; @@ -111,9 +106,6 @@ struct isp2401_input_system_cfg_s { input_system_source_type_t mode; - /* ISP2401 */ - input_system_polling_mode_t polling_mode; - bool online; bool raw_packed; s8 linked_isys_stream_id; @@ -165,10 +157,6 @@ struct virtual_input_system_stream_s { u8 online; s8 linked_isys_stream_id; u8 valid; - - /* ISP2401 */ - input_system_polling_mode_t polling_mode; - s32 subscr_index; }; typedef struct virtual_input_system_stream_cfg_s diff --git a/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h index 24026090cd35..74bfa10e670e 100644 --- a/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h +++ b/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h @@ -16,9 +16,6 @@ #ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ #define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#include "type_support.h" -#include "input_system_global.h" - #include "csi_rx.h" #include "pixelgen.h" #include "isys_stream2mmio.h" @@ -69,29 +66,6 @@ typedef enum { /* The number of stores for compressed format types */ #define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) -#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 -#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 -#define COMPRESSED_BITS_PER_PIXEL_6 6 -#define COMPRESSED_BITS_PER_PIXEL_7 7 -#define COMPRESSED_BITS_PER_PIXEL_8 8 -enum mipi_compressor { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -}; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - typedef struct input_system_state_s input_system_state_t; struct input_system_state_s { ibuf_ctrl_state_t ibuf_ctrl_state[N_IBUF_CTRL_ID]; diff --git a/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h index b44099dbdacd..9935ac860bc2 100644 --- a/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h @@ -94,7 +94,6 @@ struct ia_css_binary_descr { bool enable_dpc; /* ISP2401 */ - bool enable_luma_only; bool enable_tnr; bool enable_capture_pp_bli; @@ -131,8 +130,6 @@ struct ia_css_binary { int sctbl_width_per_color; int sctbl_aligned_width_per_color; int sctbl_height; - int sctbl_legacy_width_per_color; - int sctbl_legacy_height; struct ia_css_sdis_info dis; struct ia_css_resolution dvs_envelope; bool online; diff --git a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c index 060d38749570..406ed5fb4c6a 100644 --- a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c @@ -108,7 +108,6 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, binary_dvs_env.height); } -/* ISP2400 */ /* Computation results of the origin coordinate of bayer on the shading table. */ struct sh_css_shading_table_bayer_origin_compute_results { u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ @@ -119,23 +118,7 @@ struct sh_css_shading_table_bayer_origin_compute_results { u32 sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ }; -/* ISP2401 */ -/* Requirements for the shading correction. */ -struct sh_css_binary_sc_requirements { - /* Bayer scaling factor, for the scaling which is applied before shading correction. */ - u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_ver_ratio_in; /* Vertical ratio (in) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_ver_ratio_out; /* Vertical ratio (out) of scaling applied BEFORE shading correction. */ - - /* ISP internal frame is composed of the real sensor data and the padding data. */ - u32 sensor_data_origin_x_bqs_on_internal; /* X origin (in bqs) of sensor data on internal frame - at shading correction. */ - u32 sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame - at shading correction. */ -}; - -/* ISP2400: Get the requirements for the shading correction. */ +/* Get the requirements for the shading correction. */ static int ia_css_binary_compute_shading_table_bayer_origin( const struct ia_css_binary *binary, /* [in] */ @@ -261,227 +244,12 @@ ia_css_binary_compute_shading_table_bayer_origin( return err; } -/* ISP2401: Get the requirements for the shading correction. */ -static int -sh_css_binary_get_sc_requirements(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct sh_css_binary_sc_requirements *scr) /* [out] */ -{ - int err; - - /* Numerator and denominator of the fixed bayer downscaling factor. (numerator >= denominator) */ - unsigned int bds_num, bds_den; - - /* Horizontal/Vertical ratio of bayer scaling between input area and output area. */ - unsigned int bs_hor_ratio_in, bs_hor_ratio_out, bs_ver_ratio_in, bs_ver_ratio_out; - - /* Left padding set by InputFormatter. */ - unsigned int left_padding_bqs; - - /* Flags corresponding to NEED_BDS_FACTOR_2_00/NEED_BDS_FACTOR_1_50/NEED_BDS_FACTOR_1_25 macros - * defined in isp kernels. */ - unsigned int need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25; - - /* Left padding adjusted inside the isp kernels. */ - unsigned int left_padding_adjusted_bqs; - - /* Top padding padded inside the isp kernel for bayer downscaling binaries. */ - unsigned int top_padding_bqs; - - /* Bayer downscaling factor 1.0 by fixed-point. */ - int bds_frac_acc = FRAC_ACC; /* FRAC_ACC is defined in ia_css_fixedbds_param.h. */ - - /* Right/Down shift amount caused by filters applied BEFORE shading corrertion. */ - unsigned int right_shift_bqs_before_bs; /* right shift before bayer scaling */ - unsigned int right_shift_bqs_after_bs; /* right shift after bayer scaling */ - unsigned int down_shift_bqs_before_bs; /* down shift before bayer scaling */ - unsigned int down_shift_bqs_after_bs; /* down shift after bayer scaling */ - - /* Origin of the real sensor data area on the internal frame at shading correction. */ - unsigned int sensor_data_origin_x_bqs_on_internal; - unsigned int sensor_data_origin_y_bqs_on_internal; - - unsigned int bs_frac = bds_frac_acc; /* scaling factor 1.0 in fixed point */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); - - /* Get the numerator and denominator of the required bayer downscaling factor. */ - err = sh_css_bds_factor_get_numerator_denominator(required_bds_factor, - &bds_num, &bds_den); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - IA_CSS_LOG("bds_num=%d, bds_den=%d", bds_num, bds_den); - - /* Set the horizontal/vertical ratio of bayer scaling between input area and output area. */ - bs_hor_ratio_in = bds_num; - bs_hor_ratio_out = bds_den; - bs_ver_ratio_in = bds_num; - bs_ver_ratio_out = bds_den; - - /* Set the left padding set by InputFormatter. (ia_css_ifmtr_configure() in ifmtr.c) */ - if (stream_config->left_padding == -1) - left_padding_bqs = _ISP_BQS(binary->left_padding); - else - left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - _ISP_BQS(stream_config->left_padding)); - - IA_CSS_LOG("stream.left_padding=%d, binary.left_padding=%d, left_padding_bqs=%d", - stream_config->left_padding, binary->left_padding, - left_padding_bqs); - - /* Set the left padding adjusted inside the isp kernels. - * When the bds_factor isn't 1.00, the left padding size is adjusted inside the isp, - * before bayer downscaling. (scaled_hor_plane_index(), raw_compute_hphase() in raw.isp.c) - */ - need_bds_factor_2_00 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_8_00))) != 0); - - need_bds_factor_1_50 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00))) != 0); - - need_bds_factor_1_25 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00))) != 0); - - if (binary->info->sp.pipeline.left_cropping > 0 && - (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25)) { - /* - * downscale 2.0 -> first_vec_adjusted_bqs = 128 - * downscale 1.5 -> first_vec_adjusted_bqs = 96 - * downscale 1.25 -> first_vec_adjusted_bqs = 80 - */ - unsigned int first_vec_adjusted_bqs = ISP_VEC_NELEMS * bs_hor_ratio_in / bs_hor_ratio_out; - left_padding_adjusted_bqs = first_vec_adjusted_bqs - - _ISP_BQS(binary->info->sp.pipeline.left_cropping); - } else { - left_padding_adjusted_bqs = left_padding_bqs; - } - - IA_CSS_LOG("supported_bds_factors=%d, need_bds_factor:2_00=%d, 1_50=%d, 1_25=%d", - binary->info->sp.bds.supported_bds_factors, - need_bds_factor_2_00, need_bds_factor_1_50, - need_bds_factor_1_25); - IA_CSS_LOG("left_cropping=%d, left_padding_adjusted_bqs=%d", - binary->info->sp.pipeline.left_cropping, - left_padding_adjusted_bqs); - - /* Set the top padding padded inside the isp kernel for bayer downscaling binaries. - * When the bds_factor isn't 1.00, the top padding is padded inside the isp - * before bayer downscaling, because the top cropping size (input margin) is not enough. - * (calculate_input_line(), raw_compute_vphase(), dma_read_raw() in raw.isp.c) - * NOTE: In dma_read_raw(), the factor passed to raw_compute_vphase() is got by get_bds_factor_for_dma_read(). - * This factor is BDS_FPVAL_100/BDS_FPVAL_125/BDS_FPVAL_150/BDS_FPVAL_200. - */ - top_padding_bqs = 0; - if (binary->info->sp.pipeline.top_cropping > 0 && - (required_bds_factor == SH_CSS_BDS_FACTOR_1_25 || - required_bds_factor == SH_CSS_BDS_FACTOR_1_50 || - required_bds_factor == SH_CSS_BDS_FACTOR_2_00)) { - /* Calculation from calculate_input_line() and raw_compute_vphase() in raw.isp.c. */ - int top_cropping_bqs = _ISP_BQS(binary->info->sp.pipeline.top_cropping); - /* top cropping (in bqs) */ - int factor = bds_num * bds_frac_acc / - bds_den; /* downscaling factor by fixed-point */ - int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * - bds_frac_acc) - + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ - - top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc / 2 - - 1) / bds_frac_acc); - } - - IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", - binary->info->sp.pipeline.top_cropping, top_padding_bqs); - - /* Set the right/down shift amount caused by filters applied BEFORE bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When the bds_factor isn't 1.00, 3x3 anti-alias filter is applied to each color plane(Gr/R/B/Gb) - * before bayer downscaling. - * This filter shifts each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_before_bs = 0; - down_shift_bqs_before_bs = 0; - - if (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25) { - right_shift_bqs_before_bs = 1; - down_shift_bqs_before_bs = 1; - } - - IA_CSS_LOG("right_shift_bqs_before_bs=%d, down_shift_bqs_before_bs=%d", - right_shift_bqs_before_bs, down_shift_bqs_before_bs); - - /* Set the right/down shift amount caused by filters applied AFTER bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When DPC&BNR is processed between bayer scaling and shading correction, - * DPC&BNR moves each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_after_bs = 0; - down_shift_bqs_after_bs = 0; - - /* if DPC&BNR is enabled in the binary */ - if (binary->info->mem_offsets.offsets.param->dmem.dp.size != 0) { - right_shift_bqs_after_bs = 1; - down_shift_bqs_after_bs = 1; - } - - IA_CSS_LOG("right_shift_bqs_after_bs=%d, down_shift_bqs_after_bs=%d", - right_shift_bqs_after_bs, down_shift_bqs_after_bs); - - bs_out = bs_hor_ratio_out * bs_frac; - bs_in = bs_hor_ratio_in * bs_frac; - sensor_data_origin_x_bqs_on_internal = - ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - - bs_out = bs_ver_ratio_out * bs_frac; - bs_in = bs_ver_ratio_in * bs_frac; - sensor_data_origin_y_bqs_on_internal = - ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - - scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; - scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; - scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; - scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; - scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; - scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; - - IA_CSS_LOG("sc_requirements: %d, %d, %d, %d, %d, %d", - scr->bayer_scale_hor_ratio_in, - scr->bayer_scale_hor_ratio_out, - scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, - scr->sensor_data_origin_x_bqs_on_internal, - scr->sensor_data_origin_y_bqs_on_internal); - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - /* Get the shading information of Shading Correction Type 1. */ static int -isp2400_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct ia_css_shading_info *info) /* [out] */ +binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct ia_css_shading_info *info) /* [out] */ { int err; struct sh_css_shading_table_bayer_origin_compute_results res; @@ -522,173 +290,6 @@ isp2400_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [i return err; } -/* Get the shading information of Shading Correction Type 1. */ -static int -isp2401_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct ia_css_shading_info *shading_info, /* [out] */ - struct ia_css_pipe_config *pipe_config) /* [out] */ -{ - int err; - struct sh_css_binary_sc_requirements scr; - - u32 in_width_bqs, in_height_bqs, internal_width_bqs, internal_height_bqs; - u32 num_hor_grids, num_ver_grids, bqs_per_grid_cell, tbl_width_bqs, tbl_height_bqs; - u32 sensor_org_x_bqs_on_internal, sensor_org_y_bqs_on_internal, sensor_width_bqs, sensor_height_bqs; - u32 sensor_center_x_bqs_on_internal, sensor_center_y_bqs_on_internal; - u32 left, right, upper, lower; - u32 adjust_left, adjust_right, adjust_upper, adjust_lower, adjust_width_bqs, adjust_height_bqs; - u32 internal_org_x_bqs_on_tbl, internal_org_y_bqs_on_tbl; - u32 sensor_org_x_bqs_on_tbl, sensor_org_y_bqs_on_tbl; - - assert(binary); - assert(stream_config); - assert(shading_info); - assert(pipe_config); - - IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); - - /* Initialize by default values. */ - *shading_info = DEFAULT_SHADING_INFO_TYPE_1; - - err = sh_css_binary_get_sc_requirements(binary, required_bds_factor, stream_config, &scr); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - IA_CSS_LOG("binary: id=%d, sctbl=%dx%d, deci=%d", - binary->info->sp.id, binary->sctbl_width_per_color, binary->sctbl_height, binary->deci_factor_log2); - IA_CSS_LOG("binary: in=%dx%d, in_padded_w=%d, int=%dx%d, int_padded_w=%d, out=%dx%d, out_padded_w=%d", - binary->in_frame_info.res.width, binary->in_frame_info.res.height, binary->in_frame_info.padded_width, - binary->internal_frame_info.res.width, binary->internal_frame_info.res.height, - binary->internal_frame_info.padded_width, - binary->out_frame_info[0].res.width, binary->out_frame_info[0].res.height, - binary->out_frame_info[0].padded_width); - - /* Set the input size from sensor, which includes left/top crop size. */ - in_width_bqs = _ISP_BQS(binary->in_frame_info.res.width); - in_height_bqs = _ISP_BQS(binary->in_frame_info.res.height); - - /* - * Frame size internally used in ISP, including sensor data and padding. - * This is the frame size, to which the shading correction is applied. - */ - internal_width_bqs = _ISP_BQS(binary->internal_frame_info.res.width); - internal_height_bqs = _ISP_BQS(binary->internal_frame_info.res.height); - - /* Shading table. */ - num_hor_grids = binary->sctbl_width_per_color; - num_ver_grids = binary->sctbl_height; - bqs_per_grid_cell = (1 << binary->deci_factor_log2); - tbl_width_bqs = (num_hor_grids - 1) * bqs_per_grid_cell; - tbl_height_bqs = (num_ver_grids - 1) * bqs_per_grid_cell; - - IA_CSS_LOG("tbl_width_bqs=%d, tbl_height_bqs=%d", tbl_width_bqs, tbl_height_bqs); - - /* - * Real sensor data area on the internal frame at shading correction. - * Filters and scaling are applied to the internal frame before - * shading correction, depending on the binary. - */ - sensor_org_x_bqs_on_internal = scr.sensor_data_origin_x_bqs_on_internal; - sensor_org_y_bqs_on_internal = scr.sensor_data_origin_y_bqs_on_internal; - { - unsigned int bs_frac = 8; /* scaling factor 1.0 in fixed point (8 == FRAC_ACC macro in ISP) */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; - bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; - sensor_width_bqs = (in_width_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - - bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; - bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; - sensor_height_bqs = (in_height_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - } - - /* Center of the sensor data on the internal frame at shading correction. */ - sensor_center_x_bqs_on_internal = sensor_org_x_bqs_on_internal + sensor_width_bqs / 2; - sensor_center_y_bqs_on_internal = sensor_org_y_bqs_on_internal + sensor_height_bqs / 2; - - /* Size of left/right/upper/lower sides of the sensor center on the internal frame. */ - left = sensor_center_x_bqs_on_internal; - right = internal_width_bqs - sensor_center_x_bqs_on_internal; - upper = sensor_center_y_bqs_on_internal; - lower = internal_height_bqs - sensor_center_y_bqs_on_internal; - - /* Align the size of left/right/upper/lower sides to a multiple of the grid cell size. */ - adjust_left = CEIL_MUL(left, bqs_per_grid_cell); - adjust_right = CEIL_MUL(right, bqs_per_grid_cell); - adjust_upper = CEIL_MUL(upper, bqs_per_grid_cell); - adjust_lower = CEIL_MUL(lower, bqs_per_grid_cell); - - /* Shading table should cover the adjusted frame size. */ - adjust_width_bqs = adjust_left + adjust_right; - adjust_height_bqs = adjust_upper + adjust_lower; - - IA_CSS_LOG("adjust_width_bqs=%d, adjust_height_bqs=%d", adjust_width_bqs, adjust_height_bqs); - - if (adjust_width_bqs > tbl_width_bqs || adjust_height_bqs > tbl_height_bqs) { - IA_CSS_LEAVE_ERR_PRIVATE(-EINVAL); - return -EINVAL; - } - - /* Origin of the internal frame on the shading table. */ - internal_org_x_bqs_on_tbl = adjust_left - left; - internal_org_y_bqs_on_tbl = adjust_upper - upper; - - /* Origin of the real sensor data area on the shading table. */ - sensor_org_x_bqs_on_tbl = internal_org_x_bqs_on_tbl + sensor_org_x_bqs_on_internal; - sensor_org_y_bqs_on_tbl = internal_org_y_bqs_on_tbl + sensor_org_y_bqs_on_internal; - - /* The shading information necessary as API is stored in the shading_info. */ - shading_info->info.type_1.num_hor_grids = num_hor_grids; - shading_info->info.type_1.num_ver_grids = num_ver_grids; - shading_info->info.type_1.bqs_per_grid_cell = bqs_per_grid_cell; - - shading_info->info.type_1.bayer_scale_hor_ratio_in = scr.bayer_scale_hor_ratio_in; - shading_info->info.type_1.bayer_scale_hor_ratio_out = scr.bayer_scale_hor_ratio_out; - shading_info->info.type_1.bayer_scale_ver_ratio_in = scr.bayer_scale_ver_ratio_in; - shading_info->info.type_1.bayer_scale_ver_ratio_out = scr.bayer_scale_ver_ratio_out; - - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width = in_width_bqs; - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height = in_height_bqs; - - shading_info->info.type_1.sensor_data_res_bqs.width = sensor_width_bqs; - shading_info->info.type_1.sensor_data_res_bqs.height = sensor_height_bqs; - - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x = (int32_t)sensor_org_x_bqs_on_tbl; - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y = (int32_t)sensor_org_y_bqs_on_tbl; - - /* The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. */ - pipe_config->internal_frame_origin_bqs_on_sctbl.x = (int32_t)internal_org_x_bqs_on_tbl; - pipe_config->internal_frame_origin_bqs_on_sctbl.y = (int32_t)internal_org_y_bqs_on_tbl; - - IA_CSS_LOG("shading_info: grids=%dx%d, cell=%d, scale=%d,%d,%d,%d, input=%dx%d, data=%dx%d, origin=(%d,%d)", - shading_info->info.type_1.num_hor_grids, - shading_info->info.type_1.num_ver_grids, - shading_info->info.type_1.bqs_per_grid_cell, - shading_info->info.type_1.bayer_scale_hor_ratio_in, - shading_info->info.type_1.bayer_scale_hor_ratio_out, - shading_info->info.type_1.bayer_scale_ver_ratio_in, - shading_info->info.type_1.bayer_scale_ver_ratio_out, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_res_bqs.width, - shading_info->info.type_1.sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y); - - IA_CSS_LOG("pipe_config: origin=(%d,%d)", - pipe_config->internal_frame_origin_bqs_on_sctbl.x, - pipe_config->internal_frame_origin_bqs_on_sctbl.y); - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - int ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ @@ -706,24 +307,13 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", binary, type, required_bds_factor, stream_config); - if (type != IA_CSS_SHADING_CORRECTION_TYPE_1) { - err = -ENOTSUPP; - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - if (!IS_ISP2401) - err = isp2400_binary_get_shading_info_type_1(binary, - required_bds_factor, - stream_config, - shading_info); + if (type == IA_CSS_SHADING_CORRECTION_TYPE_1) + err = binary_get_shading_info_type_1(binary, + required_bds_factor, + stream_config, + shading_info); else - err = isp2401_binary_get_shading_info_type_1(binary, - required_bds_factor, - stream_config, - shading_info, - pipe_config); + err = -ENOTSUPP; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -805,11 +395,7 @@ ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, s3a_info->deci_factor_log2 = binary->deci_factor_log2; s3a_info->elem_bit_depth = SH_CSS_BAYER_BITS; s3a_info->use_dmem = binary->info->sp.s3a.s3atbl_use_dmem; -#if defined(HAS_NO_HMEM) - s3a_info->has_histogram = 1; -#else s3a_info->has_histogram = 0; -#endif IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } @@ -965,15 +551,9 @@ binary_grid_deci_factor_log2(int width, int height) /* 3A/Shading decimation factor spcification (at August 2008) * ------------------------------------------------------------------ * [Image Width (BQ)] [Decimation Factor (BQ)] [Resulting grid cells] - #ifndef ISP2401 * 1280 ?c 32 40 ?c * 640 ?c 1279 16 40 ?c 80 * ?c 639 8 ?c 80 - #else - * from 1280 32 from 40 - * from 640 to 1279 16 from 40 to 80 - * to 639 8 to 80 - #endif * ------------------------------------------------------------------ */ /* Maximum and minimum decimation factor by the specification */ @@ -1335,26 +915,14 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, if (info->enable.sc) { - if (!IS_ISP2401) { - binary->sctbl_width_per_color = _ISP2400_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); - binary->sctbl_aligned_width_per_color = ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP2400_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); - } else { - binary->sctbl_width_per_color = _ISP2401_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); - binary->sctbl_aligned_width_per_color = ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP2401_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); - binary->sctbl_legacy_width_per_color = _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); - binary->sctbl_legacy_height = _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); - } + binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_aligned_width_per_color = SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + binary->sctbl_height = _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); } else { binary->sctbl_width_per_color = 0; binary->sctbl_aligned_width_per_color = 0; binary->sctbl_height = 0; - if (IS_ISP2401) { - binary->sctbl_legacy_width_per_color = 0; - binary->sctbl_legacy_height = 0; - } } ia_css_sdis_init_info(&binary->dis, sc_3a_dis_width, @@ -1383,20 +951,13 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, *req_vf_info; struct ia_css_binary_xinfo *xcandidate; -#ifndef ISP2401 bool need_ds, need_dz, need_dvs, need_xnr, need_dpc; -#else - bool need_ds, need_dz, need_dvs, need_xnr, need_dpc, need_tnr; -#endif bool striped; bool enable_yuv_ds; bool enable_high_speed; bool enable_dvs_6axis; bool enable_reduced_pipe; bool enable_capture_pp_bli; -#ifdef ISP2401 - bool enable_luma_only; -#endif int err = -EINVAL; bool continuous; unsigned int isp_pipe_version; @@ -1418,41 +979,26 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, stream_format = descr->stream_format; req_in_info = descr->in_info; req_bds_out_info = descr->bds_out_info; - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) - { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { req_out_info[i] = descr->out_info[i]; if (req_out_info[i] && (req_out_info[i]->res.width != 0)) req_bin_out_info = req_out_info[i]; } if (!req_bin_out_info) return -EINVAL; -#ifndef ISP2401 req_vf_info = descr->vf_info; -#else - - if ((descr->vf_info) && (descr->vf_info->res.width == 0)) - /* width==0 means that there is no vf pin (e.g. in SkyCam preview case) */ - req_vf_info = NULL; - else - req_vf_info = descr->vf_info; -#endif need_xnr = descr->enable_xnr; need_ds = descr->enable_fractional_ds; need_dz = false; need_dvs = false; need_dpc = descr->enable_dpc; -#ifdef ISP2401 - need_tnr = descr->enable_tnr; -#endif + enable_yuv_ds = descr->enable_yuv_ds; enable_high_speed = descr->enable_high_speed; enable_dvs_6axis = descr->enable_dvs_6axis; enable_reduced_pipe = descr->enable_reduced_pipe; enable_capture_pp_bli = descr->enable_capture_pp_bli; -#ifdef ISP2401 - enable_luma_only = descr->enable_luma_only; -#endif continuous = descr->continuous; striped = descr->striped; isp_pipe_version = descr->isp_pipe_version; @@ -1462,8 +1008,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, internal_res.width = 0; internal_res.height = 0; - if (mode == IA_CSS_BINARY_MODE_VIDEO) - { + if (mode == IA_CSS_BINARY_MODE_VIDEO) { dvs_env = descr->dvs_env; need_dz = descr->enable_dz; /* Video is the only mode that has a nodz variant. */ @@ -1472,8 +1017,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, /* print a map of the binary file */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "BINARY INFO:\n"); - for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) - { + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { xcandidate = binary_infos[i]; if (xcandidate) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%d:\n", i); @@ -1488,8 +1032,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, /* printf("sh_css_binary_find: pipe version %d\n", isp_pipe_version); */ for (xcandidate = binary_infos[mode]; xcandidate; - xcandidate = xcandidate->next) - { + xcandidate = xcandidate->next) { struct ia_css_binary_info *candidate = &xcandidate->sp; /* printf("sh_css_binary_find: evaluating candidate: * %d\n",candidate->id); */ @@ -1747,24 +1290,6 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, continue; } -#ifdef ISP2401 - if (candidate->enable.luma_only != enable_luma_only) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d != %d\n", - __LINE__, candidate->enable.luma_only, - descr->enable_luma_only); - continue; - } - - if (!candidate->enable.tnr && need_tnr) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, candidate->enable.tnr, - descr->enable_tnr); - continue; - } - -#endif /* reconfigure any variable properties of the binary */ err = ia_css_binary_fill_info(xcandidate, online, two_ppc, stream_format, req_in_info, diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index 05ce0f73f5ae..f46238725eea 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -2821,7 +2821,7 @@ ia_css_debug_pipe_graph_dump_stage( "in", true); } - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { if (stage->args.tnr_frames[i]) { ia_css_debug_pipe_graph_dump_frame( stage->args.tnr_frames[i], id, diff --git a/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h index 31f01e0f58aa..c756a134efc3 100644 --- a/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h +++ b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h @@ -138,27 +138,7 @@ bool ia_css_frame_is_same_type( * @param[in] info The frame info * @return */ -void ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info); - -/* ISP2401 */ -/* @brief Finds the cropping resolution - * This function finds the maximum cropping resolution in an input image keeping - * the aspect ratio for the given output resolution.Calculates the coordinates - * for cropping from the center and returns the starting pixel location of the - * region in the input image. Also returns the dimension of the cropping - * resolution. - * - * @param - * @param[in] in_res Resolution of input image - * @param[in] out_res Resolution of output image - * @param[out] crop_res Crop resolution of input image - * @return Returns 0 or -EINVAL on error - */ -int -ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res); +int ia_css_dma_configure_from_info(struct dma_port_config *config, + const struct ia_css_frame_info *info); #endif /* __IA_CSS_FRAME_H__ */ diff --git a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c index 10c4907187d9..a3aae638b0bf 100644 --- a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c @@ -168,25 +168,23 @@ int ia_css_frame_map(struct ia_css_frame **frame, if (err) return err; - if (!err) { - if (pgnr < ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { - dev_err(atomisp_dev, - "user space memory size is less than the expected size..\n"); - err = -ENOMEM; - goto error; - } else if (pgnr > ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { - dev_err(atomisp_dev, - "user space memory size is large than the expected size..\n"); - err = -ENOMEM; - goto error; - } + if (pgnr < ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { + dev_err(atomisp_dev, + "user space memory size is less than the expected size..\n"); + err = -ENOMEM; + goto error; + } else if (pgnr > ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { + dev_err(atomisp_dev, + "user space memory size is large than the expected size..\n"); + err = -ENOMEM; + goto error; + } - me->data = hmm_alloc(me->data_bytes, HMM_BO_USER, 0, data, - attribute & ATOMISP_MAP_FLAG_CACHED); + me->data = hmm_alloc(me->data_bytes, HMM_BO_USER, 0, data, + attribute & ATOMISP_MAP_FLAG_CACHED); - if (me->data == mmgr_NULL) - err = -EINVAL; - } + if (me->data == mmgr_NULL) + err = -EINVAL; error: if (err) { @@ -594,10 +592,8 @@ bool ia_css_frame_is_same_type(const struct ia_css_frame *frame_a, return is_equal; } -void -ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info) +int ia_css_dma_configure_from_info(struct dma_port_config *config, + const struct ia_css_frame_info *info) { unsigned int is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; unsigned int bits_per_pixel = is_raw_packed ? info->raw_bit_depth : @@ -610,7 +606,13 @@ ia_css_dma_configure_from_info( config->elems = (uint8_t)elems_b; config->width = (uint16_t)info->res.width; config->crop = 0; - assert(config->width <= info->padded_width); + + if (config->width > info->padded_width) { + dev_err(atomisp_dev, "internal error: padded_width is too small!\n"); + return -EINVAL; + } + + return 0; } /************************************************************************** @@ -931,73 +933,3 @@ void ia_css_resolution_to_sp_resolution( to->width = (uint16_t)from->width; to->height = (uint16_t)from->height; } - -/* ISP2401 */ -int -ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res) { - u32 wd_even_ceil, ht_even_ceil; - u32 in_ratio, out_ratio; - - if ((!in_res) || (!out_res) || (!crop_res)) - return -EINVAL; - - IA_CSS_ENTER_PRIVATE("in(%ux%u) -> out(%ux%u)", in_res->width, - in_res->height, out_res->width, out_res->height); - - if ((in_res->width == 0) - || (in_res->height == 0) - || (out_res->width == 0) - || (out_res->height == 0)) - return -EINVAL; - - if ((out_res->width > in_res->width) || - (out_res->height > in_res->height)) - return -EINVAL; - - /* If aspect ratio (width/height) of out_res is higher than the aspect - * ratio of the in_res, then we crop vertically, otherwise we crop - * horizontally. - */ - in_ratio = in_res->width * out_res->height; - out_ratio = out_res->width * in_res->height; - - if (in_ratio == out_ratio) - { - crop_res->width = in_res->width; - crop_res->height = in_res->height; - } else if (out_ratio > in_ratio) - { - crop_res->width = in_res->width; - crop_res->height = ROUND_DIV(out_res->height * crop_res->width, - out_res->width); - } else - { - crop_res->height = in_res->height; - crop_res->width = ROUND_DIV(out_res->width * crop_res->height, - out_res->height); - } - - /* Round new (cropped) width and height to an even number. - * binarydesc_calculate_bds_factor is such that we should consider as - * much of the input as possible. This is different only when we end up - * with an odd number in the last step. So, we take the next even number - * if it falls within the input, otherwise take the previous even no. - */ - wd_even_ceil = EVEN_CEIL(crop_res->width); - ht_even_ceil = EVEN_CEIL(crop_res->height); - if ((wd_even_ceil > in_res->width) || (ht_even_ceil > in_res->height)) - { - crop_res->width = EVEN_FLOOR(crop_res->width); - crop_res->height = EVEN_FLOOR(crop_res->height); - } else - { - crop_res->width = wd_even_ceil; - crop_res->height = ht_even_ceil; - } - - IA_CSS_LEAVE_PRIVATE("in(%ux%u) -> out(%ux%u)", crop_res->width, - crop_res->height, out_res->width, out_res->height); - return 0; -} diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c index 82f3c19dc455..8fc7746f8639 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c @@ -189,17 +189,6 @@ ia_css_isys_error_t ia_css_isys_stream_create( return false; } -#ifdef ISP2401 - /* - * Early polling is required for timestamp accuracy in certain cause. - * The ISYS HW polling is started on - * ia_css_isys_stream_capture_indication() instead of - * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of - * capture takes longer than getting an ISYS frame - */ - isys_stream->polling_mode = isys_stream_descr->polling_mode; - -#endif /* create metadata channel */ if (isys_stream_descr->metadata.enable) { rc = create_input_system_channel(isys_stream_descr, true, diff --git a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c index d03957d1ecf4..dfc50247ea8e 100644 --- a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c @@ -140,8 +140,7 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, false, false, false, true, SH_CSS_BDS_FACTOR_1_00, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, - (enum mipi_port_id)0, - NULL, NULL); + (enum mipi_port_id)0); ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); if (!sh_css_sp_is_running()) { diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index c4b35cbab373..1d605e533e29 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -20,6 +20,8 @@ #include "hmm.h" +#include "atomisp_internal.h" + #include "ia_css.h" #include "sh_css_hrt.h" /* only for file 2 MIPI */ #include "ia_css_buffer.h" @@ -62,9 +64,9 @@ #include "ia_css_mmu_private.h" /* sh_css_mmu_set_page_table_base_index() */ #include "gdc_device.h" /* HRT_GDC_N */ #include "dma.h" /* dma_set_max_burst_size() */ -#include "irq.h" /* virq */ -#include "sp.h" /* cnd_sp_irq_enable() */ -#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */ +#include "irq.h" /* virq */ +#include "sp.h" /* cnd_sp_irq_enable() */ +#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */ #include "gp_device.h" /* gp_device_reg_store() */ #define __INLINE_GPIO__ #include "gpio.h" @@ -74,15 +76,6 @@ #define SH_CSS_VIDEO_BUFFER_ALIGNMENT 0 -#if WITH_PC_MONITORING -#define MULTIPLE_SAMPLES 1 -#define NOF_SAMPLES 60 -#include "linux/kthread.h" -#include "linux/sched.h" -#include "linux/delay.h" -#include "sh_css_metrics.h" -static int thread_alive; -#endif /* WITH_PC_MONITORING */ #include "ia_css_spctrl.h" #include "ia_css_version_data.h" @@ -97,8 +90,9 @@ static int thread_alive; /* Size of Refcount List */ #define REFCOUNT_SIZE 1000 -/* for JPEG, we don't know the length of the image upfront, - * but since we support sensor upto 16MP, we take this as +/* + * for JPEG, we don't know the length of the image upfront, + * but since we support sensor up to 16MP, we take this as * upper limit. */ #define JPEG_BYTES (16 * 1024 * 1024) @@ -110,9 +104,10 @@ struct sh_css my_css; int __printf(1, 0) (*sh_css_printf)(const char *fmt, va_list args) = NULL; -/* modes of work: stream_create and stream_destroy will update the save/restore data - only when in working mode, not suspend/resume -*/ +/* + * modes of work: stream_create and stream_destroy will update the save/restore + * data only when in working mode, not suspend/resume + */ enum ia_sh_css_modes { sh_css_mode_none = 0, sh_css_mode_working, @@ -120,40 +115,55 @@ enum ia_sh_css_modes { sh_css_mode_resume }; -/* a stream seed, to save and restore the stream data. - the stream seed contains all the data required to "grow" the seed again after it was closed. +/** + * struct sh_css_stream_seed - a stream seed, to save and restore the + * stream data. + * + * @orig_stream: pointer to restore the original handle + * @stream: handle, used as ID too. + * @stream_config: stream config struct + * @num_pipes: number of pipes + * @pipes: pipe handles + * @orig_pipes: pointer to restore original handle + * @pipe_config: pipe config structs + * + * the stream seed contains all the data required to "grow" the seed again + * after it was closed. */ struct sh_css_stream_seed { - struct ia_css_stream - **orig_stream; /* pointer to restore the original handle */ - struct ia_css_stream *stream; /* handle, used as ID too.*/ - struct ia_css_stream_config stream_config; /* stream config struct */ + struct ia_css_stream **orig_stream; + struct ia_css_stream *stream; + struct ia_css_stream_config stream_config; int num_pipes; - struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; /* pipe handles */ - struct ia_css_pipe - **orig_pipes[IA_CSS_PIPE_ID_NUM]; /* pointer to restore original handle */ - struct ia_css_pipe_config - pipe_config[IA_CSS_PIPE_ID_NUM]; /* pipe config structs */ + struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe **orig_pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; }; #define MAX_ACTIVE_STREAMS 5 -/* A global struct for save/restore to hold all the data that should sustain power-down: - MMU base, IRQ type, env for routines, binary loaded FW and the stream seeds. -*/ +/* + * A global struct for save/restore to hold all the data that should + * sustain power-down: MMU base, IRQ type, env for routines, binary loaded FW + * and the stream seeds. + */ struct sh_css_save { enum ia_sh_css_modes mode; - u32 mmu_base; /* the last mmu_base */ + u32 mmu_base; /* the last mmu_base */ enum ia_css_irq_type irq_type; struct sh_css_stream_seed stream_seeds[MAX_ACTIVE_STREAMS]; - struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ - struct ia_css_env driver_env; /* driver-supplied env copy */ + struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ + struct ia_css_env driver_env; /* driver-supplied env copy */ }; static bool my_css_save_initialized; /* if my_css_save was initialized */ static struct sh_css_save my_css_save; -/* pqiao NOTICE: this is for css internal buffer recycling when stopping pipeline, - this array is temporary and will be replaced by resource manager*/ +/* + * pqiao NOTICE: this is for css internal buffer recycling when stopping + * pipeline, + * this array is temporary and will be replaced by resource manager + */ + /* Taking the biggest Size for number of Elements */ #define MAX_HMM_BUFFER_NUM \ (SH_CSS_MAX_NUM_QUEUES * (IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE + 2)) @@ -181,27 +191,6 @@ allocate_delay_frames(struct ia_css_pipe *pipe); static int sh_css_pipe_start(struct ia_css_stream *stream); -/* ISP 2401 */ -/* - * @brief Stop all "ia_css_pipe" instances in the target - * "ia_css_stream" instance. - * - * @param[in] stream Point to the target "ia_css_stream" instance. - * - * @return - * - 0, if the "stop" requests have been successfully sent out. - * - CSS error code, otherwise. - * - * - * NOTE - * This API sends the "stop" requests to the "ia_css_pipe" - * instances in the same "ia_css_stream" instance. It will - * return without waiting for all "ia_css_pipe" instatnces - * being stopped. - */ -static int -sh_css_pipes_stop(struct ia_css_stream *stream); - /* * @brief Check if all "ia_css_pipe" instances in the target * "ia_css_stream" instance have stopped. @@ -213,9 +202,6 @@ sh_css_pipes_stop(struct ia_css_stream *stream); * instance have ben stopped. * - false, otherwise. */ -/* ISP 2401 */ -static bool -sh_css_pipes_have_stopped(struct ia_css_stream *stream); /* ISP 2401 */ static int @@ -224,9 +210,6 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, /* ISP 2401 */ static int -check_pipe_resolutions(const struct ia_css_pipe *pipe); - -static int ia_css_pipe_load_extension(struct ia_css_pipe *pipe, struct ia_css_fw_info *firmware); @@ -384,10 +367,6 @@ ia_css_get_acc_configs( struct ia_css_pipe *pipe, struct ia_css_isp_config *config); -#if CONFIG_ON_FRAME_ENQUEUE() -static int set_config_on_frame_enqueue(struct ia_css_frame_info - *info, struct frame_data_wrapper *frame); -#endif #ifdef ISP2401 static unsigned int get_crop_lines_for_bayer_order(const struct @@ -396,17 +375,7 @@ static unsigned int get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config); static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int *extra_row, unsigned int *extra_column); -static int -aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status); - -static bool -aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe); -static int -aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res); #endif static void @@ -447,9 +416,10 @@ static enum ia_css_frame_format yuv422_copy_formats[] = { IA_CSS_FRAME_FORMAT_YUYV }; -/* Verify whether the selected output format is can be produced +/* + * Verify whether the selected output format is can be produced * by the copy binary given the stream format. - * */ + */ static int verify_copy_out_frame_format(struct ia_css_pipe *pipe) { @@ -522,6 +492,7 @@ ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream) return bpp; } +/* TODO: move define to proper file in tools */ #define GP_ISEL_TPG_MODE 0x90058 #if !defined(ISP2401) @@ -573,12 +544,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) vblank_cycles = vblank_lines * (width + hblank_cycles); sh_css_sp_configure_sync_gen(width, height, hblank_cycles, vblank_cycles); - if (!IS_ISP2401) { - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { - /* TODO: move define to proper file in tools */ - ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); - } - } + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) + ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_config_input_network() leave:\n"); @@ -689,13 +656,13 @@ static unsigned int csi2_protocol_calculate_max_subpixels_per_line( /* * The frame format layout is shown below. * - * Line 0: Pixel Pixel ... Pixel - * Line 1: Pixel Pixel ... Pixel - * Line 2: Pixel Pixel ... Pixel - * Line 3: Pixel Pixel ... Pixel + * Line 0: Pixel ... Pixel + * Line 1: Pixel ... Pixel + * Line 2: Pixel ... Pixel + * Line 3: Pixel ... Pixel * ... - * Line (n-2): Pixel Pixel ... Pixel - * Line (n-1): Pixel Pixel ... Pixel + * Line (n-2): Pixel ... Pixel + * Line (n-1): Pixel ... Pixel * * In this frame format, the even-line is * as wide as the odd-line. @@ -906,8 +873,10 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->metadata.lines_per_frame = stream_cfg->metadata_config.resolution.height; #ifdef ISP2401 - /* For new input system, number of str2mmio requests must be even. - * So we round up number of metadata lines to be even. */ + /* + * For new input system, number of str2mmio requests must be even. + * So we round up number of metadata lines to be even. + */ if (isys_stream_descr->metadata.lines_per_frame > 0) isys_stream_descr->metadata.lines_per_frame += (isys_stream_descr->metadata.lines_per_frame & 1); @@ -1003,22 +972,10 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( isys_stream_descr->raw_packed = stream_cfg->pack_raw_pixels; isys_stream_descr->linked_isys_stream_id = (int8_t) stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; - /* - * Early polling is required for timestamp accuracy in certain case. - * The ISYS HW polling is started on - * ia_css_isys_stream_capture_indication() instead of - * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of - * capture takes longer than getting an ISYS frame - * - * Only 2401 relevant ?? - */ -#if 0 // FIXME: NOT USED on Yocto Aero - isys_stream_descr->polling_mode - = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST - : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); -#endif + + if (IS_ISP2401) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); return rc; } @@ -1065,17 +1022,6 @@ sh_css_config_input_network(struct ia_css_stream *stream) pipe = stream->last_pipe->pipe_settings.video.copy_pipe; } else { pipe = stream->last_pipe; - if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { - /* - * We need to poll the ISYS HW in capture_indication itself - * for "non-continuous" capture usecase for getting accurate - * isys frame capture timestamps. - * This is because the capturepipe propcessing takes longer - * to execute than the input system frame capture. - * 2401 specific - */ - early_polling = true; - } } if (!pipe) @@ -1086,7 +1032,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) binary = pipe->pipeline.stages->binary; if (binary) { - /* this was being done in ifmtr in 2400. + /* + * this was being done in ifmtr in 2400. * online and cont bypass the init_in_frameinfo_memory_defaults * so need to do it here */ @@ -1259,89 +1206,6 @@ static inline int stream_unregister_with_csi_rx( } #endif -#if WITH_PC_MONITORING -static struct task_struct *my_kthread; /* Handle for the monitoring thread */ -static int sh_binary_running; /* Enable sampling in the thread */ - -static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) -{ - unsigned int i; - unsigned int cnt_run = 0; - unsigned int cnt_stall = 0; - - if (!hist) - return; - - sh_css_print("%s histogram length = %d\n", core_name, hist->length); - sh_css_print("%s PC\turn\tstall\n", core_name); - - for (i = 0; i < hist->length; i++) { - if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i])) - continue; - sh_css_print("%s %d\t%d\t%d\n", - core_name, i, hist->run[i], hist->stall[i]); - cnt_run += hist->run[i]; - cnt_stall += hist->stall[i]; - } - - sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, hist->length = %d\n", - core_name, cnt_run, cnt_stall, hist->length); -} - -static void print_pc_histogram(void) -{ - struct ia_css_binary_metrics *metrics; - - for (metrics = sh_css_metrics.binary_metrics; - metrics; - metrics = metrics->next) { - if (metrics->mode == IA_CSS_BINARY_MODE_PREVIEW || - metrics->mode == IA_CSS_BINARY_MODE_VF_PP) { - sh_css_print("pc_histogram for binary %d is SKIPPED\n", - metrics->id); - continue; - } - - sh_css_print(" pc_histogram for binary %d\n", metrics->id); - print_pc_histo(" ISP", &metrics->isp_histogram); - print_pc_histo(" SP", &metrics->sp_histogram); - sh_css_print("print_pc_histogram() done for binary->id = %d, done.\n", - metrics->id); - } - - sh_css_print("PC_MONITORING:print_pc_histogram() -- DONE\n"); -} - -static int pc_monitoring(void *data) -{ - int i = 0; - - (void)data; - while (true) { - if (sh_binary_running) { - sh_css_metrics_sample_pcs(); -#if MULTIPLE_SAMPLES - for (i = 0; i < NOF_SAMPLES; i++) - sh_css_metrics_sample_pcs(); -#endif - } - usleep_range(10, 50); - } - return 0; -} - -static void spying_thread_create(void) -{ - my_kthread = kthread_run(pc_monitoring, NULL, "sh_pc_monitor"); - sh_css_metrics_enable_pc_histogram(1); -} - -static void input_frame_info(struct ia_css_frame_info frame_info) -{ - sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, frame->info.res.height = %d, format = %d\n", - frame_info.res.width, frame_info.res.height, frame_info.format); -} -#endif /* WITH_PC_MONITORING */ static void start_binary(struct ia_css_pipe *pipe, @@ -1353,15 +1217,6 @@ start_binary(struct ia_css_pipe *pipe, if (binary) sh_css_metrics_start_binary(&binary->metrics); -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() -- binary id = %d , enable_dvs_envelope = %d\n", - __func__, binary->info->sp.id, - binary->info->sp.enable.dvs_envelope); - input_frame_info(binary->in_frame_info); - - if (binary && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_VIDEO) - sh_binary_running = true; -#endif #if !defined(ISP2401) if (pipe->stream->reconfigure_css_rx) { @@ -1406,7 +1261,7 @@ void sh_css_binary_args_reset(struct sh_css_binary_args *args) { unsigned int i; - for (i = 0; i < NUM_TNR_FRAMES; i++) + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) args->tnr_frames[i] = NULL; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) args->delay_frames[i] = NULL; @@ -1424,20 +1279,11 @@ static void start_pipe( enum sh_css_pipe_config_override copy_ovrd, enum ia_css_input_mode input_mode) { - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; - - IA_CSS_ENTER_PRIVATE("me = %p, copy_ovrd = %d, input_mode = %d", me, copy_ovrd, input_mode); assert(me); /* all callers are in this file and call with non null argument */ - if (!IS_ISP2401) { - coord = &me->config.internal_frame_origin_bqs_on_sctbl; - params = me->stream->isp_params_configs; - } - sh_css_sp_init_pipeline(&me->pipeline, me->mode, (uint8_t)ia_css_pipe_get_pipe_num(me), @@ -1452,9 +1298,7 @@ static void start_pipe( &me->stream->info.metadata_info , (input_mode == IA_CSS_INPUT_MODE_MEMORY) ? (enum mipi_port_id)0 : - me->stream->config.source.port.port, - coord, - params); + me->stream->config.source.port.port); if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { struct ia_css_pipeline_stage *stage; @@ -1565,17 +1409,18 @@ ia_css_reset_defaults(struct sh_css *css) /* Reset everything to zero */ memset(&default_css, 0, sizeof(default_css)); - /* Initialize the non zero values*/ + /* Initialize the non zero values */ default_css.check_system_idle = true; default_css.num_cont_raw_frames = NUM_CONTINUOUS_FRAMES; - /* All should be 0: but memset does it already. + /* + * All should be 0: but memset does it already. * default_css.num_mipi_frames[N_CSI_PORTS] = 0; */ default_css.irq_type = IA_CSS_IRQ_TYPE_EDGE; - /*Set the defaults to the output */ + /* Set the defaults to the output */ *css = default_css; } @@ -1638,6 +1483,7 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, * the SIZE_OF_XXX macro of the corresponding struct. If they are not * equal, functionality will break. */ + /* Check struct sh_css_ddr_address_map */ COMPILATION_ERROR_IF(sizeof(struct sh_css_ddr_address_map) != SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT); /* Check struct host_sp_queues */ @@ -1707,8 +1553,11 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, mipi_init(); #ifndef ISP2401 - /* In case this has been programmed already, update internal - data structure ... DEPRECATED */ + /* + * In case this has been programmed already, update internal + * data structure ... + * DEPRECATED + */ my_css.page_table_base_index = mmu_get_page_table_base_index(MMU0_ID); #endif @@ -1746,9 +1595,8 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, return err; } fw_explicitly_loaded = false; -#ifndef ISP2401 + my_css_save.loaded_fw = (struct ia_css_fw *)fw; -#endif } if (!sh_css_setup_spctrl_config(&sh_css_sp_fw, SP_PROG_NAME, &spctrl_cfg)) return -EINVAL; @@ -1759,24 +1607,17 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, return err; } -#if WITH_PC_MONITORING - if (!thread_alive) { - thread_alive++; - sh_css_print("PC_MONITORING: %s() -- create thread DISABLED\n", - __func__); - spying_thread_create(); - } -#endif if (!sh_css_hrt_system_is_idle()) { IA_CSS_LEAVE_ERR(-EBUSY); return -EBUSY; } - /* can be called here, queuing works, but: - - when sp is started later, it will wipe queued items - so for now we leave it for later and make sure - updates are not called to frequently. - sh_css_init_buffer_queues(); - */ + /* + * can be called here, queuing works, but: + * - when sp is started later, it will wipe queued items + * so for now we leave it for later and make sure + * updates are not called to frequently. + * sh_css_init_buffer_queues(); + */ #if defined(ISP2401) gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 1); @@ -1817,10 +1658,12 @@ sh_css_flush(struct ia_css_acc_fw *fw) my_css.flush(fw); } -/* Mapping sp threads. Currently, this is done when a stream is created and +/* + * Mapping sp threads. Currently, this is done when a stream is created and * pipelines are ready to be converted to sp pipelines. Be careful if you are * doing it from stream_create since we could run out of sp threads due to - * allocation on inactive pipelines. */ + * allocation on inactive pipelines. + */ static int map_sp_threads(struct ia_css_stream *stream, bool map) { @@ -1884,8 +1727,10 @@ map_sp_threads(struct ia_css_stream *stream, bool map) return err; } -/* creates a host pipeline skeleton for all pipes in a stream. Called during - * stream_create. */ +/* + * creates a host pipeline skeleton for all pipes in a stream. Called during + * stream_create. + */ static int create_host_pipeline_structure(struct ia_css_stream *stream) { @@ -1984,8 +1829,10 @@ create_host_pipeline_structure(struct ia_css_stream *stream) return err; } -/* creates a host pipeline for all pipes in a stream. Called during - * stream_start. */ +/* + * creates a host pipeline for all pipes in a stream. Called during + * stream_start. + */ static int create_host_pipeline(struct ia_css_stream *stream) { @@ -2005,15 +1852,25 @@ create_host_pipeline(struct ia_css_stream *stream) main_pipe = stream->last_pipe; pipe_id = main_pipe->mode; - /* No continuous frame allocation for capture pipe. It uses the - * "main" pipe's frames. */ + /* + * No continuous frame allocation for capture pipe. It uses the + * "main" pipe's frames. + */ if ((pipe_id == IA_CSS_PIPE_ID_PREVIEW) || (pipe_id == IA_CSS_PIPE_ID_VIDEO)) { - /* About pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: - * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is too strong. E.g. in SkyCam (with memory - * based input frames) there is no continuous mode and thus no need for allocated continuous frames - * This is not only for SkyCam but for all preview cases that use DDR based input frames. For this - * reason the stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed added. + /* + * About + * pipe_id == IA_CSS_PIPE_ID_PREVIEW && + * stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: + * + * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is + * too strong. E.g. in SkyCam (with memory based input frames) + * there is no continuous mode and thus no need for allocated + * continuous frames. + * This is not only for SkyCam but for all preview cases that + * use DDR based input frames. For this reason the + * stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed + * added. */ if (stream->config.continuous || (pipe_id == IA_CSS_PIPE_ID_PREVIEW && @@ -2223,7 +2080,7 @@ pipe_generate_pipe_num(const struct ia_css_pipe *pipe, /* Assign a new pipe_num .... search for empty place */ for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { if (!my_css.all_pipes[i]) { - /*position is reserved */ + /* position is reserved */ my_css.all_pipes[i] = (struct ia_css_pipe *)pipe; pipe_num = i; break; @@ -2340,8 +2197,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_PREVIEW: - /* need to take into account that this function is also called - on the internal copy pipe */ + /* + * need to take into account that this function is also called + * on the internal copy pipe + */ if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, pipe->continuous_frames); @@ -2369,10 +2228,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) } } #ifndef ISP2401 - ia_css_frame_free_multiple(NUM_TNR_FRAMES, + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); #else - ia_css_frame_free_multiple(NUM_TNR_FRAMES, + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); #endif ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, @@ -2391,8 +2250,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) break; } - sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); - pipe->scaler_pp_lut = mmgr_NULL; + if (pipe->scaler_pp_lut != mmgr_NULL) { + hmm_free(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + } my_css.active_pipes[ia_css_pipe_get_pipe_num(pipe)] = NULL; sh_css_pipe_free_shading_table(pipe); @@ -2413,15 +2274,13 @@ void ia_css_uninit(void) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_uninit() enter: void\n"); -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() -- started\n", __func__); - print_pc_histogram(); -#endif sh_css_params_free_default_gdc_lut(); /* TODO: JB: implement decent check and handling of freeing mipi frames */ - //assert(ref_count_mipi_allocation == 0); //mipi frames are not freed + if (!mipi_is_free()) + dev_warn(atomisp_dev, "mipi frames are not freed.\n"); + /* cleanup generic data */ sh_css_params_uninit(); ia_css_refcount_uninit(); @@ -2465,16 +2324,13 @@ int ia_css_irq_translate( if (status == hrt_isp_css_irq_status_error) return -EINVAL; -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() irq = %d, sh_binary_running set to 0\n", - __func__, irq); - sh_binary_running = 0; -#endif switch (irq) { case virq_sp: - /* When SP goes to idle, info is available in the - * event queue. */ + /* + * When SP goes to idle, info is available in the + * event queue. + */ infos |= IA_CSS_IRQ_INFO_EVENTS_READY; break; case virq_isp: @@ -2582,8 +2438,10 @@ sh_css_get_sw_interrupt_value(unsigned int irq) return irq_value; } -/* configure and load the copy binary, the next binary is used to - determine whether the copy binary needs to do left padding. */ +/* + * configure and load the copy binary, the next binary is used to + * determine whether the copy binary needs to do left padding. + */ static int load_copy_binary( struct ia_css_pipe *pipe, struct ia_css_binary *copy_binary, @@ -2670,13 +2528,11 @@ alloc_continuous_frames(struct ia_css_pipe *pipe, bool init_time) ref_info.padded_width = CEIL_MUL(ref_info.res.width, 2 * ISP_VEC_NELEMS); #endif -#if !defined(HAS_NO_PACKED_RAW_PIXELS) if (pipe->stream->config.pack_raw_pixels) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW_PACKED\n"); ref_info.format = IA_CSS_FRAME_FORMAT_RAW_PACKED; } else -#endif { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW\n"); @@ -2780,7 +2636,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) if (err) return err; - /* Note: the current selection of vf_pp binary and + /* + * Note: the current selection of vf_pp binary and * parameterization of the preview binary contains a few pieces * of hardcoded knowledge. This needs to be cleaned up such that * the binary selection becomes more generic. @@ -2793,7 +2650,7 @@ load_preview_binaries(struct ia_css_pipe *pipe) * The decision if the vf_pp binary is needed for YUV downscaling is * made after the preview binary selection, since some preview binaries * can perform the requested YUV downscaling. - * */ + */ need_vf_pp = pipe->config.enable_dz; need_vf_pp |= pipe_out_info->format != IA_CSS_FRAME_FORMAT_YUV_LINE && !(pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12 || @@ -2805,11 +2662,12 @@ load_preview_binaries(struct ia_css_pipe *pipe) prev_vf_info = pipe->vf_yuv_ds_input_info; else prev_vf_info = *pipe_out_info; - /* If vf_pp is needed, then preview must output yuv_line. + /* + * If vf_pp is needed, then preview must output yuv_line. * The exception is when vf_pp is manually disabled, that is only * used in combination with a pipeline extension that requires * yuv_line as input. - * */ + */ if (need_vf_pp) ia_css_frame_info_set_format(&prev_vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); @@ -2827,22 +2685,12 @@ load_preview_binaries(struct ia_css_pipe *pipe) if (err) return err; - if (IS_ISP2401) { - /* The delay latency determines the number of invalid frames after - * a stream is started. */ - pipe->num_invalid_frames = pipe->dvs_frame_delay; - pipe->info.num_invalid_frames = pipe->num_invalid_frames; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", - pipe->num_invalid_frames, pipe->dvs_frame_delay); - } - /* The vf_pp binary is needed when (further) YUV downscaling is required */ need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.width != pipe_out_info->res.width; need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.height != pipe_out_info->res.height; - /* When vf_pp is needed, then the output format of the selected + /* + * When vf_pp is needed, then the output format of the selected * preview binary must be yuv_line. If this is not the case, * then the preview binary selection is done again. */ @@ -2886,12 +2734,14 @@ load_preview_binaries(struct ia_css_pipe *pipe) } #ifdef ISP2401 - /* When the input system is 2401, only the Direct Sensor Mode + /* + * When the input system is 2401, only the Direct Sensor Mode * Offline Preview uses the ISP copy binary. */ need_isp_copy_binary = !online && sensor; #else - /* About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: + /* + * About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: * This is typical the case with SkyCam (which has no input system) but it also applies to all cases * where the driver chooses for memory based input frames. In these cases, a copy binary (which typical * copies sensor data to DDR) does not have much use. @@ -3245,8 +3095,10 @@ get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config) return 0; } -/* This function is to get the sum of all extra pixels in addition to the effective - * input, it includes dvs envelop and filter run-in */ +/* + * This function is to get the sum of all extra pixels in addition to the effective + * input, it includes dvs envelop and filter run-in + */ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int *extra_row, unsigned int *extra_column) { @@ -3255,7 +3107,8 @@ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int i; struct ia_css_resolution dvs_env = pipe->config.dvs_envelope; - /* The dvs envelope info may not be correctly sent down via pipe config + /* + * The dvs envelope info may not be correctly sent down via pipe config * The check is made and the correct value is populated in the binary info * Use this value when computing crop, else excess lines may get trimmed */ @@ -3349,7 +3202,8 @@ ia_css_get_crop_offsets( * 2. Require the special support for the online use cases. */ - /* ISP expects GRBG bayer order, we skip one line and/or one row + /* + * ISP expects GRBG bayer order, we skip one line and/or one row * to correct in case the input bayer order is different. */ column += get_crop_columns_for_bayer_order(&pipe->stream->config); @@ -3467,7 +3321,8 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) me->dvs_frame_delay = pipe->dvs_frame_delay; #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' * except for the following: online or continuous */ need_in_frameinfo_memory = !(pipe->stream->config.online || @@ -3523,7 +3378,8 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) in_frame = me->stages->args.out_frame[0]; } else if (pipe->stream->config.continuous) { #ifdef ISP2401 - /* When continuous is enabled, configure in_frame with the + /* + * When continuous is enabled, configure in_frame with the * last pipe, which is the copy pipe. */ in_frame = pipe->stream->last_pipe->continuous_frames[0]; @@ -3535,8 +3391,10 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) ia_css_pipe_util_set_output_frames(out_frames, 0, need_yuv_pp ? NULL : out_frame); - /* when the video binary supports a second output pin, - it can directly produce the vf_frame. */ + /* + * when the video binary supports a second output pin, + * it can directly produce the vf_frame. + */ if (need_vf_pp) { ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, out_frames, in_frame, NULL); @@ -3568,7 +3426,7 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) if (video_stage) { int frm; - for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { + for (frm = 0; frm < NUM_VIDEO_TNR_FRAMES; frm++) { video_stage->args.tnr_frames[frm] = pipe->pipe_settings.video.tnr_frames[frm]; } @@ -3708,7 +3566,8 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) ia_css_pipeline_clean(me); #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' * except for the following: * - Direct Sensor Mode Online Preview * - Buffered Sensor Mode Online Preview @@ -3757,7 +3616,8 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) in_frame = me->stages->args.out_frame[0]; } else if (pipe->stream->config.continuous) { #ifdef ISP2401 - /* When continuous is enabled, configure in_frame with the + /* + * When continuous is enabled, configure in_frame with the * last pipe, which is the copy pipe. */ if (continuous || !online) @@ -3837,8 +3697,7 @@ preview_start(struct ia_css_pipe *pipe) struct ia_css_pipe *acc_pipe; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode preview_pipe_input_mode; - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { @@ -3862,22 +3721,13 @@ preview_start(struct ia_css_pipe *pipe) } send_raw_frames(pipe); - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - - if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), - &thread_id); - copy_ovrd |= 1 << thread_id; - } - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - if (IS_ISP2401) { - coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; - params = pipe->stream->isp_params_configs; + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); + copy_ovrd |= 1 << thread_id; } /* Construct and load the copy pipe */ @@ -3892,12 +3742,12 @@ preview_start(struct ia_css_pipe *pipe) pipe->stream->config.mode, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - pipe->stream->config.source.port.port, - coord, - params); + pipe->stream->config.source.port.port); - /* make the preview pipe start with mem mode input, copy handles - the actual mode */ + /* + * make the preview pipe start with mem mode input, copy handles + * the actual mode + */ preview_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; } @@ -3915,9 +3765,7 @@ preview_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } if (acc_pipe) { @@ -3933,9 +3781,7 @@ preview_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } start_pipe(pipe, copy_ovrd, preview_pipe_input_mode); @@ -3968,38 +3814,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, } buf_type = buffer->type; - /* following code will be enabled when IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME - is removed */ -#if 0 - if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { - bool found_pipe = false; - - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if ((buffer->data.frame->info.res.width == pipe->output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { - buf_type += i; - found_pipe = true; - break; - } - } - if (!found_pipe) - return -EINVAL; - } - if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { - bool found_pipe = false; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if ((buffer->data.frame->info.res.width == pipe->vf_output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { - buf_type += i; - found_pipe = true; - break; - } - } - if (!found_pipe) - return -EINVAL; - } -#endif pipe_id = pipe->mode; IA_CSS_LOG("pipe_id=%d, buf_type=%d", pipe_id, buf_type); @@ -4086,15 +3901,6 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", buf_type, buffer->data.frame->data); -#if CONFIG_ON_FRAME_ENQUEUE() - return_err = set_config_on_frame_enqueue( - &buffer->data.frame->info, - &ddr_buffer.payload.frame); - if (return_err) { - IA_CSS_LEAVE_ERR(return_err); - return return_err; - } -#endif } /* start of test for using rmgr for acq/rel memory */ @@ -4124,8 +3930,10 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, } for (stage = pipeline->stages; stage; stage = stage->next) { - /* The SP will read the params - after it got empty 3a and dis */ + /* + * The SP will read the params after it got + * empty 3a and dis + */ if (STATS_ENABLED(stage)) { /* there is a stage that needs it */ return_err = ia_css_bufq_enqueue_buffer(thread_id, @@ -4142,14 +3950,12 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, return_err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)h_vbuf->vptr); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (!return_err && buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: enqueued OF %d to q %d thread %d", ddr_buffer.payload.frame.frame_data, queue_id, thread_id); } -#endif } if (!return_err) { @@ -4191,7 +3997,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, /* * TODO: Free up the hmm memory space. - */ + */ int ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, struct ia_css_buffer *buffer) @@ -4258,7 +4064,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, hmm_buffer_record = sh_css_hmm_buffer_record_validate( ddr_buffer_addr, buf_type); if (hmm_buffer_record) { - /* valid hmm_buffer_record found. Save the kernel_ptr + /* + * valid hmm_buffer_record found. Save the kernel_ptr * for validation after performing hmm_load. The * vbuf handle and buffer_record can be released. */ @@ -4276,7 +4083,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, &ddr_buffer, sizeof(struct sh_css_hmm_buffer)); - /* if the kernel_ptr is 0 or an invalid, return an error. + /* + * if the kernel_ptr is 0 or an invalid, return an error. * do not access the buffer via the kernal_ptr. */ if ((ddr_buffer.kernel_ptr == 0) || @@ -4290,8 +4098,11 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, } if (ddr_buffer.kernel_ptr != 0) { - /* buffer->exp_id : all instances to be removed later once the driver change - * is completed. See patch #5758 for reference */ + /* + * buffer->exp_id : all instances to be removed later + * once the driver change is completed. See patch #5758 + * for reference + */ buffer->exp_id = 0; buffer->driver_cookie = ddr_buffer.cookie_ptr; buffer->timing_data = ddr_buffer.timing_data; @@ -4307,8 +4118,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, case IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: if (pipe && pipe->stop_requested) { #if !defined(ISP2401) - /* free mipi frames only for old input system - * for 2401 it is done in ia_css_stream_destroy call + /* + * free mipi frames only for old input + * system for 2401 it is done in + * ia_css_stream_destroy call */ return_err = free_mipi_frames(pipe); if (return_err) { @@ -4345,12 +4158,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, sh_css_sp_get_binary_copy_size(); #endif } -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: dequeued OF %d with config id %d thread %d", frame->data, frame->isp_config_id, thread_id); } -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_dequeue_buffer() buf_type=%d, data(DDR address)=0x%x\n", @@ -4419,45 +4230,41 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) */ static enum ia_css_event_type convert_event_sp_to_host_domain[] = { - IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /** Output frame ready. */ - IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /** Second output frame ready. */ - IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /** Viewfinder Output frame ready. */ - IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /** Second viewfinder Output frame ready. */ - IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /** Indication that 3A statistics are available. */ - IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /** Indication that DIS statistics are available. */ - IA_CSS_EVENT_TYPE_PIPELINE_DONE, /** Pipeline Done event, sent after last pipeline stage. */ - IA_CSS_EVENT_TYPE_FRAME_TAGGED, /** Frame tagged. */ - IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /** Input frame ready. */ - IA_CSS_EVENT_TYPE_METADATA_DONE, /** Metadata ready. */ - IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /** Indication that LACE statistics are available. */ - IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /** Extension stage executed. */ - IA_CSS_EVENT_TYPE_TIMER, /** Timing measurement data. */ - IA_CSS_EVENT_TYPE_PORT_EOF, /** End Of Frame event, sent when in buffered sensor mode. */ - IA_CSS_EVENT_TYPE_FW_WARNING, /** Performance warning encountered by FW */ - IA_CSS_EVENT_TYPE_FW_ASSERT, /** Assertion hit by FW */ + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /* Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /* Second output frame ready. */ + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /* Viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /* Second viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /* Indication that 3A statistics are available. */ + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /* Indication that DIS statistics are available. */ + IA_CSS_EVENT_TYPE_PIPELINE_DONE, /* Pipeline Done event, sent after last pipeline stage. */ + IA_CSS_EVENT_TYPE_FRAME_TAGGED, /* Frame tagged. */ + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /* Input frame ready. */ + IA_CSS_EVENT_TYPE_METADATA_DONE, /* Metadata ready. */ + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /* Indication that LACE statistics are available. */ + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /* Extension stage executed. */ + IA_CSS_EVENT_TYPE_TIMER, /* Timing measurement data. */ + IA_CSS_EVENT_TYPE_PORT_EOF, /* End Of Frame event, sent when in buffered sensor mode. */ + IA_CSS_EVENT_TYPE_FW_WARNING, /* Performance warning encountered by FW */ + IA_CSS_EVENT_TYPE_FW_ASSERT, /* Assertion hit by FW */ 0, /* error if sp passes SH_CSS_SP_EVENT_NR_OF_TYPES as a valid event. */ }; int -ia_css_dequeue_event(struct ia_css_event *event) -{ - return ia_css_dequeue_psys_event(event); -} - -int ia_css_dequeue_psys_event(struct ia_css_event *event) { enum ia_css_pipe_id pipe_id = 0; u8 payload[4] = {0, 0, 0, 0}; int ret_err; - /*TODO: + /* + * TODO: * a) use generic decoding function , same as the one used by sp. * b) group decode and dequeue into eventQueue module * * We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application - * uses polling. */ + * uses polling. + */ if (!event) return -EINVAL; @@ -4476,9 +4283,11 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) ia_css_bufq_enqueue_psys_event( IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); - /* Events are decoded into 4 bytes of payload, the first byte + /* + * Events are decoded into 4 bytes of payload, the first byte * contains the sp event type. This is converted to a host enum. - * TODO: can this enum conversion be eliminated */ + * TODO: can this enum conversion be eliminated + */ event->type = convert_event_sp_to_host_domain[payload[0]]; /* Some sane default values since not all events use all fields. */ event->pipe = NULL; @@ -4491,7 +4300,10 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->timer_subcode = 0; if (event->type == IA_CSS_EVENT_TYPE_TIMER) { - /* timer event ??? get the 2nd event and decode the data into the event struct */ + /* + * timer event ??? get the 2nd event and decode the data + * into the event struct + */ u32 tmp_data; /* 1st event: LSB 16-bit timer data and code */ event->timer_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); @@ -4500,8 +4312,10 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) ret_err = ia_css_bufq_dequeue_psys_event(payload); if (ret_err) { /* no 2nd event ??? an error */ - /* Putting IA_CSS_ERROR is resulting in failures in - * Merrifield smoke testing */ + /* + * Putting IA_CSS_ERROR is resulting in failures in + * Merrifield smoke testing + */ IA_CSS_WARNING("Timer: Error de-queuing the 2nd TIMER event!!!\n"); return ret_err; } @@ -4515,11 +4329,15 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->timer_data |= (tmp_data << 16); event->timer_subcode = payload[2]; } else { - /* It's a non timer event. So clear first half of the timer event data. - * If the second part of the TIMER event is not received, we discard - * the first half of the timer data and process the non timer event without - * affecting the flow. So the non timer event falls through - * the code. */ + /* + * It's a non timer event. So clear first half of the + * timer event data. + * If the second part of the TIMER event is not + * received, we discard the first half of the timer + * data and process the non timer event without + * affecting the flow. So the non timer event falls + * through the code. + */ event->timer_data = 0; event->timer_code = 0; event->timer_subcode = 0; @@ -4540,9 +4358,11 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->fw_assert_line_no = (payload[2] << 8) + payload[3]; /* payload[2] is line_no>>8, payload[3] is line_no&0xff */ } else if (event->type != IA_CSS_EVENT_TYPE_TIMER) { - /* pipe related events. + /* + * pipe related events. * payload[1] contains the pipe_num, - * payload[2] contains the pipe_id. These are different. */ + * payload[2] contains the pipe_id. These are different. + */ event->pipe = find_pipe_by_num(payload[1]); pipe_id = (enum ia_css_pipe_id)payload[2]; /* Check to see if pipe still exists */ @@ -4594,9 +4414,11 @@ ia_css_dequeue_isys_event(struct ia_css_event *event) u8 payload[4] = {0, 0, 0, 0}; int err = 0; - /* We skip the IA_CSS_ENTER logging call + /* + * We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application - * uses polling. */ + * uses polling. + */ if (!event) return -EINVAL; @@ -4720,7 +4542,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) return err; } - /* Force ISP parameter calculation after a mode change + /* + * Force ISP parameter calculation after a mode change * Acceleration API examples pass NULL for stream but they * don't use ISP parameters anyway. So this should be okay. * The SP binary (jpeg) copy does not use any parameters. @@ -4889,185 +4712,6 @@ ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, return 0; } -/* - * @brief Stop all "ia_css_pipe" instances in the target - * "ia_css_stream" instance. - * - * Refer to "Local prototypes" for more info. - */ -/* ISP2401 */ -static int -sh_css_pipes_stop(struct ia_css_stream *stream) -{ - int err = 0; - struct ia_css_pipe *main_pipe; - enum ia_css_pipe_id main_pipe_id; - int i; - - if (!stream) { - IA_CSS_LOG("stream does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - main_pipe = stream->last_pipe; - if (!main_pipe) { - IA_CSS_LOG("main_pipe does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - main_pipe_id = main_pipe->mode; - IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); - - /* - * Stop all "ia_css_pipe" instances in this target - * "ia_css_stream" instance. - */ - for (i = 0; i < stream->num_pipes; i++) { - /* send the "stop" request to the "ia_css_pipe" instance */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - stream->pipes[i]->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); - - /* - * Exit this loop if "ia_css_pipeline_request_stop()" - * returns the error code. - * - * The error code would be generated in the following - * two cases: - * (1) The Scalar Processor has already been stopped. - * (2) The "Host->SP" event queue is full. - * - * As the convention of using CSS API 2.0/2.1, such CSS - * error code would be propogated from the CSS-internal - * API returned value to the CSS API returned value. Then - * the CSS driver should capture these error code and - * handle it in the driver exception handling mechanism. - */ - if (err) - goto ERR; - } - - /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target - * "ia_css_stream" instance. - * - * We need to stop this "Copy Pipe", as well. - */ - if (main_pipe->stream->config.continuous) { - struct ia_css_pipe *copy_pipe = NULL; - - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; - - /* return the error code if "Copy Pipe" does NOT exist */ - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - /* send the "stop" request to "Copy Pipe" */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - copy_pipe->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(©_pipe->pipeline); - } - -ERR: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - -/* - * @brief Check if all "ia_css_pipe" instances in the target - * "ia_css_stream" instance have stopped. - * - * Refer to "Local prototypes" for more info. - */ -/* ISP2401 */ -static bool -sh_css_pipes_have_stopped(struct ia_css_stream *stream) -{ - bool rval = true; - - struct ia_css_pipe *main_pipe; - enum ia_css_pipe_id main_pipe_id; - - int i; - - if (!stream) { - IA_CSS_LOG("stream does NOT exist!"); - rval = false; - goto RET; - } - - main_pipe = stream->last_pipe; - - if (!main_pipe) { - IA_CSS_LOG("main_pipe does NOT exist!"); - rval = false; - goto RET; - } - - main_pipe_id = main_pipe->mode; - IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); - - /* - * Check if every "ia_css_pipe" instance in this target - * "ia_css_stream" instance has stopped. - */ - for (i = 0; i < stream->num_pipes; i++) { - rval = rval && ia_css_pipeline_has_stopped(&stream->pipes[i]->pipeline); - IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - stream->pipes[i]->pipeline.pipe_id, - rval); - } - - /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target - * "ia_css_stream" instance. - * - * We need to check if this "Copy Pipe" has stopped, as well. - */ - if (main_pipe->stream->config.continuous) { - struct ia_css_pipe *copy_pipe = NULL; - - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; - - /* return if "Copy Pipe" does NOT exist */ - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); - - rval = false; - goto RET; - } - - /* check if "Copy Pipe" has stopped or not */ - rval = rval && ia_css_pipeline_has_stopped(©_pipe->pipeline); - IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - copy_pipe->pipeline.pipe_id, - rval); - } - -RET: - IA_CSS_LEAVE_PRIVATE("rval=%d", rval); - return rval; -} - #if !defined(ISP2401) unsigned int sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx) @@ -5137,11 +4781,13 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, (const struct ia_css_stream_config *)&pipe->stream->config, shading_info, pipe_config); - /* Other function calls can be added here when other shading correction types will be added - * in the future. + /* + * Other function calls can be added here when other shading + * correction types will be added in the future. */ } else { - /* When the pipe does not have a binary which has the shading + /* + * When the pipe does not have a binary which has the shading * correction, this function does not need to fill the shading * information. It is not a error case, and then * this function should return 0. @@ -5180,6 +4826,8 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, ia_css_binary_dvs_stat_grid_info(binary, info, pipe); } else { memset(&info->dvs_grid, 0, sizeof(info->dvs_grid)); + memset(&info->dvs_grid.dvs_stat_grid_info, 0, + sizeof(info->dvs_grid.dvs_stat_grid_info)); } if (binary) { @@ -5254,7 +4902,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) IA_CSS_ENTER_PRIVATE(""); assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_VIDEO); - /* we only test the video_binary because offline video doesn't need a + /* + * we only test the video_binary because offline video doesn't need a * vf_pp binary and online does not (always use) the copy_binary. * All are always reset at the same time anyway. */ @@ -5367,7 +5016,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) if (err) return err; - /* In the case where video_vf_info is not NULL, this allows + /* + * In the case where video_vf_info is not NULL, this allows * us to find a potential video library with desired vf format. * If success, no vf_pp binary is needed. * If failed, we will look up video binary with YUV_LINE vf format @@ -5382,17 +5032,23 @@ static int load_video_binaries(struct ia_css_pipe *pipe) else return err; } else if (video_vf_info) { - /* The first video binary lookup is successful, but we may - * still need vf_pp binary based on additiona check */ + /* + * The first video binary lookup is successful, but we + * may still need vf_pp binary based on additional check + */ num_output_pins = mycs->video_binary.info->num_output_pins; vf_ds_log2 = mycs->video_binary.vf_downscale_log2; - /* If the binary has dual output pins, we need vf_pp if the resolution - * is different. */ + /* + * If the binary has dual output pins, we need vf_pp + * if the resolution is different. + */ need_vf_pp |= ((num_output_pins == 2) && vf_res_different_than_output); - /* If the binary has single output pin, we need vf_pp if additional - * scaling is needed for vf */ + /* + * If the binary has single output pin, we need vf_pp + * if additional scaling is needed for vf + */ need_vf_pp |= ((num_output_pins == 1) && ((video_vf_info->res.width << vf_ds_log2 != pipe_out_info->res.width) || (video_vf_info->res.height << vf_ds_log2 != pipe_out_info->res.height))); @@ -5422,19 +5078,25 @@ static int load_video_binaries(struct ia_css_pipe *pipe) } } - /* If a video binary does not use a ref_frame, we set the frame delay - * to 0. This is the case for the 1-stage low-power video binary. */ + /* + * If a video binary does not use a ref_frame, we set the frame delay + * to 0. This is the case for the 1-stage low-power video binary. + */ if (!mycs->video_binary.info->sp.enable.ref_frame) pipe->dvs_frame_delay = 0; - /* The delay latency determines the number of invalid frames after - * a stream is started. */ + /* + * The delay latency determines the number of invalid frames after + * a stream is started. + */ pipe->num_invalid_frames = pipe->dvs_frame_delay; pipe->info.num_invalid_frames = pipe->num_invalid_frames; - /* Viewfinder frames also decrement num_invalid_frames. If the pipe + /* + * Viewfinder frames also decrement num_invalid_frames. If the pipe * outputs a viewfinder output, then we need double the number of - * invalid frames */ + * invalid frames + */ if (video_vf_info) pipe->num_invalid_frames *= 2; @@ -5446,7 +5108,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) #if !defined(ISP2401) /* Copy */ if (!online && !continuous) { - /* TODO: what exactly needs doing, prepend the copy binary to + /* + * TODO: what exactly needs doing, prepend the copy binary to * video base this only on !online? */ err = load_copy_binary(pipe, @@ -5459,7 +5122,6 @@ static int load_video_binaries(struct ia_css_pipe *pipe) (void)continuous; #endif -#if !defined(HAS_OUTPUT_SYSTEM) if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && need_vf_pp) { struct ia_css_binary_descr vf_pp_descr; @@ -5469,8 +5131,11 @@ static int load_video_binaries(struct ia_css_pipe *pipe) &mycs->video_binary.vf_frame_info, pipe_vf_out_info); } else { - /* output from main binary is not yuv line. currently this is - * possible only when bci is enabled on vfpp output */ + /* + * output from main binary is not yuv line. currently + * this is possible only when bci is enabled on vfpp + * output + */ assert(pipe->config.enable_vfpp_bci); ia_css_pipe_get_yuvscaler_binarydesc(pipe, &vf_pp_descr, &mycs->video_binary.vf_frame_info, @@ -5482,7 +5147,6 @@ static int load_video_binaries(struct ia_css_pipe *pipe) if (err) return err; } -#endif err = allocate_delay_frames(pipe); @@ -5490,35 +5154,10 @@ static int load_video_binaries(struct ia_css_pipe *pipe) return err; if (mycs->video_binary.info->sp.enable.block_output) { - unsigned int tnr_width; - unsigned int tnr_height; - tnr_info = mycs->video_binary.out_frame_info[0]; - if (IS_ISP2401) { - /* Select resolution for TNR. If - * output_system_in_resolution(GDC_out_resolution) is - * being used, then select that as it will also be in resolution for - * TNR. At present, it only make sense for Skycam */ - if (pipe->config.output_system_in_res.width && - pipe->config.output_system_in_res.height) { - tnr_width = pipe->config.output_system_in_res.width; - tnr_height = pipe->config.output_system_in_res.height; - } else { - tnr_width = tnr_info.res.width; - tnr_height = tnr_info.res.height; - } - - /* Make tnr reference buffers output block width(in pix) align */ - tnr_info.res.width = CEIL_MUL(tnr_width, - (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); - tnr_info.padded_width = tnr_info.res.width; - } else { - tnr_height = tnr_info.res.height; - } - /* Make tnr reference buffers output block height align */ - tnr_info.res.height = CEIL_MUL(tnr_height, + tnr_info.res.height = CEIL_MUL(tnr_info.res.height, mycs->video_binary.info->sp.block.output_block_height); } else { tnr_info = mycs->video_binary.internal_frame_info; @@ -5526,7 +5165,7 @@ static int load_video_binaries(struct ia_css_pipe *pipe) tnr_info.format = IA_CSS_FRAME_FORMAT_YUV_LINE; tnr_info.raw_bit_depth = SH_CSS_TNR_BIT_DEPTH; - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { if (mycs->tnr_frames[i]) { ia_css_frame_free(mycs->tnr_frames[i]); mycs->tnr_frames[i] = NULL; @@ -5574,9 +5213,7 @@ static int video_start(struct ia_css_pipe *pipe) struct ia_css_pipe *copy_pipe, *capture_pipe; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode video_pipe_input_mode; - - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { @@ -5598,22 +5235,14 @@ static int video_start(struct ia_css_pipe *pipe) return err; send_raw_frames(pipe); - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), - &thread_id); - copy_ovrd |= 1 << thread_id; - } - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - if (IS_ISP2401) { - coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; - params = pipe->stream->isp_params_configs; + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); + copy_ovrd |= 1 << thread_id; } /* Construct and load the copy pipe */ @@ -5628,12 +5257,12 @@ static int video_start(struct ia_css_pipe *pipe) pipe->stream->config.mode, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - pipe->stream->config.source.port.port, - coord, - params); + pipe->stream->config.source.port.port); - /* make the video pipe start with mem mode input, copy handles - the actual mode */ + /* + * make the video pipe start with mem mode input, copy handles + * the actual mode + */ video_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; } @@ -5651,9 +5280,7 @@ static int video_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } start_pipe(pipe, copy_ovrd, video_pipe_input_mode); @@ -5763,12 +5390,6 @@ static bool need_capture_pp( assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); - if (IS_ISP2401) { - /* ldc and capture_pp are not supported in the same pipeline */ - if (need_capt_ldc(pipe)) - return false; - } - /* determine whether we need to use the capture_pp binary. * This is needed for: * 1. XNR or @@ -5891,9 +5512,11 @@ static int load_primary_binaries( } need_pp = need_capture_pp(pipe); - /* we use the vf output info to get the primary/capture_pp binary - configured for vf_veceven. It will select the closest downscaling - factor. */ + /* + * we use the vf output info to get the primary/capture_pp binary + * configured for vf_veceven. It will select the closest downscaling + * factor. + */ vf_info = *pipe_vf_out_info; /* @@ -5905,13 +5528,15 @@ static int load_primary_binaries( * required. This should not be considered as a clean solution. * Proper investigation should be done to come up with the clean * solution. - * */ + */ ia_css_frame_info_set_format(&vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); - /* TODO: All this yuv_scaler and capturepp calculation logic + /* + * TODO: All this yuv_scaler and capturepp calculation logic * can be shared later. Capture_pp is also a yuv_scale binary * with extra XNR funcionality. Therefore, it can be made as the - * first step of the cascade. */ + * first step of the cascade. + */ capt_pp_out_info = pipe->out_yuv_ds_input_info; capt_pp_out_info.format = IA_CSS_FRAME_FORMAT_YUV420; capt_pp_out_info.res.width /= MAX_PREFERRED_YUV_DS_PER_STEP; @@ -5973,33 +5598,13 @@ static int load_primary_binaries( /* TODO Do we disable ldc for skycam */ need_ldc = need_capt_ldc(pipe); - if (IS_ISP2401 && need_ldc) { - /* ldc and capt_pp are not supported in the same pipeline */ - struct ia_css_binary_descr capt_ldc_descr; - - ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_pp_out_info); - - err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - need_pp = false; - need_ldc = false; - } /* we build up the pipeline starting at the end */ /* Capture post-processing */ if (need_pp) { struct ia_css_binary_descr capture_pp_descr; - if (!IS_ISP2401) - capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; - else - capt_pp_in_info = &prim_out_info; + capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; ia_css_pipe_get_capturepp_binarydesc(pipe, &capture_pp_descr, @@ -6057,15 +5662,15 @@ static int load_primary_binaries( vf_pp_in_info = &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed for Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. Thisshould not be considered as a clean solution. - * Proper * investigation should be done to come up with the clean - * solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. Thisshould not be considered as a clean solution. + * Proper * investigation should be done to come up with the clean + * solution. + */ if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { struct ia_css_binary_descr vf_pp_descr; @@ -6083,9 +5688,10 @@ static int load_primary_binaries( return err; #ifdef ISP2401 - /* When the input system is 2401, only the Direct Sensor Mode - * Offline Capture uses the ISP copy binary. - */ + /* + * When the input system is 2401, only the Direct Sensor Mode + * Offline Capture uses the ISP copy binary. + */ need_isp_copy_binary = !online && sensor; #else need_isp_copy_binary = !online && !continuous && !memory; @@ -6139,17 +5745,19 @@ allocate_delay_frames(struct ia_css_pipe *pipe) struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; ref_info = mycs_video->video_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ + + /* + * The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ ref_info.format = IA_CSS_FRAME_FORMAT_NV12; delay_frames = mycs_video->delay_frames; } @@ -6158,17 +5766,19 @@ allocate_delay_frames(struct ia_css_pipe *pipe) struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; ref_info = mycs_preview->preview_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ + + /* + * The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ ref_info.format = IA_CSS_FRAME_FORMAT_NV12; delay_frames = mycs_preview->delay_frames; } @@ -6625,9 +6235,11 @@ need_yuv_scaler_stage(const struct ia_css_pipe *pipe) return false; } -/* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ -/* which has some hard-coded knowledge which prevents reuse of the function. */ -/* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ +/* + * TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc + * which has some hard-coded knowledge which prevents reuse of the function. + * Later, merge this with ia_css_pipe_create_cas_scaler_desc + */ static int ia_css_pipe_create_cas_scaler_desc_single_output( struct ia_css_frame_info *cas_scaler_in_info, struct ia_css_frame_info *cas_scaler_out_info, @@ -7024,22 +6636,22 @@ load_yuvpp_binaries(struct ia_css_pipe *pipe) #if defined(ISP2401) /* - * NOTES - * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when - * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? - * - * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ - * binary". However, the "yuv_scale_binary" does NOT support the input-frame - * format as "IA_CSS_STREAM _FORMAT_YUV422_8". - * - * Hence, the "isp_copy_binary" is required to be present in front of the "yuv - * _scale_binary". It would translate the input-frame to the frame formats that - * are supported by the "yuv_scale_binary". - * - * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ - * pp_defs.h" for the list of input-frame formats that are supported by the - * "yuv_scale_binary". - */ + * NOTES + * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when + * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? + * + * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ + * binary". However, the "yuv_scale_binary" does NOT support the input-frame + * format as "IA_CSS_STREAM _FORMAT_YUV422_8". + * + * Hence, the "isp_copy_binary" is required to be present in front of the "yuv + * _scale_binary". It would translate the input-frame to the frame formats that + * are supported by the "yuv_scale_binary". + * + * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ + * pp_defs.h" for the list of input-frame formats that are supported by the + * "yuv_scale_binary". + */ need_isp_copy_binary = (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); #else /* !ISP2401 */ @@ -7055,23 +6667,23 @@ load_yuvpp_binaries(struct ia_css_pipe *pipe) goto ERR; /* - * NOTES - * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? - * - * In some use cases, the first stage in the "yuvpp" pipe is the - * "isp_copy_binary". The "isp_copy_binary" is designed to process - * the input from either the system DDR or from the IPU internal VMEM. - * So it provides the flag "online" to specify where its input is from, - * i.e.: - * - * (1) "online <= true", the input is from the IPU internal VMEM. - * (2) "online <= false", the input is from the system DDR. - * - * In other use cases, the first stage in the "yuvpp" pipe is the - * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the - * input ONLY from the system DDR. So it does not provide the flag "online" - * to specify where its input is from. - */ + * NOTES + * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * + * In some use cases, the first stage in the "yuvpp" pipe is the + * "isp_copy_binary". The "isp_copy_binary" is designed to process + * the input from either the system DDR or from the IPU internal VMEM. + * So it provides the flag "online" to specify where its input is from, + * i.e.: + * + * (1) "online <= true", the input is from the IPU internal VMEM. + * (2) "online <= false", the input is from the system DDR. + * + * In other use cases, the first stage in the "yuvpp" pipe is the + * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the + * input ONLY from the system DDR. So it does not provide the flag "online" + * to specify where its input is from. + */ pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; } @@ -7162,6 +6774,7 @@ static int yuvpp_start(struct ia_css_pipe *pipe) int err = 0; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode yuvpp_pipe_input_mode; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { @@ -7181,12 +6794,8 @@ static int yuvpp_start(struct ia_css_pipe *pipe) return err; } - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); @@ -7264,8 +6873,11 @@ sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) } if (err) { if (sh_css_pipe_unload_binaries(pipe)) { - /* currently css does not support multiple error returns in a single function, - * using -EINVAL in this case */ + /* + * currently css does not support multiple error + * returns in a single function, using -EINVAL in + * this case + */ err = -EINVAL; } } @@ -7316,12 +6928,13 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) num_output_stage = pipe->pipe_settings.yuvpp.num_output; #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; online = pipe->stream->config.online; @@ -7332,19 +6945,23 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) /* Construct in_frame info (only in case we have dynamic input */ need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* the input frame can come from: - * a) memory: connect yuvscaler to me->in_frame - * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ + /* + * the input frame can come from: + * + * a) memory: connect yuvscaler to me->in_frame + * b) sensor, via copy binary: connect yuvscaler to copy binary later + * on + */ if (need_in_frameinfo_memory) { /* TODO: improve for different input formats. */ /* - * "pipe->stream->config.input_config.format" represents the sensor output - * frame format, e.g. YUV422 8-bit. - * - * "in_frame_format" represents the imaging pipe's input frame format, e.g. - * Bayer-Quad RAW. - */ + * "pipe->stream->config.input_config.format" represents the sensor output + * frame format, e.g. YUV422 8-bit. + * + * "in_frame_format" represents the imaging pipe's input frame format, e.g. + * Bayer-Quad RAW. + */ int in_frame_format; if (pipe->stream->config.input_config.format == @@ -7353,22 +6970,22 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) } else if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8) { /* - * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", - * the "isp_copy_var" binary is selected as the first stage in the yuvpp - * pipe. - * - * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from - * the frame buffer (at DDR) to the frame-line buffer (at VMEM). - * - * By now, the "isp_copy_var" binary does NOT provide a separated - * frame-line buffer to store the YUV422-8 pixels. Instead, it stores - * the YUV422-8 pixels in the frame-line buffer which is designed to - * store the Bayer-Quad RAW pixels. - * - * To direct the "isp_copy_var" binary reading from the RAW frame-line - * buffer, its input frame format must be specified as "IA_CSS_FRAME_ - * FORMAT_RAW". - */ + * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", + * the "isp_copy_var" binary is selected as the first stage in the yuvpp + * pipe. + * + * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from + * the frame buffer (at DDR) to the frame-line buffer (at VMEM). + * + * By now, the "isp_copy_var" binary does NOT provide a separated + * frame-line buffer to store the YUV422-8 pixels. Instead, it stores + * the YUV422-8 pixels in the frame-line buffer which is designed to + * store the Bayer-Quad RAW pixels. + * + * To direct the "isp_copy_var" binary reading from the RAW frame-line + * buffer, its input frame format must be specified as "IA_CSS_FRAME_ + * FORMAT_RAW". + */ in_frame_format = IA_CSS_FRAME_FORMAT_RAW; } else { in_frame_format = IA_CSS_FRAME_FORMAT_NV12; @@ -7667,13 +7284,14 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) ia_css_pipe_util_create_output_frames(out_frames); #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); online = pipe->stream->config.online; @@ -7806,15 +7424,15 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) local_out_frame = NULL; ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed from Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This * should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed from Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This * should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + */ ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], out_frames, @@ -7828,8 +7446,7 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) return err; } } - /* If we use copy iso primary, - the input must be yuv iso raw */ + /* If we use copy iso primary, the input must be yuv iso raw */ current_stage->args.copy_vf = primary_binary[0]->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; @@ -7888,7 +7505,6 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } } -#ifndef ISP2401 if (need_pp && current_stage) { struct ia_css_frame *local_in_frame = NULL; @@ -7908,20 +7524,6 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } err = add_capture_pp_stage(pipe, me, local_in_frame, need_yuv_pp ? NULL : out_frame, -#else - /* ldc and capture_pp not supported in same pipeline */ - if (need_ldc && current_stage) { - in_frame = current_stage->args.out_frame[0]; - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, - NULL); - } else if (need_pp && current_stage) { - in_frame = current_stage->args.out_frame[0]; - err = add_capture_pp_stage(pipe, me, in_frame, - need_yuv_pp ? NULL : out_frame, -#endif capture_pp_binary, ¤t_stage); if (err) { @@ -7954,14 +7556,14 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The vf-pp - * stage has been removed from Skycam in the solution provided. - * The vf-pp stage should be re-introduced when required. This - * should not be considered as a clean solution. Proper - * investigation should be done to come up with the clean solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The vf-pp + * stage has been removed from Skycam in the solution provided. + * The vf-pp stage should be re-introduced when required. This + * should not be considered as a clean solution. Proper + * investigation should be done to come up with the clean solution. + */ if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) { @@ -8005,6 +7607,7 @@ create_host_capture_pipeline(struct ia_css_pipe *pipe) static int capture_start(struct ia_css_pipe *pipe) { struct ia_css_pipeline *me; + unsigned int thread_id; int err = 0; enum sh_css_pipe_config_override copy_ovrd; @@ -8034,7 +7637,7 @@ static int capture_start(struct ia_css_pipe *pipe) IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#elif defined(ISP2401) +#else if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { err = send_mipi_frames(pipe); if (err) { @@ -8042,23 +7645,19 @@ static int capture_start(struct ia_css_pipe *pipe) return err; } } - #endif - { - unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); #if !defined(ISP2401) /* - * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, - * which is currently done in start_binary(); but COPY pipe contains no binary, - * and does not call start_binary(); so we need to configure the rx here. - */ + * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, + * which is currently done in start_binary(); but COPY pipe contains no binary, + * and does not call start_binary(); so we need to configure the rx here. + */ if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && pipe->stream->reconfigure_css_rx) { ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, @@ -8174,7 +7773,8 @@ append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) while (*l) l = &(*l)->next; *l = firmware; - /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ + /* when multiple acc extensions are loaded, 'next' can be not NULL */ + /*firmware->next = NULL;*/ IA_CSS_LEAVE_PRIVATE(""); } @@ -8360,9 +7960,9 @@ sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, } /* - * @brief Tag a specific frame in continuous capture. - * Refer to "sh_css_internal.h" for details. - */ + * @brief Tag a specific frame in continuous capture. + * Refer to "sh_css_internal.h" for details. + */ int ia_css_stream_capture_frame(struct ia_css_stream *stream, unsigned int exp_id) { @@ -8389,10 +7989,12 @@ int ia_css_stream_capture_frame(struct ia_css_stream *stream, sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); /* Encode the tag descriptor into a 32-bit value */ encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ + /* + * Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue + */ err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); IA_CSS_LEAVE_ERR(err); @@ -8400,9 +8002,9 @@ int ia_css_stream_capture_frame(struct ia_css_stream *stream, } /* - * @brief Configure the continuous capture. - * Refer to "sh_css_internal.h" for details. - */ + * @brief Configure the continuous capture. + * Refer to "sh_css_internal.h" for details. + */ int ia_css_stream_capture(struct ia_css_stream *stream, int num_captures, unsigned int skip, int offset) { @@ -8438,10 +8040,12 @@ int ia_css_stream_capture(struct ia_css_stream *stream, int num_captures, return -EBUSY; } - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ + /* + * Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue + */ return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -8486,9 +8090,7 @@ sh_css_init_host_sp_control_vars(void) unsigned int HIVE_ADDR_host_sp_queues_initialized; unsigned int HIVE_ADDR_sp_sleep_mode; unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; -#ifndef ISP2401 unsigned int HIVE_ADDR_sp_stop_copy_preview; -#endif unsigned int HIVE_ADDR_host_sp_com; unsigned int o = offsetof(struct host_sp_communication, host2sp_command) / sizeof(int); @@ -8505,20 +8107,9 @@ sh_css_init_host_sp_control_vars(void) fw->info.sp.host_sp_queues_initialized; HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; -#ifndef ISP2401 HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; -#endif HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; - (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ - - (void)HIVE_ADDR_sp_sleep_mode; - (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; -#ifndef ISP2401 - (void)HIVE_ADDR_sp_stop_copy_preview; -#endif - (void)HIVE_ADDR_host_sp_com; - sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), (uint32_t)(0)); @@ -8532,11 +8123,9 @@ sh_css_init_host_sp_control_vars(void) sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), (uint32_t)(false)); -#ifndef ISP2401 sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(sp_stop_copy_preview), my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); -#endif store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); for (i = 0; i < N_CSI_PORTS; i++) { @@ -8586,9 +8175,11 @@ void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) stream_config->online = true; stream_config->left_padding = -1; stream_config->pixels_per_clock = 1; - /* temporary default value for backwards compatibility. - * This field used to be hardcoded within CSS but this has now - * been moved to the stream_config struct. */ + /* + * temporary default value for backwards compatibility. + * This field used to be hardcoded within CSS but this has now + * been moved to the stream_config struct. + */ stream_config->source.port.rxcount = 0x04040404; } @@ -8602,7 +8193,7 @@ ia_css_acc_pipe_create(struct ia_css_pipe *pipe) return -EINVAL; } - /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ + /* There is not meaning for num_execs = 0 semantically. Run at least once. */ if (pipe->config.acc_num_execs == 0) pipe->config.acc_num_execs = 1; @@ -8673,9 +8264,11 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); if (config->mode == IA_CSS_PIPE_MODE_ACC) { - /* Temporary hack to migrate acceleration to CSS 2.0. - * In the future the code for all pipe types should be - * unified. */ + /* + * Temporary hack to migrate acceleration to CSS 2.0. + * In the future the code for all pipe types should be + * unified. + */ *pipe = internal_pipe; if (!internal_pipe->config.acc_extension && internal_pipe->config.num_acc_stages == @@ -8687,21 +8280,23 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, return ia_css_acc_pipe_create(internal_pipe); } - /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ + /* + * Use config value when dvs_frame_delay setting equal to 2, + * otherwise always 1 by default + */ if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) internal_pipe->dvs_frame_delay = 2; else internal_pipe->dvs_frame_delay = 1; - /* we still keep enable_raw_binning for backward compatibility, for any new - fractional bayer downscaling, we should use bayer_ds_out_res. if both are - specified, bayer_ds_out_res will take precedence.if none is specified, we - set bayer_ds_out_res equal to IF output resolution(IF may do cropping on - sensor output) or use default decimation factor 1. */ - if (internal_pipe->extra_config.enable_raw_binning && - internal_pipe->config.bayer_ds_out_res.width) { - /* fill some code here, if no code is needed, please remove it during integration */ - } + /* + * we still keep enable_raw_binning for backward compatibility, + * for any new fractional bayer downscaling, we should use + * bayer_ds_out_res. if both are specified, bayer_ds_out_res will + * take precedence.if none is specified, we set bayer_ds_out_res + * equal to IF output resolution(IF may do cropping on sensor output) + * or use default decimation factor 1. + */ /* YUV downscaling */ if ((internal_pipe->config.vf_pp_in_res.width || @@ -8905,8 +8500,10 @@ ia_css_stream_configure_rx(struct ia_css_stream *stream) if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; else - /* not implemented yet, requires extension of the rx_cfg_t - * struct */ + /* + * not implemented yet, requires extension of the rx_cfg_t + * struct + */ return -EINVAL; stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); @@ -8993,56 +8590,15 @@ metadata_info_init(const struct ia_css_metadata_config *mdc, return -EINVAL; md->resolution = mdc->resolution; - /* We round up the stride to a multiple of the width - * of the port going to DDR, this is a HW requirements (DMA). */ + /* + * We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). + */ md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); md->size = mdc->resolution.height * md->stride; return 0; } -/* ISP2401 */ -static int check_pipe_resolutions(const struct ia_css_pipe *pipe) -{ - int err = 0; - - IA_CSS_ENTER_PRIVATE(""); - - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("null arguments"); - err = -EINVAL; - goto EXIT; - } - - if (ia_css_util_check_res(pipe->config.input_effective_res.width, - pipe->config.input_effective_res.height) != 0) { - IA_CSS_ERROR("effective resolution not supported"); - err = -EINVAL; - goto EXIT; - } - if (!ia_css_util_resolution_is_zero( - pipe->stream->config.input_config.input_res)) { - if (!ia_css_util_res_leq(pipe->config.input_effective_res, - pipe->stream->config.input_config.input_res)) { - IA_CSS_ERROR("effective resolution is larger than input resolution"); - err = -EINVAL; - goto EXIT; - } - } - if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { - IA_CSS_ERROR("output resolution must be even"); - err = -EINVAL; - goto EXIT; - } - if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { - IA_CSS_ERROR("VF resolution must be even"); - err = -EINVAL; - goto EXIT; - } -EXIT: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - int ia_css_stream_create(const struct ia_css_stream_config *stream_config, int num_pipes, @@ -9057,9 +8613,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, int err = -EINVAL; struct ia_css_metadata_info md_info; struct ia_css_resolution effective_res; -#ifdef ISP2401 - bool aspect_ratio_crop_enabled = false; -#endif IA_CSS_ENTER("num_pipes=%d", num_pipes); ia_css_debug_dump_stream_config(stream_config, num_pipes); @@ -9236,14 +8789,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, IA_CSS_LOG("mode sensor/default"); } -#ifdef ISP2401 - err = aspect_ratio_crop_init(curr_stream, pipes, - &aspect_ratio_crop_enabled); - if (err) { - IA_CSS_LEAVE_ERR(err); - goto ERR; - } -#endif for (i = 0; i < num_pipes; i++) { struct ia_css_resolution effective_res; @@ -9256,22 +8801,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (effective_res.height == 0 || effective_res.width == 0) { effective_res = curr_pipe->stream->config.input_config.effective_res; -#if defined(ISP2401) - /* The aspect ratio cropping is currently only - * supported on the new input system. */ - if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { - struct ia_css_resolution crop_res; - - err = aspect_ratio_crop(curr_pipe, &crop_res); - if (!err) { - effective_res = crop_res; - } else { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); - } - } -#endif curr_pipe->config.input_effective_res = effective_res; } IA_CSS_LOG("effective_res=%dx%d", @@ -9279,17 +8808,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, effective_res.height); } - if (IS_ISP2401) { - for (i = 0; i < num_pipes; i++) { - if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && - pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { - err = check_pipe_resolutions(pipes[i]); - if (err) - goto ERR; - } - } - } - err = ia_css_stream_isp_parameters_init(curr_stream); if (err) goto ERR; @@ -9327,9 +8845,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (num_pipes >= 2) { curr_stream->cont_capt = true; curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; - - if (!IS_ISP2401) - curr_stream->stop_copy_preview = my_css.stop_copy_preview; + curr_stream->stop_copy_preview = my_css.stop_copy_preview; } /* Create copy pipe here, since it may not be exposed to the driver */ @@ -9387,16 +8903,15 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* set current stream */ curr_pipe->stream = curr_stream; - if (!IS_ISP2401) { - /* take over effective info */ + /* take over effective info */ + + effective_res = curr_pipe->config.input_effective_res; + err = ia_css_util_check_res( + effective_res.width, + effective_res.height); + if (err) + goto ERR; - effective_res = curr_pipe->config.input_effective_res; - err = ia_css_util_check_res( - effective_res.width, - effective_res.height); - if (err) - goto ERR; - } /* sensor binning per pipe */ if (sensor_binning_changed) sh_css_pipe_free_shading_table(curr_pipe); @@ -9421,9 +8936,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, goto ERR; } - if (IS_ISP2401) - pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; - if (!spcopyonly) { if (!IS_ISP2401) err = sh_css_pipe_get_shading_info(curr_pipe, @@ -9523,8 +9035,6 @@ ia_css_stream_destroy(struct ia_css_stream *stream) if ((stream->last_pipe) && ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { #if defined(ISP2401) - bool free_mpi; - for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; unsigned int sp_thread_id; @@ -9548,19 +9058,16 @@ ia_css_stream_destroy(struct ia_css_stream *stream) } } } - free_mpi = stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - if (IS_ISP2401) { - free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_TPG; - free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_PRBS; - } - - if (free_mpi) { + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; - /* free any mipi frames that are remaining: - * some test stream create-destroy cycles do not generate output frames - * and the mipi buffer is not freed in the deque function - */ + /* + * free any mipi frames that are remaining: + * some test stream create-destroy cycles do + * not generate output frames + * and the mipi buffer is not freed in the + * deque function + */ if (entry) free_mipi_frames(entry); } @@ -9638,58 +9145,6 @@ ia_css_stream_get_info(const struct ia_css_stream *stream, return 0; } -/* - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - * The data is taken from the css_save struct updated upon stream creation. - * The stream handle is used to identify the correct entry in the css_save struct - */ -int -ia_css_stream_load(struct ia_css_stream *stream) -{ - int i, j, err; - - if (IS_ISP2401) { - /* TODO remove function - DEPRECATED */ - (void)stream; - return -ENOTSUPP; - } - - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter,\n"); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { - if (my_css_save.stream_seeds[i].stream != stream) - continue; - - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { - int k; - - err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], - &my_css_save.stream_seeds[i].pipes[j]); - if (!err) - continue; - - for (k = 0; k < j; k++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[k]); - return err; - } - err = ia_css_stream_create(&my_css_save.stream_seeds[i].stream_config, - my_css_save.stream_seeds[i].num_pipes, - my_css_save.stream_seeds[i].pipes, - &my_css_save.stream_seeds[i].stream); - if (!err) - break; - - ia_css_stream_destroy(stream); - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); - return err; - } - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() exit,\n"); - return 0; -} - int ia_css_stream_start(struct ia_css_stream *stream) { @@ -9763,16 +9218,14 @@ ia_css_stream_stop(struct ia_css_stream *stream) } #endif - if (!IS_ISP2401) - err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); - else - err = sh_css_pipes_stop(stream); - + err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); if (err) return err; - /* Ideally, unmapping should happen after pipeline_stop, but current - * semantics do not allow that. */ + /* + * Ideally, unmapping should happen after pipeline_stop, but current + * semantics do not allow that. + */ /* err = map_sp_threads(stream, false); */ return err; @@ -9785,19 +9238,16 @@ ia_css_stream_has_stopped(struct ia_css_stream *stream) assert(stream); - if (!IS_ISP2401) - stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); - else - stopped = sh_css_pipes_have_stopped(stream); + stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); return stopped; } /* ISP2400 */ /* - * Destroy the stream and all the pipes related to it. - * The stream handle is used to identify the correct entry in the css_save struct - */ + * Destroy the stream and all the pipes related to it. + * The stream handle is used to identify the correct entry in the css_save struct + */ int ia_css_stream_unload(struct ia_css_stream *stream) { @@ -10060,11 +9510,12 @@ ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { assert(pipe); - /* KW was not sure this function was not returning a value - that was out of range; so added an assert, and, for the - case when asserts are not enabled, clip to the largest - value; pipe_num is unsigned so the value cannot be too small - */ + /* + * KW was not sure this function was not returning a value + * that was out of range; so added an assert, and, for the + * case when asserts are not enabled, clip to the largest + * value; pipe_num is unsigned so the value cannot be too small + */ assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) @@ -10119,10 +9570,10 @@ ia_css_start_sp(void) } /* - * Time to wait SP for termincate. Only condition when this can happen - * is a fatal hw failure, but we must be able to detect this and emit - * a proper error trace. - */ + * Time to wait SP for termincate. Only condition when this can happen + * is a fatal hw failure, but we must be able to detect this and emit + * a proper error trace. + */ #define SP_SHUTDOWN_TIMEOUT_US 200000 int @@ -10142,14 +9593,10 @@ ia_css_stop_sp(void) } /* For now, stop whole SP */ - if (!IS_ISP2401) { - sh_css_write_host2sp_command(host2sp_cmd_terminate); - } else { - if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { - IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); - ia_css_debug_dump_sp_sw_debug_info(); - ia_css_debug_dump_debug_info(NULL); - } + if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); } sh_css_sp_set_sp_running(false); @@ -10245,9 +9692,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->pipe_settings.preview.preview_binary.info && pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); @@ -10260,9 +9705,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { if (pipe->pipe_settings.capture.primary_binary[i].info && @@ -10287,9 +9730,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->pipe_settings.video.video_binary.info && pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); @@ -10302,18 +9743,14 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); if (!pipe->stream->config.continuous) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { if (need_input_queue) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { unsigned int idx; @@ -10325,38 +9762,11 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) if (need_input_queue) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } IA_CSS_LEAVE(""); } -#if CONFIG_ON_FRAME_ENQUEUE() -static int set_config_on_frame_enqueue(struct ia_css_frame_info - *info, struct frame_data_wrapper *frame) -{ - frame->config_on_frame_enqueue.padded_width = 0; - - /* currently we support configuration on frame enqueue only on YUV formats */ - /* on other formats the padded_width is zeroed for no configuration override */ - switch (info->format) { - case IA_CSS_FRAME_FORMAT_YUV420: - case IA_CSS_FRAME_FORMAT_NV12: - if (info->padded_width > info->res.width) - frame->config_on_frame_enqueue.padded_width = info->padded_width; - else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) - return -EINVAL; - - /* nothing to do if width == padded width or padded width is zeroed (the same) */ - break; - default: - break; - } - - return 0; -} -#endif int ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) @@ -10365,8 +9775,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) IA_CSS_ENTER(""); - /* Only continuous streams have a tagger to which we can send the - * unlock message. */ + /* + * Only continuous streams have a tagger to which we can send the + * unlock message. + */ if (!stream || !stream->config.continuous) { IA_CSS_ERROR("invalid stream pointer"); return -EINVAL; @@ -10378,8 +9790,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) return -EINVAL; } - /* Send the event. Since we verified that the exp_id is valid, - * we can safely assign it to an 8-bit argument here. */ + /* + * Send the event. Since we verified that the exp_id is valid, + * we can safely assign it to an 8-bit argument here. + */ ret = ia_css_bufq_enqueue_psys_event( IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); @@ -10387,9 +9801,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) return ret; } -/* @brief Set the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ +/* + * @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ int ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool enable) @@ -10433,9 +9848,10 @@ ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, return err; } -/* @brief Get the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ +/* + * @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ int ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool *enable) @@ -10471,215 +9887,6 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, return err; } -/* ISP2401 */ -int -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, - u32 fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg) -{ - unsigned int HIVE_ADDR_sp_group; - static struct sh_css_sp_group sp_group; - static struct sh_css_sp_stage sp_stage; - static struct sh_css_isp_stage isp_stage; - const struct ia_css_fw_info *fw; - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - int err = 0; - int stage_num = 0; - enum ia_css_isp_memories mem; - bool enabled; - - IA_CSS_ENTER(""); - - fw = &sh_css_sp_fw; - - /* Parameter Check */ - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("Invalid Pipe."); - err = -EINVAL; - } else if (!(pipe->config.acc_extension)) { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = -EINVAL; - } else if (!sh_css_sp_is_running()) { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = -EBUSY; - } else { - /* Query the thread_id and stage_num corresponding to the Extension firmware */ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (!err) { - /* Get the Extension State */ - enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], - stage->stage_num)) ? true : false; - /* Update mapped arg only when extension stage is not enabled */ - if (enabled) { - IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); - err = -EBUSY; - } else { - stage_num = stage->stage_num; - - HIVE_ADDR_sp_group = fw->info.sp.group; - sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_group), - &sp_group, - sizeof(struct sh_css_sp_group)); - hmm_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], - &sp_stage, sizeof(struct sh_css_sp_stage)); - - hmm_load(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); - - for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - } - - hmm_store(sp_stage.isp_stage_addr, - &isp_stage, - sizeof(struct sh_css_isp_stage)); - } - } - } - IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); - return err; -} - -#ifdef ISP2401 -static int -aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status) -{ - int err = 0; - int i; - struct ia_css_pipe *curr_pipe; - u32 pipe_mask = 0; - - if ((!curr_stream) || - (curr_stream->num_pipes == 0) || - (!pipes) || - (!do_crop_status)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - for (i = 0; i < curr_stream->num_pipes; i++) { - curr_pipe = pipes[i]; - pipe_mask |= (1 << curr_pipe->config.mode); - } - - *do_crop_status = - (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || - (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && - (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && - curr_stream->config.continuous); - return 0; -} - -static bool -aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) -{ - bool status = false; - - if ((curr_pipe) && enabled) { - if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) - status = true; - } - - return status; -} - -static int -aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res) -{ - int err = 0; - struct ia_css_resolution crop_res; - struct ia_css_resolution *in_res = NULL; - struct ia_css_resolution *out_res = NULL; - bool use_bds_output_info = false; - bool use_vf_pp_in_res = false; - bool use_capt_pp_in_res = false; - - if ((!curr_pipe) || - (!effective_res)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - use_bds_output_info = - ((curr_pipe->bds_output_info.res.width != 0) && - (curr_pipe->bds_output_info.res.height != 0)); - - use_vf_pp_in_res = - ((curr_pipe->config.vf_pp_in_res.width != 0) && - (curr_pipe->config.vf_pp_in_res.height != 0)); - - use_capt_pp_in_res = - ((curr_pipe->config.capt_pp_in_res.width != 0) && - (curr_pipe->config.capt_pp_in_res.height != 0)); - - in_res = &curr_pipe->stream->config.input_config.effective_res; - out_res = &curr_pipe->output_info[0].res; - - switch (curr_pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - else if (use_vf_pp_in_res) - out_res = &curr_pipe->config.vf_pp_in_res; - break; - case IA_CSS_PIPE_MODE_VIDEO: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (use_capt_pp_in_res) - out_res = &curr_pipe->config.capt_pp_in_res; - break; - case IA_CSS_PIPE_MODE_ACC: - case IA_CSS_PIPE_MODE_COPY: - case IA_CSS_PIPE_MODE_YUVPP: - default: - IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", - curr_pipe->config.mode); - assert(0); - break; - } - - err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); - if (!err) - *effective_res = crop_res; - else - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); - - return err; -} -#endif - static void sh_css_hmm_buffer_record_init(void) { diff --git a/drivers/staging/media/atomisp/pci/sh_css_defs.h b/drivers/staging/media/atomisp/pci/sh_css_defs.h index 30a84a587b2a..7eb10b226f0a 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/sh_css_defs.h @@ -117,13 +117,8 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_NUM_INPUT_BUF_LINES 4 /* Left cropping only applicable for sufficiently large nway */ -#if ISP_VEC_NELEMS == 16 -#define SH_CSS_MAX_LEFT_CROPPING 0 -#define SH_CSS_MAX_TOP_CROPPING 0 -#else #define SH_CSS_MAX_LEFT_CROPPING 12 #define SH_CSS_MAX_TOP_CROPPING 12 -#endif #define SH_CSS_SP_MAX_WIDTH 1280 @@ -137,13 +132,8 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MIN_DVS_ENVELOPE 12U /* The FPGA system (vec_nelems == 16) only supports upto 5MP */ -#if ISP_VEC_NELEMS == 16 -#define SH_CSS_MAX_SENSOR_WIDTH 2560 -#define SH_CSS_MAX_SENSOR_HEIGHT 1920 -#else #define SH_CSS_MAX_SENSOR_WIDTH 4608 #define SH_CSS_MAX_SENSOR_HEIGHT 3450 -#endif /* Limited to reduce vmem pressure */ #if ISP_VMEM_DEPTH >= 3072 @@ -178,50 +168,20 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES) -#define ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) -#define ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) - -#define ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ - CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) - -/* TODO: I will move macros of "*_SCTBL_*" to SC kernel. - "+ 2" should be "+ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT". (michie, Sep/23/2014) */ -#define ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) -#define ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) +#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) +#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) -#define ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ - CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +#define SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ + CEIL_MUL(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* Each line of this table is aligned to the maximum line width. */ #define SH_CSS_MAX_S3ATBL_WIDTH SH_CSS_MAX_BQ_GRID_WIDTH /* Video mode specific DVS define */ /* The video binary supports a delay of 1 or 2 frames */ -#define VIDEO_FRAME_DELAY 2 +#define MAX_DVS_FRAME_DELAY 2 /* +1 because DVS reads the previous and writes the current frame concurrently */ -#define MAX_NUM_VIDEO_DELAY_FRAMES (VIDEO_FRAME_DELAY + 1) - -/* Preview mode specific DVS define. */ -/* In preview we only need GDC functionality (and not the DVS functionality) */ -/* The minimum number of DVS frames you need is 2, one were GDC reads from and another where GDC writes into */ -#define NUM_PREVIEW_DVS_FRAMES (2) - -/* TNR is no longer exclusive to video, SkyCam preview has TNR too (same kernel as video). - * All uses the generic define NUM_TNR_FRAMES. The define NUM_VIDEO_TNR_FRAMES has been deprecated. - * - * Notes - * 1) The value depends on the used TNR kernel and is not something that depends on the mode - * and it is not something you just could choice. - * 2) For the luma only pipeline a version that supports two different sets of TNR reference frames - * is being used. - *. - */ -#define NUM_VALID_TNR_REF_FRAMES (1) /* At least one valid TNR reference frame is required */ -#define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) -/* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ -#define NUM_TNR_REF_BUF_SETS (1) - -#define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) +#define MAX_NUM_VIDEO_DELAY_FRAMES (MAX_DVS_FRAME_DELAY + 1) #define NUM_VIDEO_TNR_FRAMES 2 @@ -250,11 +210,11 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) -#define _ISP2400_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) -#define _ISP2400_SCTBL_HEIGHT(input_height, deci_factor_log2) \ +#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1) -#define _ISP2400_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ ISP_VEC_NELEMS) diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index e1a16a50e588..94149647b98b 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -56,8 +56,7 @@ static struct firmware_header *firmware_header; * which will be replaced with the actual RELEASE_VERSION * during package generation. Please do not modify */ -static const char *isp2400_release_version = STR(irci_stable_candrpv_0415_20150521_0458); -static const char *isp2401_release_version = STR(irci_ecr - master_20150911_0724); +static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); #define MAX_FW_REL_VER_NAME 300 static char FW_rel_ver_name[MAX_FW_REL_VER_NAME] = "---"; @@ -190,13 +189,6 @@ sh_css_check_firmware_version(struct device *dev, const char *fw_data) { struct sh_css_fw_bi_file_h *file_header; - const char *release_version; - - if (!IS_ISP2401) - release_version = isp2400_release_version; - else - release_version = isp2401_release_version; - firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; @@ -232,12 +224,6 @@ sh_css_load_firmware(struct device *dev, const char *fw_data, struct ia_css_fw_info *binaries; struct sh_css_fw_bi_file_h *file_header; int ret; - const char *release_version; - - if (!IS_ISP2401) - release_version = isp2400_release_version; - else - release_version = isp2401_release_version; firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/sh_css_firmware.h index 66cd38f08f71..a73ce703adfb 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.h @@ -29,9 +29,6 @@ struct sh_css_fw_bi_file_h { }; extern struct ia_css_fw_info sh_css_sp_fw; -#if defined(HAS_BL) -extern struct ia_css_fw_info sh_css_bl_fw; -#endif /* HAS_BL */ extern struct ia_css_blob_descr *sh_css_blob_info; extern unsigned int sh_css_num_binaries; diff --git a/drivers/staging/media/atomisp/pci/sh_css_internal.h b/drivers/staging/media/atomisp/pci/sh_css_internal.h index 496faa7297a5..435b3cedd1c3 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/sh_css_internal.h @@ -86,12 +86,6 @@ #define SH_CSS_MAX_IF_CONFIGS 3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/ #define SH_CSS_IF_CONFIG_NOT_NEEDED 0xFF -#define SH_CSS_ENABLE_METADATA - -#if defined(SH_CSS_ENABLE_METADATA) && !defined(ISP2401) -#define SH_CSS_ENABLE_METADATA_THREAD -#endif - /* * SH_CSS_MAX_SP_THREADS: * sp threads visible to host with connected communication queues @@ -101,7 +95,7 @@ * these threads can't be used as image pipe */ -#if defined(SH_CSS_ENABLE_METADATA_THREAD) +#if !defined(ISP2401) #define SH_CSS_SP_INTERNAL_METADATA_THREAD 1 #else #define SH_CSS_SP_INTERNAL_METADATA_THREAD 0 @@ -276,7 +270,7 @@ struct sh_css_binary_args { struct ia_css_frame *in_frame; /* input frame */ const struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ - const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ + const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; /* tnr frames */ struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ @@ -526,7 +520,6 @@ struct sh_css_sp_pipeline { this struct; needs cleanup */ s32 num_execs; /* number of times to run if this is an acceleration pipe. */ -#if defined(SH_CSS_ENABLE_METADATA) struct { u32 format; /* Metadata format in hrt format */ u32 width; /* Width of a line */ @@ -535,10 +528,7 @@ struct sh_css_sp_pipeline { u32 size; /* Total size (in bytes) */ ia_css_ptr cont_buf; /* Address of continuous buffer */ } metadata; -#endif -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) u32 output_frame_queue_id; -#endif union { struct { u32 bytes_available; @@ -551,14 +541,6 @@ struct sh_css_sp_pipeline { u32 raw_bit_depth; } raw; } copy; - -/* ISP2401 */ - - /* Parameters passed to Shading Correction kernel. */ - struct { - u32 internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */ - u32 internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */ - } shading; }; /* @@ -580,9 +562,7 @@ struct ia_css_frames_sp { struct ia_css_frame_sp_info internal_frame_info; struct ia_css_buffer_sp s3a_buf; struct ia_css_buffer_sp dvs_buf; -#if defined SH_CSS_ENABLE_METADATA struct ia_css_buffer_sp metadata_buf; -#endif }; /* Information for a single pipeline stage for an ISP */ @@ -695,8 +675,6 @@ struct sh_css_sp_output { unsigned int sw_interrupt_value[SH_CSS_NUM_SDW_IRQS]; }; -#define CONFIG_ON_FRAME_ENQUEUE() 0 - /** * @brief Data structure for the circular buffer. * The circular buffer is empty if "start == end". The @@ -734,9 +712,6 @@ struct sh_css_hmm_buffer { u32 exp_id; u32 isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ -#if CONFIG_ON_FRAME_ENQUEUE() - struct sh_css_config_on_frame_enqueue config_on_frame_enqueue; -#endif } frame; ia_css_ptr ddr_ptrs; } payload; @@ -752,16 +727,9 @@ struct sh_css_hmm_buffer { clock_value_t isys_eof_clock_tick; }; -#if CONFIG_ON_FRAME_ENQUEUE() -#define SIZE_OF_FRAME_STRUCT \ - (SIZE_OF_HRT_VADDRESS + \ - (3 * sizeof(uint32_t)) + \ - sizeof(uint32_t)) -#else #define SIZE_OF_FRAME_STRUCT \ (SIZE_OF_HRT_VADDRESS + \ (3 * sizeof(uint32_t))) -#endif #define SIZE_OF_PAYLOAD_UNION \ (MAX(MAX(MAX(MAX( \ diff --git a/drivers/staging/media/atomisp/pci/sh_css_metadata.c b/drivers/staging/media/atomisp/pci/sh_css_metadata.c deleted file mode 100644 index 04a4b7da85e2..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_metadata.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_metadata.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_metrics.c b/drivers/staging/media/atomisp/pci/sh_css_metrics.c index 9744bbebe1bc..8ded6cdd1575 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_metrics.c +++ b/drivers/staging/media/atomisp/pci/sh_css_metrics.c @@ -123,40 +123,15 @@ sh_css_metrics_sample_pcs(void) unsigned int pc; unsigned int msink; -#if SUSPEND - unsigned int sc = 0; - unsigned int stopped_sc = 0; - unsigned int resume_sc = 0; -#endif -#if MULTIPLE_PCS - int i; - unsigned int pc_tab[NOF_PCS]; - - for (i = 0; i < NOF_PCS; i++) - pc_tab[i] = 0; -#endif if (!pc_histogram_enabled) return; if (isp_histogram) { -#if SUSPEND - /* STOP the ISP */ - isp_ctrl_store(ISP0_ID, ISP_SC_REG, STOP_MASK); -#endif msink = isp_ctrl_load(ISP0_ID, ISP_CTRL_SINK_REG); -#if MULTIPLE_PCS - for (i = 0; i < NOF_PCS; i++) - pc_tab[i] = isp_ctrl_load(ISP0_ID, ISP_PC_REG); -#else pc = isp_ctrl_load(ISP0_ID, ISP_PC_REG); -#endif -#if SUSPEND - /* RESUME the ISP */ - isp_ctrl_store(ISP0_ID, ISP_SC_REG, RESUME_MASK); -#endif isp_histogram->msink[pc] &= msink; stall = (msink != 0x7FF); diff --git a/drivers/staging/media/atomisp/pci/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/sh_css_mipi.c index 75489f7d75ee..0acf75497ae7 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_mipi.c +++ b/drivers/staging/media/atomisp/pci/sh_css_mipi.c @@ -33,47 +33,6 @@ static u32 ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ -/* - * Check if a source port or TPG/PRBS ID is valid - */ -static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, - unsigned int *pport) -{ - bool ret = true; - unsigned int port = 0; - unsigned int max_ports = 0; - - switch (pipe->stream->config.mode) { - case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: - port = (unsigned int)pipe->stream->config.source.port.port; - max_ports = N_CSI_PORTS; - break; - case IA_CSS_INPUT_MODE_TPG: - port = (unsigned int)pipe->stream->config.source.tpg.id; - max_ports = N_CSS_TPG_IDS; - break; - case IA_CSS_INPUT_MODE_PRBS: - port = (unsigned int)pipe->stream->config.source.prbs.id; - max_ports = N_CSS_PRBS_IDS; - break; - default: - assert(false); - ret = false; - break; - } - - if (ret) { - assert(port < max_ports); - - if (port >= max_ports) - ret = false; - } - - *pport = port; - - return ret; -} - /* Assumptions: * - A line is multiple of 4 bytes = 1 word. * - Each frame has SOF and EOF (each 1 word). @@ -133,15 +92,11 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, break; case ATOMISP_INPUT_FORMAT_YUV420_10: /* odd 4p, 5B, 40bits, even 4p, 10B, 80bits */ case ATOMISP_INPUT_FORMAT_RAW_10: /* 4p, 5B, 40bits */ -#if !defined(HAS_NO_PACKED_RAW_PIXELS) /* The changes will be reverted as soon as RAW * Buffers are deployed by the 2401 Input System * in the non-continuous use scenario. */ bits_per_pixel = 10; -#else - bits_per_pixel = 16; -#endif break; case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: /* 2p, 3B, 24bits */ case ATOMISP_INPUT_FORMAT_RAW_12: /* 2p, 3B, 24bits */ @@ -231,6 +186,10 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, return err; } +/* + * Check if a source port or TPG/PRBS ID is valid + */ + #if !defined(ISP2401) int ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, @@ -265,16 +224,31 @@ mipi_init(void) ref_count_mipi_allocation[i] = 0; } -int -calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words) +bool mipi_is_free(void) +{ + unsigned int i; + + for (i = 0; i < N_CSI_PORTS; i++) + if (ref_count_mipi_allocation[i]) + return false; + + return true; +} + +#if defined(ISP2401) +/* + * @brief Calculate the required MIPI buffer sizes. + * Based on the stream configuration, calculate the + * required MIPI buffer sizes (in DDR words). + * + * @param[in] stream_cfg Point to the target stream configuration + * @param[out] size_mem_words MIPI buffer size in DDR words. + * + * @return + */ +static int calculate_mipi_buff_size(struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words) { -#if !defined(ISP2401) - int err = -EINVAL; - (void)stream_cfg; - (void)size_mem_words; -#else unsigned int width; unsigned int height; enum atomisp_input_format format; @@ -366,26 +340,9 @@ calculate_mipi_buff_size( *size_mem_words = mem_words_per_buff; IA_CSS_LEAVE_ERR(err); -#endif return err; } - -static bool buffers_needed(struct ia_css_pipe *pipe) -{ - if (!IS_ISP2401) { - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - return false; - else - return true; - } - - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS) - return false; - - return true; -} +#endif int allocate_mipi_frames(struct ia_css_pipe *pipe, @@ -415,43 +372,25 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, } #endif - - if (!buffers_needed(pipe)) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", pipe); return 0; /* AM TODO: Check */ } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); - - if (port >= N_CSI_PORTS || err) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", - pipe, port); + port = (unsigned int)pipe->stream->config.source.port.port; + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("allocate_mipi_frames(%p) exit: port is not correct (port=%d).", + pipe, port); return -EINVAL; } #ifdef ISP2401 - err = calculate_mipi_buff_size( - &pipe->stream->config, - &my_css.mipi_frame_size[port]); -#endif - -#if !defined(ISP2401) - if (ref_count_mipi_allocation[port] != 0) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", - pipe, port); - return 0; - } -#else - /* 2401 system allows multiple streams to use same physical port. This is not + err = calculate_mipi_buff_size(&pipe->stream->config, + &my_css.mipi_frame_size[port]); + /* + * 2401 system allows multiple streams to use same physical port. This is not * true for 2400 system. Currently 2401 uses MIPI buffers as a temporary solution. * TODO AM: Once that is changed (removed) this code should be removed as well. * In that case only 2400 related code should remain. @@ -463,6 +402,13 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, pipe, port); return 0; } +#else + if (ref_count_mipi_allocation[port] != 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", + pipe, port); + return 0; + } #endif ref_count_mipi_allocation[port]++; @@ -494,9 +440,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, my_css.mipi_frames[port][j] = NULL; } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p, %d) exit: error: allocation failed.\n", - pipe, port); + IA_CSS_ERROR("allocate_mipi_frames(%p, %d) exit: allocation failed.", + pipe, port); return err; } } @@ -539,30 +484,22 @@ free_mipi_frames(struct ia_css_pipe *pipe) if (pipe) { assert(pipe->stream); if ((!pipe) || (!pipe->stream)) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", - pipe); + IA_CSS_ERROR("free_mipi_frames(%p) exit: pipe or stream is null.", + pipe); return -EINVAL; } - if (!buffers_needed(pipe)) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong mode.\n", - pipe); + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong mode.", + pipe); return err; } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); + port = (unsigned int)pipe->stream->config.source.port.port; - if (port >= N_CSI_PORTS || err) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", - pipe, port); + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("free_mipi_frames(%p, %d) exit: pipe port is not correct.", + pipe, port); return err; } @@ -570,9 +507,8 @@ free_mipi_frames(struct ia_css_pipe *pipe) #if !defined(ISP2401) assert(ref_count_mipi_allocation[port] == 1); if (ref_count_mipi_allocation[port] != 1) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong ref_count (ref_count=%d).\n", - pipe, ref_count_mipi_allocation[port]); + IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong ref_count (ref_count=%d).", + pipe, ref_count_mipi_allocation[port]); return err; } #endif @@ -640,11 +576,7 @@ send_mipi_frames(struct ia_css_pipe *pipe) { int err = -EINVAL; unsigned int i; -#ifndef ISP2401 unsigned int port; -#else - unsigned int port = 0; -#endif IA_CSS_ENTER_PRIVATE("pipe=%p", pipe); @@ -657,21 +589,16 @@ send_mipi_frames(struct ia_css_pipe *pipe) /* multi stream video needs mipi buffers */ /* nothing to be done in other cases. */ - if (!buffers_needed(pipe)) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { IA_CSS_LOG("nothing to be done for this mode"); return 0; /* TODO: AM: maybe this should be returning an error. */ } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); + port = (unsigned int)pipe->stream->config.source.port.port; - if (port >= N_CSI_PORTS || err) { - IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).", pipe, port); return err; } diff --git a/drivers/staging/media/atomisp/pci/sh_css_mipi.h b/drivers/staging/media/atomisp/pci/sh_css_mipi.h index 52f08a103883..e6c86d0ac483 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_mipi.h +++ b/drivers/staging/media/atomisp/pci/sh_css_mipi.h @@ -23,6 +23,8 @@ void mipi_init(void); +bool mipi_is_free(void); + int allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info); @@ -32,19 +34,4 @@ free_mipi_frames(struct ia_css_pipe *pipe); int send_mipi_frames(struct ia_css_pipe *pipe); -/** - * @brief Calculate the required MIPI buffer sizes. - * Based on the stream configuration, calculate the - * required MIPI buffer sizes (in DDR words). - * - * @param[in] stream_cfg Point to the target stream configuration - * @param[out] size_mem_words MIPI buffer size in DDR words. - * - * @return - */ -int -calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words); - #endif /* __SH_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_morph.c b/drivers/staging/media/atomisp/pci/sh_css_morph.c deleted file mode 100644 index edd1da941ccb..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_morph.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_morph.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/sh_css_param_shading.c index 69cc4e423d8b..41a4c9162319 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_param_shading.c +++ b/drivers/staging/media/atomisp/pci/sh_css_param_shading.c @@ -118,8 +118,10 @@ crop_and_interpolate(unsigned int cropped_width, int ty, src_y0, src_y1; unsigned int sy0, sy1, dy0, dy1, divy; - /* calculate target point and make sure it falls within - the table */ + /* + * calculate target point and make sure it falls within + * the table + */ ty = out_start_row + i * out_cell_size; /* calculate closest source points in shading table and @@ -166,19 +168,24 @@ crop_and_interpolate(unsigned int cropped_width, src_x1 = clamp(src_x1, 0, (int)table_width - 1); tx = min(clamp(tx, 0, (int)sensor_width - 1), (int)table_cell_w); - /* calculate closest source points for distance - computation */ + /* + * calculate closest source points for distance + * computation + */ sx0 = min(src_x0 * in_cell_size, sensor_width - 1); sx1 = min(src_x1 * in_cell_size, sensor_width - 1); - /* calculate distances between source and target - pixels */ + /* + * calculate distances between source and target + * pixels + */ dx0 = tx - sx0; dx1 = sx1 - tx; divx = sx1 - sx0; /* if we're at the edge, we just use the closest - point still in the grid. We make up for the divider - in this case by setting the distance to - out_cell_size, since it's actually 0. */ + * point still in the grid. We make up for the divider + * in this case by setting the distance to + * out_cell_size, since it's actually 0. + */ if (divx == 0) { dx0 = 1; divx = 1; @@ -242,8 +249,8 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, if (!in_table) { sh_css_params_shading_id_table_generate(target_table, - binary->sctbl_legacy_width_per_color, - binary->sctbl_legacy_height); + binary->sctbl_width_per_color, + binary->sctbl_height); return; } @@ -271,43 +278,33 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, bds_denominator - binary->info->sp.pipeline.top_cropping; -#if !defined(USE_WINDOWS_BINNING_FACTOR) - /* @deprecated{This part of the code will be replaced by the code - * in the #else section below to make the calculation same across - * all platforms. - * Android and Windows platforms interpret the binning_factor parameter - * differently. In Android, the binning factor is expressed in the form - * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N} + /* + * We take into account the binning done by the sensor. We do this + * by cropping the non-binned part of the shading table and then + * increasing the size of a grid cell with this same binning factor. */ - - /* We take into account the binning done by the sensor. We do this - by cropping the non-binned part of the shading table and then - increasing the size of a grid cell with this same binning factor. */ input_width <<= sensor_binning; input_height <<= sensor_binning; - /* We also scale the padding by the same binning factor. This will - make it much easier later on to calculate the padding of the - shading table. */ + /* + * We also scale the padding by the same binning factor. This will + * make it much easier later on to calculate the padding of the + * shading table. + */ left_padding <<= sensor_binning; right_padding <<= sensor_binning; top_padding <<= sensor_binning; -#else - input_width *= sensor_binning; - input_height *= sensor_binning; - left_padding *= sensor_binning; - right_padding *= sensor_binning; - top_padding *= sensor_binning; -#endif /*USE_WINDOWS_BINNING_FACTOR*/ - - /* during simulation, the used resolution can exceed the sensor - resolution, so we clip it. */ + + /* + * during simulation, the used resolution can exceed the sensor + * resolution, so we clip it. + */ input_width = min(input_width, in_table->sensor_width); input_height = min(input_height, in_table->sensor_height); /* This prepare_shading_table() function is called only in legacy API (not in new API). Then, the legacy shading table width and height should be used. */ - table_width = binary->sctbl_legacy_width_per_color; - table_height = binary->sctbl_legacy_height; + table_width = binary->sctbl_width_per_color; + table_height = binary->sctbl_height; result = ia_css_shading_table_alloc(table_width, table_height); if (!result) { @@ -318,8 +315,10 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, result->sensor_height = in_table->sensor_height; result->fraction_bits = in_table->fraction_bits; - /* now we crop the original shading table and then interpolate to the - requested resolution and decimation factor. */ + /* + * now we crop the original shading table and then interpolate to the + * requested resolution and decimation factor. + */ for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { crop_and_interpolate(input_width, input_height, left_padding, right_padding, top_padding, @@ -376,9 +375,10 @@ ia_css_shading_table_free(struct ia_css_shading_table *table) if (!table) return; - /* We only output logging when the table is not NULL, otherwise + /* + * We only output logging when the table is not NULL, otherwise * logs will give the impression that a table was freed. - * */ + */ IA_CSS_ENTER(""); for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.c b/drivers/staging/media/atomisp/pci/sh_css_params.c index dbd3bfe3d343..09f87c285b8d 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/sh_css_params.c @@ -16,12 +16,10 @@ #include "gdc_device.h" /* gdc_lut_store(), ... */ #include "isp.h" /* ISP_VEC_ELEMBITS */ #include "vamem.h" -#if !defined(HAS_NO_HMEM) #ifndef __INLINE_HMEM__ #define __INLINE_HMEM__ #endif #include "hmem.h" -#endif /* !defined(HAS_NO_HMEM) */ #define IA_CSS_INCLUDE_PARAMETERS #define IA_CSS_INCLUDE_ACC_PARAMETERS @@ -96,9 +94,6 @@ #include "xnr/xnr_3.0/ia_css_xnr3.host.h" -#if defined(HAS_OUTPUT_SYSTEM) -#include <components/output_system/sc_output_system_1.0/host/output_system.host.h> -#endif #include "sh_css_frac.h" #include "ia_css_bufq.h" @@ -107,15 +102,10 @@ (sizeof(char) * (binary)->in_frame_info.res.height * \ (binary)->in_frame_info.padded_width) -#define ISP2400_SCTBL_BYTES(binary) \ +#define SCTBL_BYTES(binary) \ (sizeof(unsigned short) * (binary)->sctbl_height * \ (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) -#define ISP2401_SCTBL_BYTES(binary) \ - (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ - /* height should be the larger height between new api and legacy api */ \ - (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) - #define MORPH_PLANE_BYTES(binary) \ (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ (binary)->morph_tbl_height) @@ -734,13 +724,11 @@ sh_css_set_global_isp_config_on_pipe( const struct ia_css_isp_config *config, struct ia_css_pipe *pipe); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static int sh_css_set_per_frame_isp_config_on_pipe( struct ia_css_stream *stream, const struct ia_css_isp_config *config, struct ia_css_pipe *pipe); -#endif static int sh_css_update_uds_and_crop_info_based_on_zoom_region( @@ -1031,16 +1019,6 @@ sh_css_params_set_binning_factor(struct ia_css_stream *stream, } static void -sh_css_update_shading_table_status(struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params) -{ - if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { - params->sc_table_dirty = true; - params->sc_table_last_pipe_num = pipe->pipe_num; - } -} - -static void sh_css_set_shading_table(struct ia_css_stream *stream, struct ia_css_isp_parameters *params, const struct ia_css_shading_table *table) @@ -1053,10 +1031,9 @@ sh_css_set_shading_table(struct ia_css_stream *stream, if (!table->enable) table = NULL; - if ((table != params->sc_table) || params->sc_table_dirty) { + if (table != params->sc_table) { params->sc_table = table; params->sc_table_changed = true; - params->sc_table_dirty = false; /* Not very clean, this goes to sh_css.c to invalidate the * shading table for all pipes. Should replaced by a loop * and a pipe-specific call. @@ -1510,10 +1487,8 @@ ia_css_translate_3a_statistics( ia_css_s3a_vmem_decode(host_stats, isp_stats->vmem_stats_hi, isp_stats->vmem_stats_lo); } -#if !defined(HAS_NO_HMEM) IA_CSS_LOG("3A: HMEM"); ia_css_s3a_hmem_decode(host_stats, isp_stats->hmem_stats); -#endif IA_CSS_LEAVE("void"); } @@ -1616,57 +1591,6 @@ ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, params->dp_config.r = params->wb_config.r; params->dp_config.b = params->wb_config.b; params->dp_config.gb = params->wb_config.gb; - - if (IS_ISP2401) { - assert(pipe); - assert(pipe->mode < IA_CSS_PIPE_ID_NUM); - - if (pipe->mode < IA_CSS_PIPE_ID_NUM) { - params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; - params->pipe_dp_config[pipe->mode].r = params->wb_config.r; - params->pipe_dp_config[pipe->mode].b = params->wb_config.b; - params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; - } - } -} - -/* ISP2401 */ -static void -sh_css_set_dp_config(const struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - assert(pipe); - assert(pipe->mode < IA_CSS_PIPE_ID_NUM); - - IA_CSS_ENTER_PRIVATE("config=%p", config); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); - if (pipe->mode < IA_CSS_PIPE_ID_NUM) { - params->pipe_dp_config[pipe->mode] = *config; - params->pipe_dpc_config_changed[pipe->mode] = true; - } - IA_CSS_LEAVE_PRIVATE("void"); -} - -static void -sh_css_get_dp_config(const struct ia_css_pipe *pipe, - const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - assert(pipe); - IA_CSS_ENTER_PRIVATE("config=%p", config); - - *config = params->pipe_dp_config[pipe->mode]; - - IA_CSS_LEAVE_PRIVATE("void"); } static void @@ -1740,9 +1664,7 @@ sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config); -#if !defined(HAS_NO_DVS_6AXIS_CONFIG_UPDATE) params->pipe_dvs_6axis_config_changed[pipe->mode] = true; -#endif IA_CSS_LEAVE_PRIVATE("void"); } @@ -1908,11 +1830,9 @@ ia_css_stream_set_isp_config_on_pipe( IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (config->output_frame) err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe); else -#endif err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe); IA_CSS_LEAVE_ERR(err); @@ -1933,11 +1853,9 @@ ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (config->output_frame) err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe); else -#endif err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in); IA_CSS_LEAVE_ERR(err); return err; @@ -1972,7 +1890,6 @@ sh_css_set_global_isp_config_on_pipe( return err; } -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static int sh_css_set_per_frame_isp_config_on_pipe( struct ia_css_stream *stream, @@ -2042,7 +1959,6 @@ exit: IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#endif static int sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, @@ -2067,7 +1983,6 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); sh_css_set_dz_config(params, config->dz_config); sh_css_set_motion_vector(params, config->motion_vector); - sh_css_update_shading_table_status(pipe_in, params); sh_css_set_shading_table(pipe->stream, params, config->shading_table); sh_css_set_morph_table(params, config->morph_table); sh_css_set_macc_table(params, config->macc_table); @@ -2083,16 +1998,6 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, params->output_frame = config->output_frame; params->isp_parameters_id = config->isp_config_id; - /* Currently we do not offer CSS interface to set different - * configurations for DPC, i.e. depending on DPC being enabled - * before (NORM+OBC) or after. The folllowing code to set the - * DPC configuration should be updated when this interface is made - * available */ - if (IS_ISP2401) { - sh_css_set_dp_config(pipe, params, config->dp_config); - ia_css_set_param_exceptions(pipe, params); - } - if (0 == sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) { /* return an error when both DPC and BDS is enabled by the @@ -2107,8 +2012,7 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, goto exit; } - if (!IS_ISP2401) - ia_css_set_param_exceptions(pipe, params); + ia_css_set_param_exceptions(pipe, params); exit: IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -2143,7 +2047,6 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, sh_css_get_ee_config(params, config->ee_config); sh_css_get_baa_config(params, config->baa_config); sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); - sh_css_get_dp_config(pipe, params, config->dp_config); sh_css_get_macc_table(params, config->macc_table); sh_css_get_gamma_table(params, config->gamma_table); sh_css_get_ctc_table(params, config->ctc_table); @@ -2250,9 +2153,7 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * grid->aligned_height; } -#if !defined(HAS_NO_HMEM) me->hmem_size = sizeof_hmem(HMEM0_ID); -#endif /* All subsections need to be aligned to the system bus width */ me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); @@ -2431,7 +2332,7 @@ sh_css_create_isp_params(struct ia_css_stream *stream, unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; struct sh_css_ddr_address_map_size *ddr_ptrs_size; - int err = 0; + int err; size_t params_size; struct ia_css_isp_parameters *params = kvmalloc(sizeof(struct ia_css_isp_parameters), GFP_KERNEL); @@ -2473,7 +2374,11 @@ sh_css_create_isp_params(struct ia_css_stream *stream, succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); *isp_params_out = params; - return err; + + if (!succ) + return -ENOMEM; + + return 0; } static bool @@ -2521,29 +2426,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, ia_css_set_ob_config(params, &default_ob_config); ia_css_set_dp_config(params, &default_dp_config); - if (!IS_ISP2401) { - ia_css_set_param_exceptions(pipe_in, params); - } else { - for (i = 0; i < stream->num_pipes; i++) { - if (sh_css_select_dp_10bpp_config(stream->pipes[i], - &is_dp_10bpp) == 0) { - /* set the return value as false if both DPC and - * BDS is enabled by the user. But we do not return - * the value immediately to enable internal firmware - * feature testing. */ - if (is_dp_10bpp) { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); - } else { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); - } - } else { - retval = false; - goto exit; - } - - ia_css_set_param_exceptions(stream->pipes[i], params); - } - } + ia_css_set_param_exceptions(pipe_in, params); ia_css_set_de_config(params, &default_de_config); ia_css_set_gc_config(params, &default_gc_config); @@ -2580,8 +2463,6 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, params->sc_table = NULL; params->sc_table_changed = true; - params->sc_table_dirty = false; - params->sc_table_last_pipe_num = 0; ia_css_sdis2_clear_coefficients(¶ms->dvs2_coefs); params->dvs2_coef_table_changed = true; @@ -2639,29 +2520,15 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware * feature testing. */ - - if (is_dp_10bpp) { - retval = false; - /* FIXME: should it ignore this error? */ - } + retval = !is_dp_10bpp; + /* FIXME: should it ignore this error? */ } else { retval = false; goto exit; } - if (IS_ISP2401) { - if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { - sh_css_set_dp_config(stream->pipes[i], params, - &stream_params->pipe_dp_config[stream->pipes[i]->mode]); - ia_css_set_param_exceptions(stream->pipes[i], params); - } else { - retval = false; - goto exit; - } - } } - if (!IS_ISP2401) - ia_css_set_param_exceptions(pipe_in, params); + ia_css_set_param_exceptions(pipe_in, params); params->fpn_config.data = stream_params->fpn_config.data; params->config_changed[IA_CSS_FPN_ID] = @@ -2672,13 +2539,10 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, sh_css_set_morph_table(params, stream_params->morph_table); if (stream_params->sc_table) { - sh_css_update_shading_table_status(pipe_in, params); sh_css_set_shading_table(stream, params, stream_params->sc_table); } else { params->sc_table = NULL; params->sc_table_changed = true; - params->sc_table_dirty = false; - params->sc_table_last_pipe_num = 0; } /* Only IA_CSS_PIPE_ID_VIDEO & IA_CSS_PIPE_ID_CAPTURE will support dvs_6axis_config*/ @@ -2771,18 +2635,6 @@ static void host_lut_store(const void *lut) gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); } -/* Note that allocation is in ipu address space. */ -inline ia_css_ptr sh_css_params_alloc_gdc_lut(void) -{ - return hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); -} - -inline void sh_css_params_free_gdc_lut(ia_css_ptr addr) -{ - if (addr != mmgr_NULL) - hmm_free(addr); -} - int ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, const void *lut) { @@ -2809,14 +2661,13 @@ int ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, } /* Free any existing tables. */ - sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); - pipe->scaler_pp_lut = mmgr_NULL; + if (pipe->scaler_pp_lut != mmgr_NULL) { + hmm_free(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + } if (!stream_started) { - if (!IS_ISP2401) - pipe->scaler_pp_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); - else - pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); + pipe->scaler_pp_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); if (pipe->scaler_pp_lut == mmgr_NULL) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, @@ -2858,10 +2709,7 @@ int sh_css_params_map_and_store_default_gdc_lut(void) host_lut_store((void *)zoom_table); - if (!IS_ISP2401) - default_gdc_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); - else - default_gdc_lut = sh_css_params_alloc_gdc_lut(); + default_gdc_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); if (default_gdc_lut == mmgr_NULL) return -ENOMEM; @@ -2879,8 +2727,10 @@ void sh_css_params_free_default_gdc_lut(void) { IA_CSS_ENTER_PRIVATE("void"); - sh_css_params_free_gdc_lut(default_gdc_lut); - default_gdc_lut = mmgr_NULL; + if (default_gdc_lut != mmgr_NULL) { + hmm_free(default_gdc_lut); + default_gdc_lut = mmgr_NULL; + } IA_CSS_LEAVE_PRIVATE("void"); } @@ -3252,15 +3102,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe); ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) ia_css_query_internal_queue_id(params->output_frame ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET : IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, &queue_id); -#else - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, - &queue_id); -#endif if (!sh_css_sp_is_running()) { /* SP is not running. The queues are not valid */ err = -EBUSY; @@ -3356,12 +3201,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); if (err) { free_ia_css_isp_parameter_set_info(cpy); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", isp_params_info.isp_parameters_id, isp_params_info.output_frame_ptr, queue_id, thread_id); -#endif break; } else { /* TMP: check discrepancy between nr of enqueued @@ -3383,12 +3226,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, (uint8_t)thread_id, (uint8_t)queue_id, 0); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", isp_params_info.isp_parameters_id, isp_params_info.output_frame_ptr, queue_id, thread_id); -#endif } /* clean-up old copy */ ia_css_dequeue_param_buffers(/*pipe_num*/); @@ -3466,18 +3307,12 @@ sh_css_params_write_to_ddr_internal( if (binary->info->sp.enable.sc) { u32 enable_conv; - size_t bytes; - - if (!IS_ISP2401) - bytes = ISP2400_SCTBL_BYTES(binary); - else - bytes = ISP2401_SCTBL_BYTES(binary); enable_conv = params->shading_settings.enable_shading_table_conversion; buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, &ddr_map_size->sc_tbl, - bytes, + SCTBL_BYTES(binary), params->sc_table_changed, &err); if (err) { @@ -3562,31 +3397,9 @@ sh_css_params_write_to_ddr_internal( } } - /* DPC configuration is made pipe specific to allow flexibility in positioning of the - * DPC kernel. The code below sets the pipe specific configuration to - * individual binaries. */ - if (IS_ISP2401 && - params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->pipe_dp_config[pipe_id], size); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - } - } - if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) { unsigned int i, j, idx; - unsigned int idx_map[] = { + static const unsigned int idx_map[] = { 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 }; @@ -3665,13 +3478,7 @@ sh_css_params_write_to_ddr_internal( if (!params->pipe_dvs_6axis_config[pipe_id]) { struct ia_css_resolution dvs_offset = {0}; - if (!IS_ISP2401) { - dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; - } else { - if (binary->dvs_envelope.width || binary->dvs_envelope.height) { - dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; - } - } + dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; dvs_offset.height = (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; params->pipe_dvs_6axis_config[pipe_id] = @@ -4335,12 +4142,8 @@ ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) me->data = kvmalloc(grid_size * sizeof(*me->data), GFP_KERNEL); if (!me->data) goto err; -#if !defined(HAS_NO_HMEM) /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ me->rgby_data = kvmalloc(sizeof_hmem(HMEM0_ID), GFP_KERNEL); -#else - me->rgby_data = NULL; -#endif IA_CSS_LEAVE("return=%p", me); return me; diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.h b/drivers/staging/media/atomisp/pci/sh_css_params.h index 62a7b6ada237..bbca19d0e8fc 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.h +++ b/drivers/staging/media/atomisp/pci/sh_css_params.h @@ -121,8 +121,6 @@ struct ia_css_isp_parameters { bool dvs2_coef_table_changed; bool morph_table_changed; bool sc_table_changed; - bool sc_table_dirty; - unsigned int sc_table_last_pipe_num; bool anr_thres_changed; /* ---- deprecated: replaced with pipe_dvs_6axis_config_changed ---- */ bool dvs_6axis_config_changed; @@ -168,12 +166,6 @@ ia_css_params_alloc_convert_sctbl( struct ia_css_isp_config * sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe); -/* ipu address allocation/free for gdc lut */ -ia_css_ptr -sh_css_params_alloc_gdc_lut(void); -void -sh_css_params_free_gdc_lut(ia_css_ptr addr); - int sh_css_params_map_and_store_default_gdc_lut(void); diff --git a/drivers/staging/media/atomisp/pci/sh_css_shading.c b/drivers/staging/media/atomisp/pci/sh_css_shading.c deleted file mode 100644 index 462caf9cb571..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_shading.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_shading.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_sp.c b/drivers/staging/media/atomisp/pci/sh_css_sp.c index a73e8ca1e225..615500a7d3c4 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/sh_css_sp.c @@ -330,9 +330,7 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, unsigned int thread_id; u8 stage_num = 0; struct sh_css_sp_pipeline *pipe; -#if defined SH_CSS_ENABLE_METADATA enum sh_css_queue_id queue_id; -#endif assert(out_frame); @@ -372,7 +370,6 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, set_output_frame_buffer(out_frame, 0); -#if defined SH_CSS_ENABLE_METADATA if (pipe->metadata.height > 0) { ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); @@ -380,7 +377,6 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); } -#endif ia_css_debug_pipe_graph_dump_sp_raw_copy(out_frame); } @@ -812,29 +808,47 @@ is_sp_stage(struct ia_css_pipeline_stage *stage) return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; } -static int -configure_isp_from_args( - const struct sh_css_sp_pipeline *pipeline, - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args, - bool two_ppc, - bool deinterleaved) +static int configure_isp_from_args(const struct sh_css_sp_pipeline *pipeline, + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args, + bool two_ppc, + bool deinterleaved) { - ia_css_fpn_configure(binary, &binary->in_frame_info); - ia_css_crop_configure(binary, &args->delay_frames[0]->info); - ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); - ia_css_output0_configure(binary, &args->out_frame[0]->info); - ia_css_output1_configure(binary, &args->out_vf_frame->info); - ia_css_copy_output_configure(binary, args->copy_output); - ia_css_output0_configure(binary, &args->out_frame[0]->info); -#ifdef ISP2401 - ia_css_sc_configure(binary, pipeline->shading.internal_frame_origin_x_bqs_on_sctbl, - pipeline->shading.internal_frame_origin_y_bqs_on_sctbl); -#endif - ia_css_iterator_configure(binary, &args->in_frame->info); - ia_css_dvs_configure(binary, &args->out_frame[0]->info); - ia_css_output_configure(binary, &args->out_frame[0]->info); - ia_css_raw_configure(pipeline, binary, &args->in_frame->info, &binary->in_frame_info, two_ppc, deinterleaved); + int ret; + + ret = ia_css_fpn_configure(binary, &binary->in_frame_info); + if (ret) + return ret; + ret = ia_css_crop_configure(binary, &args->delay_frames[0]->info); + if (ret) + return ret; + ret = ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); + if (ret) + return ret; + ret = ia_css_output0_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_output1_configure(binary, &args->out_vf_frame->info); + if (ret) + return ret; + ret = ia_css_copy_output_configure(binary, args->copy_output); + if (ret) + return ret; + ret = ia_css_output0_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_iterator_configure(binary, &args->in_frame->info); + if (ret) + return ret; + ret = ia_css_dvs_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_output_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_raw_configure(pipeline, binary, &args->in_frame->info, &binary->in_frame_info, two_ppc, deinterleaved); + if (ret) + return ret; /* * FIXME: args->delay_frames can be NULL here @@ -846,10 +860,13 @@ configure_isp_from_args( * without crashing, but the pipeline should likely be built without * adding it at the first place (or there are a hidden bug somewhere) */ - ia_css_ref_configure(binary, args->delay_frames, pipeline->dvs_frame_delay); - ia_css_tnr_configure(binary, args->tnr_frames); - ia_css_bayer_io_config(binary, args); - return 0; + ret = ia_css_ref_configure(binary, args->delay_frames, pipeline->dvs_frame_delay); + if (ret) + return ret; + ret = ia_css_tnr_configure(binary, args->tnr_frames); + if (ret) + return ret; + return ia_css_bayer_io_config(binary, args); } static void @@ -883,9 +900,7 @@ initialize_stage_frames(struct ia_css_frames_sp *frames) initialize_frame_buffer_attribute(&frames->out_vf.buf_attr); initialize_frame_buffer_attribute(&frames->s3a_buf); initialize_frame_buffer_attribute(&frames->dvs_buf); -#if defined SH_CSS_ENABLE_METADATA initialize_frame_buffer_attribute(&frames->metadata_buf); -#endif } static int @@ -1011,24 +1026,20 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_DIS_STATISTICS); } -#if defined SH_CSS_ENABLE_METADATA ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); -#endif if (err) return err; #ifdef ISP2401 - if (stage == 0) { - pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (!pipe) - return -EINVAL; - - if (args->in_frame) - ia_css_get_crop_offsets(pipe, &args->in_frame->info); - else - ia_css_get_crop_offsets(pipe, &binary->in_frame_info); - } + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (!pipe) + return -EINVAL; + + if (args->in_frame) + ia_css_get_crop_offsets(pipe, &args->in_frame->info); + else + ia_css_get_crop_offsets(pipe, &binary->in_frame_info); #else (void)pipe; /*avoid build warning*/ #endif @@ -1196,12 +1207,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_input_mode input_mode, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, - const enum mipi_port_id port_id, - const struct ia_css_coordinate - *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame - positioned on shading table at shading correction in ISP. */ - const struct ia_css_isp_parameters *params - ) + const enum mipi_port_id port_id) { /* Get first stage */ struct ia_css_pipeline_stage *stage = NULL; @@ -1288,7 +1294,6 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, } sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe); -#if defined(SH_CSS_ENABLE_METADATA) if (md_info && md_info->size > 0) { sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; @@ -1298,37 +1303,13 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, md_config->data_type, MIPI_PREDICTOR_NONE, &sh_css_sp_group.pipe[thread_id].metadata.format); } -#else - (void)md_config; - (void)md_info; -#endif -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID; if (pipe_id != IA_CSS_PIPE_ID_COPY) { ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, (enum sh_css_queue_id *)( &sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); } -#endif - - if (IS_ISP2401) { - /* For the shading correction type 1 (the legacy shading table conversion in css is not used), - * the parameters are passed to the isp for the shading table centering. - */ - if (internal_frame_origin_bqs_on_sctbl && - params && params->shading_settings.enable_shading_table_conversion == 0) { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; - } else { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = - 0; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = - 0; - } - } IA_CSS_LOG("pipe_id %d port_config %08x", pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config); diff --git a/drivers/staging/media/atomisp/pci/sh_css_sp.h b/drivers/staging/media/atomisp/pci/sh_css_sp.h index 832eed711525..f69a79b0b0da 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_sp.h +++ b/drivers/staging/media/atomisp/pci/sh_css_sp.h @@ -66,12 +66,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_input_mode input_mode, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, - const enum mipi_port_id port_id, - const struct ia_css_coordinate - *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame - positioned on shading table at shading correction in ISP. */ - const struct ia_css_isp_parameters *params - ); + const enum mipi_port_id port_id); void sh_css_sp_uninit_pipeline(unsigned int pipe_num); diff --git a/drivers/staging/media/atomisp/pci/sh_css_stream.c b/drivers/staging/media/atomisp/pci/sh_css_stream.c deleted file mode 100644 index a768ce90f51c..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_stream.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_stream.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/system_global.h b/drivers/staging/media/atomisp/pci/system_global.h index 9b22b8c168be..060b924023ec 100644 --- a/drivers/staging/media/atomisp/pci/system_global.h +++ b/drivers/staging/media/atomisp/pci/system_global.h @@ -25,9 +25,6 @@ * N.B. the 3 input formatters are of 2 different classess */ -/* per-frame parameter handling support */ -#define SH_CSS_ENABLE_PER_FRAME_PARAMS - #define DMA_DDR_TO_VAMEM_WORKAROUND #define DMA_DDR_TO_HMEM_WORKAROUND diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig index 20b1f6d7b69c..3c5d833322c8 100644 --- a/drivers/staging/media/hantro/Kconfig +++ b/drivers/staging/media/hantro/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 config VIDEO_HANTRO tristate "Hantro VPU driver" - depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMPILE_TEST depends on VIDEO_DEV && VIDEO_V4L2 select MEDIA_CONTROLLER select MEDIA_CONTROLLER_REQUEST_API @@ -9,6 +9,7 @@ config VIDEO_HANTRO select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV select V4L2_H264 + select V4L2_VP9 help Support for the Hantro IP based Video Processing Units present on Rockchip and NXP i.MX8M SoCs, which accelerate video and image @@ -39,3 +40,11 @@ config VIDEO_HANTRO_ROCKCHIP default y help Enable support for RK3288, RK3328, and RK3399 SoCs. + +config VIDEO_HANTRO_SUNXI + bool "Hantro VPU Allwinner support" + depends on VIDEO_HANTRO + depends on ARCH_SUNXI || COMPILE_TEST + default y + help + Enable support for H6 SoC. diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile index 90036831fec4..ebd5ede7bef7 100644 --- a/drivers/staging/media/hantro/Makefile +++ b/drivers/staging/media/hantro/Makefile @@ -10,8 +10,10 @@ hantro-vpu-y += \ hantro_g1.o \ hantro_g1_h264_dec.o \ hantro_g1_mpeg2_dec.o \ - hantro_g2_hevc_dec.o \ hantro_g1_vp8_dec.o \ + hantro_g2.o \ + hantro_g2_hevc_dec.o \ + hantro_g2_vp9_dec.o \ rockchip_vpu2_hw_jpeg_enc.o \ rockchip_vpu2_hw_h264_dec.o \ rockchip_vpu2_hw_mpeg2_dec.o \ @@ -20,7 +22,8 @@ hantro-vpu-y += \ hantro_h264.o \ hantro_hevc.o \ hantro_mpeg2.o \ - hantro_vp8.o + hantro_vp8.o \ + hantro_vp9.o hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \ imx8m_vpu_hw.o @@ -30,3 +33,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \ hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \ rockchip_vpu_hw.o + +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \ + sunxi_vpu_hw.o diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index c2e2dca38628..06d0f3597694 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -16,6 +16,7 @@ #include <linux/videodev2.h> #include <linux/wait.h> #include <linux/clk.h> +#include <linux/reset.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> @@ -28,6 +29,7 @@ struct hantro_ctx; struct hantro_codec_ops; +struct hantro_postproc_ops; #define HANTRO_JPEG_ENCODER BIT(0) #define HANTRO_ENCODERS 0x0000ffff @@ -35,6 +37,7 @@ struct hantro_codec_ops; #define HANTRO_VP8_DECODER BIT(17) #define HANTRO_H264_DECODER BIT(18) #define HANTRO_HEVC_DECODER BIT(19) +#define HANTRO_VP9_DECODER BIT(20) #define HANTRO_DECODERS 0xffff0000 /** @@ -59,6 +62,7 @@ struct hantro_irq { * @num_dec_fmts: Number of decoder formats. * @postproc_fmts: Post-processor formats. * @num_postproc_fmts: Number of post-processor formats. + * @postproc_ops: Post-processor ops. * @codec: Supported codecs * @codec_ops: Codec ops. * @init: Initialize hardware, optional. @@ -69,7 +73,9 @@ struct hantro_irq { * @num_clocks: number of clocks in the array * @reg_names: array of register range names * @num_regs: number of register range names in the array - * @postproc_regs: &struct hantro_postproc_regs pointer + * @double_buffer: core needs double buffering + * @legacy_regs: core uses legacy register set + * @late_postproc: postproc must be set up at the end of the job */ struct hantro_variant { unsigned int enc_offset; @@ -80,6 +86,7 @@ struct hantro_variant { unsigned int num_dec_fmts; const struct hantro_fmt *postproc_fmts; unsigned int num_postproc_fmts; + const struct hantro_postproc_ops *postproc_ops; unsigned int codec; const struct hantro_codec_ops *codec_ops; int (*init)(struct hantro_dev *vpu); @@ -90,7 +97,9 @@ struct hantro_variant { int num_clocks; const char * const *reg_names; int num_regs; - const struct hantro_postproc_regs *postproc_regs; + unsigned int double_buffer : 1; + unsigned int legacy_regs : 1; + unsigned int late_postproc : 1; }; /** @@ -101,6 +110,7 @@ struct hantro_variant { * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder. * @HANTRO_MODE_VP8_DEC: VP8 decoder. * @HANTRO_MODE_HEVC_DEC: HEVC decoder. + * @HANTRO_MODE_VP9_DEC: VP9 decoder. */ enum hantro_codec_mode { HANTRO_MODE_NONE = -1, @@ -109,6 +119,7 @@ enum hantro_codec_mode { HANTRO_MODE_MPEG2_DEC, HANTRO_MODE_VP8_DEC, HANTRO_MODE_HEVC_DEC, + HANTRO_MODE_VP9_DEC, }; /* @@ -167,6 +178,7 @@ hantro_vdev_to_func(struct video_device *vdev) * @dev: Pointer to device for convenient logging using * dev_ macros. * @clocks: Array of clock handles. + * @resets: Array of reset handles. * @reg_bases: Mapped addresses of VPU registers. * @enc_base: Mapped address of VPU encoder register for convenience. * @dec_base: Mapped address of VPU decoder register for convenience. @@ -186,6 +198,7 @@ struct hantro_dev { struct platform_device *pdev; struct device *dev; struct clk_bulk_data *clocks; + struct reset_control *resets; void __iomem **reg_bases; void __iomem *enc_base; void __iomem *dec_base; @@ -222,6 +235,7 @@ struct hantro_dev { * @mpeg2_dec: MPEG-2-decoding context. * @vp8_dec: VP8-decoding context. * @hevc_dec: HEVC-decoding context. + * @vp9_dec: VP9-decoding context. */ struct hantro_ctx { struct hantro_dev *dev; @@ -249,6 +263,7 @@ struct hantro_ctx { struct hantro_mpeg2_dec_hw_ctx mpeg2_dec; struct hantro_vp8_dec_hw_ctx vp8_dec; struct hantro_hevc_dec_hw_ctx hevc_dec; + struct hantro_vp9_dec_hw_ctx vp9_dec; }; }; @@ -262,6 +277,7 @@ struct hantro_ctx { * @max_depth: Maximum depth, for bitstream formats * @enc_fmt: Format identifier for encoder registers. * @frmsize: Supported range of frame sizes (only for bitstream formats). + * @postprocessed: Indicates if this format needs the post-processor. */ struct hantro_fmt { char *name; @@ -271,6 +287,7 @@ struct hantro_fmt { int max_depth; enum hantro_enc_fmt enc_fmt; struct v4l2_frmsize_stepwise frmsize; + bool postprocessed; }; struct hantro_reg { @@ -296,6 +313,22 @@ struct hantro_postproc_regs { struct hantro_reg display_width; }; +struct hantro_vp9_decoded_buffer_info { + /* Info needed when the decoded frame serves as a reference frame. */ + unsigned short width; + unsigned short height; + u32 bit_depth : 4; +}; + +struct hantro_decoded_buffer { + /* Must be the first field in this struct. */ + struct v4l2_m2m_buffer base; + + union { + struct hantro_vp9_decoded_buffer_info vp9; + }; +}; + /* Logging helpers */ /** @@ -366,6 +399,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg) writel(val, vpu->dec_base + reg); } +static inline void hantro_write_addr(struct hantro_dev *vpu, + unsigned long offset, + dma_addr_t addr) +{ + vdpu_write(vpu, addr & 0xffffffff, offset); +} + static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg) { u32 val = readl(vpu->dec_base + reg); @@ -426,6 +466,12 @@ hantro_get_dec_buf_addr(struct hantro_ctx *ctx, struct vb2_buffer *vb) return vb2_dma_contig_plane_dma_addr(vb, 0); } +static inline struct hantro_decoded_buffer * +vb2_to_hantro_decoded_buf(struct vb2_buffer *buf) +{ + return container_of(buf, struct hantro_decoded_buffer, base.vb.vb2_buf); +} + void hantro_postproc_disable(struct hantro_ctx *ctx); void hantro_postproc_enable(struct hantro_ctx *ctx); void hantro_postproc_free(struct hantro_ctx *ctx); diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index fb82b9297a2b..6a51f39dde56 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -130,7 +130,7 @@ void hantro_start_prepare_run(struct hantro_ctx *ctx) v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, &ctx->ctrl_handler); - if (!ctx->is_encoder) { + if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) { if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) hantro_postproc_enable(ctx); else @@ -142,6 +142,13 @@ void hantro_end_prepare_run(struct hantro_ctx *ctx) { struct vb2_v4l2_buffer *src_buf; + if (!ctx->is_encoder && ctx->dev->variant->late_postproc) { + if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) + hantro_postproc_enable(ctx); + else + hantro_postproc_disable(ctx); + } + src_buf = hantro_get_src_buf(ctx); v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req, &ctx->ctrl_handler); @@ -232,7 +239,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; dst_vq->drv_priv = ctx; dst_vq->ops = &hantro_queue_ops; - dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; dst_vq->lock = &ctx->dev->vpu_mutex; dst_vq->dev = ctx->dev->v4l2_dev.dev; @@ -263,6 +270,12 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0) /* Only 8-bit is supported */ return -EINVAL; + } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { + const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; + + /* We only support profile 0 */ + if (dec_params->profile != 0) + return -EINVAL; } return 0; } @@ -461,6 +474,16 @@ static const struct hantro_ctrl controls[] = { .step = 1, .ops = &hantro_hevc_ctrl_ops, }, + }, { + .codec = HANTRO_VP9_DECODER, + .cfg = { + .id = V4L2_CID_STATELESS_VP9_FRAME, + }, + }, { + .codec = HANTRO_VP9_DECODER, + .cfg = { + .id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, + }, }, }; @@ -598,6 +621,9 @@ static const struct of_device_id of_hantro_match[] = { #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4 { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, }, #endif +#ifdef CONFIG_VIDEO_HANTRO_SUNXI + { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, }, +#endif { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_hantro_match); @@ -889,6 +915,10 @@ static int hantro_probe(struct platform_device *pdev) return PTR_ERR(vpu->clocks[0].clk); } + vpu->resets = devm_reset_control_array_get(&pdev->dev, false, true); + if (IS_ERR(vpu->resets)) + return PTR_ERR(vpu->resets); + num_bases = vpu->variant->num_regs ?: 1; vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, sizeof(*vpu->reg_bases), GFP_KERNEL); @@ -907,6 +937,11 @@ static int hantro_probe(struct platform_device *pdev) vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; + /** + * TODO: Eventually allow taking advantage of full 64-bit address space. + * Until then we assume the MSB portion of buffers' base addresses is + * always 0 due to this masking operation. + */ ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); if (ret) { dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); @@ -957,10 +992,16 @@ static int hantro_probe(struct platform_device *pdev) pm_runtime_use_autosuspend(vpu->dev); pm_runtime_enable(vpu->dev); + ret = reset_control_deassert(vpu->resets); + if (ret) { + dev_err(&pdev->dev, "Failed to deassert resets\n"); + goto err_pm_disable; + } + ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); if (ret) { dev_err(&pdev->dev, "Failed to prepare clocks\n"); - return ret; + goto err_rst_assert; } ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); @@ -1016,6 +1057,9 @@ err_v4l2_unreg: v4l2_device_unregister(&vpu->v4l2_dev); err_clk_unprepare: clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); +err_rst_assert: + reset_control_assert(vpu->resets); +err_pm_disable: pm_runtime_dont_use_autosuspend(vpu->dev); pm_runtime_disable(vpu->dev); return ret; @@ -1034,6 +1078,7 @@ static int hantro_remove(struct platform_device *pdev) v4l2_m2m_release(vpu->m2m_dev); v4l2_device_unregister(&vpu->v4l2_dev); clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); + reset_control_assert(vpu->resets); pm_runtime_dont_use_autosuspend(vpu->dev); pm_runtime_disable(vpu->dev); return 0; diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c new file mode 100644 index 000000000000..ee5f14c5f8f2 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_g2.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VPU codec driver + * + * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz <andrzej.p@collabora.com> + */ + +#include "hantro_hw.h" +#include "hantro_g2_regs.h" + +void hantro_g2_check_idle(struct hantro_dev *vpu) +{ + int i; + + for (i = 0; i < 3; i++) { + u32 status; + + /* Make sure the VPU is idle */ + status = vdpu_read(vpu, G2_REG_INTERRUPT); + if (status & G2_REG_INTERRUPT_DEC_E) { + dev_warn(vpu->dev, "device still running, aborting"); + status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; + vdpu_write(vpu, status, G2_REG_INTERRUPT); + } + } +} + +irqreturn_t hantro_g2_irq(int irq, void *dev_id) +{ + struct hantro_dev *vpu = dev_id; + enum vb2_buffer_state state; + u32 status; + + status = vdpu_read(vpu, G2_REG_INTERRUPT); + state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vdpu_write(vpu, 0, G2_REG_INTERRUPT); + vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); + + hantro_irq_done(vpu, state); + + return IRQ_HANDLED; +} diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c index 76a921163b9a..99d8ea7543da 100644 --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c @@ -8,20 +8,6 @@ #include "hantro_hw.h" #include "hantro_g2_regs.h" -#define HEVC_DEC_MODE 0xC - -#define BUS_WIDTH_32 0 -#define BUS_WIDTH_64 1 -#define BUS_WIDTH_128 2 -#define BUS_WIDTH_256 3 - -static inline void hantro_write_addr(struct hantro_dev *vpu, - unsigned long offset, - dma_addr_t addr) -{ - vdpu_write(vpu, addr & 0xffffffff, offset); -} - static void prepare_tile_info_buffer(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; @@ -368,6 +354,8 @@ static int set_ref(struct hantro_ctx *ctx) const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb; dma_addr_t luma_addr, chroma_addr, mv_addr = 0; struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *vb2_dst; + struct hantro_decoded_buffer *dst; size_t cr_offset = hantro_hevc_chroma_offset(sps); size_t mv_offset = hantro_hevc_motion_vectors_offset(sps); u32 max_ref_frames; @@ -448,32 +436,37 @@ static int set_ref(struct hantro_ctx *ctx) if (dpb[i].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR) dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i); - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); - hantro_write_addr(vpu, G2_REG_DMV_REF(i), mv_addr); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i), mv_addr); } - luma_addr = hantro_hevc_get_ref_buf(ctx, decode_params->pic_order_cnt_val); + vb2_dst = hantro_get_dst_buf(ctx); + dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); + luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); if (!luma_addr) return -ENOMEM; + if (hantro_hevc_add_ref_buf(ctx, decode_params->pic_order_cnt_val, luma_addr)) + return -EINVAL; + chroma_addr = luma_addr + cr_offset; mv_addr = luma_addr + mv_offset; - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); - hantro_write_addr(vpu, G2_REG_DMV_REF(i++), mv_addr); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i++), mv_addr); - hantro_write_addr(vpu, G2_ADDR_DST, luma_addr); - hantro_write_addr(vpu, G2_ADDR_DST_CHR, chroma_addr); - hantro_write_addr(vpu, G2_ADDR_DST_MV, mv_addr); + hantro_write_addr(vpu, G2_OUT_LUMA_ADDR, luma_addr); + hantro_write_addr(vpu, G2_OUT_CHROMA_ADDR, chroma_addr); + hantro_write_addr(vpu, G2_OUT_MV_ADDR, mv_addr); hantro_hevc_ref_remove_unused(ctx); for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) { - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), 0); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), 0); - hantro_write_addr(vpu, G2_REG_DMV_REF(i), 0); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), 0); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), 0); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i), 0); } hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e); @@ -483,37 +476,28 @@ static int set_ref(struct hantro_ctx *ctx) static void set_buffers(struct hantro_ctx *ctx) { - struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct vb2_v4l2_buffer *src_buf; struct hantro_dev *vpu = ctx->dev; - const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; - const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; - size_t cr_offset = hantro_hevc_chroma_offset(sps); - dma_addr_t src_dma, dst_dma; + dma_addr_t src_dma; u32 src_len, src_buf_len; src_buf = hantro_get_src_buf(ctx); - dst_buf = hantro_get_dst_buf(ctx); /* Source (stream) buffer. */ src_dma = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); src_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); src_buf_len = vb2_plane_size(&src_buf->vb2_buf, 0); - hantro_write_addr(vpu, G2_ADDR_STR, src_dma); + hantro_write_addr(vpu, G2_STREAM_ADDR, src_dma); hantro_reg_write(vpu, &g2_stream_len, src_len); hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len); hantro_reg_write(vpu, &g2_strm_start_offset, 0); hantro_reg_write(vpu, &g2_write_mvs_e, 1); - /* Destination (decoded frame) buffer. */ - dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf); - - hantro_write_addr(vpu, G2_RASTER_SCAN, dst_dma); - hantro_write_addr(vpu, G2_RASTER_SCAN_CHR, dst_dma + cr_offset); - hantro_write_addr(vpu, G2_ADDR_TILE_SIZE, ctx->hevc_dec.tile_sizes.dma); - hantro_write_addr(vpu, G2_TILE_FILTER, ctx->hevc_dec.tile_filter.dma); - hantro_write_addr(vpu, G2_TILE_SAO, ctx->hevc_dec.tile_sao.dma); - hantro_write_addr(vpu, G2_TILE_BSD, ctx->hevc_dec.tile_bsd.dma); + hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma); + hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma); + hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma); + hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma); } static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) @@ -563,24 +547,7 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) for (k = 0; k < 8; k++) *p++ = sc->scaling_list_32x32[i][8 * k + j]; - hantro_write_addr(vpu, HEVC_SCALING_LIST, ctx->hevc_dec.scaling_lists.dma); -} - -static void hantro_g2_check_idle(struct hantro_dev *vpu) -{ - int i; - - for (i = 0; i < 3; i++) { - u32 status; - - /* Make sure the VPU is idle */ - status = vdpu_read(vpu, G2_REG_INTERRUPT); - if (status & G2_REG_INTERRUPT_DEC_E) { - dev_warn(vpu->dev, "device still running, aborting"); - status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; - vdpu_write(vpu, status, G2_REG_INTERRUPT); - } - } + hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); } int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) @@ -619,9 +586,6 @@ int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) /* Don't compress buffers */ hantro_reg_write(vpu, &g2_ref_compress_bypass, 1); - /* use NV12 as output format */ - hantro_reg_write(vpu, &g2_out_rs_e, 1); - /* Bus width and max burst */ hantro_reg_write(vpu, &g2_buswidth, BUS_WIDTH_128); hantro_reg_write(vpu, &g2_max_burst, 16); diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h index bb22fa921914..b7c6f9877b9d 100644 --- a/drivers/staging/media/hantro/hantro_g2_regs.h +++ b/drivers/staging/media/hantro/hantro_g2_regs.h @@ -27,8 +27,22 @@ #define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) #define G2_REG_INTERRUPT_DEC_E BIT(0) +#define HEVC_DEC_MODE 0xc +#define VP9_DEC_MODE 0xd + +#define BUS_WIDTH_32 0 +#define BUS_WIDTH_64 1 +#define BUS_WIDTH_128 2 +#define BUS_WIDTH_256 3 + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) +#define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f) +#define g2_pic_swap G2_DEC_REG(2, 22, 0x1f) #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) +#define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f) +#define g2_tab0_swap_old G2_DEC_REG(2, 12, 0x1f) +#define g2_tab1_swap_old G2_DEC_REG(2, 7, 0x1f) +#define g2_tab2_swap_old G2_DEC_REG(2, 2, 0x1f) #define g2_mode G2_DEC_REG(3, 27, 0x1f) #define g2_compress_swap G2_DEC_REG(3, 20, 0xf) @@ -37,11 +51,14 @@ #define g2_out_dis G2_DEC_REG(3, 15, 0x1) #define g2_out_filtering_dis G2_DEC_REG(3, 14, 0x1) #define g2_write_mvs_e G2_DEC_REG(3, 12, 0x1) +#define g2_tab3_swap_old G2_DEC_REG(3, 7, 0x1f) +#define g2_rscan_swap G2_DEC_REG(3, 2, 0x1f) #define g2_pic_width_in_cbs G2_DEC_REG(4, 19, 0x1fff) #define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff) #define g2_num_ref_frames G2_DEC_REG(4, 0, 0x1f) +#define g2_start_bit G2_DEC_REG(5, 25, 0x7f) #define g2_scaling_list_e G2_DEC_REG(5, 24, 0x1) #define g2_cb_qp_offset G2_DEC_REG(5, 19, 0x1f) #define g2_cr_qp_offset G2_DEC_REG(5, 14, 0x1f) @@ -49,6 +66,7 @@ #define g2_tempor_mvp_e G2_DEC_REG(5, 11, 0x1) #define g2_max_cu_qpd_depth G2_DEC_REG(5, 5, 0x3f) #define g2_cu_qpd_e G2_DEC_REG(5, 4, 0x1) +#define g2_pix_shift G2_DEC_REG(5, 0, 0xf) #define g2_stream_len G2_DEC_REG(6, 0, 0xffffffff) @@ -71,24 +89,40 @@ #define g2_const_intra_e G2_DEC_REG(8, 31, 0x1) #define g2_filt_ctrl_pres G2_DEC_REG(8, 30, 0x1) +#define g2_bit_depth_y G2_DEC_REG(8, 21, 0xf) +#define g2_bit_depth_c G2_DEC_REG(8, 17, 0xf) #define g2_idr_pic_e G2_DEC_REG(8, 16, 0x1) #define g2_bit_depth_pcm_y G2_DEC_REG(8, 12, 0xf) #define g2_bit_depth_pcm_c G2_DEC_REG(8, 8, 0xf) #define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3) #define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3) +#define g2_rs_out_bit_depth G2_DEC_REG(8, 4, 0xf) #define g2_output_8_bits G2_DEC_REG(8, 3, 0x1) +#define g2_output_format G2_DEC_REG(8, 0, 0x7) +#define g2_pp_pix_shift G2_DEC_REG(8, 0, 0xf) #define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f) #define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f) #define g2_hdr_skip_length G2_DEC_REG(9, 0, 0x3fff) #define g2_start_code_e G2_DEC_REG(10, 31, 0x1) +#define g2_init_qp_old G2_DEC_REG(10, 25, 0x3f) #define g2_init_qp G2_DEC_REG(10, 24, 0x3f) +#define g2_num_tile_cols_old G2_DEC_REG(10, 20, 0x1f) #define g2_num_tile_cols G2_DEC_REG(10, 19, 0x1f) +#define g2_num_tile_rows_old G2_DEC_REG(10, 15, 0x1f) #define g2_num_tile_rows G2_DEC_REG(10, 14, 0x1f) #define g2_tile_e G2_DEC_REG(10, 1, 0x1) #define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1) +#define vp9_transform_mode G2_DEC_REG(11, 27, 0x7) +#define vp9_filt_sharpness G2_DEC_REG(11, 21, 0x7) +#define vp9_mcomp_filt_type G2_DEC_REG(11, 8, 0x7) +#define vp9_high_prec_mv_e G2_DEC_REG(11, 7, 0x1) +#define vp9_comp_pred_mode G2_DEC_REG(11, 4, 0x3) +#define vp9_gref_sign_bias G2_DEC_REG(11, 2, 0x1) +#define vp9_aref_sign_bias G2_DEC_REG(11, 0, 0x1) + #define g2_refer_lterm_e G2_DEC_REG(12, 16, 0xffff) #define g2_min_cb_size G2_DEC_REG(12, 13, 0x7) #define g2_max_cb_size G2_DEC_REG(12, 10, 0x7) @@ -147,6 +181,50 @@ #define g2_partial_ctb_y G2_DEC_REG(20, 30, 0x1) #define g2_pic_width_4x4 G2_DEC_REG(20, 16, 0xfff) #define g2_pic_height_4x4 G2_DEC_REG(20, 0, 0xfff) + +#define vp9_qp_delta_y_dc G2_DEC_REG(13, 23, 0x3f) +#define vp9_qp_delta_ch_dc G2_DEC_REG(13, 17, 0x3f) +#define vp9_qp_delta_ch_ac G2_DEC_REG(13, 11, 0x3f) +#define vp9_last_sign_bias G2_DEC_REG(13, 10, 0x1) +#define vp9_lossless_e G2_DEC_REG(13, 9, 0x1) +#define vp9_comp_pred_var_ref1 G2_DEC_REG(13, 7, 0x3) +#define vp9_comp_pred_var_ref0 G2_DEC_REG(13, 5, 0x3) +#define vp9_comp_pred_fixed_ref G2_DEC_REG(13, 3, 0x3) +#define vp9_segment_temp_upd_e G2_DEC_REG(13, 2, 0x1) +#define vp9_segment_upd_e G2_DEC_REG(13, 1, 0x1) +#define vp9_segment_e G2_DEC_REG(13, 0, 0x1) + +#define vp9_filt_level G2_DEC_REG(14, 18, 0x3f) +#define vp9_refpic_seg0 G2_DEC_REG(14, 15, 0x7) +#define vp9_skip_seg0 G2_DEC_REG(14, 14, 0x1) +#define vp9_filt_level_seg0 G2_DEC_REG(14, 8, 0x3f) +#define vp9_quant_seg0 G2_DEC_REG(14, 0, 0xff) + +#define vp9_refpic_seg1 G2_DEC_REG(15, 15, 0x7) +#define vp9_skip_seg1 G2_DEC_REG(15, 14, 0x1) +#define vp9_filt_level_seg1 G2_DEC_REG(15, 8, 0x3f) +#define vp9_quant_seg1 G2_DEC_REG(15, 0, 0xff) + +#define vp9_refpic_seg2 G2_DEC_REG(16, 15, 0x7) +#define vp9_skip_seg2 G2_DEC_REG(16, 14, 0x1) +#define vp9_filt_level_seg2 G2_DEC_REG(16, 8, 0x3f) +#define vp9_quant_seg2 G2_DEC_REG(16, 0, 0xff) + +#define vp9_refpic_seg3 G2_DEC_REG(17, 15, 0x7) +#define vp9_skip_seg3 G2_DEC_REG(17, 14, 0x1) +#define vp9_filt_level_seg3 G2_DEC_REG(17, 8, 0x3f) +#define vp9_quant_seg3 G2_DEC_REG(17, 0, 0xff) + +#define vp9_refpic_seg4 G2_DEC_REG(18, 15, 0x7) +#define vp9_skip_seg4 G2_DEC_REG(18, 14, 0x1) +#define vp9_filt_level_seg4 G2_DEC_REG(18, 8, 0x3f) +#define vp9_quant_seg4 G2_DEC_REG(18, 0, 0xff) + +#define vp9_refpic_seg5 G2_DEC_REG(19, 15, 0x7) +#define vp9_skip_seg5 G2_DEC_REG(19, 14, 0x1) +#define vp9_filt_level_seg5 G2_DEC_REG(19, 8, 0x3f) +#define vp9_quant_seg5 G2_DEC_REG(19, 0, 0xff) + #define hevc_cur_poc_00 G2_DEC_REG(46, 24, 0xff) #define hevc_cur_poc_01 G2_DEC_REG(46, 16, 0xff) #define hevc_cur_poc_02 G2_DEC_REG(46, 8, 0xff) @@ -167,9 +245,48 @@ #define hevc_cur_poc_14 G2_DEC_REG(49, 8, 0xff) #define hevc_cur_poc_15 G2_DEC_REG(49, 0, 0xff) +#define vp9_refpic_seg6 G2_DEC_REG(31, 15, 0x7) +#define vp9_skip_seg6 G2_DEC_REG(31, 14, 0x1) +#define vp9_filt_level_seg6 G2_DEC_REG(31, 8, 0x3f) +#define vp9_quant_seg6 G2_DEC_REG(31, 0, 0xff) + +#define vp9_refpic_seg7 G2_DEC_REG(32, 15, 0x7) +#define vp9_skip_seg7 G2_DEC_REG(32, 14, 0x1) +#define vp9_filt_level_seg7 G2_DEC_REG(32, 8, 0x3f) +#define vp9_quant_seg7 G2_DEC_REG(32, 0, 0xff) + +#define vp9_lref_width G2_DEC_REG(33, 16, 0xffff) +#define vp9_lref_height G2_DEC_REG(33, 0, 0xffff) + +#define vp9_gref_width G2_DEC_REG(34, 16, 0xffff) +#define vp9_gref_height G2_DEC_REG(34, 0, 0xffff) + +#define vp9_aref_width G2_DEC_REG(35, 16, 0xffff) +#define vp9_aref_height G2_DEC_REG(35, 0, 0xffff) + +#define vp9_lref_hor_scale G2_DEC_REG(36, 16, 0xffff) +#define vp9_lref_ver_scale G2_DEC_REG(36, 0, 0xffff) + +#define vp9_gref_hor_scale G2_DEC_REG(37, 16, 0xffff) +#define vp9_gref_ver_scale G2_DEC_REG(37, 0, 0xffff) + +#define vp9_aref_hor_scale G2_DEC_REG(38, 16, 0xffff) +#define vp9_aref_ver_scale G2_DEC_REG(38, 0, 0xffff) + +#define vp9_filt_ref_adj_0 G2_DEC_REG(46, 24, 0x7f) +#define vp9_filt_ref_adj_1 G2_DEC_REG(46, 16, 0x7f) +#define vp9_filt_ref_adj_2 G2_DEC_REG(46, 8, 0x7f) +#define vp9_filt_ref_adj_3 G2_DEC_REG(46, 0, 0x7f) + +#define vp9_filt_mb_adj_0 G2_DEC_REG(47, 24, 0x7f) +#define vp9_filt_mb_adj_1 G2_DEC_REG(47, 16, 0x7f) +#define vp9_filt_mb_adj_2 G2_DEC_REG(47, 8, 0x7f) +#define vp9_filt_mb_adj_3 G2_DEC_REG(47, 0, 0x7f) + #define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff) #define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1) +#define g2_double_buffer_e G2_DEC_REG(58, 15, 0x1) #define g2_buswidth G2_DEC_REG(58, 8, 0x7) #define g2_max_burst G2_DEC_REG(58, 0, 0xff) @@ -177,20 +294,24 @@ #define G2_REG_CONFIG_DEC_CLK_GATE_E BIT(16) #define G2_REG_CONFIG_DEC_CLK_GATE_IDLE_E BIT(17) -#define G2_ADDR_DST (G2_SWREG(65)) -#define G2_REG_ADDR_REF(i) (G2_SWREG(67) + ((i) * 0x8)) -#define G2_ADDR_DST_CHR (G2_SWREG(99)) -#define G2_REG_CHR_REF(i) (G2_SWREG(101) + ((i) * 0x8)) -#define G2_ADDR_DST_MV (G2_SWREG(133)) -#define G2_REG_DMV_REF(i) (G2_SWREG(135) + ((i) * 0x8)) -#define G2_ADDR_TILE_SIZE (G2_SWREG(167)) -#define G2_ADDR_STR (G2_SWREG(169)) -#define HEVC_SCALING_LIST (G2_SWREG(171)) -#define G2_RASTER_SCAN (G2_SWREG(175)) -#define G2_RASTER_SCAN_CHR (G2_SWREG(177)) -#define G2_TILE_FILTER (G2_SWREG(179)) -#define G2_TILE_SAO (G2_SWREG(181)) -#define G2_TILE_BSD (G2_SWREG(183)) +#define G2_OUT_LUMA_ADDR (G2_SWREG(65)) +#define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) +#define G2_VP9_SEGMENT_WRITE_ADDR (G2_SWREG(79)) +#define G2_VP9_SEGMENT_READ_ADDR (G2_SWREG(81)) +#define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) +#define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) +#define G2_OUT_MV_ADDR (G2_SWREG(133)) +#define G2_REF_MV_ADDR(i) (G2_SWREG(135) + ((i) * 0x8)) +#define G2_TILE_SIZES_ADDR (G2_SWREG(167)) +#define G2_STREAM_ADDR (G2_SWREG(169)) +#define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) +#define G2_VP9_CTX_COUNT_ADDR (G2_SWREG(171)) +#define G2_VP9_PROBS_ADDR (G2_SWREG(173)) +#define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) +#define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) +#define G2_TILE_FILTER_ADDR (G2_SWREG(179)) +#define G2_TILE_SAO_ADDR (G2_SWREG(181)) +#define G2_TILE_BSD_ADDR (G2_SWREG(183)) #define g2_strm_buffer_len G2_DEC_REG(258, 0, 0xffffffff) #define g2_strm_start_offset G2_DEC_REG(259, 0, 0xffffffff) diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c new file mode 100644 index 000000000000..91c21b634fab --- /dev/null +++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c @@ -0,0 +1,1022 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ +#include "media/videobuf2-core.h" +#include "media/videobuf2-dma-contig.h" +#include "media/videobuf2-v4l2.h" +#include <linux/kernel.h> +#include <linux/vmalloc.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-vp9.h> + +#include "hantro.h" +#include "hantro_vp9.h" +#include "hantro_g2_regs.h" + +#define G2_ALIGN 16 + +enum hantro_ref_frames { + INTRA_FRAME = 0, + LAST_FRAME = 1, + GOLDEN_FRAME = 2, + ALTREF_FRAME = 3, + MAX_REF_FRAMES = 4 +}; + +static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame **dec_params) +{ + const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct v4l2_ctrl *ctrl; + unsigned int fctx_idx; + + /* v4l2-specific stuff */ + hantro_start_prepare_run(ctx); + + ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_FRAME); + if (WARN_ON(!ctrl)) + return -EINVAL; + *dec_params = ctrl->p_cur.p; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); + if (WARN_ON(!ctrl)) + return -EINVAL; + prob_updates = ctrl->p_cur.p; + vp9_ctx->cur.tx_mode = prob_updates->tx_mode; + + /* + * vp9 stuff + * + * by this point the userspace has done all parts of 6.2 uncompressed_header() + * except this fragment: + * if ( FrameIsIntra || error_resilient_mode ) { + * setup_past_independence ( ) + * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || + * reset_frame_context == 3 ) { + * for ( i = 0; i < 4; i ++ ) { + * save_probs( i ) + * } + * } else if ( reset_frame_context == 2 ) { + * save_probs( frame_context_idx ) + * } + * frame_context_idx = 0 + * } + */ + fctx_idx = v4l2_vp9_reset_frame_ctx(*dec_params, vp9_ctx->frame_context); + vp9_ctx->cur.frame_context_idx = fctx_idx; + + /* 6.1 frame(sz): load_probs() and load_probs2() */ + vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; + + /* + * The userspace has also performed 6.3 compressed_header(), but handling the + * probs in a special way. All probs which need updating, except MV-related, + * have been read from the bitstream and translated through inv_map_table[], + * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed + * by userspace are either translated values (there are no 0 values in + * inv_map_table[]), or zero to indicate no update. All MV-related probs which need + * updating have been read from the bitstream and (mv_prob << 1) | 1 has been + * performed. The values passed by userspace are either new values + * to replace old ones (the above mentioned shift and bitwise or never result in + * a zero) or zero to indicate no update. + * fw_update_probs() performs actual probs updates or leaves probs as-is + * for values for which a zero was passed from userspace. + */ + v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, *dec_params); + + return 0; +} + +static size_t chroma_offset(const struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; + + return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; +} + +static size_t mv_offset(const struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + size_t cr_offset = chroma_offset(ctx, dec_params); + + return ALIGN((cr_offset * 3) / 2, G2_ALIGN); +} + +static struct hantro_decoded_buffer * +get_ref_buf(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + int buf_idx; + + /* + * If a ref is unused or invalid, address of current destination + * buffer is returned. + */ + buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); + if (buf_idx < 0) + return vb2_to_hantro_decoded_buf(&dst->vb2_buf); + + return vb2_to_hantro_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); +} + +static void update_dec_buf_info(struct hantro_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + buf->vp9.width = dec_params->frame_width_minus_1 + 1; + buf->vp9.height = dec_params->frame_height_minus_1 + 1; + buf->vp9.bit_depth = dec_params->bit_depth; +} + +static void update_ctx_cur_info(struct hantro_vp9_dec_hw_ctx *vp9_ctx, + struct hantro_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + vp9_ctx->cur.valid = true; + vp9_ctx->cur.reference_mode = dec_params->reference_mode; + vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; + vp9_ctx->cur.flags = dec_params->flags; + vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; +} + +static void config_output(struct hantro_ctx *ctx, + struct hantro_decoded_buffer *dst, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + dma_addr_t luma_addr, chroma_addr, mv_addr; + + hantro_reg_write(ctx->dev, &g2_out_dis, 0); + if (!ctx->dev->variant->legacy_regs) + hantro_reg_write(ctx->dev, &g2_output_format, 0); + + luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); + + mv_addr = luma_addr + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); +} + +struct hantro_vp9_ref_reg { + const struct hantro_reg width; + const struct hantro_reg height; + const struct hantro_reg hor_scale; + const struct hantro_reg ver_scale; + u32 y_base; + u32 c_base; +}; + +static void config_ref(struct hantro_ctx *ctx, + struct hantro_decoded_buffer *dst, + const struct hantro_vp9_ref_reg *ref_reg, + const struct v4l2_ctrl_vp9_frame *dec_params, + u64 ref_ts) +{ + struct hantro_decoded_buffer *buf; + dma_addr_t luma_addr, chroma_addr; + u32 refw, refh; + + buf = get_ref_buf(ctx, &dst->base.vb, ref_ts); + refw = buf->vp9.width; + refh = buf->vp9.height; + + hantro_reg_write(ctx->dev, &ref_reg->width, refw); + hantro_reg_write(ctx->dev, &ref_reg->height, refh); + + hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); + hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); + + luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); +} + +static void config_ref_registers(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + struct hantro_decoded_buffer *dst, + struct hantro_decoded_buffer *mv_ref) +{ + static const struct hantro_vp9_ref_reg ref_regs[] = { + { + /* Last */ + .width = vp9_lref_width, + .height = vp9_lref_height, + .hor_scale = vp9_lref_hor_scale, + .ver_scale = vp9_lref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(0), + .c_base = G2_REF_CHROMA_ADDR(0), + }, { + /* Golden */ + .width = vp9_gref_width, + .height = vp9_gref_height, + .hor_scale = vp9_gref_hor_scale, + .ver_scale = vp9_gref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(4), + .c_base = G2_REF_CHROMA_ADDR(4), + }, { + /* Altref */ + .width = vp9_aref_width, + .height = vp9_aref_height, + .hor_scale = vp9_aref_hor_scale, + .ver_scale = vp9_aref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(5), + .c_base = G2_REF_CHROMA_ADDR(5), + }, + }; + dma_addr_t mv_addr; + + config_ref(ctx, dst, &ref_regs[0], dec_params, dec_params->last_frame_ts); + config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); + config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); + + mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); + + hantro_reg_write(ctx->dev, &vp9_last_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST ? 1 : 0); + + hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN ? 1 : 0); + + hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT ? 1 : 0); +} + +static void recompute_tile_info(unsigned short *tile_info, unsigned int tiles, unsigned int sbs) +{ + int i; + unsigned int accumulated = 0; + unsigned int next_accumulated; + + for (i = 1; i <= tiles; ++i) { + next_accumulated = i * sbs / tiles; + *tile_info++ = next_accumulated - accumulated; + accumulated = next_accumulated; + } +} + +static void +recompute_tile_rc_info(struct hantro_ctx *ctx, + unsigned int tile_r, unsigned int tile_c, + unsigned int sbs_r, unsigned int sbs_c) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + + recompute_tile_info(vp9_ctx->tile_r_info, tile_r, sbs_r); + recompute_tile_info(vp9_ctx->tile_c_info, tile_c, sbs_c); + + vp9_ctx->last_tile_r = tile_r; + vp9_ctx->last_tile_c = tile_c; + vp9_ctx->last_sbs_r = sbs_r; + vp9_ctx->last_sbs_c = sbs_c; +} + +static inline unsigned int first_tile_row(unsigned int tile_r, unsigned int sbs_r) +{ + if (tile_r == sbs_r + 1) + return 1; + + if (tile_r == sbs_r + 2) + return 2; + + return 0; +} + +static void +fill_tile_info(struct hantro_ctx *ctx, + unsigned int tile_r, unsigned int tile_c, + unsigned int sbs_r, unsigned int sbs_c, + unsigned short *tile_mem) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + unsigned int i, j; + bool first = true; + + for (i = first_tile_row(tile_r, sbs_r); i < tile_r; ++i) { + unsigned short r_info = vp9_ctx->tile_r_info[i]; + + if (first) { + if (i > 0) + r_info += vp9_ctx->tile_r_info[0]; + if (i == 2) + r_info += vp9_ctx->tile_r_info[1]; + first = false; + } + for (j = 0; j < tile_c; ++j) { + *tile_mem++ = vp9_ctx->tile_c_info[j]; + *tile_mem++ = r_info; + } + } +} + +static void +config_tiles(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + struct hantro_decoded_buffer *dst) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_ctx->misc; + struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge; + dma_addr_t addr; + unsigned short *tile_mem; + unsigned int rows, cols; + + addr = misc->dma + vp9_ctx->tile_info_offset; + hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); + + tile_mem = misc->cpu + vp9_ctx->tile_info_offset; + if (dec_params->tile_cols_log2 || dec_params->tile_rows_log2) { + unsigned int tile_r = (1 << dec_params->tile_rows_log2); + unsigned int tile_c = (1 << dec_params->tile_cols_log2); + unsigned int sbs_r = hantro_vp9_num_sbs(dst->vp9.height); + unsigned int sbs_c = hantro_vp9_num_sbs(dst->vp9.width); + + if (tile_r != vp9_ctx->last_tile_r || tile_c != vp9_ctx->last_tile_c || + sbs_r != vp9_ctx->last_sbs_r || sbs_c != vp9_ctx->last_sbs_c) + recompute_tile_rc_info(ctx, tile_r, tile_c, sbs_r, sbs_c); + + fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem); + + cols = tile_c; + rows = tile_r; + hantro_reg_write(ctx->dev, &g2_tile_e, 1); + } else { + tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width); + tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height); + + cols = 1; + rows = 1; + hantro_reg_write(ctx->dev, &g2_tile_e, 0); + } + + if (ctx->dev->variant->legacy_regs) { + hantro_reg_write(ctx->dev, &g2_num_tile_cols_old, cols); + hantro_reg_write(ctx->dev, &g2_num_tile_rows_old, rows); + } else { + hantro_reg_write(ctx->dev, &g2_num_tile_cols, cols); + hantro_reg_write(ctx->dev, &g2_num_tile_rows, rows); + } + + /* provide aux buffers even if no tiles are used */ + addr = tile_edge->dma; + hantro_write_addr(ctx->dev, G2_TILE_FILTER_ADDR, addr); + + addr = tile_edge->dma + vp9_ctx->bsd_ctrl_offset; + hantro_write_addr(ctx->dev, G2_TILE_BSD_ADDR, addr); +} + +static void +update_feat_and_flag(struct hantro_vp9_dec_hw_ctx *vp9_ctx, + const struct v4l2_vp9_segmentation *seg, + unsigned int feature, + unsigned int segid) +{ + u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); + + vp9_ctx->feature_data[segid][feature] = seg->feature_data[segid][feature]; + vp9_ctx->feature_enabled[segid] &= ~mask; + vp9_ctx->feature_enabled[segid] |= (seg->feature_enabled[segid] & mask); +} + +static inline s16 clip3(s16 x, s16 y, s16 z) +{ + return (z < x) ? x : (z > y) ? y : z; +} + +static s16 feat_val_clip3(s16 feat_val, s16 feature_data, bool absolute, u8 clip) +{ + if (absolute) + return feature_data; + + return clip3(0, 255, feat_val + feature_data); +} + +static void config_segment(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + const struct v4l2_vp9_segmentation *seg; + s16 feat_val; + unsigned char feat_id; + unsigned int segid; + bool segment_enabled, absolute, update_data; + + static const struct hantro_reg seg_regs[8][V4L2_VP9_SEG_LVL_MAX] = { + { vp9_quant_seg0, vp9_filt_level_seg0, vp9_refpic_seg0, vp9_skip_seg0 }, + { vp9_quant_seg1, vp9_filt_level_seg1, vp9_refpic_seg1, vp9_skip_seg1 }, + { vp9_quant_seg2, vp9_filt_level_seg2, vp9_refpic_seg2, vp9_skip_seg2 }, + { vp9_quant_seg3, vp9_filt_level_seg3, vp9_refpic_seg3, vp9_skip_seg3 }, + { vp9_quant_seg4, vp9_filt_level_seg4, vp9_refpic_seg4, vp9_skip_seg4 }, + { vp9_quant_seg5, vp9_filt_level_seg5, vp9_refpic_seg5, vp9_skip_seg5 }, + { vp9_quant_seg6, vp9_filt_level_seg6, vp9_refpic_seg6, vp9_skip_seg6 }, + { vp9_quant_seg7, vp9_filt_level_seg7, vp9_refpic_seg7, vp9_skip_seg7 }, + }; + + segment_enabled = !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED); + hantro_reg_write(ctx->dev, &vp9_segment_e, segment_enabled); + hantro_reg_write(ctx->dev, &vp9_segment_upd_e, + !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)); + hantro_reg_write(ctx->dev, &vp9_segment_temp_upd_e, + !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE)); + + seg = &dec_params->seg; + absolute = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE); + update_data = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA); + + for (segid = 0; segid < 8; ++segid) { + /* Quantizer segment feature */ + feat_id = V4L2_VP9_SEG_LVL_ALT_Q; + feat_val = dec_params->quant.base_q_idx; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = feat_val_clip3(feat_val, + vp9_ctx->feature_data[segid][feat_id], + absolute, 255); + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Loop filter segment feature */ + feat_id = V4L2_VP9_SEG_LVL_ALT_L; + feat_val = dec_params->lf.level; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = feat_val_clip3(feat_val, + vp9_ctx->feature_data[segid][feat_id], + absolute, 63); + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Reference frame segment feature */ + feat_id = V4L2_VP9_SEG_LVL_REF_FRAME; + feat_val = 0; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = vp9_ctx->feature_data[segid][feat_id] + 1; + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Skip segment feature */ + feat_id = V4L2_VP9_SEG_LVL_SKIP; + feat_val = 0; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + feat_val = v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, + feat_id, segid) ? 1 : 0; + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + } +} + +static void config_loop_filter(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + bool d = dec_params->lf.flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; + + hantro_reg_write(ctx->dev, &vp9_filt_level, dec_params->lf.level); + hantro_reg_write(ctx->dev, &g2_out_filtering_dis, dec_params->lf.level == 0); + hantro_reg_write(ctx->dev, &vp9_filt_sharpness, dec_params->lf.sharpness); + + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_0, d ? dec_params->lf.ref_deltas[0] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_1, d ? dec_params->lf.ref_deltas[1] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_2, d ? dec_params->lf.ref_deltas[2] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_3, d ? dec_params->lf.ref_deltas[3] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_0, d ? dec_params->lf.mode_deltas[0] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_1, d ? dec_params->lf.mode_deltas[1] : 0); +} + +static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_decoded_buffer *dst) +{ + u32 pic_w_4x4, pic_h_4x4; + + hantro_reg_write(ctx->dev, &g2_pic_width_in_cbs, (dst->vp9.width + 7) / 8); + hantro_reg_write(ctx->dev, &g2_pic_height_in_cbs, (dst->vp9.height + 7) / 8); + pic_w_4x4 = roundup(dst->vp9.width, 8) >> 2; + pic_h_4x4 = roundup(dst->vp9.height, 8) >> 2; + hantro_reg_write(ctx->dev, &g2_pic_width_4x4, pic_w_4x4); + hantro_reg_write(ctx->dev, &g2_pic_height_4x4, pic_h_4x4); +} + +static void +config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + if (ctx->dev->variant->legacy_regs) { + u8 pp_shift = 0; + + hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); + hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); + hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); + + if (dec_params->bit_depth > 8) + pp_shift = 16 - dec_params->bit_depth; + + hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); + hantro_reg_write(ctx->dev, &g2_pix_shift, 0); + } else { + hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); + hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); + } +} + +static inline bool is_lossless(const struct v4l2_vp9_quantization *quant) +{ + return quant->base_q_idx == 0 && quant->delta_q_uv_ac == 0 && + quant->delta_q_uv_dc == 0 && quant->delta_q_y_dc == 0; +} + +static void +config_quant(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + hantro_reg_write(ctx->dev, &vp9_qp_delta_y_dc, dec_params->quant.delta_q_y_dc); + hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_dc, dec_params->quant.delta_q_uv_dc); + hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_ac, dec_params->quant.delta_q_uv_ac); + hantro_reg_write(ctx->dev, &vp9_lossless_e, is_lossless(&dec_params->quant)); +} + +static u32 +hantro_interp_filter_from_v4l2(unsigned int interpolation_filter) +{ + switch (interpolation_filter) { + case V4L2_VP9_INTERP_FILTER_EIGHTTAP: + return 0x1; + case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH: + return 0; + case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP: + return 0x2; + case V4L2_VP9_INTERP_FILTER_BILINEAR: + return 0x3; + case V4L2_VP9_INTERP_FILTER_SWITCHABLE: + return 0x4; + } + + return 0; +} + +static void +config_others(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + bool intra_only, bool resolution_change) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + + hantro_reg_write(ctx->dev, &g2_idr_pic_e, intra_only); + + hantro_reg_write(ctx->dev, &vp9_transform_mode, vp9_ctx->cur.tx_mode); + + hantro_reg_write(ctx->dev, &vp9_mcomp_filt_type, intra_only ? + 0 : hantro_interp_filter_from_v4l2(dec_params->interpolation_filter)); + + hantro_reg_write(ctx->dev, &vp9_high_prec_mv_e, + !!(dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); + + hantro_reg_write(ctx->dev, &vp9_comp_pred_mode, dec_params->reference_mode); + + hantro_reg_write(ctx->dev, &g2_tempor_mvp_e, + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) && + !resolution_change && + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME + ); + + hantro_reg_write(ctx->dev, &g2_write_mvs_e, + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)); +} + +static void +config_compound_reference(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + u32 comp_fixed_ref, comp_var_ref[2]; + bool last_ref_frame_sign_bias; + bool golden_ref_frame_sign_bias; + bool alt_ref_frame_sign_bias; + bool comp_ref_allowed = 0; + + comp_fixed_ref = 0; + comp_var_ref[0] = 0; + comp_var_ref[1] = 0; + + last_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST; + golden_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN; + alt_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT; + + /* 6.3.12 Frame reference mode syntax */ + comp_ref_allowed |= golden_ref_frame_sign_bias != last_ref_frame_sign_bias; + comp_ref_allowed |= alt_ref_frame_sign_bias != last_ref_frame_sign_bias; + + if (comp_ref_allowed) { + if (last_ref_frame_sign_bias == + golden_ref_frame_sign_bias) { + comp_fixed_ref = ALTREF_FRAME; + comp_var_ref[0] = LAST_FRAME; + comp_var_ref[1] = GOLDEN_FRAME; + } else if (last_ref_frame_sign_bias == + alt_ref_frame_sign_bias) { + comp_fixed_ref = GOLDEN_FRAME; + comp_var_ref[0] = LAST_FRAME; + comp_var_ref[1] = ALTREF_FRAME; + } else { + comp_fixed_ref = LAST_FRAME; + comp_var_ref[0] = GOLDEN_FRAME; + comp_var_ref[1] = ALTREF_FRAME; + } + } + + hantro_reg_write(ctx->dev, &vp9_comp_pred_fixed_ref, comp_fixed_ref); + hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref0, comp_var_ref[0]); + hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref1, comp_var_ref[1]); +} + +#define INNER_LOOP \ +do { \ + for (m = 0; m < ARRAY_SIZE(adaptive->coef[0][0][0][0]); ++m) { \ + memcpy(adaptive->coef[i][j][k][l][m], \ + probs->coef[i][j][k][l][m], \ + sizeof(probs->coef[i][j][k][l][m])); \ + \ + adaptive->coef[i][j][k][l][m][3] = 0; \ + } \ +} while (0) + +static void config_probs(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_ctx->misc; + struct hantro_g2_all_probs *all_probs = misc->cpu; + struct hantro_g2_probs *adaptive; + struct hantro_g2_mv_probs *mv; + const struct v4l2_vp9_segmentation *seg = &dec_params->seg; + const struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + int i, j, k, l, m; + + for (i = 0; i < ARRAY_SIZE(all_probs->kf_y_mode_prob); ++i) + for (j = 0; j < ARRAY_SIZE(all_probs->kf_y_mode_prob[0]); ++j) { + memcpy(all_probs->kf_y_mode_prob[i][j], + v4l2_vp9_kf_y_mode_prob[i][j], + ARRAY_SIZE(all_probs->kf_y_mode_prob[i][j])); + + all_probs->kf_y_mode_prob_tail[i][j][0] = + v4l2_vp9_kf_y_mode_prob[i][j][8]; + } + + memcpy(all_probs->mb_segment_tree_probs, seg->tree_probs, + sizeof(all_probs->mb_segment_tree_probs)); + + memcpy(all_probs->segment_pred_probs, seg->pred_probs, + sizeof(all_probs->segment_pred_probs)); + + for (i = 0; i < ARRAY_SIZE(all_probs->kf_uv_mode_prob); ++i) { + memcpy(all_probs->kf_uv_mode_prob[i], v4l2_vp9_kf_uv_mode_prob[i], + ARRAY_SIZE(all_probs->kf_uv_mode_prob[i])); + + all_probs->kf_uv_mode_prob_tail[i][0] = v4l2_vp9_kf_uv_mode_prob[i][8]; + } + + adaptive = &all_probs->probs; + + for (i = 0; i < ARRAY_SIZE(adaptive->inter_mode); ++i) { + memcpy(adaptive->inter_mode[i], probs->inter_mode[i], + ARRAY_SIZE(probs->inter_mode[i])); + + adaptive->inter_mode[i][3] = 0; + } + + memcpy(adaptive->is_inter, probs->is_inter, sizeof(adaptive->is_inter)); + + for (i = 0; i < ARRAY_SIZE(adaptive->uv_mode); ++i) { + memcpy(adaptive->uv_mode[i], probs->uv_mode[i], + sizeof(adaptive->uv_mode[i])); + adaptive->uv_mode_tail[i][0] = probs->uv_mode[i][8]; + } + + memcpy(adaptive->tx8, probs->tx8, sizeof(adaptive->tx8)); + memcpy(adaptive->tx16, probs->tx16, sizeof(adaptive->tx16)); + memcpy(adaptive->tx32, probs->tx32, sizeof(adaptive->tx32)); + + for (i = 0; i < ARRAY_SIZE(adaptive->y_mode); ++i) { + memcpy(adaptive->y_mode[i], probs->y_mode[i], + ARRAY_SIZE(adaptive->y_mode[i])); + + adaptive->y_mode_tail[i][0] = probs->y_mode[i][8]; + } + + for (i = 0; i < ARRAY_SIZE(adaptive->partition[0]); ++i) { + memcpy(adaptive->partition[0][i], v4l2_vp9_kf_partition_probs[i], + sizeof(v4l2_vp9_kf_partition_probs[i])); + + adaptive->partition[0][i][3] = 0; + } + + for (i = 0; i < ARRAY_SIZE(adaptive->partition[1]); ++i) { + memcpy(adaptive->partition[1][i], probs->partition[i], + sizeof(probs->partition[i])); + + adaptive->partition[1][i][3] = 0; + } + + memcpy(adaptive->interp_filter, probs->interp_filter, + sizeof(adaptive->interp_filter)); + + memcpy(adaptive->comp_mode, probs->comp_mode, sizeof(adaptive->comp_mode)); + + memcpy(adaptive->skip, probs->skip, sizeof(adaptive->skip)); + + mv = &adaptive->mv; + + memcpy(mv->joint, probs->mv.joint, sizeof(mv->joint)); + memcpy(mv->sign, probs->mv.sign, sizeof(mv->sign)); + memcpy(mv->class0_bit, probs->mv.class0_bit, sizeof(mv->class0_bit)); + memcpy(mv->fr, probs->mv.fr, sizeof(mv->fr)); + memcpy(mv->class0_hp, probs->mv.class0_hp, sizeof(mv->class0_hp)); + memcpy(mv->hp, probs->mv.hp, sizeof(mv->hp)); + memcpy(mv->classes, probs->mv.classes, sizeof(mv->classes)); + memcpy(mv->class0_fr, probs->mv.class0_fr, sizeof(mv->class0_fr)); + memcpy(mv->bits, probs->mv.bits, sizeof(mv->bits)); + + memcpy(adaptive->single_ref, probs->single_ref, sizeof(adaptive->single_ref)); + + memcpy(adaptive->comp_ref, probs->comp_ref, sizeof(adaptive->comp_ref)); + + for (i = 0; i < ARRAY_SIZE(adaptive->coef); ++i) + for (j = 0; j < ARRAY_SIZE(adaptive->coef[0]); ++j) + for (k = 0; k < ARRAY_SIZE(adaptive->coef[0][0]); ++k) + for (l = 0; l < ARRAY_SIZE(adaptive->coef[0][0][0]); ++l) + INNER_LOOP; + + hantro_write_addr(ctx->dev, G2_VP9_PROBS_ADDR, misc->dma); +} + +static void config_counts(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_dec->misc; + dma_addr_t addr = misc->dma + vp9_dec->ctx_counters_offset; + + hantro_write_addr(ctx->dev, G2_VP9_CTX_COUNT_ADDR, addr); +} + +static void config_seg_map(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + bool intra_only, bool update_map) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *segment_map = &vp9_ctx->segment_map; + dma_addr_t addr; + + if (intra_only || + (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT)) { + memset(segment_map->cpu, 0, segment_map->size); + memset(vp9_ctx->feature_data, 0, sizeof(vp9_ctx->feature_data)); + memset(vp9_ctx->feature_enabled, 0, sizeof(vp9_ctx->feature_enabled)); + } + + addr = segment_map->dma + vp9_ctx->active_segment * vp9_ctx->segment_map_size; + hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_READ_ADDR, addr); + + addr = segment_map->dma + (1 - vp9_ctx->active_segment) * vp9_ctx->segment_map_size; + hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_WRITE_ADDR, addr); + + if (update_map) + vp9_ctx->active_segment = 1 - vp9_ctx->active_segment; +} + +static void +config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + struct vb2_v4l2_buffer *vb2_src) +{ + dma_addr_t stream_base, tmp_addr; + unsigned int headres_size; + u32 src_len, start_bit, src_buf_len; + + headres_size = dec_params->uncompressed_header_size + + dec_params->compressed_header_size; + + stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0); + + tmp_addr = stream_base + headres_size; + if (ctx->dev->variant->legacy_regs) + hantro_write_addr(ctx->dev, G2_STREAM_ADDR, (tmp_addr & ~0xf)); + else + hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); + + start_bit = (tmp_addr & 0xf) * 8; + hantro_reg_write(ctx->dev, &g2_start_bit, start_bit); + + src_len = vb2_get_plane_payload(&vb2_src->vb2_buf, 0); + src_len += start_bit / 8 - headres_size; + hantro_reg_write(ctx->dev, &g2_stream_len, src_len); + + if (!ctx->dev->variant->legacy_regs) { + tmp_addr &= ~0xf; + hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); + src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); + hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); + } +} + +static void +config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + struct vb2_v4l2_buffer *vb2_src, struct vb2_v4l2_buffer *vb2_dst) +{ + struct hantro_decoded_buffer *dst, *last, *mv_ref; + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + const struct v4l2_vp9_segmentation *seg; + bool intra_only, resolution_change; + + /* vp9 stuff */ + dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); + + if (vp9_ctx->last.valid) + last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); + else + last = dst; + + update_dec_buf_info(dst, dec_params); + update_ctx_cur_info(vp9_ctx, dst, dec_params); + seg = &dec_params->seg; + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + vp9_ctx->last.valid) + mv_ref = last; + else + mv_ref = dst; + + resolution_change = dst->vp9.width != last->vp9.width || + dst->vp9.height != last->vp9.height; + + /* configure basic registers */ + hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE); + if (!ctx->dev->variant->legacy_regs) { + hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); + } else { + hantro_reg_write(ctx->dev, &g2_strm_swap_old, 0x1f); + hantro_reg_write(ctx->dev, &g2_pic_swap, 0x10); + hantro_reg_write(ctx->dev, &g2_dirmv_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab0_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab1_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab2_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab3_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_rscan_swap, 0x10); + } + hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128); + hantro_reg_write(ctx->dev, &g2_max_burst, 16); + hantro_reg_write(ctx->dev, &g2_apf_threshold, 8); + hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); + hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); + hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); + if (ctx->dev->variant->double_buffer) + hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1); + + config_output(ctx, dst, dec_params); + + if (!intra_only) + config_ref_registers(ctx, dec_params, dst, mv_ref); + + config_tiles(ctx, dec_params, dst); + config_segment(ctx, dec_params); + config_loop_filter(ctx, dec_params); + config_picture_dimensions(ctx, dst); + config_bit_depth(ctx, dec_params); + config_quant(ctx, dec_params); + config_others(ctx, dec_params, intra_only, resolution_change); + config_compound_reference(ctx, dec_params); + config_probs(ctx, dec_params); + config_counts(ctx); + config_seg_map(ctx, dec_params, intra_only, + seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP); + config_source(ctx, dec_params, vb2_src); +} + +int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx) +{ + const struct v4l2_ctrl_vp9_frame *decode_params; + struct vb2_v4l2_buffer *src; + struct vb2_v4l2_buffer *dst; + int ret; + + hantro_g2_check_idle(ctx->dev); + + ret = start_prepare_run(ctx, &decode_params); + if (ret) { + hantro_end_prepare_run(ctx); + return ret; + } + + src = hantro_get_src_buf(ctx); + dst = hantro_get_dst_buf(ctx); + + config_registers(ctx, decode_params, src, dst); + + hantro_end_prepare_run(ctx); + + vdpu_write(ctx->dev, G2_REG_INTERRUPT_DEC_E, G2_REG_INTERRUPT); + + return 0; +} + +#define copy_tx_and_skip(p1, p2) \ +do { \ + memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ + memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ + memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ + memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ +} while (0) + +void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + unsigned int fctx_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) + goto out_update_last; + + fctx_idx = vp9_ctx->cur.frame_context_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { + /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ + struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + bool frame_is_intra = vp9_ctx->cur.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); + struct tx_and_skip { + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 skip[3]; + } _tx_skip, *tx_skip = &_tx_skip; + struct v4l2_vp9_frame_symbol_counts *counts; + struct symbol_counts *hantro_cnts; + u32 tx16p[2][4]; + int i; + + /* buffer the forward-updated TX and skip probs */ + if (frame_is_intra) + copy_tx_and_skip(tx_skip, probs); + + /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ + *probs = vp9_ctx->frame_context[fctx_idx]; + + /* if FrameIsIntra then undo the effect of load_probs2() */ + if (frame_is_intra) + copy_tx_and_skip(probs, tx_skip); + + counts = &vp9_ctx->cnts; + hantro_cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; + for (i = 0; i < ARRAY_SIZE(tx16p); ++i) { + memcpy(tx16p[i], + hantro_cnts->tx16x16_count[i], + sizeof(hantro_cnts->tx16x16_count[0])); + tx16p[i][3] = 0; + } + counts->tx16p = &tx16p; + + v4l2_vp9_adapt_coef_probs(probs, counts, + !vp9_ctx->last.valid || + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, + frame_is_intra); + + if (!frame_is_intra) { + /* load_probs2() already done */ + u32 mv_mode[7][4]; + + for (i = 0; i < ARRAY_SIZE(mv_mode); ++i) { + mv_mode[i][0] = hantro_cnts->inter_mode_counts[i][1][0]; + mv_mode[i][1] = hantro_cnts->inter_mode_counts[i][2][0]; + mv_mode[i][2] = hantro_cnts->inter_mode_counts[i][0][0]; + mv_mode[i][3] = hantro_cnts->inter_mode_counts[i][2][1]; + } + counts->mv_mode = &mv_mode; + v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, + vp9_ctx->cur.reference_mode, + vp9_ctx->cur.interpolation_filter, + vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); + } + } + + vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; + +out_update_last: + vp9_ctx->last = vp9_ctx->cur; +} diff --git a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c index 56cf261a8e95..1450013d3685 100644 --- a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c +++ b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c @@ -113,9 +113,8 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) hantro_h1_set_src_img_ctrl(vpu, ctx); hantro_h1_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - hantro_h1_jpeg_enc_set_qtable(vpu, - hantro_jpeg_get_qtable(0), - hantro_jpeg_get_qtable(1)); + hantro_h1_jpeg_enc_set_qtable(vpu, jpeg_ctx.hw_luma_qtable, + jpeg_ctx.hw_chroma_qtable); reg = H1_REG_AXI_CTRL_OUTPUT_SWAP16 | H1_REG_AXI_CTRL_INPUT_SWAP16 @@ -140,7 +139,7 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) return 0; } -void hantro_jpeg_enc_done(struct hantro_ctx *ctx) +void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; u32 bytesused = vepu_read(vpu, H1_REG_STR_BUF_LIMIT) / 8; diff --git a/drivers/staging/media/hantro/hantro_hevc.c b/drivers/staging/media/hantro/hantro_hevc.c index ee03123e7704..b49a41d7ae91 100644 --- a/drivers/staging/media/hantro/hantro_hevc.c +++ b/drivers/staging/media/hantro/hantro_hevc.c @@ -44,47 +44,6 @@ size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps) return ALIGN((cr_offset * 3) / 2, G2_ALIGN); } -static size_t hantro_hevc_mv_size(const struct v4l2_ctrl_hevc_sps *sps) -{ - u32 min_cb_log2_size_y = sps->log2_min_luma_coding_block_size_minus3 + 3; - u32 ctb_log2_size_y = min_cb_log2_size_y + sps->log2_diff_max_min_luma_coding_block_size; - u32 pic_width_in_ctbs_y = (sps->pic_width_in_luma_samples + (1 << ctb_log2_size_y) - 1) - >> ctb_log2_size_y; - u32 pic_height_in_ctbs_y = (sps->pic_height_in_luma_samples + (1 << ctb_log2_size_y) - 1) - >> ctb_log2_size_y; - size_t mv_size; - - mv_size = pic_width_in_ctbs_y * pic_height_in_ctbs_y * - (1 << (2 * (ctb_log2_size_y - 4))) * 16; - - vpu_debug(4, "%dx%d (CTBs) %zu MV bytes\n", - pic_width_in_ctbs_y, pic_height_in_ctbs_y, mv_size); - - return mv_size; -} - -static size_t hantro_hevc_ref_size(struct hantro_ctx *ctx) -{ - const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; - const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; - - return hantro_hevc_motion_vectors_offset(sps) + hantro_hevc_mv_size(sps); -} - -static void hantro_hevc_ref_free(struct hantro_ctx *ctx) -{ - struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; - struct hantro_dev *vpu = ctx->dev; - int i; - - for (i = 0; i < NUM_REF_PICTURES; i++) { - if (hevc_dec->ref_bufs[i].cpu) - dma_free_coherent(vpu->dev, hevc_dec->ref_bufs[i].size, - hevc_dec->ref_bufs[i].cpu, - hevc_dec->ref_bufs[i].dma); - } -} - static void hantro_hevc_ref_init(struct hantro_ctx *ctx) { struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; @@ -108,37 +67,25 @@ dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, } } - /* Allocate a new reference buffer */ + return 0; +} + +int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr) +{ + struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; + int i; + + /* Add a new reference buffer */ for (i = 0; i < NUM_REF_PICTURES; i++) { if (hevc_dec->ref_bufs_poc[i] == UNUSED_REF) { - if (!hevc_dec->ref_bufs[i].cpu) { - struct hantro_dev *vpu = ctx->dev; - - /* - * Allocate the space needed for the raw data + - * motion vector data. Optimizations could be to - * allocate raw data in non coherent memory and only - * clear the motion vector data. - */ - hevc_dec->ref_bufs[i].cpu = - dma_alloc_coherent(vpu->dev, - hantro_hevc_ref_size(ctx), - &hevc_dec->ref_bufs[i].dma, - GFP_KERNEL); - if (!hevc_dec->ref_bufs[i].cpu) - return 0; - - hevc_dec->ref_bufs[i].size = hantro_hevc_ref_size(ctx); - } hevc_dec->ref_bufs_used |= 1 << i; - memset(hevc_dec->ref_bufs[i].cpu, 0, hantro_hevc_ref_size(ctx)); hevc_dec->ref_bufs_poc[i] = poc; - - return hevc_dec->ref_bufs[i].dma; + hevc_dec->ref_bufs[i].dma = addr; + return 0; } } - return 0; + return -EINVAL; } void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx) @@ -314,8 +261,6 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx) hevc_dec->tile_bsd.cpu, hevc_dec->tile_bsd.dma); hevc_dec->tile_bsd.cpu = NULL; - - hantro_hevc_ref_free(ctx); } int hantro_hevc_dec_init(struct hantro_ctx *ctx) diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 267a6d33a47b..4a19ae8940b9 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -12,6 +12,7 @@ #include <linux/interrupt.h> #include <linux/v4l2-controls.h> #include <media/v4l2-ctrls.h> +#include <media/v4l2-vp9.h> #include <media/videobuf2-core.h> #define DEC_8190_ALIGN_MASK 0x07U @@ -166,6 +167,82 @@ struct hantro_vp8_dec_hw_ctx { }; /** + * struct hantro_vp9_frame_info + * + * @valid: frame info valid flag + * @frame_context_idx: index of frame context + * @reference_mode: inter prediction type + * @tx_mode: transform mode + * @interpolation_filter: filter selection for inter prediction + * @flags: frame flags + * @timestamp: frame timestamp + */ +struct hantro_vp9_frame_info { + u32 valid : 1; + u32 frame_context_idx : 2; + u32 reference_mode : 2; + u32 tx_mode : 3; + u32 interpolation_filter : 3; + u32 flags; + u64 timestamp; +}; + +#define MAX_SB_COLS 64 +#define MAX_SB_ROWS 34 + +/** + * struct hantro_vp9_dec_hw_ctx + * + * @tile_edge: auxiliary DMA buffer for tile edge processing + * @segment_map: auxiliary DMA buffer for segment map + * @misc: auxiliary DMA buffer for tile info, probabilities and hw counters + * @cnts: vp9 library struct for abstracting hw counters access + * @probability_tables: VP9 probability tables implied by the spec + * @frame_context: VP9 frame contexts + * @cur: current frame information + * @last: last frame information + * @bsd_ctrl_offset: bsd offset into tile_edge + * @segment_map_size: size of segment map + * @ctx_counters_offset: hw counters offset into misc + * @tile_info_offset: tile info offset into misc + * @tile_r_info: per-tile information array + * @tile_c_info: per-tile information array + * @last_tile_r: last number of tile rows + * @last_tile_c: last number of tile cols + * @last_sbs_r: last number of superblock rows + * @last_sbs_c: last number of superblock cols + * @active_segment: number of active segment (alternating between 0 and 1) + * @feature_enabled: segmentation feature enabled flags + * @feature_data: segmentation feature data + */ +struct hantro_vp9_dec_hw_ctx { + struct hantro_aux_buf tile_edge; + struct hantro_aux_buf segment_map; + struct hantro_aux_buf misc; + struct v4l2_vp9_frame_symbol_counts cnts; + struct v4l2_vp9_frame_context probability_tables; + struct v4l2_vp9_frame_context frame_context[4]; + struct hantro_vp9_frame_info cur; + struct hantro_vp9_frame_info last; + + unsigned int bsd_ctrl_offset; + unsigned int segment_map_size; + unsigned int ctx_counters_offset; + unsigned int tile_info_offset; + + unsigned short tile_r_info[MAX_SB_ROWS]; + unsigned short tile_c_info[MAX_SB_COLS]; + unsigned int last_tile_r; + unsigned int last_tile_c; + unsigned int last_sbs_r; + unsigned int last_sbs_c; + + unsigned int active_segment; + u8 feature_enabled[8]; + s16 feature_data[8][4]; +}; + +/** * struct hantro_postproc_ctx * * @dec_q: References buffers, in decoder format. @@ -175,6 +252,17 @@ struct hantro_postproc_ctx { }; /** + * struct hantro_postproc_ops - post-processor operations + * + * @enable: Enable the post-processor block. Optional. + * @disable: Disable the post-processor block. Optional. + */ +struct hantro_postproc_ops { + void (*enable)(struct hantro_ctx *ctx); + void (*disable)(struct hantro_ctx *ctx); +}; + +/** * struct hantro_codec_ops - codec mode specific operations * * @init: If needed, can be used for initialization. @@ -220,8 +308,10 @@ extern const struct hantro_variant rk3288_vpu_variant; extern const struct hantro_variant rk3328_vpu_variant; extern const struct hantro_variant rk3399_vpu_variant; extern const struct hantro_variant sama5d4_vdec_variant; +extern const struct hantro_variant sunxi_vpu_variant; -extern const struct hantro_postproc_regs hantro_g1_postproc_regs; +extern const struct hantro_postproc_ops hantro_g1_postproc_ops; +extern const struct hantro_postproc_ops hantro_g2_postproc_ops; extern const u32 hantro_vp8_dec_mc_filter[8][6]; @@ -239,7 +329,8 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx); int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx); int hantro_jpeg_enc_init(struct hantro_ctx *ctx); void hantro_jpeg_enc_exit(struct hantro_ctx *ctx); -void hantro_jpeg_enc_done(struct hantro_ctx *ctx); +void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx); +void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx); dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx, unsigned int dpb_idx); @@ -256,10 +347,29 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx); int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx); int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx); dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc); +int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr); void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx); size_t hantro_hevc_chroma_offset(const struct v4l2_ctrl_hevc_sps *sps); size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps); +static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) +{ + return (dimension + 63) / 64; +} + +static inline size_t +hantro_vp9_mv_size(unsigned int width, unsigned int height) +{ + int num_ctbs; + + /* + * There can be up to (CTBs x 64) number of blocks, + * and the motion vector for each block needs 16 bytes. + */ + num_ctbs = hantro_vp9_num_sbs(width) * hantro_vp9_num_sbs(height); + return (num_ctbs * 64) * 16; +} + static inline size_t hantro_h264_mv_size(unsigned int width, unsigned int height) { @@ -287,6 +397,16 @@ hantro_h264_mv_size(unsigned int width, unsigned int height) return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32; } +static inline size_t +hantro_hevc_mv_size(unsigned int width, unsigned int height) +{ + /* + * A CTB can be 64x64, 32x32 or 16x16. + * Allocated memory for the "worse" case: 16x16 + */ + return width * height / 16; +} + int hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx); int rockchip_vpu2_mpeg2_dec_run(struct hantro_ctx *ctx); void hantro_mpeg2_dec_copy_qtable(u8 *qtable, @@ -301,4 +421,11 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); void hantro_vp8_prob_update(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp8_frame *hdr); +int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx); +void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); +int hantro_vp9_dec_init(struct hantro_ctx *ctx); +void hantro_vp9_dec_exit(struct hantro_ctx *ctx); +void hantro_g2_check_idle(struct hantro_dev *vpu); +irqreturn_t hantro_g2_irq(int irq, void *dev_id); + #endif /* HANTRO_HW_H_ */ diff --git a/drivers/staging/media/hantro/hantro_jpeg.c b/drivers/staging/media/hantro/hantro_jpeg.c index 36c140fc6a36..df62fbdff7c9 100644 --- a/drivers/staging/media/hantro/hantro_jpeg.c +++ b/drivers/staging/media/hantro/hantro_jpeg.c @@ -36,8 +36,6 @@ static const unsigned char luma_q_table[] = { 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0x63 }; -static unsigned char luma_q_table_reordered[ARRAY_SIZE(luma_q_table)]; - static const unsigned char chroma_q_table[] = { 0x11, 0x12, 0x18, 0x2f, 0x63, 0x63, 0x63, 0x63, 0x12, 0x15, 0x1a, 0x42, 0x63, 0x63, 0x63, 0x63, @@ -49,8 +47,6 @@ static const unsigned char chroma_q_table[] = { 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63 }; -static unsigned char chroma_q_table_reordered[ARRAY_SIZE(chroma_q_table)]; - static const unsigned char zigzag[64] = { 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, @@ -277,7 +273,7 @@ jpeg_scale_quant_table(unsigned char *file_q_tab, } } -static void jpeg_set_quality(unsigned char *buffer, int quality) +static void jpeg_set_quality(struct hantro_jpeg_ctx *ctx) { int scale; @@ -285,24 +281,15 @@ static void jpeg_set_quality(unsigned char *buffer, int quality) * Non-linear scaling factor: * [5,50] -> [1000..100], [51,100] -> [98..0] */ - if (quality < 50) - scale = 5000 / quality; + if (ctx->quality < 50) + scale = 5000 / ctx->quality; else - scale = 200 - 2 * quality; - - jpeg_scale_quant_table(buffer + LUMA_QUANT_OFF, - luma_q_table_reordered, - luma_q_table, scale); - jpeg_scale_quant_table(buffer + CHROMA_QUANT_OFF, - chroma_q_table_reordered, - chroma_q_table, scale); -} + scale = 200 - 2 * ctx->quality; -unsigned char *hantro_jpeg_get_qtable(int index) -{ - if (index == 0) - return luma_q_table_reordered; - return chroma_q_table_reordered; + jpeg_scale_quant_table(ctx->buffer + LUMA_QUANT_OFF, + ctx->hw_luma_qtable, luma_q_table, scale); + jpeg_scale_quant_table(ctx->buffer + CHROMA_QUANT_OFF, + ctx->hw_chroma_qtable, chroma_q_table, scale); } void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx) @@ -324,7 +311,7 @@ void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx) memcpy(buf + HUFF_CHROMA_AC_OFF, chroma_ac_table, sizeof(chroma_ac_table)); - jpeg_set_quality(buf, ctx->quality); + jpeg_set_quality(ctx); } int hantro_jpeg_enc_init(struct hantro_ctx *ctx) diff --git a/drivers/staging/media/hantro/hantro_jpeg.h b/drivers/staging/media/hantro/hantro_jpeg.h index 9474a00277f8..035ab25b803f 100644 --- a/drivers/staging/media/hantro/hantro_jpeg.h +++ b/drivers/staging/media/hantro/hantro_jpeg.h @@ -1,13 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ #define JPEG_HEADER_SIZE 601 +#define JPEG_QUANT_SIZE 64 struct hantro_jpeg_ctx { int width; int height; int quality; unsigned char *buffer; + unsigned char hw_luma_qtable[JPEG_QUANT_SIZE]; + unsigned char hw_chroma_qtable[JPEG_QUANT_SIZE]; }; -unsigned char *hantro_jpeg_get_qtable(int index); void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx); diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index ed8916c950a4..248abe5423f0 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -11,18 +11,19 @@ #include "hantro.h" #include "hantro_hw.h" #include "hantro_g1_regs.h" +#include "hantro_g2_regs.h" #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ { \ hantro_reg_write(vpu, \ - &(vpu)->variant->postproc_regs->reg_name, \ + &hantro_g1_postproc_regs.reg_name, \ val); \ } #define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ { \ hantro_reg_write_s(vpu, \ - &(vpu)->variant->postproc_regs->reg_name, \ + &hantro_g1_postproc_regs.reg_name, \ val); \ } @@ -33,7 +34,7 @@ #define VPU_PP_OUT_RGB 0x0 #define VPU_PP_OUT_YUYV 0x3 -const struct hantro_postproc_regs hantro_g1_postproc_regs = { +static const struct hantro_postproc_regs hantro_g1_postproc_regs = { .pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1}, .max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f}, .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1}, @@ -53,27 +54,18 @@ const struct hantro_postproc_regs hantro_g1_postproc_regs = { bool hantro_needs_postproc(const struct hantro_ctx *ctx, const struct hantro_fmt *fmt) { - struct hantro_dev *vpu = ctx->dev; - if (ctx->is_encoder) return false; - - if (!vpu->variant->postproc_fmts) - return false; - - return fmt->fourcc != V4L2_PIX_FMT_NV12; + return fmt->postprocessed; } -void hantro_postproc_enable(struct hantro_ctx *ctx) +static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; struct vb2_v4l2_buffer *dst_buf; u32 src_pp_fmt, dst_pp_fmt; dma_addr_t dst_dma; - if (!vpu->variant->postproc_regs) - return; - /* Turn on pipeline mode. Must be done first. */ HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1); @@ -108,6 +100,21 @@ void hantro_postproc_enable(struct hantro_ctx *ctx) HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); } +static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *dst_buf; + size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; + dma_addr_t dst_dma; + + dst_buf = hantro_get_dst_buf(ctx); + dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + + hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); + hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); + hantro_reg_write(vpu, &g2_out_rs_e, 1); +} + void hantro_postproc_free(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; @@ -132,9 +139,16 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) unsigned int num_buffers = cap_queue->num_buffers; unsigned int i, buf_size; - buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + - hantro_h264_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; + if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) + buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) + buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) + buf_size += hantro_hevc_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); for (i = 0; i < num_buffers; ++i) { struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; @@ -153,12 +167,42 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) return 0; } +static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); +} + +static void hantro_postproc_g2_disable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + hantro_reg_write(vpu, &g2_out_rs_e, 0); +} + void hantro_postproc_disable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; - if (!vpu->variant->postproc_regs) - return; + if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->disable) + vpu->variant->postproc_ops->disable(ctx); +} + +void hantro_postproc_enable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; - HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); + if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->enable) + vpu->variant->postproc_ops->enable(ctx); } + +const struct hantro_postproc_ops hantro_g1_postproc_ops = { + .enable = hantro_postproc_g1_enable, + .disable = hantro_postproc_g1_disable, +}; + +const struct hantro_postproc_ops hantro_g2_postproc_ops = { + .enable = hantro_postproc_g2_enable, + .disable = hantro_postproc_g2_disable, +}; diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index bcb0bdff4a9a..e595905b3bd7 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -23,8 +23,6 @@ #include <media/v4l2-ctrls.h> #include <media/v4l2-event.h> #include <media/v4l2-mem2mem.h> -#include <media/videobuf2-core.h> -#include <media/videobuf2-dma-sg.h> #include "hantro.h" #include "hantro_hw.h" @@ -285,6 +283,16 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, pix_mp->plane_fmt[0].sizeimage += hantro_h264_mv_size(pix_mp->width, pix_mp->height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME && + !hantro_needs_postproc(ctx, fmt)) + pix_mp->plane_fmt[0].sizeimage += + hantro_vp9_mv_size(pix_mp->width, + pix_mp->height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE && + !hantro_needs_postproc(ctx, fmt)) + pix_mp->plane_fmt[0].sizeimage += + hantro_hevc_mv_size(pix_mp->width, + pix_mp->height); } else if (!pix_mp->plane_fmt[0].sizeimage) { /* * For coded formats the application can specify @@ -393,6 +401,7 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) case V4L2_PIX_FMT_VP8_FRAME: case V4L2_PIX_FMT_H264_SLICE: case V4L2_PIX_FMT_HEVC_SLICE: + case V4L2_PIX_FMT_VP9_FRAME: ctx->fh.m2m_ctx->out_q_ctx.q.requires_requests = true; break; default: diff --git a/drivers/staging/media/hantro/hantro_vp9.c b/drivers/staging/media/hantro/hantro_vp9.c new file mode 100644 index 000000000000..566cd376c097 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_vp9.c @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ + +#include <linux/types.h> +#include <media/v4l2-mem2mem.h> + +#include "hantro.h" +#include "hantro_hw.h" +#include "hantro_vp9.h" + +#define POW2(x) (1 << (x)) + +#define MAX_LOG2_TILE_COLUMNS 6 +#define MAX_NUM_TILE_COLS POW2(MAX_LOG2_TILE_COLUMNS) +#define MAX_TILE_COLS 20 +#define MAX_TILE_ROWS 22 + +static size_t hantro_vp9_tile_filter_size(unsigned int height) +{ + u32 h, height32, size; + + h = roundup(height, 8); + + height32 = roundup(h, 64); + size = 24 * height32 * (MAX_NUM_TILE_COLS - 1); /* luma: 8, chroma: 8 + 8 */ + + return size; +} + +static size_t hantro_vp9_bsd_control_size(unsigned int height) +{ + u32 h, height32; + + h = roundup(height, 8); + height32 = roundup(h, 64); + + return 16 * (height32 / 4) * (MAX_NUM_TILE_COLS - 1); +} + +static size_t hantro_vp9_segment_map_size(unsigned int width, unsigned int height) +{ + u32 w, h; + int num_ctbs; + + w = roundup(width, 8); + h = roundup(height, 8); + num_ctbs = ((w + 63) / 64) * ((h + 63) / 64); + + return num_ctbs * 32; +} + +static inline size_t hantro_vp9_prob_tab_size(void) +{ + return roundup(sizeof(struct hantro_g2_all_probs), 16); +} + +static inline size_t hantro_vp9_count_tab_size(void) +{ + return roundup(sizeof(struct symbol_counts), 16); +} + +static inline size_t hantro_vp9_tile_info_size(void) +{ + return roundup((MAX_TILE_COLS * MAX_TILE_ROWS * 4 * sizeof(u16) + 15 + 16) & ~0xf, 16); +} + +static void *get_coeffs_arr(struct symbol_counts *cnts, int i, int j, int k, int l, int m) +{ + if (i == 0) + return &cnts->count_coeffs[j][k][l][m]; + + if (i == 1) + return &cnts->count_coeffs8x8[j][k][l][m]; + + if (i == 2) + return &cnts->count_coeffs16x16[j][k][l][m]; + + if (i == 3) + return &cnts->count_coeffs32x32[j][k][l][m]; + + return NULL; +} + +static void *get_eobs1(struct symbol_counts *cnts, int i, int j, int k, int l, int m) +{ + if (i == 0) + return &cnts->count_coeffs[j][k][l][m][3]; + + if (i == 1) + return &cnts->count_coeffs8x8[j][k][l][m][3]; + + if (i == 2) + return &cnts->count_coeffs16x16[j][k][l][m][3]; + + if (i == 3) + return &cnts->count_coeffs32x32[j][k][l][m][3]; + + return NULL; +} + +#define INNER_LOOP \ + do { \ + for (m = 0; m < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0][0]); ++m) { \ + vp9_ctx->cnts.coeff[i][j][k][l][m] = \ + get_coeffs_arr(cnts, i, j, k, l, m); \ + vp9_ctx->cnts.eob[i][j][k][l][m][0] = \ + &cnts->count_eobs[i][j][k][l][m]; \ + vp9_ctx->cnts.eob[i][j][k][l][m][1] = \ + get_eobs1(cnts, i, j, k, l, m); \ + } \ + } while (0) + +static void init_v4l2_vp9_count_tbl(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct symbol_counts *cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; + int i, j, k, l, m; + + vp9_ctx->cnts.partition = &cnts->partition_counts; + vp9_ctx->cnts.skip = &cnts->mbskip_count; + vp9_ctx->cnts.intra_inter = &cnts->intra_inter_count; + vp9_ctx->cnts.tx32p = &cnts->tx32x32_count; + /* + * g2 hardware uses tx16x16_count[2][3], while the api + * expects tx16p[2][4], so this must be explicitly copied + * into vp9_ctx->cnts.tx16p when passing the data to the + * vp9 library function + */ + vp9_ctx->cnts.tx8p = &cnts->tx8x8_count; + + vp9_ctx->cnts.y_mode = &cnts->sb_ymode_counts; + vp9_ctx->cnts.uv_mode = &cnts->uv_mode_counts; + vp9_ctx->cnts.comp = &cnts->comp_inter_count; + vp9_ctx->cnts.comp_ref = &cnts->comp_ref_count; + vp9_ctx->cnts.single_ref = &cnts->single_ref_count; + vp9_ctx->cnts.filter = &cnts->switchable_interp_counts; + vp9_ctx->cnts.mv_joint = &cnts->mv_counts.joints; + vp9_ctx->cnts.sign = &cnts->mv_counts.sign; + vp9_ctx->cnts.classes = &cnts->mv_counts.classes; + vp9_ctx->cnts.class0 = &cnts->mv_counts.class0; + vp9_ctx->cnts.bits = &cnts->mv_counts.bits; + vp9_ctx->cnts.class0_fp = &cnts->mv_counts.class0_fp; + vp9_ctx->cnts.fp = &cnts->mv_counts.fp; + vp9_ctx->cnts.class0_hp = &cnts->mv_counts.class0_hp; + vp9_ctx->cnts.hp = &cnts->mv_counts.hp; + + for (i = 0; i < ARRAY_SIZE(vp9_ctx->cnts.coeff); ++i) + for (j = 0; j < ARRAY_SIZE(vp9_ctx->cnts.coeff[i]); ++j) + for (k = 0; k < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0]); ++k) + for (l = 0; l < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0]); ++l) + INNER_LOOP; +} + +int hantro_vp9_dec_init(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + const struct hantro_variant *variant = vpu->variant; + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; + struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; + struct hantro_aux_buf *misc = &vp9_dec->misc; + u32 i, max_width, max_height, size; + + if (variant->num_dec_fmts < 1) + return -EINVAL; + + for (i = 0; i < variant->num_dec_fmts; ++i) + if (variant->dec_fmts[i].fourcc == V4L2_PIX_FMT_VP9_FRAME) + break; + + if (i == variant->num_dec_fmts) + return -EINVAL; + + max_width = vpu->variant->dec_fmts[i].frmsize.max_width; + max_height = vpu->variant->dec_fmts[i].frmsize.max_height; + + size = hantro_vp9_tile_filter_size(max_height); + vp9_dec->bsd_ctrl_offset = size; + size += hantro_vp9_bsd_control_size(max_height); + + tile_edge->cpu = dma_alloc_coherent(vpu->dev, size, &tile_edge->dma, GFP_KERNEL); + if (!tile_edge->cpu) + return -ENOMEM; + + tile_edge->size = size; + memset(tile_edge->cpu, 0, size); + + size = hantro_vp9_segment_map_size(max_width, max_height); + vp9_dec->segment_map_size = size; + size *= 2; /* we need two areas of this size, used alternately */ + + segment_map->cpu = dma_alloc_coherent(vpu->dev, size, &segment_map->dma, GFP_KERNEL); + if (!segment_map->cpu) + goto err_segment_map; + + segment_map->size = size; + memset(segment_map->cpu, 0, size); + + size = hantro_vp9_prob_tab_size(); + vp9_dec->ctx_counters_offset = size; + size += hantro_vp9_count_tab_size(); + vp9_dec->tile_info_offset = size; + size += hantro_vp9_tile_info_size(); + + misc->cpu = dma_alloc_coherent(vpu->dev, size, &misc->dma, GFP_KERNEL); + if (!misc->cpu) + goto err_misc; + + misc->size = size; + memset(misc->cpu, 0, size); + + init_v4l2_vp9_count_tbl(ctx); + + return 0; + +err_misc: + dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); + +err_segment_map: + dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); + + return -ENOMEM; +} + +void hantro_vp9_dec_exit(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; + struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; + struct hantro_aux_buf *misc = &vp9_dec->misc; + + dma_free_coherent(vpu->dev, misc->size, misc->cpu, misc->dma); + dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); + dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); +} diff --git a/drivers/staging/media/hantro/hantro_vp9.h b/drivers/staging/media/hantro/hantro_vp9.h new file mode 100644 index 000000000000..26b69275f098 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_vp9.h @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ + +struct hantro_g2_mv_probs { + u8 joint[3]; + u8 sign[2]; + u8 class0_bit[2][1]; + u8 fr[2][3]; + u8 class0_hp[2]; + u8 hp[2]; + u8 classes[2][10]; + u8 class0_fr[2][2][3]; + u8 bits[2][10]; +}; + +struct hantro_g2_probs { + u8 inter_mode[7][4]; + u8 is_inter[4]; + u8 uv_mode[10][8]; + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 y_mode_tail[4][1]; + u8 y_mode[4][8]; + u8 partition[2][16][4]; /* [keyframe][][], [inter][][] */ + u8 uv_mode_tail[10][1]; + u8 interp_filter[4][2]; + u8 comp_mode[5]; + u8 skip[3]; + + u8 pad1[1]; + + struct hantro_g2_mv_probs mv; + + u8 single_ref[5][2]; + u8 comp_ref[5]; + + u8 pad2[17]; + + u8 coef[4][2][2][6][6][4]; +}; + +struct hantro_g2_all_probs { + u8 kf_y_mode_prob[10][10][8]; + + u8 kf_y_mode_prob_tail[10][10][1]; + u8 ref_pred_probs[3]; + u8 mb_segment_tree_probs[7]; + u8 segment_pred_probs[3]; + u8 ref_scores[4]; + u8 prob_comppred[2]; + + u8 pad1[9]; + + u8 kf_uv_mode_prob[10][8]; + u8 kf_uv_mode_prob_tail[10][1]; + + u8 pad2[6]; + + struct hantro_g2_probs probs; +}; + +struct mv_counts { + u32 joints[4]; + u32 sign[2][2]; + u32 classes[2][11]; + u32 class0[2][2]; + u32 bits[2][10][2]; + u32 class0_fp[2][2][4]; + u32 fp[2][4]; + u32 class0_hp[2][2]; + u32 hp[2][2]; +}; + +struct symbol_counts { + u32 inter_mode_counts[7][3][2]; + u32 sb_ymode_counts[4][10]; + u32 uv_mode_counts[10][10]; + u32 partition_counts[16][4]; + u32 switchable_interp_counts[4][3]; + u32 intra_inter_count[4][2]; + u32 comp_inter_count[5][2]; + u32 single_ref_count[5][2][2]; + u32 comp_ref_count[5][2]; + u32 tx32x32_count[2][4]; + u32 tx16x16_count[2][3]; + u32 tx8x8_count[2][2]; + u32 mbskip_count[3][2]; + + struct mv_counts mv_counts; + + u32 count_coeffs[2][2][6][6][4]; + u32 count_coeffs8x8[2][2][6][6][4]; + u32 count_coeffs16x16[2][2][6][6][4]; + u32 count_coeffs32x32[2][2][6][6][4]; + + u32 count_eobs[4][2][2][6][6]; +}; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index ea919bfb9891..f5991b8e553a 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -82,6 +82,7 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -131,10 +132,18 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { }, }; -static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { +static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + }, +}; + +static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, }, { .fourcc = V4L2_PIX_FMT_HEVC_SLICE, @@ -149,6 +158,19 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { .step_height = MB_DIM, }, }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .codec_mode = HANTRO_MODE_VP9_DEC, + .max_depth = 2, + .frmsize = { + .min_width = 48, + .max_width = 3840, + .step_width = MB_DIM, + .min_height = 48, + .max_height = 2160, + .step_height = MB_DIM, + }, + }, }; static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) @@ -169,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) return IRQ_HANDLED; } -static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id) -{ - struct hantro_dev *vpu = dev_id; - enum vb2_buffer_state state; - u32 status; - - status = vdpu_read(vpu, G2_REG_INTERRUPT); - state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? - VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; - - vdpu_write(vpu, 0, G2_REG_INTERRUPT); - vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); - - hantro_irq_done(vpu, state); - - return IRQ_HANDLED; -} - static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) { vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; @@ -240,6 +244,13 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { .init = hantro_hevc_dec_init, .exit = hantro_hevc_dec_exit, }, + [HANTRO_MODE_VP9_DEC] = { + .run = hantro_g2_vp9_dec_run, + .done = hantro_g2_vp9_dec_done, + .reset = imx8m_vpu_g2_reset, + .init = hantro_vp9_dec_init, + .exit = hantro_vp9_dec_exit, + }, }; /* @@ -251,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = { }; static const struct hantro_irq imx8mq_g2_irqs[] = { - { "g2", imx8m_vpu_g2_irq }, + { "g2", hantro_g2_irq }, }; static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; @@ -262,7 +273,7 @@ const struct hantro_variant imx8mq_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), .postproc_fmts = imx8m_vpu_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = imx8mq_vpu_codec_ops, @@ -280,7 +291,10 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { .dec_offset = 0x0, .dec_fmts = imx8m_vpu_g2_dec_fmts, .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), - .codec = HANTRO_HEVC_DECODER, + .postproc_fmts = imx8m_vpu_g2_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_g2_postproc_fmts), + .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, .codec_ops = imx8mq_vpu_g2_codec_ops, .init = imx8mq_vpu_hw_init, .runtime_resume = imx8mq_runtime_resume, diff --git a/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c b/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c index 991213ce1610..4df16f59fb97 100644 --- a/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c +++ b/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c @@ -143,9 +143,8 @@ int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx) rockchip_vpu2_set_src_img_ctrl(vpu, ctx); rockchip_vpu2_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - rockchip_vpu2_jpeg_enc_set_qtable(vpu, - hantro_jpeg_get_qtable(0), - hantro_jpeg_get_qtable(1)); + rockchip_vpu2_jpeg_enc_set_qtable(vpu, jpeg_ctx.hw_luma_qtable, + jpeg_ctx.hw_chroma_qtable); reg = VEPU_REG_OUTPUT_SWAP32 | VEPU_REG_OUTPUT_SWAP16 @@ -171,3 +170,20 @@ int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx) return 0; } + +void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + u32 bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; + struct vb2_v4l2_buffer *dst_buf = hantro_get_dst_buf(ctx); + + /* + * TODO: Rework the JPEG encoder to eliminate the need + * for a bounce buffer. + */ + memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0) + + ctx->vpu_dst_fmt->header_size, + ctx->jpeg_enc.bounce_buffer.cpu, bytesused); + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, + ctx->vpu_dst_fmt->header_size + bytesused); +} diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c index d4f52957cc53..c203b606e6e7 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -62,6 +62,7 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -343,7 +344,7 @@ static const struct hantro_codec_ops rk3066_vpu_codec_ops[] = { .run = hantro_h1_jpeg_enc_run, .reset = rockchip_vpu1_enc_reset, .init = hantro_jpeg_enc_init, - .done = hantro_jpeg_enc_done, + .done = hantro_h1_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -371,7 +372,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = { .run = hantro_h1_jpeg_enc_run, .reset = rockchip_vpu1_enc_reset, .init = hantro_jpeg_enc_init, - .done = hantro_jpeg_enc_done, + .done = hantro_h1_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -399,6 +400,7 @@ static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = { .run = rockchip_vpu2_jpeg_enc_run, .reset = rockchip_vpu2_enc_reset, .init = hantro_jpeg_enc_init, + .done = rockchip_vpu2_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -460,7 +462,7 @@ const struct hantro_variant rk3036_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3036_vpu_codec_ops, @@ -485,7 +487,7 @@ const struct hantro_variant rk3066_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3066_vpu_codec_ops, @@ -505,7 +507,7 @@ const struct hantro_variant rk3288_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3288_vpu_codec_ops, diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c index 9c3b8cd0b239..b2fc1c5613e1 100644 --- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c @@ -15,6 +15,7 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -100,7 +101,7 @@ const struct hantro_variant sama5d4_vdec_variant = { .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts), .postproc_fmts = sama5d4_vdec_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = sama5d4_vdec_codec_ops, diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c new file mode 100644 index 000000000000..90633406c4eb --- /dev/null +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Allwinner Hantro G2 VPU codec driver + * + * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com> + */ + +#include <linux/clk.h> + +#include "hantro.h" + +static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12, + .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + }, +}; + +static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, + }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .codec_mode = HANTRO_MODE_VP9_DEC, + .max_depth = 2, + .frmsize = { + .min_width = 48, + .max_width = 3840, + .step_width = MB_DIM, + .min_height = 48, + .max_height = 2160, + .step_height = MB_DIM, + }, + }, +}; + +static int sunxi_vpu_hw_init(struct hantro_dev *vpu) +{ + clk_set_rate(vpu->clocks[0].clk, 300000000); + + return 0; +} + +static void sunxi_vpu_reset(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + reset_control_reset(vpu->resets); +} + +static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = { + [HANTRO_MODE_VP9_DEC] = { + .run = hantro_g2_vp9_dec_run, + .done = hantro_g2_vp9_dec_done, + .reset = sunxi_vpu_reset, + .init = hantro_vp9_dec_init, + .exit = hantro_vp9_dec_exit, + }, +}; + +static const struct hantro_irq sunxi_irqs[] = { + { NULL, hantro_g2_irq }, +}; + +static const char * const sunxi_clk_names[] = { "mod", "bus" }; + +const struct hantro_variant sunxi_vpu_variant = { + .dec_fmts = sunxi_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts), + .postproc_fmts = sunxi_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts), + .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_VP9_DECODER, + .codec_ops = sunxi_vpu_codec_ops, + .init = sunxi_vpu_hw_init, + .irqs = sunxi_irqs, + .num_irqs = ARRAY_SIZE(sunxi_irqs), + .clk_names = sunxi_clk_names, + .num_clocks = ARRAY_SIZE(sunxi_clk_names), + .double_buffer = 1, + .legacy_regs = 1, + .late_postproc = 1, +}; diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index eb6da9b9d8ba..1fd39a2fca98 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -820,7 +820,7 @@ static const struct v4l2_file_operations ipu_csc_scaler_fops = { .mmap = v4l2_m2m_fop_mmap, }; -static struct v4l2_m2m_ops m2m_ops = { +static const struct v4l2_m2m_ops m2m_ops = { .device_run = device_run, .job_abort = job_abort, }; diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 1caa100be33d..bd7f156f2d52 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -150,7 +150,7 @@ static inline bool requires_passthrough(struct v4l2_fwnode_endpoint *ep, const struct imx_media_pixfmt *incc) { if (ep->bus_type == V4L2_MBUS_BT656) // including BT.1120 - return 0; + return false; return incc->bayer || is_parallel_16bit_bus(ep) || (is_parallel_bus(ep) && diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 6f90acf9c725..94bc866ca28c 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -569,48 +569,6 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, } EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_pix_fmt); -int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - const struct v4l2_mbus_framefmt *mbus) -{ - int ret; - - memset(image, 0, sizeof(*image)); - - ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, mbus, NULL); - if (ret) - return ret; - - image->rect.width = mbus->width; - image->rect.height = mbus->height; - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); - -int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - const struct ipu_image *image) -{ - const struct imx_media_pixfmt *fmt; - - fmt = imx_media_find_pixel_format(image->pix.pixelformat, - PIXFMT_SEL_ANY); - if (!fmt || !fmt->codes || !fmt->codes[0]) - return -EINVAL; - - memset(mbus, 0, sizeof(*mbus)); - mbus->width = image->pix.width; - mbus->height = image->pix.height; - mbus->code = fmt->codes[0]; - mbus->field = image->pix.field; - mbus->colorspace = image->pix.colorspace; - mbus->xfer_func = image->pix.xfer_func; - mbus->ycbcr_enc = image->pix.ycbcr_enc; - mbus->quantization = image->pix.quantization; - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_ipu_image_to_mbus_fmt); - void imx_media_free_dma_buf(struct device *dev, struct imx_media_dma_buf *buf) { diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 6740e7917458..f263fc3adbb9 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -199,10 +199,6 @@ void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc); -int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - const struct v4l2_mbus_framefmt *mbus); -int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - const struct ipu_image *image); void imx_media_grp_id_to_sd_name(char *sd_name, int sz, u32 grp_id, int ipu_id); struct v4l2_subdev * diff --git a/drivers/staging/media/imx/imx6-mipi-csi2.c b/drivers/staging/media/imx/imx6-mipi-csi2.c index a0941fc2907b..558b256ac935 100644 --- a/drivers/staging/media/imx/imx6-mipi-csi2.c +++ b/drivers/staging/media/imx/imx6-mipi-csi2.c @@ -382,13 +382,17 @@ static int csi2_start(struct csi2_dev *csi2) csi2_enable(csi2, true); /* Step 5 */ + ret = v4l2_subdev_call(csi2->src_sd, video, pre_streamon, + V4L2_SUBDEV_PRE_STREAMON_FL_MANUAL_LP); + if (ret && ret != -ENOIOCTLCMD) + goto err_assert_reset; csi2_dphy_wait_stopstate(csi2, lanes); /* Step 6 */ ret = v4l2_subdev_call(csi2->src_sd, video, s_stream, 1); ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; if (ret) - goto err_assert_reset; + goto err_stop_lp11; /* Step 7 */ ret = csi2_dphy_wait_clock_lane(csi2); @@ -399,6 +403,8 @@ static int csi2_start(struct csi2_dev *csi2) err_stop_upstream: v4l2_subdev_call(csi2->src_sd, video, s_stream, 0); +err_stop_lp11: + v4l2_subdev_call(csi2->src_sd, video, post_streamoff); err_assert_reset: csi2_enable(csi2, false); err_disable_clk: @@ -410,6 +416,7 @@ static void csi2_stop(struct csi2_dev *csi2) { /* stop upstream */ v4l2_subdev_call(csi2->src_sd, video, s_stream, 0); + v4l2_subdev_call(csi2->src_sd, video, post_streamoff); csi2_enable(csi2, false); clk_disable_unprepare(csi2->pix_clk); diff --git a/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h b/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h index 585f55981c86..dbdd015ce220 100644 --- a/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h @@ -34,11 +34,17 @@ * struct ipu3_uapi_grid_config - Grid plane config * * @width: Grid horizontal dimensions, in number of grid blocks(cells). + * For AWB, the range is (16, 80). + * For AF/AE, the range is (16, 32). * @height: Grid vertical dimensions, in number of grid cells. + * For AWB, the range is (16, 60). + * For AF/AE, the range is (16, 24). * @block_width_log2: Log2 of the width of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @block_height_log2: Log2 of the height of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @height_per_slice: The number of blocks in vertical axis per slice. * Default 2. * @x_start: X value of top left corner of Region of Interest(ROI). @@ -61,17 +67,39 @@ struct ipu3_uapi_grid_config { __u16 y_end; } __packed; +/** + * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB + * + * @Gr_avg: Green average for red lines in the cell. + * @R_avg: Red average in the cell. + * @B_avg: Blue average in the cell. + * @Gb_avg: Green average for blue lines in the cell. + * @sat_ratio: Percentage of pixels over the thresholds specified in + * ipu3_uapi_awb_config_s, coded from 0 to 255. + * @padding0: Unused byte for padding. + * @padding1: Unused byte for padding. + * @padding2: Unused byte for padding. + */ +struct ipu3_uapi_awb_set_item { + __u8 Gr_avg; + __u8 R_avg; + __u8 B_avg; + __u8 Gb_avg; + __u8 sat_ratio; + __u8 padding0; + __u8 padding1; + __u8 padding2; +} __attribute__((packed)); + /* * The grid based data is divided into "slices" called set, each slice of setX * refers to ipu3_uapi_grid_config width * height_per_slice. */ #define IPU3_UAPI_AWB_MAX_SETS 60 /* Based on grid size 80 * 60 and cell size 16 x 16 */ -#define IPU3_UAPI_AWB_SET_SIZE 1280 -#define IPU3_UAPI_AWB_MD_ITEM_SIZE 8 +#define IPU3_UAPI_AWB_SET_SIZE 160 #define IPU3_UAPI_AWB_SPARE_FOR_BUBBLES \ - (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES * \ - IPU3_UAPI_AWB_MD_ITEM_SIZE) + (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES) #define IPU3_UAPI_AWB_MAX_BUFFER_SIZE \ (IPU3_UAPI_AWB_MAX_SETS * \ (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) @@ -83,7 +111,7 @@ struct ipu3_uapi_grid_config { * the average values for each color channel. */ struct ipu3_uapi_awb_raw_buffer { - __u8 meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] + struct ipu3_uapi_awb_set_item meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] __attribute__((aligned(32))); } __packed; diff --git a/drivers/staging/media/ipu3/ipu3-css-params.c b/drivers/staging/media/ipu3/ipu3-css-params.c index e9d6bd9e9332..d9e3c3785075 100644 --- a/drivers/staging/media/ipu3/ipu3-css-params.c +++ b/drivers/staging/media/ipu3/ipu3-css-params.c @@ -771,7 +771,6 @@ static int imgu_css_osys_calc_frame_and_stripe_params( */ { unsigned int i; - int pin_scale = 0; /*Input resolution */ stripe_params[s].input_width = stripe_input_width_y; @@ -791,8 +790,6 @@ static int imgu_css_osys_calc_frame_and_stripe_params( reso.pin_height[i]; stripe_params[s].output_offset[i] = stripe_offset_out_y; - - pin_scale += frame_params[i].scaled; } else { /* Unscaled pin */ stripe_params[s].output_width[i] = diff --git a/drivers/staging/media/max96712/Kconfig b/drivers/staging/media/max96712/Kconfig new file mode 100644 index 000000000000..acde14fd5c4d --- /dev/null +++ b/drivers/staging/media/max96712/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0 +config VIDEO_MAX96712 + tristate "Maxim MAX96712 Quad GMSL2 Deserializer support" + depends on I2C + depends on OF_GPIO + depends on VIDEO_V4L2 + select V4L2_FWNODE + select VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER + help + This driver supports the Maxim MAX96712 Quad GMSL2 Deserializer. + + To compile this driver as a module, choose M here: the + module will be called max96712. diff --git a/drivers/staging/media/max96712/Makefile b/drivers/staging/media/max96712/Makefile new file mode 100644 index 000000000000..70c1974ce3f0 --- /dev/null +++ b/drivers/staging/media/max96712/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_MAX96712) += max96712.o diff --git a/drivers/staging/media/max96712/max96712.c b/drivers/staging/media/max96712/max96712.c new file mode 100644 index 000000000000..9bc72d9a858b --- /dev/null +++ b/drivers/staging/media/max96712/max96712.c @@ -0,0 +1,440 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Maxim MAX9286 Quad GMSL2 Deserializer Driver + * + * Copyright (C) 2021 Renesas Electronics Corporation + * Copyright (C) 2021 Niklas Söderlund + */ + +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of_graph.h> +#include <linux/regmap.h> + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-fwnode.h> +#include <media/v4l2-subdev.h> + +#define MAX96712_ID 0x20 + +#define MAX96712_DPLL_FREQ 1000 + +enum max96712_pattern { + MAX96712_PATTERN_CHECKERBOARD = 0, + MAX96712_PATTERN_GRADIENT, +}; + +struct max96712_priv { + struct i2c_client *client; + struct regmap *regmap; + struct gpio_desc *gpiod_pwdn; + + struct v4l2_fwnode_bus_mipi_csi2 mipi; + + struct v4l2_subdev sd; + struct v4l2_ctrl_handler ctrl_handler; + struct media_pad pads[1]; + + enum max96712_pattern pattern; +}; + +static int max96712_read(struct max96712_priv *priv, int reg) +{ + int ret, val; + + ret = regmap_read(priv->regmap, reg, &val); + if (ret) { + dev_err(&priv->client->dev, "read 0x%04x failed\n", reg); + return ret; + } + + return val; +} + +static int max96712_write(struct max96712_priv *priv, unsigned int reg, u8 val) +{ + int ret; + + ret = regmap_write(priv->regmap, reg, val); + if (ret) + dev_err(&priv->client->dev, "write 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_update_bits(struct max96712_priv *priv, unsigned int reg, + u8 mask, u8 val) +{ + int ret; + + ret = regmap_update_bits(priv->regmap, reg, mask, val); + if (ret) + dev_err(&priv->client->dev, "update 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_write_bulk(struct max96712_priv *priv, unsigned int reg, + const void *val, size_t val_count) +{ + int ret; + + ret = regmap_bulk_write(priv->regmap, reg, val, val_count); + if (ret) + dev_err(&priv->client->dev, "bulk write 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_write_bulk_value(struct max96712_priv *priv, + unsigned int reg, unsigned int val, + size_t val_count) +{ + unsigned int i; + u8 values[4]; + + for (i = 1; i <= val_count; i++) + values[i - 1] = (val >> ((val_count - i) * 8)) & 0xff; + + return max96712_write_bulk(priv, reg, &values, val_count); +} + +static void max96712_reset(struct max96712_priv *priv) +{ + max96712_update_bits(priv, 0x13, 0x40, 0x40); + msleep(20); +} + +static void max96712_mipi_enable(struct max96712_priv *priv, bool enable) +{ + if (enable) { + max96712_update_bits(priv, 0x40b, 0x02, 0x02); + max96712_update_bits(priv, 0x8a0, 0x80, 0x80); + } else { + max96712_update_bits(priv, 0x8a0, 0x80, 0x00); + max96712_update_bits(priv, 0x40b, 0x02, 0x00); + } +} + +static void max96712_mipi_configure(struct max96712_priv *priv) +{ + unsigned int i; + u8 phy5 = 0; + + max96712_mipi_enable(priv, false); + + /* Select 2x4 mode. */ + max96712_write(priv, 0x8a0, 0x04); + + /* Configure a 4-lane DPHY using PHY0 and PHY1. */ + /* TODO: Add support for 2-lane and 1-lane configurations. */ + /* TODO: Add support CPHY mode. */ + max96712_write(priv, 0x94a, 0xc0); + + /* Configure lane mapping for PHY0 and PHY1. */ + /* TODO: Add support for lane swapping. */ + max96712_write(priv, 0x8a3, 0xe4); + + /* Configure lane polarity for PHY0 and PHY1. */ + for (i = 0; i < priv->mipi.num_data_lanes + 1; i++) + if (priv->mipi.lane_polarities[i]) + phy5 |= BIT(i == 0 ? 5 : i < 3 ? i - 1 : i); + max96712_write(priv, 0x8a5, phy5); + + /* Set link frequency for PHY0 and PHY1. */ + max96712_update_bits(priv, 0x415, 0x3f, + ((MAX96712_DPLL_FREQ / 100) & 0x1f) | BIT(5)); + max96712_update_bits(priv, 0x418, 0x3f, + ((MAX96712_DPLL_FREQ / 100) & 0x1f) | BIT(5)); + + /* Enable PHY0 and PHY1 */ + max96712_update_bits(priv, 0x8a2, 0xf0, 0x30); +} + +static void max96712_pattern_enable(struct max96712_priv *priv, bool enable) +{ + const u32 h_active = 1920; + const u32 h_fp = 88; + const u32 h_sw = 44; + const u32 h_bp = 148; + const u32 h_tot = h_active + h_fp + h_sw + h_bp; + + const u32 v_active = 1080; + const u32 v_fp = 4; + const u32 v_sw = 5; + const u32 v_bp = 36; + const u32 v_tot = v_active + v_fp + v_sw + v_bp; + + if (!enable) { + max96712_write(priv, 0x1051, 0x00); + return; + } + + /* PCLK 75MHz. */ + max96712_write(priv, 0x0009, 0x01); + + /* Configure Video Timing Generator for 1920x1080 @ 30 fps. */ + max96712_write_bulk_value(priv, 0x1052, 0, 3); + max96712_write_bulk_value(priv, 0x1055, v_sw * h_tot, 3); + max96712_write_bulk_value(priv, 0x1058, + (v_active + v_fp + + v_bp) * h_tot, 3); + max96712_write_bulk_value(priv, 0x105b, 0, 3); + max96712_write_bulk_value(priv, 0x105e, h_sw, 2); + max96712_write_bulk_value(priv, 0x1060, h_active + h_fp + h_bp, 2); + max96712_write_bulk_value(priv, 0x1062, v_tot, 2); + max96712_write_bulk_value(priv, 0x1064, + h_tot * (v_sw + v_bp) + (h_sw + h_bp), 3); + max96712_write_bulk_value(priv, 0x1067, h_active, 2); + max96712_write_bulk_value(priv, 0x1069, h_fp + h_sw + h_bp, 2); + max96712_write_bulk_value(priv, 0x106b, v_active, 2); + + /* Generate VS, HS and DE in free-running mode. */ + max96712_write(priv, 0x1050, 0xfb); + + /* Configure Video Pattern Generator. */ + if (priv->pattern == MAX96712_PATTERN_CHECKERBOARD) { + /* Set checkerboard pattern size. */ + max96712_write(priv, 0x1074, 0x3c); + max96712_write(priv, 0x1075, 0x3c); + max96712_write(priv, 0x1076, 0x3c); + + /* Set checkerboard pattern colors. */ + max96712_write_bulk_value(priv, 0x106e, 0xfecc00, 3); + max96712_write_bulk_value(priv, 0x1071, 0x006aa7, 3); + + /* Generate checkerboard pattern. */ + max96712_write(priv, 0x1051, 0x10); + } else { + /* Set gradient increment. */ + max96712_write(priv, 0x106d, 0x10); + + /* Generate gradient pattern. */ + max96712_write(priv, 0x1051, 0x20); + } +} + +static int max96712_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct max96712_priv *priv = v4l2_get_subdevdata(sd); + + if (enable) { + max96712_pattern_enable(priv, true); + max96712_mipi_enable(priv, true); + } else { + max96712_mipi_enable(priv, false); + max96712_pattern_enable(priv, false); + } + + return 0; +} + +static const struct v4l2_subdev_video_ops max96712_video_ops = { + .s_stream = max96712_s_stream, +}; + +static int max96712_get_pad_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + format->format.width = 1920; + format->format.height = 1080; + format->format.code = MEDIA_BUS_FMT_RGB888_1X24; + format->format.field = V4L2_FIELD_NONE; + + return 0; +} + +static const struct v4l2_subdev_pad_ops max96712_pad_ops = { + .get_fmt = max96712_get_pad_format, + .set_fmt = max96712_get_pad_format, +}; + +static const struct v4l2_subdev_ops max96712_subdev_ops = { + .video = &max96712_video_ops, + .pad = &max96712_pad_ops, +}; + +static const char * const max96712_test_pattern[] = { + "Checkerboard", + "Gradient", +}; + +static int max96712_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct max96712_priv *priv = + container_of(ctrl->handler, struct max96712_priv, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_TEST_PATTERN: + priv->pattern = ctrl->val ? + MAX96712_PATTERN_GRADIENT : + MAX96712_PATTERN_CHECKERBOARD; + break; + } + return 0; +} + +static const struct v4l2_ctrl_ops max96712_ctrl_ops = { + .s_ctrl = max96712_s_ctrl, +}; + +static int max96712_v4l2_register(struct max96712_priv *priv) +{ + long pixel_rate; + int ret; + + v4l2_i2c_subdev_init(&priv->sd, priv->client, &max96712_subdev_ops); + priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + + v4l2_ctrl_handler_init(&priv->ctrl_handler, 2); + + /* + * TODO: Once V4L2_CID_LINK_FREQ is changed from a menu control to an + * INT64 control it should be used here instead of V4L2_CID_PIXEL_RATE. + */ + pixel_rate = MAX96712_DPLL_FREQ / priv->mipi.num_data_lanes * 1000000; + v4l2_ctrl_new_std(&priv->ctrl_handler, NULL, V4L2_CID_PIXEL_RATE, + pixel_rate, pixel_rate, 1, pixel_rate); + + v4l2_ctrl_new_std_menu_items(&priv->ctrl_handler, &max96712_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(max96712_test_pattern) - 1, + 0, 0, max96712_test_pattern); + + priv->sd.ctrl_handler = &priv->ctrl_handler; + ret = priv->ctrl_handler.error; + if (ret) + goto error; + + priv->pads[0].flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&priv->sd.entity, 1, priv->pads); + if (ret) + goto error; + + v4l2_set_subdevdata(&priv->sd, priv); + + ret = v4l2_async_register_subdev(&priv->sd); + if (ret < 0) { + dev_err(&priv->client->dev, "Unable to register subdevice\n"); + goto error; + } + + return 0; +error: + v4l2_ctrl_handler_free(&priv->ctrl_handler); + + return ret; +} + +static int max96712_parse_dt(struct max96712_priv *priv) +{ + struct fwnode_handle *ep; + struct v4l2_fwnode_endpoint v4l2_ep = { + .bus_type = V4L2_MBUS_CSI2_DPHY + }; + int ret; + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(&priv->client->dev), 4, + 0, 0); + if (!ep) { + dev_err(&priv->client->dev, "Not connected to subdevice\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(ep, &v4l2_ep); + fwnode_handle_put(ep); + if (ret) { + dev_err(&priv->client->dev, "Could not parse v4l2 endpoint\n"); + return -EINVAL; + } + + if (v4l2_ep.bus.mipi_csi2.num_data_lanes != 4) { + dev_err(&priv->client->dev, "Only 4 data lanes supported\n"); + return -EINVAL; + } + + priv->mipi = v4l2_ep.bus.mipi_csi2; + + return 0; +} + +static const struct regmap_config max96712_i2c_regmap = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x1f00, +}; + +static int max96712_probe(struct i2c_client *client) +{ + struct max96712_priv *priv; + int ret; + + priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->client = client; + i2c_set_clientdata(client, priv); + + priv->regmap = devm_regmap_init_i2c(client, &max96712_i2c_regmap); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable", + GPIOD_OUT_HIGH); + if (IS_ERR(priv->gpiod_pwdn)) + return PTR_ERR(priv->gpiod_pwdn); + + gpiod_set_consumer_name(priv->gpiod_pwdn, "max96712-pwdn"); + gpiod_set_value_cansleep(priv->gpiod_pwdn, 1); + + if (priv->gpiod_pwdn) + usleep_range(4000, 5000); + + if (max96712_read(priv, 0x4a) != MAX96712_ID) + return -ENODEV; + + max96712_reset(priv); + + ret = max96712_parse_dt(priv); + if (ret) + return ret; + + max96712_mipi_configure(priv); + + return max96712_v4l2_register(priv); +} + +static int max96712_remove(struct i2c_client *client) +{ + struct max96712_priv *priv = i2c_get_clientdata(client); + + v4l2_async_unregister_subdev(&priv->sd); + + gpiod_set_value_cansleep(priv->gpiod_pwdn, 0); + + return 0; +} + +static const struct of_device_id max96712_of_table[] = { + { .compatible = "maxim,max96712" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, max96712_of_table); + +static struct i2c_driver max96712_i2c_driver = { + .driver = { + .name = "max96712", + .of_match_table = of_match_ptr(max96712_of_table), + }, + .probe_new = max96712_probe, + .remove = max96712_remove, +}; + +module_i2c_driver(max96712_i2c_driver); + +MODULE_DESCRIPTION("Maxim MAX96712 Quad GMSL2 Deserializer Driver"); +MODULE_AUTHOR("Niklas Söderlund <niklas.soderlund@ragnatech.se>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.c b/drivers/staging/media/meson/vdec/vdec_helpers.c index b9125c295d1d..203d7afa085d 100644 --- a/drivers/staging/media/meson/vdec/vdec_helpers.c +++ b/drivers/staging/media/meson/vdec/vdec_helpers.c @@ -276,13 +276,13 @@ static void dst_buf_done(struct amvdec_session *sess, switch (sess->pixfmt_cap) { case V4L2_PIX_FMT_NV12M: - vbuf->vb2_buf.planes[0].bytesused = output_size; - vbuf->vb2_buf.planes[1].bytesused = output_size / 2; + vb2_set_plane_payload(&vbuf->vb2_buf, 0, output_size); + vb2_set_plane_payload(&vbuf->vb2_buf, 1, output_size / 2); break; case V4L2_PIX_FMT_YUV420M: - vbuf->vb2_buf.planes[0].bytesused = output_size; - vbuf->vb2_buf.planes[1].bytesused = output_size / 4; - vbuf->vb2_buf.planes[2].bytesused = output_size / 4; + vb2_set_plane_payload(&vbuf->vb2_buf, 0, output_size); + vb2_set_plane_payload(&vbuf->vb2_buf, 1, output_size / 4); + vb2_set_plane_payload(&vbuf->vb2_buf, 2, output_size / 4); break; } diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig index c02199b5e0fd..dc7292f346fa 100644 --- a/drivers/staging/media/rkvdec/Kconfig +++ b/drivers/staging/media/rkvdec/Kconfig @@ -9,6 +9,7 @@ config VIDEO_ROCKCHIP_VDEC select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV select V4L2_H264 + select V4L2_VP9 help Support for the Rockchip Video Decoder IP present on Rockchip SoCs, which accelerates video decoding. diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile index c08fed0a39f9..cb86b429cfaa 100644 --- a/drivers/staging/media/rkvdec/Makefile +++ b/drivers/staging/media/rkvdec/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o -rockchip-vdec-y += rkvdec.o rkvdec-h264.o +rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c new file mode 100644 index 000000000000..311a12656072 --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c @@ -0,0 +1,1072 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder VP9 backend + * + * Copyright (C) 2019 Collabora, Ltd. + * Boris Brezillon <boris.brezillon@collabora.com> + * Copyright (C) 2021 Collabora, Ltd. + * Andrzej Pietrasiewicz <andrzej.p@collabora.com> + * + * Copyright (C) 2016 Rockchip Electronics Co., Ltd. + * Alpha Lin <Alpha.Lin@rock-chips.com> + */ + +/* + * For following the vp9 spec please start reading this driver + * code from rkvdec_vp9_run() followed by rkvdec_vp9_done(). + */ + +#include <linux/kernel.h> +#include <linux/vmalloc.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-vp9.h> + +#include "rkvdec.h" +#include "rkvdec-regs.h" + +#define RKVDEC_VP9_PROBE_SIZE 4864 +#define RKVDEC_VP9_COUNT_SIZE 13232 +#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 + +struct rkvdec_vp9_intra_mode_probs { + u8 y_mode[105]; + u8 uv_mode[23]; +}; + +struct rkvdec_vp9_intra_only_frame_probs { + u8 coef_intra[4][2][128]; + struct rkvdec_vp9_intra_mode_probs intra_mode[10]; +}; + +struct rkvdec_vp9_inter_frame_probs { + u8 y_mode[4][9]; + u8 comp_mode[5]; + u8 comp_ref[5]; + u8 single_ref[5][2]; + u8 inter_mode[7][3]; + u8 interp_filter[4][2]; + u8 padding0[11]; + u8 coef[2][4][2][128]; + u8 uv_mode_0_2[3][9]; + u8 padding1[5]; + u8 uv_mode_3_5[3][9]; + u8 padding2[5]; + u8 uv_mode_6_8[3][9]; + u8 padding3[5]; + u8 uv_mode_9[9]; + u8 padding4[7]; + u8 padding5[16]; + struct { + u8 joint[3]; + u8 sign[2]; + u8 classes[2][10]; + u8 class0_bit[2]; + u8 bits[2][10]; + u8 class0_fr[2][2][3]; + u8 fr[2][3]; + u8 class0_hp[2]; + u8 hp[2]; + } mv; +}; + +struct rkvdec_vp9_probs { + u8 partition[16][3]; + u8 pred[3]; + u8 tree[7]; + u8 skip[3]; + u8 tx32[2][3]; + u8 tx16[2][2]; + u8 tx8[2][1]; + u8 is_inter[4]; + /* 128 bit alignment */ + u8 padding0[3]; + union { + struct rkvdec_vp9_inter_frame_probs inter; + struct rkvdec_vp9_intra_only_frame_probs intra_only; + }; +}; + +/* Data structure describing auxiliary buffer format. */ +struct rkvdec_vp9_priv_tbl { + struct rkvdec_vp9_probs probs; + u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; +}; + +struct rkvdec_vp9_refs_counts { + u32 eob[2]; + u32 coeff[3]; +}; + +struct rkvdec_vp9_inter_frame_symbol_counts { + u32 partition[16][4]; + u32 skip[3][2]; + u32 inter[4][2]; + u32 tx32p[2][4]; + u32 tx16p[2][4]; + u32 tx8p[2][2]; + u32 y_mode[4][10]; + u32 uv_mode[10][10]; + u32 comp[5][2]; + u32 comp_ref[5][2]; + u32 single_ref[5][2][2]; + u32 mv_mode[7][4]; + u32 filter[4][3]; + u32 mv_joint[4]; + u32 sign[2][2]; + /* add 1 element for align */ + u32 classes[2][11 + 1]; + u32 class0[2][2]; + u32 bits[2][10][2]; + u32 class0_fp[2][2][4]; + u32 fp[2][4]; + u32 class0_hp[2][2]; + u32 hp[2][2]; + struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; +}; + +struct rkvdec_vp9_intra_frame_symbol_counts { + u32 partition[4][4][4]; + u32 skip[3][2]; + u32 intra[4][2]; + u32 tx32p[2][4]; + u32 tx16p[2][4]; + u32 tx8p[2][2]; + struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; +}; + +struct rkvdec_vp9_run { + struct rkvdec_run base; + const struct v4l2_ctrl_vp9_frame *decode_params; +}; + +struct rkvdec_vp9_frame_info { + u32 valid : 1; + u32 segmapid : 1; + u32 frame_context_idx : 2; + u32 reference_mode : 2; + u32 tx_mode : 3; + u32 interpolation_filter : 3; + u32 flags; + u64 timestamp; + struct v4l2_vp9_segmentation seg; + struct v4l2_vp9_loop_filter lf; +}; + +struct rkvdec_vp9_ctx { + struct rkvdec_aux_buf priv_tbl; + struct rkvdec_aux_buf count_tbl; + struct v4l2_vp9_frame_symbol_counts inter_cnts; + struct v4l2_vp9_frame_symbol_counts intra_cnts; + struct v4l2_vp9_frame_context probability_tables; + struct v4l2_vp9_frame_context frame_context[4]; + struct rkvdec_vp9_frame_info cur; + struct rkvdec_vp9_frame_info last; +}; + +static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) +{ + unsigned int idx = 0, byte_count = 0; + int k, m, n; + u8 p; + + for (k = 0; k < 6; k++) { + for (m = 0; m < 6; m++) { + for (n = 0; n < 3; n++) { + p = coef[k][m][n]; + coeff_plane[idx++] = p; + byte_count++; + if (byte_count == 27) { + idx += 5; + byte_count = 0; + } + } + } + } +} + +static void init_intra_only_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_intra_only_frame_probs *rkprobs; + const struct v4l2_vp9_frame_context *probs; + unsigned int i, j, k; + + rkprobs = &tbl->probs.intra_only; + probs = &vp9_ctx->probability_tables; + + /* + * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related + * prob 64 x 128 bits + */ + for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { + for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) + write_coeff_plane(probs->coef[i][j][0], + rkprobs->coef_intra[i][j]); + } + + /* intra mode prob 80 x 128 bits */ + for (i = 0; i < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob); i++) { + unsigned int byte_count = 0; + int idx = 0; + + /* vp9_kf_y_mode_prob */ + for (j = 0; j < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0]); j++) { + for (k = 0; k < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0][0]); + k++) { + u8 val = v4l2_vp9_kf_y_mode_prob[i][j][k]; + + rkprobs->intra_mode[i].y_mode[idx++] = val; + byte_count++; + if (byte_count == 27) { + byte_count = 0; + idx += 5; + } + } + } + + } + + for (i = 0; i < sizeof(v4l2_vp9_kf_uv_mode_prob); ++i) { + const u8 *ptr = (const u8 *)v4l2_vp9_kf_uv_mode_prob; + + rkprobs->intra_mode[i / 23].uv_mode[i % 23] = ptr[i]; + } +} + +static void init_inter_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_inter_frame_probs *rkprobs; + const struct v4l2_vp9_frame_context *probs; + unsigned int i, j, k; + + rkprobs = &tbl->probs.inter; + probs = &vp9_ctx->probability_tables; + + /* + * inter probs + * 151 x 128 bits, aligned to 152 x 128 bits + * inter only + * intra_y_mode & inter_block info 6 x 128 bits + */ + + memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); + memcpy(rkprobs->comp_mode, probs->comp_mode, + sizeof(rkprobs->comp_mode)); + memcpy(rkprobs->comp_ref, probs->comp_ref, + sizeof(rkprobs->comp_ref)); + memcpy(rkprobs->single_ref, probs->single_ref, + sizeof(rkprobs->single_ref)); + memcpy(rkprobs->inter_mode, probs->inter_mode, + sizeof(rkprobs->inter_mode)); + memcpy(rkprobs->interp_filter, probs->interp_filter, + sizeof(rkprobs->interp_filter)); + + /* 128 x 128 bits coeff related */ + for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { + for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { + for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) + write_coeff_plane(probs->coef[i][j][k], + rkprobs->coef[k][i][j]); + } + } + + /* intra uv mode 6 x 128 */ + memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], + sizeof(rkprobs->uv_mode_0_2)); + memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], + sizeof(rkprobs->uv_mode_3_5)); + memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], + sizeof(rkprobs->uv_mode_6_8)); + memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], + sizeof(rkprobs->uv_mode_9)); + + /* mv related 6 x 128 */ + memcpy(rkprobs->mv.joint, probs->mv.joint, + sizeof(rkprobs->mv.joint)); + memcpy(rkprobs->mv.sign, probs->mv.sign, + sizeof(rkprobs->mv.sign)); + memcpy(rkprobs->mv.classes, probs->mv.classes, + sizeof(rkprobs->mv.classes)); + memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, + sizeof(rkprobs->mv.class0_bit)); + memcpy(rkprobs->mv.bits, probs->mv.bits, + sizeof(rkprobs->mv.bits)); + memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, + sizeof(rkprobs->mv.class0_fr)); + memcpy(rkprobs->mv.fr, probs->mv.fr, + sizeof(rkprobs->mv.fr)); + memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, + sizeof(rkprobs->mv.class0_hp)); + memcpy(rkprobs->mv.hp, probs->mv.hp, + sizeof(rkprobs->mv.hp)); +} + +static void init_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + const struct v4l2_ctrl_vp9_frame *dec_params; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_probs *rkprobs = &tbl->probs; + const struct v4l2_vp9_segmentation *seg; + const struct v4l2_vp9_frame_context *probs; + bool intra_only; + + dec_params = run->decode_params; + probs = &vp9_ctx->probability_tables; + seg = &dec_params->seg; + + memset(rkprobs, 0, sizeof(*rkprobs)); + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + /* sb info 5 x 128 bit */ + memcpy(rkprobs->partition, + intra_only ? v4l2_vp9_kf_partition_probs : probs->partition, + sizeof(rkprobs->partition)); + + memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); + memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); + memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); + memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); + memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); + memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); + memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); + + if (intra_only) + init_intra_only_probs(ctx, run); + else + init_inter_probs(ctx, run); +} + +struct rkvdec_vp9_ref_reg { + u32 reg_frm_size; + u32 reg_hor_stride; + u32 reg_y_stride; + u32 reg_yuv_stride; + u32 reg_ref_base; +}; + +static struct rkvdec_vp9_ref_reg ref_regs[] = { + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), + .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, + .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, + .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, + }, + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), + .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, + .reg_yuv_stride = 0, + .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, + }, + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), + .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, + .reg_yuv_stride = 0, + .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, + } +}; + +static struct rkvdec_decoded_buffer * +get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + int buf_idx; + + /* + * If a ref is unused or invalid, address of current destination + * buffer is returned. + */ + buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); + if (buf_idx < 0) + return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); + + return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); +} + +static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) +{ + unsigned int aligned_pitch, aligned_height, yuv_len; + + aligned_height = round_up(buf->vp9.height, 64); + aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; + yuv_len = (aligned_height * aligned_pitch * 3) / 2; + + return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + + yuv_len; +} + +static void config_ref_registers(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run, + struct rkvdec_decoded_buffer *ref_buf, + struct rkvdec_vp9_ref_reg *ref_reg) +{ + unsigned int aligned_pitch, aligned_height, y_len, yuv_len; + struct rkvdec_dev *rkvdec = ctx->dev; + + aligned_height = round_up(ref_buf->vp9.height, 64); + writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(ref_buf->vp9.width) | + RKVDEC_VP9_FRAMEHEIGHT(ref_buf->vp9.height), + rkvdec->regs + ref_reg->reg_frm_size); + + writel_relaxed(vb2_dma_contig_plane_dma_addr(&ref_buf->base.vb.vb2_buf, 0), + rkvdec->regs + ref_reg->reg_ref_base); + + if (&ref_buf->base.vb == run->base.bufs.dst) + return; + + aligned_pitch = round_up(ref_buf->vp9.width * ref_buf->vp9.bit_depth, 512) / 8; + y_len = aligned_height * aligned_pitch; + yuv_len = (y_len * 3) / 2; + + writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | + RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), + rkvdec->regs + ref_reg->reg_hor_stride); + writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), + rkvdec->regs + ref_reg->reg_y_stride); + + if (!ref_reg->reg_yuv_stride) + return; + + writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), + rkvdec->regs + ref_reg->reg_yuv_stride); +} + +static void config_seg_registers(struct rkvdec_ctx *ctx, unsigned int segid) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + const struct v4l2_vp9_segmentation *seg; + struct rkvdec_dev *rkvdec = ctx->dev; + s16 feature_val; + int feature_id; + u32 val = 0; + + seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; + feature_id = V4L2_VP9_SEG_LVL_ALT_Q; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | + RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_ALT_L; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | + RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_REF_FRAME; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_REFERINFO_EN(1) | + RKVDEC_SEGID_REFERINFO(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_SKIP; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) + val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); + + if (!segid && + (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) + val |= RKVDEC_SEGID_ABS_DELTA(1); + + writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); +} + +static void update_dec_buf_info(struct rkvdec_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + buf->vp9.width = dec_params->frame_width_minus_1 + 1; + buf->vp9.height = dec_params->frame_height_minus_1 + 1; + buf->vp9.bit_depth = dec_params->bit_depth; +} + +static void update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, + struct rkvdec_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + vp9_ctx->cur.valid = true; + vp9_ctx->cur.reference_mode = dec_params->reference_mode; + vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; + vp9_ctx->cur.flags = dec_params->flags; + vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; + vp9_ctx->cur.seg = dec_params->seg; + vp9_ctx->cur.lf = dec_params->lf; +} + +static void update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) +{ + vp9_ctx->last = vp9_ctx->cur; +} + +static void config_registers(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + unsigned int y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch, stream_len; + const struct v4l2_ctrl_vp9_frame *dec_params; + struct rkvdec_decoded_buffer *ref_bufs[3]; + struct rkvdec_decoded_buffer *dst, *last, *mv_ref; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + u32 val, last_frame_info = 0; + const struct v4l2_vp9_segmentation *seg; + struct rkvdec_dev *rkvdec = ctx->dev; + dma_addr_t addr; + bool intra_only; + unsigned int i; + + dec_params = run->decode_params; + dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); + ref_bufs[0] = get_ref_buf(ctx, &dst->base.vb, dec_params->last_frame_ts); + ref_bufs[1] = get_ref_buf(ctx, &dst->base.vb, dec_params->golden_frame_ts); + ref_bufs[2] = get_ref_buf(ctx, &dst->base.vb, dec_params->alt_frame_ts); + + if (vp9_ctx->last.valid) + last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); + else + last = dst; + + update_dec_buf_info(dst, dec_params); + update_ctx_cur_info(vp9_ctx, dst, dec_params); + seg = &dec_params->seg; + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), + rkvdec->regs + RKVDEC_REG_SYSCTRL); + + bit_depth = dec_params->bit_depth; + aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); + + aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * + bit_depth, + 512) / 8; + y_len = aligned_height * aligned_pitch; + uv_len = y_len / 2; + yuv_len = y_len + uv_len; + + writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | + RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), + rkvdec->regs + RKVDEC_REG_PICPAR); + writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), + rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); + writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), + rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); + + stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); + writel_relaxed(RKVDEC_STRM_LEN(stream_len), + rkvdec->regs + RKVDEC_REG_STRM_LEN); + + /* + * Reset count buffer, because decoder only output intra related syntax + * counts when decoding intra frame, but update entropy need to update + * all the probabilities. + */ + if (intra_only) + memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); + + vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || + (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) + vp9_ctx->cur.segmapid++; + + for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) + config_ref_registers(ctx, run, ref_bufs[i], &ref_regs[i]); + + for (i = 0; i < 8; i++) + config_seg_registers(ctx, i); + + writel_relaxed(RKVDEC_VP9_TX_MODE(vp9_ctx->cur.tx_mode) | + RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), + rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); + + if (!intra_only) { + const struct v4l2_vp9_loop_filter *lf; + s8 delta; + + if (vp9_ctx->last.valid) + lf = &vp9_ctx->last.lf; + else + lf = &vp9_ctx->cur.lf; + + val = 0; + for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { + delta = lf->ref_deltas[i]; + val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); + } + + writel_relaxed(val, + rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); + + for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { + delta = lf->mode_deltas[i]; + last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, + delta); + } + } + + if (vp9_ctx->last.valid && !intra_only && + vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) + last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; + + if (vp9_ctx->last.valid && + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) + last_frame_info |= RKVDEC_LAST_SHOW_FRAME; + + if (vp9_ctx->last.valid && + vp9_ctx->last.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) + last_frame_info |= RKVDEC_LAST_INTRA_ONLY; + + if (vp9_ctx->last.valid && + last->vp9.width == dst->vp9.width && + last->vp9.height == dst->vp9.height) + last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; + + writel_relaxed(last_frame_info, + rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); + + writel_relaxed(stream_len - dec_params->compressed_header_size - + dec_params->uncompressed_header_size, + rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); + + for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { + unsigned int refw = ref_bufs[i]->vp9.width; + unsigned int refh = ref_bufs[i]->vp9.height; + u32 hscale, vscale; + + hscale = (refw << 14) / dst->vp9.width; + vscale = (refh << 14) / dst->vp9.height; + writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | + RKVDEC_VP9_REF_VER_SCALE(vscale), + rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); + } + + addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); + writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); + addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); + writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, probs), + rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); + writel_relaxed(vp9_ctx->count_tbl.dma, + rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); + + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, segmap) + + (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), + rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, segmap) + + (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), + rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); + + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + vp9_ctx->last.valid) + mv_ref = last; + else + mv_ref = dst; + + writel_relaxed(get_mv_base_addr(mv_ref), + rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); + + writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | + (ctx->decoded_fmt.fmt.pix_mp.height << 16), + rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); +} + +static int validate_dec_params(struct rkvdec_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + unsigned int aligned_width, aligned_height; + + /* We only support profile 0. */ + if (dec_params->profile != 0) { + dev_err(ctx->dev->dev, "unsupported profile %d\n", + dec_params->profile); + return -EINVAL; + } + + aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); + aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); + + /* + * Userspace should update the capture/decoded format when the + * resolution changes. + */ + if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || + aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { + dev_err(ctx->dev->dev, + "unexpected bitstream resolution %dx%d\n", + dec_params->frame_width_minus_1 + 1, + dec_params->frame_height_minus_1 + 1); + return -EINVAL; + } + + return 0; +} + +static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, + struct rkvdec_vp9_run *run) +{ + const struct v4l2_ctrl_vp9_frame *dec_params; + const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct v4l2_ctrl *ctrl; + unsigned int fctx_idx; + int ret; + + /* v4l2-specific stuff */ + rkvdec_run_preamble(ctx, &run->base); + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_VP9_FRAME); + if (WARN_ON(!ctrl)) + return -EINVAL; + dec_params = ctrl->p_cur.p; + + ret = validate_dec_params(ctx, dec_params); + if (ret) + return ret; + + run->decode_params = dec_params; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); + if (WARN_ON(!ctrl)) + return -EINVAL; + prob_updates = ctrl->p_cur.p; + vp9_ctx->cur.tx_mode = prob_updates->tx_mode; + + /* + * vp9 stuff + * + * by this point the userspace has done all parts of 6.2 uncompressed_header() + * except this fragment: + * if ( FrameIsIntra || error_resilient_mode ) { + * setup_past_independence ( ) + * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || + * reset_frame_context == 3 ) { + * for ( i = 0; i < 4; i ++ ) { + * save_probs( i ) + * } + * } else if ( reset_frame_context == 2 ) { + * save_probs( frame_context_idx ) + * } + * frame_context_idx = 0 + * } + */ + fctx_idx = v4l2_vp9_reset_frame_ctx(dec_params, vp9_ctx->frame_context); + vp9_ctx->cur.frame_context_idx = fctx_idx; + + /* 6.1 frame(sz): load_probs() and load_probs2() */ + vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; + + /* + * The userspace has also performed 6.3 compressed_header(), but handling the + * probs in a special way. All probs which need updating, except MV-related, + * have been read from the bitstream and translated through inv_map_table[], + * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed + * by userspace are either translated values (there are no 0 values in + * inv_map_table[]), or zero to indicate no update. All MV-related probs which need + * updating have been read from the bitstream and (mv_prob << 1) | 1 has been + * performed. The values passed by userspace are either new values + * to replace old ones (the above mentioned shift and bitwise or never result in + * a zero) or zero to indicate no update. + * fw_update_probs() performs actual probs updates or leaves probs as-is + * for values for which a zero was passed from userspace. + */ + v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, dec_params); + + return 0; +} + +static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_vp9_run run = { }; + int ret; + + ret = rkvdec_vp9_run_preamble(ctx, &run); + if (ret) { + rkvdec_run_postamble(ctx, &run.base); + return ret; + } + + /* Prepare probs. */ + init_probs(ctx, &run); + + /* Configure hardware registers. */ + config_registers(ctx, &run); + + rkvdec_run_postamble(ctx, &run.base); + + schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); + + writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + + writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); + /* Start decoding! */ + writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | + RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, + rkvdec->regs + RKVDEC_REG_INTERRUPT); + + return 0; +} + +#define copy_tx_and_skip(p1, p2) \ +do { \ + memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ + memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ + memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ + memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ +} while (0) + +static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, + struct vb2_v4l2_buffer *src_buf, + struct vb2_v4l2_buffer *dst_buf, + enum vb2_buffer_state result) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + unsigned int fctx_idx; + + /* v4l2-specific stuff */ + if (result == VB2_BUF_STATE_ERROR) + goto out_update_last; + + /* + * vp9 stuff + * + * 6.1.2 refresh_probs() + * + * In the spec a complementary condition goes last in 6.1.2 refresh_probs(), + * but it makes no sense to perform all the activities from the first "if" + * there if we actually are not refreshing the frame context. On top of that, + * because of 6.2 uncompressed_header() whenever error_resilient_mode == 1, + * refresh_frame_context == 0. Consequently, if we don't jump to out_update_last + * it means error_resilient_mode must be 0. + */ + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) + goto out_update_last; + + fctx_idx = vp9_ctx->cur.frame_context_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { + /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ + struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + bool frame_is_intra = vp9_ctx->cur.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); + struct tx_and_skip { + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 skip[3]; + } _tx_skip, *tx_skip = &_tx_skip; + struct v4l2_vp9_frame_symbol_counts *counts; + + /* buffer the forward-updated TX and skip probs */ + if (frame_is_intra) + copy_tx_and_skip(tx_skip, probs); + + /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ + *probs = vp9_ctx->frame_context[fctx_idx]; + + /* if FrameIsIntra then undo the effect of load_probs2() */ + if (frame_is_intra) + copy_tx_and_skip(probs, tx_skip); + + counts = frame_is_intra ? &vp9_ctx->intra_cnts : &vp9_ctx->inter_cnts; + v4l2_vp9_adapt_coef_probs(probs, counts, + !vp9_ctx->last.valid || + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, + frame_is_intra); + if (!frame_is_intra) { + const struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts; + u32 classes[2][11]; + int i; + + inter_cnts = vp9_ctx->count_tbl.cpu; + for (i = 0; i < ARRAY_SIZE(classes); ++i) + memcpy(classes[i], inter_cnts->classes[i], sizeof(classes[0])); + counts->classes = &classes; + + /* load_probs2() already done */ + v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, + vp9_ctx->cur.reference_mode, + vp9_ctx->cur.interpolation_filter, + vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); + } + } + + /* 6.1.2 refresh_probs(): save_probs(fctx_idx) */ + vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; + +out_update_last: + update_ctx_last_info(vp9_ctx); +} + +static void rkvdec_init_v4l2_vp9_count_tbl(struct rkvdec_ctx *ctx) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_intra_frame_symbol_counts *intra_cnts = vp9_ctx->count_tbl.cpu; + struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts = vp9_ctx->count_tbl.cpu; + int i, j, k, l, m; + + vp9_ctx->inter_cnts.partition = &inter_cnts->partition; + vp9_ctx->inter_cnts.skip = &inter_cnts->skip; + vp9_ctx->inter_cnts.intra_inter = &inter_cnts->inter; + vp9_ctx->inter_cnts.tx32p = &inter_cnts->tx32p; + vp9_ctx->inter_cnts.tx16p = &inter_cnts->tx16p; + vp9_ctx->inter_cnts.tx8p = &inter_cnts->tx8p; + + vp9_ctx->intra_cnts.partition = (u32 (*)[16][4])(&intra_cnts->partition); + vp9_ctx->intra_cnts.skip = &intra_cnts->skip; + vp9_ctx->intra_cnts.intra_inter = &intra_cnts->intra; + vp9_ctx->intra_cnts.tx32p = &intra_cnts->tx32p; + vp9_ctx->intra_cnts.tx16p = &intra_cnts->tx16p; + vp9_ctx->intra_cnts.tx8p = &intra_cnts->tx8p; + + vp9_ctx->inter_cnts.y_mode = &inter_cnts->y_mode; + vp9_ctx->inter_cnts.uv_mode = &inter_cnts->uv_mode; + vp9_ctx->inter_cnts.comp = &inter_cnts->comp; + vp9_ctx->inter_cnts.comp_ref = &inter_cnts->comp_ref; + vp9_ctx->inter_cnts.single_ref = &inter_cnts->single_ref; + vp9_ctx->inter_cnts.mv_mode = &inter_cnts->mv_mode; + vp9_ctx->inter_cnts.filter = &inter_cnts->filter; + vp9_ctx->inter_cnts.mv_joint = &inter_cnts->mv_joint; + vp9_ctx->inter_cnts.sign = &inter_cnts->sign; + /* + * rk hardware actually uses "u32 classes[2][11 + 1];" + * instead of "u32 classes[2][11];", so this must be explicitly + * copied into vp9_ctx->classes when passing the data to the + * vp9 library function + */ + vp9_ctx->inter_cnts.class0 = &inter_cnts->class0; + vp9_ctx->inter_cnts.bits = &inter_cnts->bits; + vp9_ctx->inter_cnts.class0_fp = &inter_cnts->class0_fp; + vp9_ctx->inter_cnts.fp = &inter_cnts->fp; + vp9_ctx->inter_cnts.class0_hp = &inter_cnts->class0_hp; + vp9_ctx->inter_cnts.hp = &inter_cnts->hp; + +#define INNERMOST_LOOP \ + do { \ + for (m = 0; m < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0][0]); ++m) {\ + vp9_ctx->inter_cnts.coeff[i][j][k][l][m] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].coeff; \ + vp9_ctx->inter_cnts.eob[i][j][k][l][m][0] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ + vp9_ctx->inter_cnts.eob[i][j][k][l][m][1] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ + \ + vp9_ctx->intra_cnts.coeff[i][j][k][l][m] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].coeff; \ + vp9_ctx->intra_cnts.eob[i][j][k][l][m][0] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ + vp9_ctx->intra_cnts.eob[i][j][k][l][m][1] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ + } \ + } while (0) + + for (i = 0; i < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff); ++i) + for (j = 0; j < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0]); ++j) + for (k = 0; k < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0]); ++k) + for (l = 0; l < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0]); ++l) + INNERMOST_LOOP; +#undef INNERMOST_LOOP +} + +static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_vp9_priv_tbl *priv_tbl; + struct rkvdec_vp9_ctx *vp9_ctx; + unsigned char *count_tbl; + int ret; + + vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); + if (!vp9_ctx) + return -ENOMEM; + + ctx->priv = vp9_ctx; + + priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), + &vp9_ctx->priv_tbl.dma, GFP_KERNEL); + if (!priv_tbl) { + ret = -ENOMEM; + goto err_free_ctx; + } + + vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); + vp9_ctx->priv_tbl.cpu = priv_tbl; + memset(priv_tbl, 0, sizeof(*priv_tbl)); + + count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, + &vp9_ctx->count_tbl.dma, GFP_KERNEL); + if (!count_tbl) { + ret = -ENOMEM; + goto err_free_priv_tbl; + } + + vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; + vp9_ctx->count_tbl.cpu = count_tbl; + memset(count_tbl, 0, sizeof(*count_tbl)); + rkvdec_init_v4l2_vp9_count_tbl(ctx); + + return 0; + +err_free_priv_tbl: + dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, + vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); + +err_free_ctx: + kfree(vp9_ctx); + return ret; +} + +static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_dev *rkvdec = ctx->dev; + + dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, + vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); + dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, + vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); + kfree(vp9_ctx); +} + +static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; + + fmt->num_planes = 1; + if (!fmt->plane_fmt[0].sizeimage) + fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; + return 0; +} + +const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { + .adjust_fmt = rkvdec_vp9_adjust_fmt, + .start = rkvdec_vp9_start, + .stop = rkvdec_vp9_stop, + .run = rkvdec_vp9_run, + .done = rkvdec_vp9_done, +}; diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c index 4fd4a2907da7..c0cf3488f970 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -99,10 +99,30 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), }; -static const u32 rkvdec_h264_decoded_fmts[] = { +static const u32 rkvdec_h264_vp9_decoded_fmts[] = { V4L2_PIX_FMT_NV12, }; +static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, + }, + { + .cfg.id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, + }, + { + .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + }, +}; + +static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { + .ctrls = rkvdec_vp9_ctrl_descs, + .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), +}; + static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { { .fourcc = V4L2_PIX_FMT_H264_SLICE, @@ -116,8 +136,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { }, .ctrls = &rkvdec_h264_ctrls, .ops = &rkvdec_h264_fmt_ops, - .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), - .decoded_fmts = rkvdec_h264_decoded_fmts, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), + .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, + }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .frmsize = { + .min_width = 64, + .max_width = 4096, + .step_width = 64, + .min_height = 64, + .max_height = 2304, + .step_height = 64, + }, + .ctrls = &rkvdec_vp9_ctrls, + .ops = &rkvdec_vp9_fmt_ops, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), + .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, } }; @@ -677,7 +712,7 @@ static void rkvdec_device_run(void *priv) rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); } -static struct v4l2_m2m_ops rkvdec_m2m_ops = { +static const struct v4l2_m2m_ops rkvdec_m2m_ops = { .device_run = rkvdec_device_run, }; diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h index 52ac3874c5e5..2f4ea1786b93 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -42,14 +42,18 @@ struct rkvdec_run { struct rkvdec_vp9_decoded_buffer_info { /* Info needed when the decoded frame serves as a reference frame. */ - u16 width; - u16 height; - u32 bit_depth : 4; + unsigned short width; + unsigned short height; + unsigned int bit_depth : 4; }; struct rkvdec_decoded_buffer { /* Must be the first field in this struct. */ struct v4l2_m2m_buffer base; + + union { + struct rkvdec_vp9_decoded_buffer_info vp9; + }; }; static inline struct rkvdec_decoded_buffer * @@ -116,4 +120,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; + #endif /* RKVDEC_H_ */ diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index c76fc97d97a0..4a4b714b0f26 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -580,6 +580,14 @@ static const struct cedrus_variant sun8i_r40_cedrus_variant = { .mod_rate = 297000000, }; +static const struct cedrus_variant sun20i_d1_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED | + CEDRUS_CAPABILITY_MPEG2_DEC | + CEDRUS_CAPABILITY_H264_DEC | + CEDRUS_CAPABILITY_H265_DEC, + .mod_rate = 432000000, +}; + static const struct cedrus_variant sun50i_a64_cedrus_variant = { .capabilities = CEDRUS_CAPABILITY_UNTILED | CEDRUS_CAPABILITY_MPEG2_DEC | @@ -638,6 +646,10 @@ static const struct of_device_id cedrus_dt_match[] = { .data = &sun8i_r40_cedrus_variant, }, { + .compatible = "allwinner,sun20i-d1-video-engine", + .data = &sun20i_d1_cedrus_variant, + }, + { .compatible = "allwinner,sun50i-a64-video-engine", .data = &sun50i_a64_cedrus_variant, }, diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c index ed4c1250b303..a8f1a024c343 100644 --- a/drivers/staging/media/tegra-vde/vde.c +++ b/drivers/staging/media/tegra-vde/vde.c @@ -20,6 +20,7 @@ #include <linux/slab.h> #include <linux/uaccess.h> +#include <soc/tegra/common.h> #include <soc/tegra/pmc.h> #include "uapi.h" @@ -84,6 +85,96 @@ static int tegra_vde_wait_mbe(struct tegra_vde *vde) (tmp >= 0x10), 1, 100); } +static int tegra_vde_alloc_bo(struct tegra_vde *vde, + struct tegra_vde_bo **ret_bo, + enum dma_data_direction dma_dir, + size_t size) +{ + struct device *dev = vde->miscdev.parent; + struct tegra_vde_bo *bo; + int err; + + bo = kzalloc(sizeof(*bo), GFP_KERNEL); + if (!bo) + return -ENOMEM; + + bo->vde = vde; + bo->size = size; + bo->dma_dir = dma_dir; + bo->dma_attrs = DMA_ATTR_WRITE_COMBINE | + DMA_ATTR_NO_KERNEL_MAPPING; + + if (!vde->domain) + bo->dma_attrs |= DMA_ATTR_FORCE_CONTIGUOUS; + + bo->dma_cookie = dma_alloc_attrs(dev, bo->size, &bo->dma_handle, + GFP_KERNEL, bo->dma_attrs); + if (!bo->dma_cookie) { + dev_err(dev, "Failed to allocate DMA buffer of size: %zu\n", + bo->size); + err = -ENOMEM; + goto free_bo; + } + + err = dma_get_sgtable_attrs(dev, &bo->sgt, bo->dma_cookie, + bo->dma_handle, bo->size, bo->dma_attrs); + if (err) { + dev_err(dev, "Failed to get DMA buffer SG table: %d\n", err); + goto free_attrs; + } + + err = dma_map_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); + if (err) { + dev_err(dev, "Failed to map DMA buffer SG table: %d\n", err); + goto free_table; + } + + if (vde->domain) { + err = tegra_vde_iommu_map(vde, &bo->sgt, &bo->iova, bo->size); + if (err) { + dev_err(dev, "Failed to map DMA buffer IOVA: %d\n", err); + goto unmap_sgtable; + } + + bo->dma_addr = iova_dma_addr(&vde->iova, bo->iova); + } else { + bo->dma_addr = sg_dma_address(bo->sgt.sgl); + } + + *ret_bo = bo; + + return 0; + +unmap_sgtable: + dma_unmap_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); +free_table: + sg_free_table(&bo->sgt); +free_attrs: + dma_free_attrs(dev, bo->size, bo->dma_cookie, bo->dma_handle, + bo->dma_attrs); +free_bo: + kfree(bo); + + return err; +} + +static void tegra_vde_free_bo(struct tegra_vde_bo *bo) +{ + struct tegra_vde *vde = bo->vde; + struct device *dev = vde->miscdev.parent; + + if (vde->domain) + tegra_vde_iommu_unmap(vde, bo->iova); + + dma_unmap_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); + + sg_free_table(&bo->sgt); + + dma_free_attrs(dev, bo->size, bo->dma_cookie, bo->dma_handle, + bo->dma_attrs); + kfree(bo); +} + static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, unsigned int refs_nb, bool setup_refs) @@ -249,7 +340,7 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, value |= frame->frame_num; } else { aux_addr = 0x6ADEAD00; - value = 0; + value = 0x3f; } tegra_vde_setup_iram_entry(vde, 0, i, value, aux_addr); @@ -424,6 +515,9 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, tegra_vde_writel(vde, bitstream_data_addr, vde->sxe, 0x6C); + if (vde->soc->supports_ref_pic_marking) + tegra_vde_writel(vde, vde->secure_bo->dma_addr, vde->sxe, 0x7c); + value = 0x10000005; value |= ctx->pic_width_in_mbs << 11; value |= ctx->pic_height_in_mbs << 3; @@ -920,13 +1014,17 @@ static __maybe_unused int tegra_vde_runtime_suspend(struct device *dev) struct tegra_vde *vde = dev_get_drvdata(dev); int err; - err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC); - if (err) { - dev_err(dev, "Failed to power down HW: %d\n", err); - return err; + if (!dev->pm_domain) { + err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC); + if (err) { + dev_err(dev, "Failed to power down HW: %d\n", err); + return err; + } } clk_disable_unprepare(vde->clk); + reset_control_release(vde->rst); + reset_control_release(vde->rst_mc); return 0; } @@ -936,14 +1034,45 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev) struct tegra_vde *vde = dev_get_drvdata(dev); int err; - err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC, - vde->clk, vde->rst); + err = reset_control_acquire(vde->rst_mc); if (err) { - dev_err(dev, "Failed to power up HW : %d\n", err); + dev_err(dev, "Failed to acquire mc reset: %d\n", err); return err; } + err = reset_control_acquire(vde->rst); + if (err) { + dev_err(dev, "Failed to acquire reset: %d\n", err); + goto release_mc_reset; + } + + if (!dev->pm_domain) { + err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC, + vde->clk, vde->rst); + if (err) { + dev_err(dev, "Failed to power up HW : %d\n", err); + goto release_reset; + } + } else { + /* + * tegra_powergate_sequence_power_up() leaves clocks enabled, + * while GENPD not. + */ + err = clk_prepare_enable(vde->clk); + if (err) { + dev_err(dev, "Failed to enable clock: %d\n", err); + goto release_reset; + } + } + return 0; + +release_reset: + reset_control_release(vde->rst); +release_mc_reset: + reset_control_release(vde->rst_mc); + + return err; } static int tegra_vde_probe(struct platform_device *pdev) @@ -958,6 +1087,8 @@ static int tegra_vde_probe(struct platform_device *pdev) platform_set_drvdata(pdev, vde); + vde->soc = of_device_get_match_data(&pdev->dev); + vde->sxe = devm_platform_ioremap_resource_byname(pdev, "sxe"); if (IS_ERR(vde->sxe)) return PTR_ERR(vde->sxe); @@ -1001,14 +1132,14 @@ static int tegra_vde_probe(struct platform_device *pdev) return err; } - vde->rst = devm_reset_control_get(dev, NULL); + vde->rst = devm_reset_control_get_exclusive_released(dev, NULL); if (IS_ERR(vde->rst)) { err = PTR_ERR(vde->rst); dev_err(dev, "Could not get VDE reset %d\n", err); return err; } - vde->rst_mc = devm_reset_control_get_optional(dev, "mc"); + vde->rst_mc = devm_reset_control_get_optional_exclusive_released(dev, "mc"); if (IS_ERR(vde->rst_mc)) { err = PTR_ERR(vde->rst_mc); dev_err(dev, "Could not get MC reset %d\n", err); @@ -1026,6 +1157,12 @@ static int tegra_vde_probe(struct platform_device *pdev) return err; } + err = devm_tegra_core_dev_init_opp_table_common(dev); + if (err) { + dev_err(dev, "Could initialize OPP table %d\n", err); + return err; + } + vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0); if (!vde->iram_pool) { dev_err(dev, "Could not get IRAM pool\n"); @@ -1056,12 +1193,6 @@ static int tegra_vde_probe(struct platform_device *pdev) goto err_gen_free; } - err = misc_register(&vde->miscdev); - if (err) { - dev_err(dev, "Failed to register misc device: %d\n", err); - goto err_deinit_iommu; - } - pm_runtime_enable(dev); pm_runtime_use_autosuspend(dev); pm_runtime_set_autosuspend_delay(dev, 300); @@ -1077,15 +1208,26 @@ static int tegra_vde_probe(struct platform_device *pdev) pm_runtime_put(dev); + err = tegra_vde_alloc_bo(vde, &vde->secure_bo, DMA_FROM_DEVICE, 4096); + if (err) { + dev_err(dev, "Failed to allocate secure BO: %d\n", err); + goto err_pm_runtime; + } + + err = misc_register(&vde->miscdev); + if (err) { + dev_err(dev, "Failed to register misc device: %d\n", err); + goto err_free_secure_bo; + } + return 0; +err_free_secure_bo: + tegra_vde_free_bo(vde->secure_bo); err_pm_runtime: - misc_deregister(&vde->miscdev); - pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); -err_deinit_iommu: tegra_vde_iommu_deinit(vde); err_gen_free: @@ -1100,6 +1242,10 @@ static int tegra_vde_remove(struct platform_device *pdev) struct tegra_vde *vde = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; + misc_deregister(&vde->miscdev); + + tegra_vde_free_bo(vde->secure_bo); + /* * As it increments RPM usage_count even on errors, we don't need to * check the returned code here. @@ -1116,8 +1262,6 @@ static int tegra_vde_remove(struct platform_device *pdev) pm_runtime_put_noidle(dev); clk_disable_unprepare(vde->clk); - misc_deregister(&vde->miscdev); - tegra_vde_dmabuf_cache_unmap_all(vde); tegra_vde_iommu_deinit(vde); @@ -1133,8 +1277,7 @@ static void tegra_vde_shutdown(struct platform_device *pdev) * On some devices bootloader isn't ready to a power-gated VDE on * a warm-reboot, machine will hang in that case. */ - if (pm_runtime_status_suspended(&pdev->dev)) - tegra_vde_runtime_resume(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); } static __maybe_unused int tegra_vde_pm_suspend(struct device *dev) @@ -1173,8 +1316,27 @@ static const struct dev_pm_ops tegra_vde_pm_ops = { tegra_vde_pm_resume) }; +static const struct tegra_vde_soc tegra124_vde_soc = { + .supports_ref_pic_marking = true, +}; + +static const struct tegra_vde_soc tegra114_vde_soc = { + .supports_ref_pic_marking = true, +}; + +static const struct tegra_vde_soc tegra30_vde_soc = { + .supports_ref_pic_marking = false, +}; + +static const struct tegra_vde_soc tegra20_vde_soc = { + .supports_ref_pic_marking = false, +}; + static const struct of_device_id tegra_vde_of_match[] = { - { .compatible = "nvidia,tegra20-vde", }, + { .compatible = "nvidia,tegra124-vde", .data = &tegra124_vde_soc }, + { .compatible = "nvidia,tegra114-vde", .data = &tegra114_vde_soc }, + { .compatible = "nvidia,tegra30-vde", .data = &tegra30_vde_soc }, + { .compatible = "nvidia,tegra20-vde", .data = &tegra20_vde_soc }, { }, }; MODULE_DEVICE_TABLE(of, tegra_vde_of_match); diff --git a/drivers/staging/media/tegra-vde/vde.h b/drivers/staging/media/tegra-vde/vde.h index 5561291b0c88..bbd42b8d9991 100644 --- a/drivers/staging/media/tegra-vde/vde.h +++ b/drivers/staging/media/tegra-vde/vde.h @@ -24,6 +24,22 @@ struct iommu_domain; struct reset_control; struct dma_buf_attachment; +struct tegra_vde_soc { + bool supports_ref_pic_marking; +}; + +struct tegra_vde_bo { + struct iova *iova; + struct sg_table sgt; + struct tegra_vde *vde; + enum dma_data_direction dma_dir; + unsigned long dma_attrs; + dma_addr_t dma_handle; + dma_addr_t dma_addr; + void *dma_cookie; + size_t size; +}; + struct tegra_vde { void __iomem *sxe; void __iomem *bsev; @@ -48,6 +64,8 @@ struct tegra_vde { struct iova_domain iova; struct iova *iova_resv_static_addresses; struct iova *iova_resv_last_page; + const struct tegra_vde_soc *soc; + struct tegra_vde_bo *secure_bo; dma_addr_t iram_lists_addr; u32 *iram; }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 69d9787d5338..d1f43f465c22 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1845,7 +1845,6 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) struct tegra_vi_channel *chan; struct fwnode_handle *fwnode = dev_fwnode(vi->dev); int ret; - struct fwnode_handle *remote = NULL; /* * Walk the links to parse the full graph. Each channel will have @@ -1857,11 +1856,16 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) * next channels. */ list_for_each_entry(chan, &vi->vi_chans, list) { - remote = fwnode_graph_get_remote_node(fwnode, chan->portnos[0], - 0); - if (!remote) + struct fwnode_handle *ep, *remote; + + ep = fwnode_graph_get_endpoint_by_id(fwnode, + chan->portnos[0], 0, 0); + if (!ep) continue; + remote = fwnode_graph_get_remote_port_parent(ep); + fwnode_handle_put(ep); + ret = tegra_vi_graph_parse_one(chan, remote); fwnode_handle_put(remote); if (ret < 0 || list_empty(&chan->notifier.asd_list)) diff --git a/drivers/staging/most/dim2/dim2.c b/drivers/staging/most/dim2/dim2.c index bd102329d8c8..29f8ce2a47f5 100644 --- a/drivers/staging/most/dim2/dim2.c +++ b/drivers/staging/most/dim2/dim2.c @@ -971,7 +971,7 @@ static void fsl_mx6_disable(struct platform_device *pdev) clk_disable_unprepare(dev->clk); } -static int rcar_h2_enable(struct platform_device *pdev) +static int rcar_gen2_enable(struct platform_device *pdev) { struct dim2_hdm *dev = platform_get_drvdata(pdev); int ret; @@ -1006,7 +1006,7 @@ static int rcar_h2_enable(struct platform_device *pdev) return 0; } -static void rcar_h2_disable(struct platform_device *pdev) +static void rcar_gen2_disable(struct platform_device *pdev) { struct dim2_hdm *dev = platform_get_drvdata(pdev); @@ -1016,7 +1016,7 @@ static void rcar_h2_disable(struct platform_device *pdev) writel(0x0, dev->io_base + 0x600); } -static int rcar_m3_enable(struct platform_device *pdev) +static int rcar_gen3_enable(struct platform_device *pdev) { struct dim2_hdm *dev = platform_get_drvdata(pdev); u32 enable_512fs = dev->clk_speed == CLK_512FS; @@ -1046,7 +1046,7 @@ static int rcar_m3_enable(struct platform_device *pdev) return 0; } -static void rcar_m3_disable(struct platform_device *pdev) +static void rcar_gen3_disable(struct platform_device *pdev) { struct dim2_hdm *dev = platform_get_drvdata(pdev); @@ -1058,20 +1058,20 @@ static void rcar_m3_disable(struct platform_device *pdev) /* ]] platform specific functions */ -enum dim2_platforms { FSL_MX6, RCAR_H2, RCAR_M3 }; +enum dim2_platforms { FSL_MX6, RCAR_GEN2, RCAR_GEN3 }; static struct dim2_platform_data plat_data[] = { [FSL_MX6] = { .enable = fsl_mx6_enable, .disable = fsl_mx6_disable, }, - [RCAR_H2] = { - .enable = rcar_h2_enable, - .disable = rcar_h2_disable, + [RCAR_GEN2] = { + .enable = rcar_gen2_enable, + .disable = rcar_gen2_disable, }, - [RCAR_M3] = { - .enable = rcar_m3_enable, - .disable = rcar_m3_disable, + [RCAR_GEN3] = { + .enable = rcar_gen3_enable, + .disable = rcar_gen3_disable, .fcnt = 3, }, }; @@ -1083,11 +1083,11 @@ static const struct of_device_id dim2_of_match[] = { }, { .compatible = "renesas,mlp", - .data = plat_data + RCAR_H2 + .data = plat_data + RCAR_GEN2 }, { - .compatible = "rcar,medialb-dim2", - .data = plat_data + RCAR_M3 + .compatible = "renesas,rcar-gen3-mlp", + .data = plat_data + RCAR_GEN3 }, { .compatible = "xlnx,axi4-os62420_3pin-1.00.a", diff --git a/drivers/staging/mt7621-dma/Kconfig b/drivers/staging/mt7621-dma/Kconfig deleted file mode 100644 index 54a110288f92..000000000000 --- a/drivers/staging/mt7621-dma/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config MTK_HSDMA - tristate "MTK HSDMA support" - depends on RALINK && SOC_MT7621 - select DMA_ENGINE - select DMA_VIRTUAL_CHANNELS - diff --git a/drivers/staging/mt7621-dma/Makefile b/drivers/staging/mt7621-dma/Makefile deleted file mode 100644 index 23256d1286f3..000000000000 --- a/drivers/staging/mt7621-dma/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_MTK_HSDMA) += hsdma-mt7621.o - -ccflags-y += -I$(srctree)/drivers/dma diff --git a/drivers/staging/mt7621-dma/TODO b/drivers/staging/mt7621-dma/TODO deleted file mode 100644 index fdbc5002c32a..000000000000 --- a/drivers/staging/mt7621-dma/TODO +++ /dev/null @@ -1,5 +0,0 @@ - -- general code review and clean up -- ensure device-tree requirements are documented - -Cc: NeilBrown <neil@brown.name> diff --git a/drivers/staging/mt7621-dma/hsdma-mt7621.c b/drivers/staging/mt7621-dma/hsdma-mt7621.c deleted file mode 100644 index 1424d01d434b..000000000000 --- a/drivers/staging/mt7621-dma/hsdma-mt7621.c +++ /dev/null @@ -1,758 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015, Michael Lee <igvtee@gmail.com> - * MTK HSDMA support - */ - -#include <linux/dmaengine.h> -#include <linux/dma-mapping.h> -#include <linux/err.h> -#include <linux/init.h> -#include <linux/list.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/irq.h> -#include <linux/of_dma.h> -#include <linux/reset.h> -#include <linux/of_device.h> - -#include "virt-dma.h" - -#define HSDMA_BASE_OFFSET 0x800 - -#define HSDMA_REG_TX_BASE 0x00 -#define HSDMA_REG_TX_CNT 0x04 -#define HSDMA_REG_TX_CTX 0x08 -#define HSDMA_REG_TX_DTX 0x0c -#define HSDMA_REG_RX_BASE 0x100 -#define HSDMA_REG_RX_CNT 0x104 -#define HSDMA_REG_RX_CRX 0x108 -#define HSDMA_REG_RX_DRX 0x10c -#define HSDMA_REG_INFO 0x200 -#define HSDMA_REG_GLO_CFG 0x204 -#define HSDMA_REG_RST_CFG 0x208 -#define HSDMA_REG_DELAY_INT 0x20c -#define HSDMA_REG_FREEQ_THRES 0x210 -#define HSDMA_REG_INT_STATUS 0x220 -#define HSDMA_REG_INT_MASK 0x228 -#define HSDMA_REG_SCH_Q01 0x280 -#define HSDMA_REG_SCH_Q23 0x284 - -#define HSDMA_DESCS_MAX 0xfff -#define HSDMA_DESCS_NUM 8 -#define HSDMA_DESCS_MASK (HSDMA_DESCS_NUM - 1) -#define HSDMA_NEXT_DESC(x) (((x) + 1) & HSDMA_DESCS_MASK) - -/* HSDMA_REG_INFO */ -#define HSDMA_INFO_INDEX_MASK 0xf -#define HSDMA_INFO_INDEX_SHIFT 24 -#define HSDMA_INFO_BASE_MASK 0xff -#define HSDMA_INFO_BASE_SHIFT 16 -#define HSDMA_INFO_RX_MASK 0xff -#define HSDMA_INFO_RX_SHIFT 8 -#define HSDMA_INFO_TX_MASK 0xff -#define HSDMA_INFO_TX_SHIFT 0 - -/* HSDMA_REG_GLO_CFG */ -#define HSDMA_GLO_TX_2B_OFFSET BIT(31) -#define HSDMA_GLO_CLK_GATE BIT(30) -#define HSDMA_GLO_BYTE_SWAP BIT(29) -#define HSDMA_GLO_MULTI_DMA BIT(10) -#define HSDMA_GLO_TWO_BUF BIT(9) -#define HSDMA_GLO_32B_DESC BIT(8) -#define HSDMA_GLO_BIG_ENDIAN BIT(7) -#define HSDMA_GLO_TX_DONE BIT(6) -#define HSDMA_GLO_BT_MASK 0x3 -#define HSDMA_GLO_BT_SHIFT 4 -#define HSDMA_GLO_RX_BUSY BIT(3) -#define HSDMA_GLO_RX_DMA BIT(2) -#define HSDMA_GLO_TX_BUSY BIT(1) -#define HSDMA_GLO_TX_DMA BIT(0) - -#define HSDMA_BT_SIZE_16BYTES (0 << HSDMA_GLO_BT_SHIFT) -#define HSDMA_BT_SIZE_32BYTES (1 << HSDMA_GLO_BT_SHIFT) -#define HSDMA_BT_SIZE_64BYTES (2 << HSDMA_GLO_BT_SHIFT) -#define HSDMA_BT_SIZE_128BYTES (3 << HSDMA_GLO_BT_SHIFT) - -#define HSDMA_GLO_DEFAULT (HSDMA_GLO_MULTI_DMA | \ - HSDMA_GLO_RX_DMA | HSDMA_GLO_TX_DMA | HSDMA_BT_SIZE_32BYTES) - -/* HSDMA_REG_RST_CFG */ -#define HSDMA_RST_RX_SHIFT 16 -#define HSDMA_RST_TX_SHIFT 0 - -/* HSDMA_REG_DELAY_INT */ -#define HSDMA_DELAY_INT_EN BIT(15) -#define HSDMA_DELAY_PEND_OFFSET 8 -#define HSDMA_DELAY_TIME_OFFSET 0 -#define HSDMA_DELAY_TX_OFFSET 16 -#define HSDMA_DELAY_RX_OFFSET 0 - -#define HSDMA_DELAY_INIT(x) (HSDMA_DELAY_INT_EN | \ - ((x) << HSDMA_DELAY_PEND_OFFSET)) -#define HSDMA_DELAY(x) ((HSDMA_DELAY_INIT(x) << \ - HSDMA_DELAY_TX_OFFSET) | HSDMA_DELAY_INIT(x)) - -/* HSDMA_REG_INT_STATUS */ -#define HSDMA_INT_DELAY_RX_COH BIT(31) -#define HSDMA_INT_DELAY_RX_INT BIT(30) -#define HSDMA_INT_DELAY_TX_COH BIT(29) -#define HSDMA_INT_DELAY_TX_INT BIT(28) -#define HSDMA_INT_RX_MASK 0x3 -#define HSDMA_INT_RX_SHIFT 16 -#define HSDMA_INT_RX_Q0 BIT(16) -#define HSDMA_INT_TX_MASK 0xf -#define HSDMA_INT_TX_SHIFT 0 -#define HSDMA_INT_TX_Q0 BIT(0) - -/* tx/rx dma desc flags */ -#define HSDMA_PLEN_MASK 0x3fff -#define HSDMA_DESC_DONE BIT(31) -#define HSDMA_DESC_LS0 BIT(30) -#define HSDMA_DESC_PLEN0(_x) (((_x) & HSDMA_PLEN_MASK) << 16) -#define HSDMA_DESC_TAG BIT(15) -#define HSDMA_DESC_LS1 BIT(14) -#define HSDMA_DESC_PLEN1(_x) ((_x) & HSDMA_PLEN_MASK) - -/* align 4 bytes */ -#define HSDMA_ALIGN_SIZE 3 -/* align size 128bytes */ -#define HSDMA_MAX_PLEN 0x3f80 - -struct hsdma_desc { - u32 addr0; - u32 flags; - u32 addr1; - u32 unused; -}; - -struct mtk_hsdma_sg { - dma_addr_t src_addr; - dma_addr_t dst_addr; - u32 len; -}; - -struct mtk_hsdma_desc { - struct virt_dma_desc vdesc; - unsigned int num_sgs; - struct mtk_hsdma_sg sg[1]; -}; - -struct mtk_hsdma_chan { - struct virt_dma_chan vchan; - unsigned int id; - dma_addr_t desc_addr; - int tx_idx; - int rx_idx; - struct hsdma_desc *tx_ring; - struct hsdma_desc *rx_ring; - struct mtk_hsdma_desc *desc; - unsigned int next_sg; -}; - -struct mtk_hsdam_engine { - struct dma_device ddev; - struct device_dma_parameters dma_parms; - void __iomem *base; - struct tasklet_struct task; - volatile unsigned long chan_issued; - - struct mtk_hsdma_chan chan[1]; -}; - -static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev(struct mtk_hsdma_chan *chan) -{ - return container_of(chan->vchan.chan.device, struct mtk_hsdam_engine, - ddev); -} - -static inline struct mtk_hsdma_chan *to_mtk_hsdma_chan(struct dma_chan *c) -{ - return container_of(c, struct mtk_hsdma_chan, vchan.chan); -} - -static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc(struct virt_dma_desc *vdesc) -{ - return container_of(vdesc, struct mtk_hsdma_desc, vdesc); -} - -static inline u32 mtk_hsdma_read(struct mtk_hsdam_engine *hsdma, u32 reg) -{ - return readl(hsdma->base + reg); -} - -static inline void mtk_hsdma_write(struct mtk_hsdam_engine *hsdma, - unsigned int reg, u32 val) -{ - writel(val, hsdma->base + reg); -} - -static void mtk_hsdma_reset_chan(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - chan->tx_idx = 0; - chan->rx_idx = HSDMA_DESCS_NUM - 1; - - mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); - mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); - - mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, - 0x1 << (chan->id + HSDMA_RST_TX_SHIFT)); - mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, - 0x1 << (chan->id + HSDMA_RST_RX_SHIFT)); -} - -static void hsdma_dump_reg(struct mtk_hsdam_engine *hsdma) -{ - dev_dbg(hsdma->ddev.dev, - "tbase %08x, tcnt %08x, tctx %08x, tdtx: %08x, rbase %08x, rcnt %08x, rctx %08x, rdtx %08x\n", - mtk_hsdma_read(hsdma, HSDMA_REG_TX_BASE), - mtk_hsdma_read(hsdma, HSDMA_REG_TX_CNT), - mtk_hsdma_read(hsdma, HSDMA_REG_TX_CTX), - mtk_hsdma_read(hsdma, HSDMA_REG_TX_DTX), - mtk_hsdma_read(hsdma, HSDMA_REG_RX_BASE), - mtk_hsdma_read(hsdma, HSDMA_REG_RX_CNT), - mtk_hsdma_read(hsdma, HSDMA_REG_RX_CRX), - mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX)); - - dev_dbg(hsdma->ddev.dev, - "info %08x, glo %08x, delay %08x, intr_stat %08x, intr_mask %08x\n", - mtk_hsdma_read(hsdma, HSDMA_REG_INFO), - mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG), - mtk_hsdma_read(hsdma, HSDMA_REG_DELAY_INT), - mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS), - mtk_hsdma_read(hsdma, HSDMA_REG_INT_MASK)); -} - -static void hsdma_dump_desc(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - struct hsdma_desc *tx_desc; - struct hsdma_desc *rx_desc; - int i; - - dev_dbg(hsdma->ddev.dev, "tx idx: %d, rx idx: %d\n", - chan->tx_idx, chan->rx_idx); - - for (i = 0; i < HSDMA_DESCS_NUM; i++) { - tx_desc = &chan->tx_ring[i]; - rx_desc = &chan->rx_ring[i]; - - dev_dbg(hsdma->ddev.dev, - "%d tx addr0: %08x, flags %08x, tx addr1: %08x, rx addr0 %08x, flags %08x\n", - i, tx_desc->addr0, tx_desc->flags, - tx_desc->addr1, rx_desc->addr0, rx_desc->flags); - } -} - -static void mtk_hsdma_reset(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - int i; - - /* disable dma */ - mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); - - /* disable intr */ - mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); - - /* init desc value */ - for (i = 0; i < HSDMA_DESCS_NUM; i++) { - chan->tx_ring[i].addr0 = 0; - chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; - } - for (i = 0; i < HSDMA_DESCS_NUM; i++) { - chan->rx_ring[i].addr0 = 0; - chan->rx_ring[i].flags = 0; - } - - /* reset */ - mtk_hsdma_reset_chan(hsdma, chan); - - /* enable intr */ - mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); - - /* enable dma */ - mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); -} - -static int mtk_hsdma_terminate_all(struct dma_chan *c) -{ - struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); - struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); - unsigned long timeout; - LIST_HEAD(head); - - spin_lock_bh(&chan->vchan.lock); - chan->desc = NULL; - clear_bit(chan->id, &hsdma->chan_issued); - vchan_get_all_descriptors(&chan->vchan, &head); - spin_unlock_bh(&chan->vchan.lock); - - vchan_dma_desc_free_list(&chan->vchan, &head); - - /* wait dma transfer complete */ - timeout = jiffies + msecs_to_jiffies(2000); - while (mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG) & - (HSDMA_GLO_RX_BUSY | HSDMA_GLO_TX_BUSY)) { - if (time_after_eq(jiffies, timeout)) { - hsdma_dump_desc(hsdma, chan); - mtk_hsdma_reset(hsdma, chan); - dev_err(hsdma->ddev.dev, "timeout, reset it\n"); - break; - } - cpu_relax(); - } - - return 0; -} - -static int mtk_hsdma_start_transfer(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - dma_addr_t src, dst; - size_t len, tlen; - struct hsdma_desc *tx_desc, *rx_desc; - struct mtk_hsdma_sg *sg; - unsigned int i; - int rx_idx; - - sg = &chan->desc->sg[0]; - len = sg->len; - chan->desc->num_sgs = DIV_ROUND_UP(len, HSDMA_MAX_PLEN); - - /* tx desc */ - src = sg->src_addr; - for (i = 0; i < chan->desc->num_sgs; i++) { - tx_desc = &chan->tx_ring[chan->tx_idx]; - - if (len > HSDMA_MAX_PLEN) - tlen = HSDMA_MAX_PLEN; - else - tlen = len; - - if (i & 0x1) { - tx_desc->addr1 = src; - tx_desc->flags |= HSDMA_DESC_PLEN1(tlen); - } else { - tx_desc->addr0 = src; - tx_desc->flags = HSDMA_DESC_PLEN0(tlen); - - /* update index */ - chan->tx_idx = HSDMA_NEXT_DESC(chan->tx_idx); - } - - src += tlen; - len -= tlen; - } - if (i & 0x1) - tx_desc->flags |= HSDMA_DESC_LS0; - else - tx_desc->flags |= HSDMA_DESC_LS1; - - /* rx desc */ - rx_idx = HSDMA_NEXT_DESC(chan->rx_idx); - len = sg->len; - dst = sg->dst_addr; - for (i = 0; i < chan->desc->num_sgs; i++) { - rx_desc = &chan->rx_ring[rx_idx]; - if (len > HSDMA_MAX_PLEN) - tlen = HSDMA_MAX_PLEN; - else - tlen = len; - - rx_desc->addr0 = dst; - rx_desc->flags = HSDMA_DESC_PLEN0(tlen); - - dst += tlen; - len -= tlen; - - /* update index */ - rx_idx = HSDMA_NEXT_DESC(rx_idx); - } - - /* make sure desc and index all up to date */ - wmb(); - mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); - - return 0; -} - -static int gdma_next_desc(struct mtk_hsdma_chan *chan) -{ - struct virt_dma_desc *vdesc; - - vdesc = vchan_next_desc(&chan->vchan); - if (!vdesc) { - chan->desc = NULL; - return 0; - } - chan->desc = to_mtk_hsdma_desc(vdesc); - chan->next_sg = 0; - - return 1; -} - -static void mtk_hsdma_chan_done(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - struct mtk_hsdma_desc *desc; - int chan_issued; - - chan_issued = 0; - spin_lock_bh(&chan->vchan.lock); - desc = chan->desc; - if (likely(desc)) { - if (chan->next_sg == desc->num_sgs) { - list_del(&desc->vdesc.node); - vchan_cookie_complete(&desc->vdesc); - chan_issued = gdma_next_desc(chan); - } - } else { - dev_dbg(hsdma->ddev.dev, "no desc to complete\n"); - } - - if (chan_issued) - set_bit(chan->id, &hsdma->chan_issued); - spin_unlock_bh(&chan->vchan.lock); -} - -static irqreturn_t mtk_hsdma_irq(int irq, void *devid) -{ - struct mtk_hsdam_engine *hsdma = devid; - u32 status; - - status = mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS); - if (unlikely(!status)) - return IRQ_NONE; - - if (likely(status & HSDMA_INT_RX_Q0)) - tasklet_schedule(&hsdma->task); - else - dev_dbg(hsdma->ddev.dev, "unhandle irq status %08x\n", status); - /* clean intr bits */ - mtk_hsdma_write(hsdma, HSDMA_REG_INT_STATUS, status); - - return IRQ_HANDLED; -} - -static void mtk_hsdma_issue_pending(struct dma_chan *c) -{ - struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); - struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); - - spin_lock_bh(&chan->vchan.lock); - if (vchan_issue_pending(&chan->vchan) && !chan->desc) { - if (gdma_next_desc(chan)) { - set_bit(chan->id, &hsdma->chan_issued); - tasklet_schedule(&hsdma->task); - } else { - dev_dbg(hsdma->ddev.dev, "no desc to issue\n"); - } - } - spin_unlock_bh(&chan->vchan.lock); -} - -static struct dma_async_tx_descriptor *mtk_hsdma_prep_dma_memcpy( - struct dma_chan *c, dma_addr_t dest, dma_addr_t src, - size_t len, unsigned long flags) -{ - struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); - struct mtk_hsdma_desc *desc; - - if (len <= 0) - return NULL; - - desc = kzalloc(sizeof(*desc), GFP_ATOMIC); - if (!desc) { - dev_err(c->device->dev, "alloc memcpy decs error\n"); - return NULL; - } - - desc->sg[0].src_addr = src; - desc->sg[0].dst_addr = dest; - desc->sg[0].len = len; - - return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); -} - -static enum dma_status mtk_hsdma_tx_status(struct dma_chan *c, - dma_cookie_t cookie, - struct dma_tx_state *state) -{ - return dma_cookie_status(c, cookie, state); -} - -static void mtk_hsdma_free_chan_resources(struct dma_chan *c) -{ - vchan_free_chan_resources(to_virt_chan(c)); -} - -static void mtk_hsdma_desc_free(struct virt_dma_desc *vdesc) -{ - kfree(container_of(vdesc, struct mtk_hsdma_desc, vdesc)); -} - -static void mtk_hsdma_tx(struct mtk_hsdam_engine *hsdma) -{ - struct mtk_hsdma_chan *chan; - - if (test_and_clear_bit(0, &hsdma->chan_issued)) { - chan = &hsdma->chan[0]; - if (chan->desc) - mtk_hsdma_start_transfer(hsdma, chan); - else - dev_dbg(hsdma->ddev.dev, "chan 0 no desc to issue\n"); - } -} - -static void mtk_hsdma_rx(struct mtk_hsdam_engine *hsdma) -{ - struct mtk_hsdma_chan *chan; - int next_idx, drx_idx, cnt; - - chan = &hsdma->chan[0]; - next_idx = HSDMA_NEXT_DESC(chan->rx_idx); - drx_idx = mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX); - - cnt = (drx_idx - next_idx) & HSDMA_DESCS_MASK; - if (!cnt) - return; - - chan->next_sg += cnt; - chan->rx_idx = (chan->rx_idx + cnt) & HSDMA_DESCS_MASK; - - /* update rx crx */ - wmb(); - mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); - - mtk_hsdma_chan_done(hsdma, chan); -} - -static void mtk_hsdma_tasklet(struct tasklet_struct *t) -{ - struct mtk_hsdam_engine *hsdma = from_tasklet(hsdma, t, task); - - mtk_hsdma_rx(hsdma); - mtk_hsdma_tx(hsdma); -} - -static int mtk_hsdam_alloc_desc(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - int i; - - chan->tx_ring = dma_alloc_coherent(hsdma->ddev.dev, - 2 * HSDMA_DESCS_NUM * - sizeof(*chan->tx_ring), - &chan->desc_addr, GFP_ATOMIC | __GFP_ZERO); - if (!chan->tx_ring) - goto no_mem; - - chan->rx_ring = &chan->tx_ring[HSDMA_DESCS_NUM]; - - /* init tx ring value */ - for (i = 0; i < HSDMA_DESCS_NUM; i++) - chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; - - return 0; -no_mem: - return -ENOMEM; -} - -static void mtk_hsdam_free_desc(struct mtk_hsdam_engine *hsdma, - struct mtk_hsdma_chan *chan) -{ - if (chan->tx_ring) { - dma_free_coherent(hsdma->ddev.dev, - 2 * HSDMA_DESCS_NUM * sizeof(*chan->tx_ring), - chan->tx_ring, chan->desc_addr); - chan->tx_ring = NULL; - chan->rx_ring = NULL; - } -} - -static int mtk_hsdma_init(struct mtk_hsdam_engine *hsdma) -{ - struct mtk_hsdma_chan *chan; - int ret; - u32 reg; - - /* init desc */ - chan = &hsdma->chan[0]; - ret = mtk_hsdam_alloc_desc(hsdma, chan); - if (ret) - return ret; - - /* tx */ - mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, chan->desc_addr); - mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, HSDMA_DESCS_NUM); - /* rx */ - mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, chan->desc_addr + - (sizeof(struct hsdma_desc) * HSDMA_DESCS_NUM)); - mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, HSDMA_DESCS_NUM); - /* reset */ - mtk_hsdma_reset_chan(hsdma, chan); - - /* enable rx intr */ - mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); - - /* enable dma */ - mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); - - /* hardware info */ - reg = mtk_hsdma_read(hsdma, HSDMA_REG_INFO); - dev_info(hsdma->ddev.dev, "rx: %d, tx: %d\n", - (reg >> HSDMA_INFO_RX_SHIFT) & HSDMA_INFO_RX_MASK, - (reg >> HSDMA_INFO_TX_SHIFT) & HSDMA_INFO_TX_MASK); - - hsdma_dump_reg(hsdma); - - return ret; -} - -static void mtk_hsdma_uninit(struct mtk_hsdam_engine *hsdma) -{ - struct mtk_hsdma_chan *chan; - - /* disable dma */ - mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); - - /* disable intr */ - mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); - - /* free desc */ - chan = &hsdma->chan[0]; - mtk_hsdam_free_desc(hsdma, chan); - - /* tx */ - mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, 0); - mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, 0); - /* rx */ - mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, 0); - mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, 0); - /* reset */ - mtk_hsdma_reset_chan(hsdma, chan); -} - -static const struct of_device_id mtk_hsdma_of_match[] = { - { .compatible = "mediatek,mt7621-hsdma" }, - { }, -}; - -static int mtk_hsdma_probe(struct platform_device *pdev) -{ - const struct of_device_id *match; - struct mtk_hsdma_chan *chan; - struct mtk_hsdam_engine *hsdma; - struct dma_device *dd; - int ret; - int irq; - void __iomem *base; - - ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); - if (ret) - return ret; - - match = of_match_device(mtk_hsdma_of_match, &pdev->dev); - if (!match) - return -EINVAL; - - hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL); - if (!hsdma) - return -EINVAL; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - hsdma->base = base + HSDMA_BASE_OFFSET; - tasklet_setup(&hsdma->task, mtk_hsdma_tasklet); - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -EINVAL; - ret = devm_request_irq(&pdev->dev, irq, mtk_hsdma_irq, - 0, dev_name(&pdev->dev), hsdma); - if (ret) { - dev_err(&pdev->dev, "failed to request irq\n"); - return ret; - } - - device_reset(&pdev->dev); - - dd = &hsdma->ddev; - dma_cap_set(DMA_MEMCPY, dd->cap_mask); - dd->copy_align = HSDMA_ALIGN_SIZE; - dd->device_free_chan_resources = mtk_hsdma_free_chan_resources; - dd->device_prep_dma_memcpy = mtk_hsdma_prep_dma_memcpy; - dd->device_terminate_all = mtk_hsdma_terminate_all; - dd->device_tx_status = mtk_hsdma_tx_status; - dd->device_issue_pending = mtk_hsdma_issue_pending; - dd->dev = &pdev->dev; - dd->dev->dma_parms = &hsdma->dma_parms; - dma_set_max_seg_size(dd->dev, HSDMA_MAX_PLEN); - INIT_LIST_HEAD(&dd->channels); - - chan = &hsdma->chan[0]; - chan->id = 0; - chan->vchan.desc_free = mtk_hsdma_desc_free; - vchan_init(&chan->vchan, dd); - - /* init hardware */ - ret = mtk_hsdma_init(hsdma); - if (ret) { - dev_err(&pdev->dev, "failed to alloc ring descs\n"); - return ret; - } - - ret = dma_async_device_register(dd); - if (ret) { - dev_err(&pdev->dev, "failed to register dma device\n"); - goto err_uninit_hsdma; - } - - ret = of_dma_controller_register(pdev->dev.of_node, - of_dma_xlate_by_chan_id, hsdma); - if (ret) { - dev_err(&pdev->dev, "failed to register of dma controller\n"); - goto err_unregister; - } - - platform_set_drvdata(pdev, hsdma); - - return 0; - -err_unregister: - dma_async_device_unregister(dd); -err_uninit_hsdma: - mtk_hsdma_uninit(hsdma); - return ret; -} - -static int mtk_hsdma_remove(struct platform_device *pdev) -{ - struct mtk_hsdam_engine *hsdma = platform_get_drvdata(pdev); - - mtk_hsdma_uninit(hsdma); - - of_dma_controller_free(pdev->dev.of_node); - dma_async_device_unregister(&hsdma->ddev); - - return 0; -} - -static struct platform_driver mtk_hsdma_driver = { - .probe = mtk_hsdma_probe, - .remove = mtk_hsdma_remove, - .driver = { - .name = KBUILD_MODNAME, - .of_match_table = mtk_hsdma_of_match, - }, -}; -module_platform_driver(mtk_hsdma_driver); - -MODULE_AUTHOR("Michael Lee <igvtee@gmail.com>"); -MODULE_DESCRIPTION("MTK HSDMA driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 6d158e4f4b8c..644a65d1a6a1 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi @@ -146,44 +146,6 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_pins>; }; - - gdma: gdma@2800 { - compatible = "ralink,rt3883-gdma"; - reg = <0x2800 0x800>; - - clocks = <&sysc MT7621_CLK_GDMA>; - clock-names = "gdma"; - resets = <&rstctrl 14>; - reset-names = "dma"; - - interrupt-parent = <&gic>; - interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>; - - #dma-cells = <1>; - #dma-channels = <16>; - #dma-requests = <16>; - - status = "disabled"; - }; - - hsdma: hsdma@7000 { - compatible = "mediatek,mt7621-hsdma"; - reg = <0x7000 0x1000>; - - clocks = <&sysc MT7621_CLK_HSDMA>; - clock-names = "hsdma"; - resets = <&rstctrl 5>; - reset-names = "hsdma"; - - interrupt-parent = <&gic>; - interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; - - #dma-cells = <1>; - #dma-channels = <1>; - #dma-requests = <1>; - - status = "disabled"; - }; }; pinctrl: pinctrl { diff --git a/drivers/staging/netlogic/Kconfig b/drivers/staging/netlogic/Kconfig deleted file mode 100644 index e1712606ee3c..000000000000 --- a/drivers/staging/netlogic/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config NETLOGIC_XLR_NET - tristate "Netlogic XLR/XLS network device" - depends on CPU_XLR - depends on NETDEVICES - select PHYLIB - help - This driver support Netlogic XLR/XLS on chip gigabit - Ethernet. diff --git a/drivers/staging/netlogic/Makefile b/drivers/staging/netlogic/Makefile deleted file mode 100644 index 7e2902af26a3..000000000000 --- a/drivers/staging/netlogic/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_NETLOGIC_XLR_NET) += xlr_net.o platform_net.o diff --git a/drivers/staging/netlogic/TODO b/drivers/staging/netlogic/TODO deleted file mode 100644 index 20e22ecb9903..000000000000 --- a/drivers/staging/netlogic/TODO +++ /dev/null @@ -1,11 +0,0 @@ -* Implementing 64bit stat counter in software -* All memory allocation should be changed to DMA allocations -* Changing comments into linux standard format - -Please send patches -To: -Ganesan Ramalingam <ganesanr@broadcom.com> -Greg Kroah-Hartman <gregkh@linuxfoundation.org> -Cc: -Jayachandran Chandrashekaran Nair <jchandra@broadcom.com> - diff --git a/drivers/staging/netlogic/platform_net.c b/drivers/staging/netlogic/platform_net.c deleted file mode 100644 index 8be9d0b0c22c..000000000000 --- a/drivers/staging/netlogic/platform_net.c +++ /dev/null @@ -1,219 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/ioport.h> -#include <linux/resource.h> -#include <linux/phy.h> - -#include <asm/netlogic/haldefs.h> -#include <asm/netlogic/common.h> -#include <asm/netlogic/xlr/fmn.h> -#include <asm/netlogic/xlr/xlr.h> -#include <asm/netlogic/psb-bootinfo.h> -#include <asm/netlogic/xlr/pic.h> -#include <asm/netlogic/xlr/iomap.h> - -#include "platform_net.h" - -/* Linux Net */ -#define MAX_NUM_GMAC 8 -#define MAX_NUM_XLS_GMAC 8 -#define MAX_NUM_XLR_GMAC 4 - -static u32 xlr_gmac_offsets[] = { - NETLOGIC_IO_GMAC_0_OFFSET, NETLOGIC_IO_GMAC_1_OFFSET, - NETLOGIC_IO_GMAC_2_OFFSET, NETLOGIC_IO_GMAC_3_OFFSET, - NETLOGIC_IO_GMAC_4_OFFSET, NETLOGIC_IO_GMAC_5_OFFSET, - NETLOGIC_IO_GMAC_6_OFFSET, NETLOGIC_IO_GMAC_7_OFFSET -}; - -static u32 xlr_gmac_irqs[] = { PIC_GMAC_0_IRQ, PIC_GMAC_1_IRQ, - PIC_GMAC_2_IRQ, PIC_GMAC_3_IRQ, - PIC_GMAC_4_IRQ, PIC_GMAC_5_IRQ, - PIC_GMAC_6_IRQ, PIC_GMAC_7_IRQ -}; - -static struct resource xlr_net0_res[8]; -static struct resource xlr_net1_res[8]; -static u32 __iomem *gmac4_addr; -static u32 __iomem *gpio_addr; - -static void xlr_resource_init(struct resource *res, int offset, int irq) -{ - res->name = "gmac"; - - res->start = CPHYSADDR(nlm_mmio_base(offset)); - res->end = res->start + 0xfff; - res->flags = IORESOURCE_MEM; - - res++; - res->name = "gmac"; - res->start = irq; - res->end = irq; - res->flags = IORESOURCE_IRQ; -} - -static struct platform_device *gmac_controller2_init(void *gmac0_addr) -{ - int mac; - static struct xlr_net_data ndata1 = { - .phy_interface = PHY_INTERFACE_MODE_SGMII, - .rfr_station = FMN_STNID_GMAC1_FR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[1], - }; - - static struct platform_device xlr_net_dev1 = { - .name = "xlr-net", - .id = 1, - .dev.platform_data = &ndata1, - }; - - gmac4_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), - 0xfff); - ndata1.serdes_addr = gmac4_addr; - ndata1.pcs_addr = gmac4_addr; - ndata1.mii_addr = gmac0_addr; - ndata1.gpio_addr = gpio_addr; - ndata1.cpu_mask = nlm_current_node()->coremask; - - xlr_net_dev1.resource = xlr_net1_res; - - for (mac = 0; mac < 4; mac++) { - ndata1.tx_stnid[mac] = FMN_STNID_GMAC1_TX0 + mac; - ndata1.phy_addr[mac] = mac + 4 + 0x10; - - xlr_resource_init(&xlr_net1_res[mac * 2], - xlr_gmac_offsets[mac + 4], - xlr_gmac_irqs[mac + 4]); - } - xlr_net_dev1.num_resources = 8; - - return &xlr_net_dev1; -} - -static void xls_gmac_init(void) -{ - int mac; - struct platform_device *xlr_net_dev1; - void __iomem *gmac0_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), - 0xfff); - - static struct xlr_net_data ndata0 = { - .rfr_station = FMN_STNID_GMACRFR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], - }; - - static struct platform_device xlr_net_dev0 = { - .name = "xlr-net", - .id = 0, - }; - xlr_net_dev0.dev.platform_data = &ndata0; - ndata0.serdes_addr = gmac0_addr; - ndata0.pcs_addr = gmac0_addr; - ndata0.mii_addr = gmac0_addr; - - /* Passing GPIO base for serdes init. Only needed on sgmii ports */ - gpio_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), - 0xfff); - ndata0.gpio_addr = gpio_addr; - ndata0.cpu_mask = nlm_current_node()->coremask; - - xlr_net_dev0.resource = xlr_net0_res; - - switch (nlm_prom_info.board_major_version) { - case 12: - /* first block RGMII or XAUI, use RGMII */ - ndata0.phy_interface = PHY_INTERFACE_MODE_RGMII; - ndata0.tx_stnid[0] = FMN_STNID_GMAC0_TX0; - ndata0.phy_addr[0] = 0; - - xlr_net_dev0.num_resources = 2; - - xlr_resource_init(&xlr_net0_res[0], xlr_gmac_offsets[0], - xlr_gmac_irqs[0]); - platform_device_register(&xlr_net_dev0); - - /* second block is XAUI, not supported yet */ - break; - default: - /* default XLS config, all ports SGMII */ - ndata0.phy_interface = PHY_INTERFACE_MODE_SGMII; - for (mac = 0; mac < 4; mac++) { - ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac; - ndata0.phy_addr[mac] = mac + 0x10; - - xlr_resource_init(&xlr_net0_res[mac * 2], - xlr_gmac_offsets[mac], - xlr_gmac_irqs[mac]); - } - xlr_net_dev0.num_resources = 8; - platform_device_register(&xlr_net_dev0); - - xlr_net_dev1 = gmac_controller2_init(gmac0_addr); - platform_device_register(xlr_net_dev1); - } -} - -static void xlr_gmac_init(void) -{ - int mac; - - /* assume all GMACs for now */ - static struct xlr_net_data ndata0 = { - .phy_interface = PHY_INTERFACE_MODE_RGMII, - .serdes_addr = NULL, - .pcs_addr = NULL, - .rfr_station = FMN_STNID_GMACRFR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], - .gpio_addr = NULL, - }; - - static struct platform_device xlr_net_dev0 = { - .name = "xlr-net", - .id = 0, - .dev.platform_data = &ndata0, - }; - ndata0.mii_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), - 0xfff); - - ndata0.cpu_mask = nlm_current_node()->coremask; - - for (mac = 0; mac < MAX_NUM_XLR_GMAC; mac++) { - ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac; - ndata0.phy_addr[mac] = mac; - xlr_resource_init(&xlr_net0_res[mac * 2], xlr_gmac_offsets[mac], - xlr_gmac_irqs[mac]); - } - xlr_net_dev0.num_resources = 8; - xlr_net_dev0.resource = xlr_net0_res; - - platform_device_register(&xlr_net_dev0); -} - -static int __init xlr_net_init(void) -{ - if (nlm_chip_is_xls()) - xls_gmac_init(); - else - xlr_gmac_init(); - - return 0; -} - -arch_initcall(xlr_net_init); diff --git a/drivers/staging/netlogic/platform_net.h b/drivers/staging/netlogic/platform_net.h deleted file mode 100644 index c8d4c13424c6..000000000000 --- a/drivers/staging/netlogic/platform_net.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#define PORTS_PER_CONTROLLER 4 - -struct xlr_net_data { - int cpu_mask; - u32 __iomem *mii_addr; - u32 __iomem *serdes_addr; - u32 __iomem *pcs_addr; - u32 __iomem *gpio_addr; - int phy_interface; - int rfr_station; - int tx_stnid[PORTS_PER_CONTROLLER]; - int *bucket_size; - int phy_addr[PORTS_PER_CONTROLLER]; - struct xlr_fmn_info *gmac_fmn_info; -}; diff --git a/drivers/staging/netlogic/xlr_net.c b/drivers/staging/netlogic/xlr_net.c deleted file mode 100644 index 69ea61faf8fa..000000000000 --- a/drivers/staging/netlogic/xlr_net.c +++ /dev/null @@ -1,1080 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/netdevice.h> -#include <linux/smp.h> -#include <linux/ethtool.h> -#include <linux/module.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/jiffies.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -#include <asm/mipsregs.h> -/* - * fmn.h - For FMN credit configuration and registering fmn_handler. - * FMN is communication mechanism that allows processing agents within - * XLR/XLS to communicate each other. - */ -#include <asm/netlogic/xlr/fmn.h> - -#include "platform_net.h" -#include "xlr_net.h" - -/* - * The readl/writel implementation byteswaps on XLR/XLS, so - * we need to use __raw_ IO to read the NAE registers - * because they are in the big-endian MMIO area on the SoC. - */ -static inline void xlr_nae_wreg(u32 __iomem *base, unsigned int reg, u32 val) -{ - __raw_writel(val, base + reg); -} - -static inline u32 xlr_nae_rdreg(u32 __iomem *base, unsigned int reg) -{ - return __raw_readl(base + reg); -} - -static inline void xlr_reg_update(u32 *base_addr, u32 off, u32 val, u32 mask) -{ - u32 tmp; - - tmp = xlr_nae_rdreg(base_addr, off); - xlr_nae_wreg(base_addr, off, (tmp & ~mask) | (val & mask)); -} - -#define MAC_SKB_BACK_PTR_SIZE SMP_CACHE_BYTES - -static int send_to_rfr_fifo(struct xlr_net_priv *priv, void *addr) -{ - struct nlm_fmn_msg msg; - int ret = 0, num_try = 0, stnid; - unsigned long paddr, mflags; - - paddr = virt_to_bus(addr); - msg.msg0 = (u64)paddr & 0xffffffffe0ULL; - msg.msg1 = 0; - msg.msg2 = 0; - msg.msg3 = 0; - stnid = priv->nd->rfr_station; - do { - mflags = nlm_cop2_enable_irqsave(); - ret = nlm_fmn_send(1, 0, stnid, &msg); - nlm_cop2_disable_irqrestore(mflags); - if (ret == 0) - return 0; - } while (++num_try < 10000); - - netdev_err(priv->ndev, "Send to RFR failed in RX path\n"); - return ret; -} - -static inline unsigned char *xlr_alloc_skb(void) -{ - struct sk_buff *skb; - int buf_len = sizeof(struct sk_buff *); - unsigned char *skb_data; - - /* skb->data is cache aligned */ - skb = alloc_skb(XLR_RX_BUF_SIZE, GFP_ATOMIC); - if (!skb) - return NULL; - skb_data = skb->data; - skb_reserve(skb, MAC_SKB_BACK_PTR_SIZE); - memcpy(skb_data, &skb, buf_len); - - return skb->data; -} - -static void xlr_net_fmn_handler(int bkt, int src_stnid, int size, int code, - struct nlm_fmn_msg *msg, void *arg) -{ - struct sk_buff *skb; - void *skb_data = NULL; - struct net_device *ndev; - struct xlr_net_priv *priv; - u32 port, length; - unsigned char *addr; - struct xlr_adapter *adapter = arg; - - length = (msg->msg0 >> 40) & 0x3fff; - if (length == 0) { - addr = bus_to_virt(msg->msg0 & 0xffffffffffULL); - addr = addr - MAC_SKB_BACK_PTR_SIZE; - skb = (struct sk_buff *)(*(unsigned long *)addr); - dev_kfree_skb_any((struct sk_buff *)addr); - } else { - addr = (unsigned char *) - bus_to_virt(msg->msg0 & 0xffffffffe0ULL); - length = length - BYTE_OFFSET - MAC_CRC_LEN; - port = ((int)msg->msg0) & 0x0f; - addr = addr - MAC_SKB_BACK_PTR_SIZE; - skb = (struct sk_buff *)(*(unsigned long *)addr); - skb->dev = adapter->netdev[port]; - if (!skb->dev) - return; - ndev = skb->dev; - priv = netdev_priv(ndev); - - /* 16 byte IP header align */ - skb_reserve(skb, BYTE_OFFSET); - skb_put(skb, length); - skb->protocol = eth_type_trans(skb, skb->dev); - netif_rx(skb); - /* Fill rx ring */ - skb_data = xlr_alloc_skb(); - if (skb_data) - send_to_rfr_fifo(priv, skb_data); - } -} - -static struct phy_device *xlr_get_phydev(struct xlr_net_priv *priv) -{ - return mdiobus_get_phy(priv->mii_bus, priv->phy_addr); -} - -/* - * Ethtool operation - */ -static int xlr_get_link_ksettings(struct net_device *ndev, - struct ethtool_link_ksettings *ecmd) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) - return -ENODEV; - - phy_ethtool_ksettings_get(phydev, ecmd); - - return 0; -} - -static int xlr_set_link_ksettings(struct net_device *ndev, - const struct ethtool_link_ksettings *ecmd) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) - return -ENODEV; - return phy_ethtool_ksettings_set(phydev, ecmd); -} - -static const struct ethtool_ops xlr_ethtool_ops = { - .get_link_ksettings = xlr_get_link_ksettings, - .set_link_ksettings = xlr_set_link_ksettings, -}; - -/* - * Net operations - */ -static int xlr_net_fill_rx_ring(struct net_device *ndev) -{ - void *skb_data; - struct xlr_net_priv *priv = netdev_priv(ndev); - int i; - - for (i = 0; i < MAX_FRIN_SPILL / 4; i++) { - skb_data = xlr_alloc_skb(); - if (!skb_data) - return -ENOMEM; - send_to_rfr_fifo(priv, skb_data); - } - netdev_info(ndev, "Rx ring setup done\n"); - return 0; -} - -static int xlr_net_open(struct net_device *ndev) -{ - u32 err; - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - /* schedule a link state check */ - phy_start(phydev); - - err = phy_start_aneg(phydev); - if (err) { - pr_err("Autoneg failed\n"); - return err; - } - /* Setup the speed from PHY to internal reg*/ - xlr_set_gmac_speed(priv); - - netif_tx_start_all_queues(ndev); - - return 0; -} - -static int xlr_net_stop(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - phy_stop(phydev); - netif_tx_stop_all_queues(ndev); - return 0; -} - -static void xlr_make_tx_desc(struct nlm_fmn_msg *msg, unsigned long addr, - struct sk_buff *skb) -{ - unsigned long physkb = virt_to_phys(skb); - int cpu_core = nlm_core_id(); - int fr_stn_id = cpu_core * 8 + XLR_FB_STN; /* FB to 6th bucket */ - - msg->msg0 = (((u64)1 << 63) | /* End of packet descriptor */ - ((u64)127 << 54) | /* No Free back */ - (u64)skb->len << 40 | /* Length of data */ - ((u64)addr)); - msg->msg1 = (((u64)1 << 63) | - ((u64)fr_stn_id << 54) | /* Free back id */ - (u64)0 << 40 | /* Set len to 0 */ - ((u64)physkb & 0xffffffff)); /* 32bit address */ - msg->msg2 = 0; - msg->msg3 = 0; -} - -static netdev_tx_t xlr_net_start_xmit(struct sk_buff *skb, - struct net_device *ndev) -{ - struct nlm_fmn_msg msg; - struct xlr_net_priv *priv = netdev_priv(ndev); - int ret; - u32 flags; - - xlr_make_tx_desc(&msg, virt_to_phys(skb->data), skb); - flags = nlm_cop2_enable_irqsave(); - ret = nlm_fmn_send(2, 0, priv->tx_stnid, &msg); - nlm_cop2_disable_irqrestore(flags); - if (ret) - dev_kfree_skb_any(skb); - return NETDEV_TX_OK; -} - -static void xlr_hw_set_mac_addr(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - - /* set mac station address */ - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0, - ((ndev->dev_addr[5] << 24) | (ndev->dev_addr[4] << 16) | - (ndev->dev_addr[3] << 8) | (ndev->dev_addr[2]))); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0 + 1, - ((ndev->dev_addr[1] << 24) | (ndev->dev_addr[0] << 16))); - - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2 + 1, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK3, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK3 + 1, 0xffffffff); - - xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG, - (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID)); - - if (priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII || - priv->nd->phy_interface == PHY_INTERFACE_MODE_SGMII) - xlr_reg_update(priv->base_addr, R_IPG_IFG, MAC_B2B_IPG, 0x7f); -} - -static int xlr_net_set_mac_addr(struct net_device *ndev, void *data) -{ - int err; - - err = eth_mac_addr(ndev, data); - if (err) - return err; - xlr_hw_set_mac_addr(ndev); - return 0; -} - -static void xlr_set_rx_mode(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - u32 regval; - - regval = xlr_nae_rdreg(priv->base_addr, R_MAC_FILTER_CONFIG); - - if (ndev->flags & IFF_PROMISC) { - regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN); - } else { - regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN)); - } - - xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG, regval); -} - -static void xlr_stats(struct net_device *ndev, struct rtnl_link_stats64 *stats) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - - stats->rx_packets = xlr_nae_rdreg(priv->base_addr, RX_PACKET_COUNTER); - stats->tx_packets = xlr_nae_rdreg(priv->base_addr, TX_PACKET_COUNTER); - stats->rx_bytes = xlr_nae_rdreg(priv->base_addr, RX_BYTE_COUNTER); - stats->tx_bytes = xlr_nae_rdreg(priv->base_addr, TX_BYTE_COUNTER); - stats->tx_errors = xlr_nae_rdreg(priv->base_addr, TX_FCS_ERROR_COUNTER); - stats->rx_dropped = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->tx_dropped = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); - - stats->multicast = xlr_nae_rdreg(priv->base_addr, - RX_MULTICAST_PACKET_COUNTER); - stats->collisions = xlr_nae_rdreg(priv->base_addr, - TX_TOTAL_COLLISION_COUNTER); - - stats->rx_length_errors = xlr_nae_rdreg(priv->base_addr, - RX_FRAME_LENGTH_ERROR_COUNTER); - stats->rx_over_errors = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->rx_crc_errors = xlr_nae_rdreg(priv->base_addr, - RX_FCS_ERROR_COUNTER); - stats->rx_frame_errors = xlr_nae_rdreg(priv->base_addr, - RX_ALIGNMENT_ERROR_COUNTER); - - stats->rx_fifo_errors = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->rx_missed_errors = xlr_nae_rdreg(priv->base_addr, - RX_CARRIER_SENSE_ERROR_COUNTER); - - stats->rx_errors = (stats->rx_over_errors + stats->rx_crc_errors + - stats->rx_frame_errors + stats->rx_fifo_errors + - stats->rx_missed_errors); - - stats->tx_aborted_errors = xlr_nae_rdreg(priv->base_addr, - TX_EXCESSIVE_COLLISION_PACKET_COUNTER); - stats->tx_carrier_errors = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); - stats->tx_fifo_errors = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); -} - -static const struct net_device_ops xlr_netdev_ops = { - .ndo_open = xlr_net_open, - .ndo_stop = xlr_net_stop, - .ndo_start_xmit = xlr_net_start_xmit, - .ndo_select_queue = dev_pick_tx_cpu_id, - .ndo_set_mac_address = xlr_net_set_mac_addr, - .ndo_set_rx_mode = xlr_set_rx_mode, - .ndo_get_stats64 = xlr_stats, -}; - -/* - * Gmac init - */ -static void *xlr_config_spill(struct xlr_net_priv *priv, int reg_start_0, - int reg_start_1, int reg_size, int size) -{ - void *spill; - u32 *base; - unsigned long phys_addr; - u32 spill_size; - - base = priv->base_addr; - spill_size = size; - spill = kmalloc(spill_size + SMP_CACHE_BYTES, GFP_KERNEL); - if (!spill) - return ZERO_SIZE_PTR; - - spill = PTR_ALIGN(spill, SMP_CACHE_BYTES); - phys_addr = virt_to_phys(spill); - dev_dbg(&priv->ndev->dev, "Allocated spill %d bytes at %lx\n", - size, phys_addr); - xlr_nae_wreg(base, reg_start_0, (phys_addr >> 5) & 0xffffffff); - xlr_nae_wreg(base, reg_start_1, ((u64)phys_addr >> 37) & 0x07); - xlr_nae_wreg(base, reg_size, spill_size); - - return spill; -} - -/* - * Configure the 6 FIFO's that are used by the network accelarator to - * communicate with the rest of the XLx device. 4 of the FIFO's are for - * packets from NA --> cpu (called Class FIFO's) and 2 are for feeding - * the NA with free descriptors. - */ -static void xlr_config_fifo_spill_area(struct xlr_net_priv *priv) -{ - priv->frin_spill = xlr_config_spill(priv, - R_REG_FRIN_SPILL_MEM_START_0, - R_REG_FRIN_SPILL_MEM_START_1, - R_REG_FRIN_SPILL_MEM_SIZE, - MAX_FRIN_SPILL * sizeof(u64)); - priv->frout_spill = xlr_config_spill(priv, - R_FROUT_SPILL_MEM_START_0, - R_FROUT_SPILL_MEM_START_1, - R_FROUT_SPILL_MEM_SIZE, - MAX_FROUT_SPILL * sizeof(u64)); - priv->class_0_spill = xlr_config_spill(priv, - R_CLASS0_SPILL_MEM_START_0, - R_CLASS0_SPILL_MEM_START_1, - R_CLASS0_SPILL_MEM_SIZE, - MAX_CLASS_0_SPILL * sizeof(u64)); - priv->class_1_spill = xlr_config_spill(priv, - R_CLASS1_SPILL_MEM_START_0, - R_CLASS1_SPILL_MEM_START_1, - R_CLASS1_SPILL_MEM_SIZE, - MAX_CLASS_1_SPILL * sizeof(u64)); - priv->class_2_spill = xlr_config_spill(priv, - R_CLASS2_SPILL_MEM_START_0, - R_CLASS2_SPILL_MEM_START_1, - R_CLASS2_SPILL_MEM_SIZE, - MAX_CLASS_2_SPILL * sizeof(u64)); - priv->class_3_spill = xlr_config_spill(priv, - R_CLASS3_SPILL_MEM_START_0, - R_CLASS3_SPILL_MEM_START_1, - R_CLASS3_SPILL_MEM_SIZE, - MAX_CLASS_3_SPILL * sizeof(u64)); -} - -/* - * Configure PDE to Round-Robin distribution of packets to the - * available cpu - */ -static void xlr_config_pde(struct xlr_net_priv *priv) -{ - int i = 0; - u64 bkt_map = 0; - - /* Each core has 8 buckets(station) */ - for (i = 0; i < hweight32(priv->nd->cpu_mask); i++) - bkt_map |= (0xff << (i * 8)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3 + 1, - ((bkt_map >> 32) & 0xffffffff)); -} - -/* - * Setup the Message ring credits, bucket size and other - * common configuration - */ -static int xlr_config_common(struct xlr_net_priv *priv) -{ - struct xlr_fmn_info *gmac = priv->nd->gmac_fmn_info; - int start_stn_id = gmac->start_stn_id; - int end_stn_id = gmac->end_stn_id; - int *bucket_size = priv->nd->bucket_size; - int i, j, err; - - /* Setting non-core MsgBktSize(0x321 - 0x325) */ - for (i = start_stn_id; i <= end_stn_id; i++) { - xlr_nae_wreg(priv->base_addr, - R_GMAC_RFR0_BUCKET_SIZE + i - start_stn_id, - bucket_size[i]); - } - - /* - * Setting non-core Credit counter register - * Distributing Gmac's credit to CPU's - */ - for (i = 0; i < 8; i++) { - for (j = 0; j < 8; j++) - xlr_nae_wreg(priv->base_addr, - (R_CC_CPU0_0 + (i * 8)) + j, - gmac->credit_config[(i * 8) + j]); - } - - xlr_nae_wreg(priv->base_addr, R_MSG_TX_THRESHOLD, 3); - xlr_nae_wreg(priv->base_addr, R_DMACR0, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR1, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR2, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR3, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_FREEQCARVE, 0); - - err = xlr_net_fill_rx_ring(priv->ndev); - if (err) - return err; - nlm_register_fmn_handler(start_stn_id, end_stn_id, xlr_net_fmn_handler, - priv->adapter); - return 0; -} - -static void xlr_config_translate_table(struct xlr_net_priv *priv) -{ - u32 cpu_mask; - u32 val; - int bkts[32]; /* one bucket is assumed for each cpu */ - int b1, b2, c1, c2, i, j, k; - int use_bkt; - - use_bkt = 0; - cpu_mask = priv->nd->cpu_mask; - - pr_info("Using %s-based distribution\n", - (use_bkt) ? "bucket" : "class"); - j = 0; - for (i = 0; i < 32; i++) { - if ((1 << i) & cpu_mask) { - /* for each cpu, mark the 4+threadid bucket */ - bkts[j] = ((i / 4) * 8) + (i % 4); - j++; - } - } - - /*configure the 128 * 9 Translation table to send to available buckets*/ - k = 0; - c1 = 3; - c2 = 0; - for (i = 0; i < 64; i++) { - /* - * On use_bkt set the b0, b1 are used, else - * the 4 classes are used, here implemented - * a logic to distribute the packets to the - * buckets equally or based on the class - */ - c1 = (c1 + 1) & 3; - c2 = (c1 + 1) & 3; - b1 = bkts[k]; - k = (k + 1) % j; - b2 = bkts[k]; - k = (k + 1) % j; - - val = ((c1 << 23) | (b1 << 17) | (use_bkt << 16) | - (c2 << 7) | (b2 << 1) | (use_bkt << 0)); - dev_dbg(&priv->ndev->dev, "Table[%d] b1=%d b2=%d c1=%d c2=%d\n", - i, b1, b2, c1, c2); - xlr_nae_wreg(priv->base_addr, R_TRANSLATETABLE + i, val); - c1 = c2; - } -} - -static void xlr_config_parser(struct xlr_net_priv *priv) -{ - u32 val; - - /* Mark it as ETHERNET type */ - xlr_nae_wreg(priv->base_addr, R_L2TYPE_0, 0x01); - - /* Use 7bit CRChash for flow classification with 127 as CRC polynomial*/ - xlr_nae_wreg(priv->base_addr, R_PARSERCONFIGREG, - ((0x7f << 8) | (1 << 1))); - - /* configure the parser : L2 Type is configured in the bootloader */ - /* extract IP: src, dest protocol */ - xlr_nae_wreg(priv->base_addr, R_L3CTABLE, - (9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) | - (0x0800 << 0)); - xlr_nae_wreg(priv->base_addr, R_L3CTABLE + 1, - (9 << 25) | (1 << 21) | (12 << 14) | (4 << 10) | - (16 << 4) | 4); - - /* Configure to extract SRC port and Dest port for TCP and UDP pkts */ - xlr_nae_wreg(priv->base_addr, R_L4CTABLE, 6); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 2, 17); - val = ((0 << 21) | (2 << 17) | (2 << 11) | (2 << 7)); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 1, val); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 3, val); - - xlr_config_translate_table(priv); -} - -static int xlr_phy_write(u32 *base_addr, int phy_addr, int regnum, u16 val) -{ - unsigned long timeout, stoptime, checktime; - int timedout; - - /* 100ms timeout*/ - timeout = msecs_to_jiffies(100); - stoptime = jiffies + timeout; - timedout = 0; - - xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS, (phy_addr << 8) | regnum); - - /* Write the data which starts the write cycle */ - xlr_nae_wreg(base_addr, R_MII_MGMT_WRITE_DATA, (u32)val); - - /* poll for the read cycle to complete */ - while (!timedout) { - checktime = jiffies; - if (xlr_nae_rdreg(base_addr, R_MII_MGMT_INDICATORS) == 0) - break; - timedout = time_after(checktime, stoptime); - } - if (timedout) { - pr_info("Phy device write err: device busy"); - return -EBUSY; - } - - return 0; -} - -static int xlr_phy_read(u32 *base_addr, int phy_addr, int regnum) -{ - unsigned long timeout, stoptime, checktime; - int timedout; - - /* 100ms timeout*/ - timeout = msecs_to_jiffies(100); - stoptime = jiffies + timeout; - timedout = 0; - - /* setup the phy reg to be used */ - xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS, - (phy_addr << 8) | (regnum << 0)); - - /* Issue the read command */ - xlr_nae_wreg(base_addr, R_MII_MGMT_COMMAND, - (1 << O_MII_MGMT_COMMAND__rstat)); - - /* poll for the read cycle to complete */ - while (!timedout) { - checktime = jiffies; - if (xlr_nae_rdreg(base_addr, R_MII_MGMT_INDICATORS) == 0) - break; - timedout = time_after(checktime, stoptime); - } - if (timedout) { - pr_info("Phy device read err: device busy"); - return -EBUSY; - } - - /* clear the read cycle */ - xlr_nae_wreg(base_addr, R_MII_MGMT_COMMAND, 0); - - /* Read the data */ - return xlr_nae_rdreg(base_addr, R_MII_MGMT_STATUS); -} - -static int xlr_mii_write(struct mii_bus *bus, int phy_addr, int regnum, u16 val) -{ - struct xlr_net_priv *priv = bus->priv; - int ret; - - ret = xlr_phy_write(priv->mii_addr, phy_addr, regnum, val); - dev_dbg(&priv->ndev->dev, "mii_write phy %d : %d <- %x [%x]\n", - phy_addr, regnum, val, ret); - return ret; -} - -static int xlr_mii_read(struct mii_bus *bus, int phy_addr, int regnum) -{ - struct xlr_net_priv *priv = bus->priv; - int ret; - - ret = xlr_phy_read(priv->mii_addr, phy_addr, regnum); - dev_dbg(&priv->ndev->dev, "mii_read phy %d : %d [%x]\n", - phy_addr, regnum, ret); - return ret; -} - -/* - * XLR ports are RGMII. XLS ports are SGMII mostly except the port0, - * which can be configured either SGMII or RGMII, considered SGMII - * by default, if board setup to RGMII the port_type need to set - * accordingly.Serdes and PCS layer need to configured for SGMII - */ -static void xlr_sgmii_init(struct xlr_net_priv *priv) -{ - int phy; - - xlr_phy_write(priv->serdes_addr, 26, 0, 0x6DB0); - xlr_phy_write(priv->serdes_addr, 26, 1, 0xFFFF); - xlr_phy_write(priv->serdes_addr, 26, 2, 0xB6D0); - xlr_phy_write(priv->serdes_addr, 26, 3, 0x00FF); - xlr_phy_write(priv->serdes_addr, 26, 4, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 5, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 6, 0x0005); - xlr_phy_write(priv->serdes_addr, 26, 7, 0x0001); - xlr_phy_write(priv->serdes_addr, 26, 8, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 9, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 10, 0x0000); - - /* program GPIO values for serdes init parameters */ - xlr_nae_wreg(priv->gpio_addr, 0x20, 0x7e6802); - xlr_nae_wreg(priv->gpio_addr, 0x10, 0x7104); - - xlr_nae_wreg(priv->gpio_addr, 0x22, 0x7e6802); - xlr_nae_wreg(priv->gpio_addr, 0x21, 0x7104); - - /* enable autoneg - more magic */ - phy = priv->phy_addr % 4 + 27; - xlr_phy_write(priv->pcs_addr, phy, 0, 0x1000); - xlr_phy_write(priv->pcs_addr, phy, 0, 0x0200); -} - -void xlr_set_gmac_speed(struct xlr_net_priv *priv) -{ - struct phy_device *phydev = xlr_get_phydev(priv); - int speed; - - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) - xlr_sgmii_init(priv); - - if (phydev->speed != priv->phy_speed) { - speed = phydev->speed; - if (speed == SPEED_1000) { - /* Set interface to Byte mode */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7217); - priv->phy_speed = speed; - } else if (speed == SPEED_100 || speed == SPEED_10) { - /* Set interface to Nibble mode */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7117); - priv->phy_speed = speed; - } - /* Set SGMII speed in Interface control reg */ - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { - if (speed == SPEED_10) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_10); - if (speed == SPEED_100) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_100); - if (speed == SPEED_1000) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_1000); - } - if (speed == SPEED_10) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x2); - if (speed == SPEED_100) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x1); - if (speed == SPEED_1000) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x0); - } - pr_info("gmac%d : %dMbps\n", priv->port_id, priv->phy_speed); -} - -static void xlr_gmac_link_adjust(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - u32 intreg; - - intreg = xlr_nae_rdreg(priv->base_addr, R_INTREG); - if (phydev->link) { - if (phydev->speed != priv->phy_speed) { - xlr_set_gmac_speed(priv); - pr_info("gmac%d : Link up\n", priv->port_id); - } - } else { - xlr_set_gmac_speed(priv); - pr_info("gmac%d : Link down\n", priv->port_id); - } -} - -static int xlr_mii_probe(struct xlr_net_priv *priv) -{ - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) { - pr_err("no PHY found on phy_addr %d\n", priv->phy_addr); - return -ENODEV; - } - - /* Attach MAC to PHY */ - phydev = phy_connect(priv->ndev, phydev_name(phydev), - xlr_gmac_link_adjust, priv->nd->phy_interface); - - if (IS_ERR(phydev)) { - pr_err("could not attach PHY\n"); - return PTR_ERR(phydev); - } - phydev->supported &= (ADVERTISED_10baseT_Full - | ADVERTISED_10baseT_Half - | ADVERTISED_100baseT_Full - | ADVERTISED_100baseT_Half - | ADVERTISED_1000baseT_Full - | ADVERTISED_Autoneg - | ADVERTISED_MII); - - phydev->advertising = phydev->supported; - phy_attached_info(phydev); - return 0; -} - -static int xlr_setup_mdio(struct xlr_net_priv *priv, - struct platform_device *pdev) -{ - int err; - - priv->mii_bus = mdiobus_alloc(); - if (!priv->mii_bus) { - pr_err("mdiobus alloc failed\n"); - return -ENOMEM; - } - - priv->mii_bus->priv = priv; - priv->mii_bus->name = "xlr-mdio"; - snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d", - priv->mii_bus->name, priv->port_id); - priv->mii_bus->read = xlr_mii_read; - priv->mii_bus->write = xlr_mii_write; - priv->mii_bus->parent = &pdev->dev; - - /* Scan only the enabled address */ - priv->mii_bus->phy_mask = ~(1 << priv->phy_addr); - - /* setting clock divisor to 54 */ - xlr_nae_wreg(priv->base_addr, R_MII_MGMT_CONFIG, 0x7); - - err = mdiobus_register(priv->mii_bus); - if (err) { - mdiobus_free(priv->mii_bus); - pr_err("mdio bus registration failed\n"); - return err; - } - - pr_info("Registered mdio bus id : %s\n", priv->mii_bus->id); - err = xlr_mii_probe(priv); - if (err) { - mdiobus_free(priv->mii_bus); - return err; - } - return 0; -} - -static void xlr_port_enable(struct xlr_net_priv *priv) -{ - u32 prid = (read_c0_prid() & 0xf000); - - /* Setup MAC_CONFIG reg if (xls & rgmii) */ - if ((prid == 0x8000 || prid == 0x4000 || prid == 0xc000) && - priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII) - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - (1 << O_RX_CONTROL__RGMII), - (1 << O_RX_CONTROL__RGMII)); - - /* Rx Tx enable */ - xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1, - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc)), - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc))); - - /* Setup tx control reg */ - xlr_reg_update(priv->base_addr, R_TX_CONTROL, - ((1 << O_TX_CONTROL__TXENABLE) | - (512 << O_TX_CONTROL__TXTHRESHOLD)), 0x3fff); - - /* Setup rx control reg */ - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - 1 << O_RX_CONTROL__RXENABLE, - 1 << O_RX_CONTROL__RXENABLE); -} - -static void xlr_port_disable(struct xlr_net_priv *priv) -{ - /* Setup MAC_CONFIG reg */ - /* Rx Tx disable*/ - xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1, - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc)), 0x0); - - /* Setup tx control reg */ - xlr_reg_update(priv->base_addr, R_TX_CONTROL, - ((1 << O_TX_CONTROL__TXENABLE) | - (512 << O_TX_CONTROL__TXTHRESHOLD)), 0); - - /* Setup rx control reg */ - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - 1 << O_RX_CONTROL__RXENABLE, 0); -} - -/* - * Initialization of gmac - */ -static int xlr_gmac_init(struct xlr_net_priv *priv, - struct platform_device *pdev) -{ - int ret; - - pr_info("Initializing the gmac%d\n", priv->port_id); - - xlr_port_disable(priv); - - xlr_nae_wreg(priv->base_addr, R_DESC_PACK_CTRL, - (1 << O_DESC_PACK_CTRL__MAXENTRY) | - (BYTE_OFFSET << O_DESC_PACK_CTRL__BYTEOFFSET) | - (1600 << O_DESC_PACK_CTRL__REGULARSIZE)); - - ret = xlr_setup_mdio(priv, pdev); - if (ret) - return ret; - xlr_port_enable(priv); - - /* Enable Full-duplex/1000Mbps/CRC */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7217); - /* speed 2.5Mhz */ - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x02); - /* Setup Interrupt mask reg */ - xlr_nae_wreg(priv->base_addr, R_INTMASK, (1 << O_INTMASK__TXILLEGAL) | - (1 << O_INTMASK__MDINT) | (1 << O_INTMASK__TXFETCHERROR) | - (1 << O_INTMASK__P2PSPILLECC) | (1 << O_INTMASK__TAGFULL) | - (1 << O_INTMASK__UNDERRUN) | (1 << O_INTMASK__ABORT)); - - /* Clear all stats */ - xlr_reg_update(priv->base_addr, R_STATCTRL, 0, 1 << O_STATCTRL__CLRCNT); - xlr_reg_update(priv->base_addr, R_STATCTRL, 1 << 2, 1 << 2); - return 0; -} - -static int xlr_net_probe(struct platform_device *pdev) -{ - struct xlr_net_priv *priv = NULL; - struct net_device *ndev; - struct resource *res; - struct xlr_adapter *adapter; - int err, port; - - pr_info("XLR/XLS Ethernet Driver controller %d\n", pdev->id); - /* - * Allocate our adapter data structure and attach it to the device. - */ - adapter = devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL); - if (!adapter) - return -ENOMEM; - - /* - * XLR and XLS have 1 and 2 NAE controller respectively - * Each controller has 4 gmac ports, mapping each controller - * under one parent device, 4 gmac ports under one device. - */ - for (port = 0; port < pdev->num_resources / 2; port++) { - ndev = alloc_etherdev_mq(sizeof(struct xlr_net_priv), 32); - if (!ndev) { - dev_err(&pdev->dev, - "Allocation of Ethernet device failed\n"); - return -ENOMEM; - } - - priv = netdev_priv(ndev); - priv->pdev = pdev; - priv->ndev = ndev; - priv->port_id = (pdev->id * 4) + port; - priv->nd = (struct xlr_net_data *)pdev->dev.platform_data; - priv->base_addr = devm_platform_ioremap_resource(pdev, port); - if (IS_ERR(priv->base_addr)) { - err = PTR_ERR(priv->base_addr); - goto err_gmac; - } - priv->adapter = adapter; - adapter->netdev[port] = ndev; - - res = platform_get_resource(pdev, IORESOURCE_IRQ, port); - if (!res) { - dev_err(&pdev->dev, "No irq resource for MAC %d\n", - priv->port_id); - err = -ENODEV; - goto err_gmac; - } - - ndev->irq = res->start; - - priv->phy_addr = priv->nd->phy_addr[port]; - priv->tx_stnid = priv->nd->tx_stnid[port]; - priv->mii_addr = priv->nd->mii_addr; - priv->serdes_addr = priv->nd->serdes_addr; - priv->pcs_addr = priv->nd->pcs_addr; - priv->gpio_addr = priv->nd->gpio_addr; - - ndev->netdev_ops = &xlr_netdev_ops; - ndev->watchdog_timeo = HZ; - - /* Setup Mac address and Rx mode */ - eth_hw_addr_random(ndev); - xlr_hw_set_mac_addr(ndev); - xlr_set_rx_mode(ndev); - - priv->num_rx_desc += MAX_NUM_DESC_SPILL; - ndev->ethtool_ops = &xlr_ethtool_ops; - SET_NETDEV_DEV(ndev, &pdev->dev); - - xlr_config_fifo_spill_area(priv); - /* Configure PDE to Round-Robin pkt distribution */ - xlr_config_pde(priv); - xlr_config_parser(priv); - - /* Call init with respect to port */ - if (strcmp(res->name, "gmac") == 0) { - err = xlr_gmac_init(priv, pdev); - if (err) { - dev_err(&pdev->dev, "gmac%d init failed\n", - priv->port_id); - goto err_gmac; - } - } - - if (priv->port_id == 0 || priv->port_id == 4) { - err = xlr_config_common(priv); - if (err) - goto err_netdev; - } - - err = register_netdev(ndev); - if (err) { - dev_err(&pdev->dev, - "Registering netdev failed for gmac%d\n", - priv->port_id); - goto err_netdev; - } - platform_set_drvdata(pdev, priv); - } - - return 0; - -err_netdev: - mdiobus_free(priv->mii_bus); -err_gmac: - free_netdev(ndev); - return err; -} - -static int xlr_net_remove(struct platform_device *pdev) -{ - struct xlr_net_priv *priv = platform_get_drvdata(pdev); - - unregister_netdev(priv->ndev); - mdiobus_unregister(priv->mii_bus); - mdiobus_free(priv->mii_bus); - free_netdev(priv->ndev); - return 0; -} - -static struct platform_driver xlr_net_driver = { - .probe = xlr_net_probe, - .remove = xlr_net_remove, - .driver = { - .name = "xlr-net", - }, -}; - -module_platform_driver(xlr_net_driver); - -MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@broadcom.com>"); -MODULE_DESCRIPTION("Ethernet driver for Netlogic XLR/XLS"); -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_ALIAS("platform:xlr-net"); diff --git a/drivers/staging/netlogic/xlr_net.h b/drivers/staging/netlogic/xlr_net.h deleted file mode 100644 index 8365b744f9b3..000000000000 --- a/drivers/staging/netlogic/xlr_net.h +++ /dev/null @@ -1,1079 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -/* #define MAC_SPLIT_MODE */ - -#define MAC_SPACING 0x400 -#define XGMAC_SPACING 0x400 - -/* PE-MCXMAC register and bit field definitions */ -#define R_MAC_CONFIG_1 0x00 -#define O_MAC_CONFIG_1__srst 31 -#define O_MAC_CONFIG_1__simr 30 -#define O_MAC_CONFIG_1__hrrmc 18 -#define W_MAC_CONFIG_1__hrtmc 2 -#define O_MAC_CONFIG_1__hrrfn 16 -#define W_MAC_CONFIG_1__hrtfn 2 -#define O_MAC_CONFIG_1__intlb 8 -#define O_MAC_CONFIG_1__rxfc 5 -#define O_MAC_CONFIG_1__txfc 4 -#define O_MAC_CONFIG_1__srxen 3 -#define O_MAC_CONFIG_1__rxen 2 -#define O_MAC_CONFIG_1__stxen 1 -#define O_MAC_CONFIG_1__txen 0 -#define R_MAC_CONFIG_2 0x01 -#define O_MAC_CONFIG_2__prlen 12 -#define W_MAC_CONFIG_2__prlen 4 -#define O_MAC_CONFIG_2__speed 8 -#define W_MAC_CONFIG_2__speed 2 -#define O_MAC_CONFIG_2__hugen 5 -#define O_MAC_CONFIG_2__flchk 4 -#define O_MAC_CONFIG_2__crce 1 -#define O_MAC_CONFIG_2__fulld 0 -#define R_IPG_IFG 0x02 -#define O_IPG_IFG__ipgr1 24 -#define W_IPG_IFG__ipgr1 7 -#define O_IPG_IFG__ipgr2 16 -#define W_IPG_IFG__ipgr2 7 -#define O_IPG_IFG__mifg 8 -#define W_IPG_IFG__mifg 8 -#define O_IPG_IFG__ipgt 0 -#define W_IPG_IFG__ipgt 7 -#define R_HALF_DUPLEX 0x03 -#define O_HALF_DUPLEX__abebt 24 -#define W_HALF_DUPLEX__abebt 4 -#define O_HALF_DUPLEX__abebe 19 -#define O_HALF_DUPLEX__bpnb 18 -#define O_HALF_DUPLEX__nobo 17 -#define O_HALF_DUPLEX__edxsdfr 16 -#define O_HALF_DUPLEX__retry 12 -#define W_HALF_DUPLEX__retry 4 -#define O_HALF_DUPLEX__lcol 0 -#define W_HALF_DUPLEX__lcol 10 -#define R_MAXIMUM_FRAME_LENGTH 0x04 -#define O_MAXIMUM_FRAME_LENGTH__maxf 0 -#define W_MAXIMUM_FRAME_LENGTH__maxf 16 -#define R_TEST 0x07 -#define O_TEST__mbof 3 -#define O_TEST__rthdf 2 -#define O_TEST__tpause 1 -#define O_TEST__sstct 0 -#define R_MII_MGMT_CONFIG 0x08 -#define O_MII_MGMT_CONFIG__scinc 5 -#define O_MII_MGMT_CONFIG__spre 4 -#define O_MII_MGMT_CONFIG__clks 3 -#define W_MII_MGMT_CONFIG__clks 3 -#define R_MII_MGMT_COMMAND 0x09 -#define O_MII_MGMT_COMMAND__scan 1 -#define O_MII_MGMT_COMMAND__rstat 0 -#define R_MII_MGMT_ADDRESS 0x0A -#define O_MII_MGMT_ADDRESS__fiad 8 -#define W_MII_MGMT_ADDRESS__fiad 5 -#define O_MII_MGMT_ADDRESS__fgad 5 -#define W_MII_MGMT_ADDRESS__fgad 0 -#define R_MII_MGMT_WRITE_DATA 0x0B -#define O_MII_MGMT_WRITE_DATA__ctld 0 -#define W_MII_MGMT_WRITE_DATA__ctld 16 -#define R_MII_MGMT_STATUS 0x0C -#define R_MII_MGMT_INDICATORS 0x0D -#define O_MII_MGMT_INDICATORS__nvalid 2 -#define O_MII_MGMT_INDICATORS__scan 1 -#define O_MII_MGMT_INDICATORS__busy 0 -#define R_INTERFACE_CONTROL 0x0E -#define O_INTERFACE_CONTROL__hrstint 31 -#define O_INTERFACE_CONTROL__tbimode 27 -#define O_INTERFACE_CONTROL__ghdmode 26 -#define O_INTERFACE_CONTROL__lhdmode 25 -#define O_INTERFACE_CONTROL__phymod 24 -#define O_INTERFACE_CONTROL__hrrmi 23 -#define O_INTERFACE_CONTROL__rspd 16 -#define O_INTERFACE_CONTROL__hr100 15 -#define O_INTERFACE_CONTROL__frcq 10 -#define O_INTERFACE_CONTROL__nocfr 9 -#define O_INTERFACE_CONTROL__dlfct 8 -#define O_INTERFACE_CONTROL__enjab 0 -#define R_INTERFACE_STATUS 0x0F -#define O_INTERFACE_STATUS__xsdfr 9 -#define O_INTERFACE_STATUS__ssrr 8 -#define W_INTERFACE_STATUS__ssrr 5 -#define O_INTERFACE_STATUS__miilf 3 -#define O_INTERFACE_STATUS__locar 2 -#define O_INTERFACE_STATUS__sqerr 1 -#define O_INTERFACE_STATUS__jabber 0 -#define R_STATION_ADDRESS_LS 0x10 -#define R_STATION_ADDRESS_MS 0x11 - -/* A-XGMAC register and bit field definitions */ -#define R_XGMAC_CONFIG_0 0x00 -#define O_XGMAC_CONFIG_0__hstmacrst 31 -#define O_XGMAC_CONFIG_0__hstrstrctl 23 -#define O_XGMAC_CONFIG_0__hstrstrfn 22 -#define O_XGMAC_CONFIG_0__hstrsttctl 18 -#define O_XGMAC_CONFIG_0__hstrsttfn 17 -#define O_XGMAC_CONFIG_0__hstrstmiim 16 -#define O_XGMAC_CONFIG_0__hstloopback 8 -#define R_XGMAC_CONFIG_1 0x01 -#define O_XGMAC_CONFIG_1__hsttctlen 31 -#define O_XGMAC_CONFIG_1__hsttfen 30 -#define O_XGMAC_CONFIG_1__hstrctlen 29 -#define O_XGMAC_CONFIG_1__hstrfen 28 -#define O_XGMAC_CONFIG_1__tfen 26 -#define O_XGMAC_CONFIG_1__rfen 24 -#define O_XGMAC_CONFIG_1__hstrctlshrtp 12 -#define O_XGMAC_CONFIG_1__hstdlyfcstx 10 -#define W_XGMAC_CONFIG_1__hstdlyfcstx 2 -#define O_XGMAC_CONFIG_1__hstdlyfcsrx 8 -#define W_XGMAC_CONFIG_1__hstdlyfcsrx 2 -#define O_XGMAC_CONFIG_1__hstppen 7 -#define O_XGMAC_CONFIG_1__hstbytswp 6 -#define O_XGMAC_CONFIG_1__hstdrplt64 5 -#define O_XGMAC_CONFIG_1__hstprmscrx 4 -#define O_XGMAC_CONFIG_1__hstlenchk 3 -#define O_XGMAC_CONFIG_1__hstgenfcs 2 -#define O_XGMAC_CONFIG_1__hstpadmode 0 -#define W_XGMAC_CONFIG_1__hstpadmode 2 -#define R_XGMAC_CONFIG_2 0x02 -#define O_XGMAC_CONFIG_2__hsttctlfrcp 31 -#define O_XGMAC_CONFIG_2__hstmlnkflth 27 -#define O_XGMAC_CONFIG_2__hstalnkflth 26 -#define O_XGMAC_CONFIG_2__rflnkflt 24 -#define W_XGMAC_CONFIG_2__rflnkflt 2 -#define O_XGMAC_CONFIG_2__hstipgextmod 16 -#define W_XGMAC_CONFIG_2__hstipgextmod 5 -#define O_XGMAC_CONFIG_2__hstrctlfrcp 15 -#define O_XGMAC_CONFIG_2__hstipgexten 5 -#define O_XGMAC_CONFIG_2__hstmipgext 0 -#define W_XGMAC_CONFIG_2__hstmipgext 5 -#define R_XGMAC_CONFIG_3 0x03 -#define O_XGMAC_CONFIG_3__hstfltrfrm 31 -#define W_XGMAC_CONFIG_3__hstfltrfrm 16 -#define O_XGMAC_CONFIG_3__hstfltrfrmdc 15 -#define W_XGMAC_CONFIG_3__hstfltrfrmdc 16 -#define R_XGMAC_STATION_ADDRESS_LS 0x04 -#define O_XGMAC_STATION_ADDRESS_LS__hstmacadr0 0 -#define W_XGMAC_STATION_ADDRESS_LS__hstmacadr0 32 -#define R_XGMAC_STATION_ADDRESS_MS 0x05 -#define R_XGMAC_MAX_FRAME_LEN 0x08 -#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 16 -#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 14 -#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 0 -#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 16 -#define R_XGMAC_REV_LEVEL 0x0B -#define O_XGMAC_REV_LEVEL__revlvl 0 -#define W_XGMAC_REV_LEVEL__revlvl 15 -#define R_XGMAC_MIIM_COMMAND 0x10 -#define O_XGMAC_MIIM_COMMAND__hstldcmd 3 -#define O_XGMAC_MIIM_COMMAND__hstmiimcmd 0 -#define W_XGMAC_MIIM_COMMAND__hstmiimcmd 3 -#define R_XGMAC_MIIM_FILED 0x11 -#define O_XGMAC_MIIM_FILED__hststfield 30 -#define W_XGMAC_MIIM_FILED__hststfield 2 -#define O_XGMAC_MIIM_FILED__hstopfield 28 -#define W_XGMAC_MIIM_FILED__hstopfield 2 -#define O_XGMAC_MIIM_FILED__hstphyadx 23 -#define W_XGMAC_MIIM_FILED__hstphyadx 5 -#define O_XGMAC_MIIM_FILED__hstregadx 18 -#define W_XGMAC_MIIM_FILED__hstregadx 5 -#define O_XGMAC_MIIM_FILED__hsttafield 16 -#define W_XGMAC_MIIM_FILED__hsttafield 2 -#define O_XGMAC_MIIM_FILED__miimrddat 0 -#define W_XGMAC_MIIM_FILED__miimrddat 16 -#define R_XGMAC_MIIM_CONFIG 0x12 -#define O_XGMAC_MIIM_CONFIG__hstnopram 7 -#define O_XGMAC_MIIM_CONFIG__hstclkdiv 0 -#define W_XGMAC_MIIM_CONFIG__hstclkdiv 7 -#define R_XGMAC_MIIM_LINK_FAIL_VECTOR 0x13 -#define O_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 0 -#define W_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 32 -#define R_XGMAC_MIIM_INDICATOR 0x14 -#define O_XGMAC_MIIM_INDICATOR__miimphylf 4 -#define O_XGMAC_MIIM_INDICATOR__miimmoncplt 3 -#define O_XGMAC_MIIM_INDICATOR__miimmonvld 2 -#define O_XGMAC_MIIM_INDICATOR__miimmon 1 -#define O_XGMAC_MIIM_INDICATOR__miimbusy 0 - -/* GMAC stats registers */ -#define R_RBYT 0x27 -#define R_RPKT 0x28 -#define R_RFCS 0x29 -#define R_RMCA 0x2A -#define R_RBCA 0x2B -#define R_RXCF 0x2C -#define R_RXPF 0x2D -#define R_RXUO 0x2E -#define R_RALN 0x2F -#define R_RFLR 0x30 -#define R_RCDE 0x31 -#define R_RCSE 0x32 -#define R_RUND 0x33 -#define R_ROVR 0x34 -#define R_TBYT 0x38 -#define R_TPKT 0x39 -#define R_TMCA 0x3A -#define R_TBCA 0x3B -#define R_TXPF 0x3C -#define R_TDFR 0x3D -#define R_TEDF 0x3E -#define R_TSCL 0x3F -#define R_TMCL 0x40 -#define R_TLCL 0x41 -#define R_TXCL 0x42 -#define R_TNCL 0x43 -#define R_TJBR 0x46 -#define R_TFCS 0x47 -#define R_TXCF 0x48 -#define R_TOVR 0x49 -#define R_TUND 0x4A -#define R_TFRG 0x4B - -/* Glue logic register and bit field definitions */ -#define R_MAC_ADDR0 0x50 -#define R_MAC_ADDR1 0x52 -#define R_MAC_ADDR2 0x54 -#define R_MAC_ADDR3 0x56 -#define R_MAC_ADDR_MASK2 0x58 -#define R_MAC_ADDR_MASK3 0x5A -#define R_MAC_FILTER_CONFIG 0x5C -#define O_MAC_FILTER_CONFIG__BROADCAST_EN 10 -#define O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN 9 -#define O_MAC_FILTER_CONFIG__ALL_MCAST_EN 8 -#define O_MAC_FILTER_CONFIG__ALL_UCAST_EN 7 -#define O_MAC_FILTER_CONFIG__HASH_MCAST_EN 6 -#define O_MAC_FILTER_CONFIG__HASH_UCAST_EN 5 -#define O_MAC_FILTER_CONFIG__ADDR_MATCH_DISC 4 -#define O_MAC_FILTER_CONFIG__MAC_ADDR3_VALID 3 -#define O_MAC_FILTER_CONFIG__MAC_ADDR2_VALID 2 -#define O_MAC_FILTER_CONFIG__MAC_ADDR1_VALID 1 -#define O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID 0 -#define R_HASH_TABLE_VECTOR 0x30 -#define R_TX_CONTROL 0x0A0 -#define O_TX_CONTROL__TX15HALT 31 -#define O_TX_CONTROL__TX14HALT 30 -#define O_TX_CONTROL__TX13HALT 29 -#define O_TX_CONTROL__TX12HALT 28 -#define O_TX_CONTROL__TX11HALT 27 -#define O_TX_CONTROL__TX10HALT 26 -#define O_TX_CONTROL__TX9HALT 25 -#define O_TX_CONTROL__TX8HALT 24 -#define O_TX_CONTROL__TX7HALT 23 -#define O_TX_CONTROL__TX6HALT 22 -#define O_TX_CONTROL__TX5HALT 21 -#define O_TX_CONTROL__TX4HALT 20 -#define O_TX_CONTROL__TX3HALT 19 -#define O_TX_CONTROL__TX2HALT 18 -#define O_TX_CONTROL__TX1HALT 17 -#define O_TX_CONTROL__TX0HALT 16 -#define O_TX_CONTROL__TXIDLE 15 -#define O_TX_CONTROL__TXENABLE 14 -#define O_TX_CONTROL__TXTHRESHOLD 0 -#define W_TX_CONTROL__TXTHRESHOLD 14 -#define R_RX_CONTROL 0x0A1 -#define O_RX_CONTROL__RGMII 10 -#define O_RX_CONTROL__SOFTRESET 2 -#define O_RX_CONTROL__RXHALT 1 -#define O_RX_CONTROL__RXENABLE 0 -#define R_DESC_PACK_CTRL 0x0A2 -#define O_DESC_PACK_CTRL__BYTEOFFSET 17 -#define W_DESC_PACK_CTRL__BYTEOFFSET 3 -#define O_DESC_PACK_CTRL__PREPADENABLE 16 -#define O_DESC_PACK_CTRL__MAXENTRY 14 -#define W_DESC_PACK_CTRL__MAXENTRY 2 -#define O_DESC_PACK_CTRL__REGULARSIZE 0 -#define W_DESC_PACK_CTRL__REGULARSIZE 14 -#define R_STATCTRL 0x0A3 -#define O_STATCTRL__OVERFLOWEN 4 -#define O_STATCTRL__GIG 3 -#define O_STATCTRL__STEN 2 -#define O_STATCTRL__CLRCNT 1 -#define O_STATCTRL__AUTOZ 0 -#define R_L2ALLOCCTRL 0x0A4 -#define O_L2ALLOCCTRL__TXL2ALLOCATE 9 -#define W_L2ALLOCCTRL__TXL2ALLOCATE 9 -#define O_L2ALLOCCTRL__RXL2ALLOCATE 0 -#define W_L2ALLOCCTRL__RXL2ALLOCATE 9 -#define R_INTMASK 0x0A5 -#define O_INTMASK__SPI4TXERROR 28 -#define O_INTMASK__SPI4RXERROR 27 -#define O_INTMASK__RGMIIHALFDUPCOLLISION 27 -#define O_INTMASK__ABORT 26 -#define O_INTMASK__UNDERRUN 25 -#define O_INTMASK__DISCARDPACKET 24 -#define O_INTMASK__ASYNCFIFOFULL 23 -#define O_INTMASK__TAGFULL 22 -#define O_INTMASK__CLASS3FULL 21 -#define O_INTMASK__C3EARLYFULL 20 -#define O_INTMASK__CLASS2FULL 19 -#define O_INTMASK__C2EARLYFULL 18 -#define O_INTMASK__CLASS1FULL 17 -#define O_INTMASK__C1EARLYFULL 16 -#define O_INTMASK__CLASS0FULL 15 -#define O_INTMASK__C0EARLYFULL 14 -#define O_INTMASK__RXDATAFULL 13 -#define O_INTMASK__RXEARLYFULL 12 -#define O_INTMASK__RFREEEMPTY 9 -#define O_INTMASK__RFEARLYEMPTY 8 -#define O_INTMASK__P2PSPILLECC 7 -#define O_INTMASK__FREEDESCFULL 5 -#define O_INTMASK__FREEEARLYFULL 4 -#define O_INTMASK__TXFETCHERROR 3 -#define O_INTMASK__STATCARRY 2 -#define O_INTMASK__MDINT 1 -#define O_INTMASK__TXILLEGAL 0 -#define R_INTREG 0x0A6 -#define O_INTREG__SPI4TXERROR 28 -#define O_INTREG__SPI4RXERROR 27 -#define O_INTREG__RGMIIHALFDUPCOLLISION 27 -#define O_INTREG__ABORT 26 -#define O_INTREG__UNDERRUN 25 -#define O_INTREG__DISCARDPACKET 24 -#define O_INTREG__ASYNCFIFOFULL 23 -#define O_INTREG__TAGFULL 22 -#define O_INTREG__CLASS3FULL 21 -#define O_INTREG__C3EARLYFULL 20 -#define O_INTREG__CLASS2FULL 19 -#define O_INTREG__C2EARLYFULL 18 -#define O_INTREG__CLASS1FULL 17 -#define O_INTREG__C1EARLYFULL 16 -#define O_INTREG__CLASS0FULL 15 -#define O_INTREG__C0EARLYFULL 14 -#define O_INTREG__RXDATAFULL 13 -#define O_INTREG__RXEARLYFULL 12 -#define O_INTREG__RFREEEMPTY 9 -#define O_INTREG__RFEARLYEMPTY 8 -#define O_INTREG__P2PSPILLECC 7 -#define O_INTREG__FREEDESCFULL 5 -#define O_INTREG__FREEEARLYFULL 4 -#define O_INTREG__TXFETCHERROR 3 -#define O_INTREG__STATCARRY 2 -#define O_INTREG__MDINT 1 -#define O_INTREG__TXILLEGAL 0 -#define R_TXRETRY 0x0A7 -#define O_TXRETRY__COLLISIONRETRY 6 -#define O_TXRETRY__BUSERRORRETRY 5 -#define O_TXRETRY__UNDERRUNRETRY 4 -#define O_TXRETRY__RETRIES 0 -#define W_TXRETRY__RETRIES 4 -#define R_CORECONTROL 0x0A8 -#define O_CORECONTROL__ERRORTHREAD 4 -#define W_CORECONTROL__ERRORTHREAD 7 -#define O_CORECONTROL__SHUTDOWN 2 -#define O_CORECONTROL__SPEED 0 -#define W_CORECONTROL__SPEED 2 -#define R_BYTEOFFSET0 0x0A9 -#define R_BYTEOFFSET1 0x0AA -#define R_L2TYPE_0 0x0F0 -#define O_L2TYPE__EXTRAHDRPROTOSIZE 26 -#define W_L2TYPE__EXTRAHDRPROTOSIZE 5 -#define O_L2TYPE__EXTRAHDRPROTOOFFSET 20 -#define W_L2TYPE__EXTRAHDRPROTOOFFSET 6 -#define O_L2TYPE__EXTRAHEADERSIZE 14 -#define W_L2TYPE__EXTRAHEADERSIZE 6 -#define O_L2TYPE__PROTOOFFSET 8 -#define W_L2TYPE__PROTOOFFSET 6 -#define O_L2TYPE__L2HDROFFSET 2 -#define W_L2TYPE__L2HDROFFSET 6 -#define O_L2TYPE__L2PROTO 0 -#define W_L2TYPE__L2PROTO 2 -#define R_L2TYPE_1 0xF0 -#define R_L2TYPE_2 0xF0 -#define R_L2TYPE_3 0xF0 -#define R_PARSERCONFIGREG 0x100 -#define O_PARSERCONFIGREG__CRCHASHPOLY 8 -#define W_PARSERCONFIGREG__CRCHASHPOLY 7 -#define O_PARSERCONFIGREG__PREPADOFFSET 4 -#define W_PARSERCONFIGREG__PREPADOFFSET 4 -#define O_PARSERCONFIGREG__USECAM 2 -#define O_PARSERCONFIGREG__USEHASH 1 -#define O_PARSERCONFIGREG__USEPROTO 0 -#define R_L3CTABLE 0x140 -#define O_L3CTABLE__OFFSET0 25 -#define W_L3CTABLE__OFFSET0 7 -#define O_L3CTABLE__LEN0 21 -#define W_L3CTABLE__LEN0 4 -#define O_L3CTABLE__OFFSET1 14 -#define W_L3CTABLE__OFFSET1 7 -#define O_L3CTABLE__LEN1 10 -#define W_L3CTABLE__LEN1 4 -#define O_L3CTABLE__OFFSET2 4 -#define W_L3CTABLE__OFFSET2 6 -#define O_L3CTABLE__LEN2 0 -#define W_L3CTABLE__LEN2 4 -#define O_L3CTABLE__L3HDROFFSET 26 -#define W_L3CTABLE__L3HDROFFSET 6 -#define O_L3CTABLE__L4PROTOOFFSET 20 -#define W_L3CTABLE__L4PROTOOFFSET 6 -#define O_L3CTABLE__IPCHKSUMCOMPUTE 19 -#define O_L3CTABLE__L4CLASSIFY 18 -#define O_L3CTABLE__L2PROTO 16 -#define W_L3CTABLE__L2PROTO 2 -#define O_L3CTABLE__L3PROTOKEY 0 -#define W_L3CTABLE__L3PROTOKEY 16 -#define R_L4CTABLE 0x160 -#define O_L4CTABLE__OFFSET0 21 -#define W_L4CTABLE__OFFSET0 6 -#define O_L4CTABLE__LEN0 17 -#define W_L4CTABLE__LEN0 4 -#define O_L4CTABLE__OFFSET1 11 -#define W_L4CTABLE__OFFSET1 6 -#define O_L4CTABLE__LEN1 7 -#define W_L4CTABLE__LEN1 4 -#define O_L4CTABLE__TCPCHKSUMENABLE 0 -#define R_CAM4X128TABLE 0x172 -#define O_CAM4X128TABLE__CLASSID 7 -#define W_CAM4X128TABLE__CLASSID 2 -#define O_CAM4X128TABLE__BUCKETID 1 -#define W_CAM4X128TABLE__BUCKETID 6 -#define O_CAM4X128TABLE__USEBUCKET 0 -#define R_CAM4X128KEY 0x180 -#define R_TRANSLATETABLE 0x1A0 -#define R_DMACR0 0x200 -#define O_DMACR0__DATA0WRMAXCR 27 -#define W_DMACR0__DATA0WRMAXCR 3 -#define O_DMACR0__DATA0RDMAXCR 24 -#define W_DMACR0__DATA0RDMAXCR 3 -#define O_DMACR0__DATA1WRMAXCR 21 -#define W_DMACR0__DATA1WRMAXCR 3 -#define O_DMACR0__DATA1RDMAXCR 18 -#define W_DMACR0__DATA1RDMAXCR 3 -#define O_DMACR0__DATA2WRMAXCR 15 -#define W_DMACR0__DATA2WRMAXCR 3 -#define O_DMACR0__DATA2RDMAXCR 12 -#define W_DMACR0__DATA2RDMAXCR 3 -#define O_DMACR0__DATA3WRMAXCR 9 -#define W_DMACR0__DATA3WRMAXCR 3 -#define O_DMACR0__DATA3RDMAXCR 6 -#define W_DMACR0__DATA3RDMAXCR 3 -#define O_DMACR0__DATA4WRMAXCR 3 -#define W_DMACR0__DATA4WRMAXCR 3 -#define O_DMACR0__DATA4RDMAXCR 0 -#define W_DMACR0__DATA4RDMAXCR 3 -#define R_DMACR1 0x201 -#define O_DMACR1__DATA5WRMAXCR 27 -#define W_DMACR1__DATA5WRMAXCR 3 -#define O_DMACR1__DATA5RDMAXCR 24 -#define W_DMACR1__DATA5RDMAXCR 3 -#define O_DMACR1__DATA6WRMAXCR 21 -#define W_DMACR1__DATA6WRMAXCR 3 -#define O_DMACR1__DATA6RDMAXCR 18 -#define W_DMACR1__DATA6RDMAXCR 3 -#define O_DMACR1__DATA7WRMAXCR 15 -#define W_DMACR1__DATA7WRMAXCR 3 -#define O_DMACR1__DATA7RDMAXCR 12 -#define W_DMACR1__DATA7RDMAXCR 3 -#define O_DMACR1__DATA8WRMAXCR 9 -#define W_DMACR1__DATA8WRMAXCR 3 -#define O_DMACR1__DATA8RDMAXCR 6 -#define W_DMACR1__DATA8RDMAXCR 3 -#define O_DMACR1__DATA9WRMAXCR 3 -#define W_DMACR1__DATA9WRMAXCR 3 -#define O_DMACR1__DATA9RDMAXCR 0 -#define W_DMACR1__DATA9RDMAXCR 3 -#define R_DMACR2 0x202 -#define O_DMACR2__DATA10WRMAXCR 27 -#define W_DMACR2__DATA10WRMAXCR 3 -#define O_DMACR2__DATA10RDMAXCR 24 -#define W_DMACR2__DATA10RDMAXCR 3 -#define O_DMACR2__DATA11WRMAXCR 21 -#define W_DMACR2__DATA11WRMAXCR 3 -#define O_DMACR2__DATA11RDMAXCR 18 -#define W_DMACR2__DATA11RDMAXCR 3 -#define O_DMACR2__DATA12WRMAXCR 15 -#define W_DMACR2__DATA12WRMAXCR 3 -#define O_DMACR2__DATA12RDMAXCR 12 -#define W_DMACR2__DATA12RDMAXCR 3 -#define O_DMACR2__DATA13WRMAXCR 9 -#define W_DMACR2__DATA13WRMAXCR 3 -#define O_DMACR2__DATA13RDMAXCR 6 -#define W_DMACR2__DATA13RDMAXCR 3 -#define O_DMACR2__DATA14WRMAXCR 3 -#define W_DMACR2__DATA14WRMAXCR 3 -#define O_DMACR2__DATA14RDMAXCR 0 -#define W_DMACR2__DATA14RDMAXCR 3 -#define R_DMACR3 0x203 -#define O_DMACR3__DATA15WRMAXCR 27 -#define W_DMACR3__DATA15WRMAXCR 3 -#define O_DMACR3__DATA15RDMAXCR 24 -#define W_DMACR3__DATA15RDMAXCR 3 -#define O_DMACR3__SPCLASSWRMAXCR 21 -#define W_DMACR3__SPCLASSWRMAXCR 3 -#define O_DMACR3__SPCLASSRDMAXCR 18 -#define W_DMACR3__SPCLASSRDMAXCR 3 -#define O_DMACR3__JUMFRINWRMAXCR 15 -#define W_DMACR3__JUMFRINWRMAXCR 3 -#define O_DMACR3__JUMFRINRDMAXCR 12 -#define W_DMACR3__JUMFRINRDMAXCR 3 -#define O_DMACR3__REGFRINWRMAXCR 9 -#define W_DMACR3__REGFRINWRMAXCR 3 -#define O_DMACR3__REGFRINRDMAXCR 6 -#define W_DMACR3__REGFRINRDMAXCR 3 -#define O_DMACR3__FROUTWRMAXCR 3 -#define W_DMACR3__FROUTWRMAXCR 3 -#define O_DMACR3__FROUTRDMAXCR 0 -#define W_DMACR3__FROUTRDMAXCR 3 -#define R_REG_FRIN_SPILL_MEM_START_0 0x204 -#define O_REG_FRIN_SPILL_MEM_START_0__REGFRINSPILLMEMSTART0 0 -#define W_REG_FRIN_SPILL_MEM_START_0__REGFRINSPILLMEMSTART0 32 -#define R_REG_FRIN_SPILL_MEM_START_1 0x205 -#define O_REG_FRIN_SPILL_MEM_START_1__REGFRINSPILLMEMSTART1 0 -#define W_REG_FRIN_SPILL_MEM_START_1__REGFRINSPILLMEMSTART1 3 -#define R_REG_FRIN_SPILL_MEM_SIZE 0x206 -#define O_REG_FRIN_SPILL_MEM_SIZE__REGFRINSPILLMEMSIZE 0 -#define W_REG_FRIN_SPILL_MEM_SIZE__REGFRINSPILLMEMSIZE 32 -#define R_FROUT_SPILL_MEM_START_0 0x207 -#define O_FROUT_SPILL_MEM_START_0__FROUTSPILLMEMSTART0 0 -#define W_FROUT_SPILL_MEM_START_0__FROUTSPILLMEMSTART0 32 -#define R_FROUT_SPILL_MEM_START_1 0x208 -#define O_FROUT_SPILL_MEM_START_1__FROUTSPILLMEMSTART1 0 -#define W_FROUT_SPILL_MEM_START_1__FROUTSPILLMEMSTART1 3 -#define R_FROUT_SPILL_MEM_SIZE 0x209 -#define O_FROUT_SPILL_MEM_SIZE__FROUTSPILLMEMSIZE 0 -#define W_FROUT_SPILL_MEM_SIZE__FROUTSPILLMEMSIZE 32 -#define R_CLASS0_SPILL_MEM_START_0 0x20A -#define O_CLASS0_SPILL_MEM_START_0__CLASS0SPILLMEMSTART0 0 -#define W_CLASS0_SPILL_MEM_START_0__CLASS0SPILLMEMSTART0 32 -#define R_CLASS0_SPILL_MEM_START_1 0x20B -#define O_CLASS0_SPILL_MEM_START_1__CLASS0SPILLMEMSTART1 0 -#define W_CLASS0_SPILL_MEM_START_1__CLASS0SPILLMEMSTART1 3 -#define R_CLASS0_SPILL_MEM_SIZE 0x20C -#define O_CLASS0_SPILL_MEM_SIZE__CLASS0SPILLMEMSIZE 0 -#define W_CLASS0_SPILL_MEM_SIZE__CLASS0SPILLMEMSIZE 32 -#define R_JUMFRIN_SPILL_MEM_START_0 0x20D -#define O_JUMFRIN_SPILL_MEM_START_0__JUMFRINSPILLMEMSTART0 0 -#define W_JUMFRIN_SPILL_MEM_START_0__JUMFRINSPILLMEMSTART0 32 -#define R_JUMFRIN_SPILL_MEM_START_1 0x20E -#define O_JUMFRIN_SPILL_MEM_START_1__JUMFRINSPILLMEMSTART1 0 -#define W_JUMFRIN_SPILL_MEM_START_1__JUMFRINSPILLMEMSTART1 3 -#define R_JUMFRIN_SPILL_MEM_SIZE 0x20F -#define O_JUMFRIN_SPILL_MEM_SIZE__JUMFRINSPILLMEMSIZE 0 -#define W_JUMFRIN_SPILL_MEM_SIZE__JUMFRINSPILLMEMSIZE 32 -#define R_CLASS1_SPILL_MEM_START_0 0x210 -#define O_CLASS1_SPILL_MEM_START_0__CLASS1SPILLMEMSTART0 0 -#define W_CLASS1_SPILL_MEM_START_0__CLASS1SPILLMEMSTART0 32 -#define R_CLASS1_SPILL_MEM_START_1 0x211 -#define O_CLASS1_SPILL_MEM_START_1__CLASS1SPILLMEMSTART1 0 -#define W_CLASS1_SPILL_MEM_START_1__CLASS1SPILLMEMSTART1 3 -#define R_CLASS1_SPILL_MEM_SIZE 0x212 -#define O_CLASS1_SPILL_MEM_SIZE__CLASS1SPILLMEMSIZE 0 -#define W_CLASS1_SPILL_MEM_SIZE__CLASS1SPILLMEMSIZE 32 -#define R_CLASS2_SPILL_MEM_START_0 0x213 -#define O_CLASS2_SPILL_MEM_START_0__CLASS2SPILLMEMSTART0 0 -#define W_CLASS2_SPILL_MEM_START_0__CLASS2SPILLMEMSTART0 32 -#define R_CLASS2_SPILL_MEM_START_1 0x214 -#define O_CLASS2_SPILL_MEM_START_1__CLASS2SPILLMEMSTART1 0 -#define W_CLASS2_SPILL_MEM_START_1__CLASS2SPILLMEMSTART1 3 -#define R_CLASS2_SPILL_MEM_SIZE 0x215 -#define O_CLASS2_SPILL_MEM_SIZE__CLASS2SPILLMEMSIZE 0 -#define W_CLASS2_SPILL_MEM_SIZE__CLASS2SPILLMEMSIZE 32 -#define R_CLASS3_SPILL_MEM_START_0 0x216 -#define O_CLASS3_SPILL_MEM_START_0__CLASS3SPILLMEMSTART0 0 -#define W_CLASS3_SPILL_MEM_START_0__CLASS3SPILLMEMSTART0 32 -#define R_CLASS3_SPILL_MEM_START_1 0x217 -#define O_CLASS3_SPILL_MEM_START_1__CLASS3SPILLMEMSTART1 0 -#define W_CLASS3_SPILL_MEM_START_1__CLASS3SPILLMEMSTART1 3 -#define R_CLASS3_SPILL_MEM_SIZE 0x218 -#define O_CLASS3_SPILL_MEM_SIZE__CLASS3SPILLMEMSIZE 0 -#define W_CLASS3_SPILL_MEM_SIZE__CLASS3SPILLMEMSIZE 32 -#define R_REG_FRIN1_SPILL_MEM_START_0 0x219 -#define R_REG_FRIN1_SPILL_MEM_START_1 0x21a -#define R_REG_FRIN1_SPILL_MEM_SIZE 0x21b -#define R_SPIHNGY0 0x219 -#define O_SPIHNGY0__EG_HNGY_THRESH_0 24 -#define W_SPIHNGY0__EG_HNGY_THRESH_0 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_1 16 -#define W_SPIHNGY0__EG_HNGY_THRESH_1 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_2 8 -#define W_SPIHNGY0__EG_HNGY_THRESH_2 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_3 0 -#define W_SPIHNGY0__EG_HNGY_THRESH_3 7 -#define R_SPIHNGY1 0x21A -#define O_SPIHNGY1__EG_HNGY_THRESH_4 24 -#define W_SPIHNGY1__EG_HNGY_THRESH_4 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_5 16 -#define W_SPIHNGY1__EG_HNGY_THRESH_5 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_6 8 -#define W_SPIHNGY1__EG_HNGY_THRESH_6 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_7 0 -#define W_SPIHNGY1__EG_HNGY_THRESH_7 7 -#define R_SPIHNGY2 0x21B -#define O_SPIHNGY2__EG_HNGY_THRESH_8 24 -#define W_SPIHNGY2__EG_HNGY_THRESH_8 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_9 16 -#define W_SPIHNGY2__EG_HNGY_THRESH_9 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_10 8 -#define W_SPIHNGY2__EG_HNGY_THRESH_10 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_11 0 -#define W_SPIHNGY2__EG_HNGY_THRESH_11 7 -#define R_SPIHNGY3 0x21C -#define O_SPIHNGY3__EG_HNGY_THRESH_12 24 -#define W_SPIHNGY3__EG_HNGY_THRESH_12 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_13 16 -#define W_SPIHNGY3__EG_HNGY_THRESH_13 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_14 8 -#define W_SPIHNGY3__EG_HNGY_THRESH_14 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_15 0 -#define W_SPIHNGY3__EG_HNGY_THRESH_15 7 -#define R_SPISTRV0 0x21D -#define O_SPISTRV0__EG_STRV_THRESH_0 24 -#define W_SPISTRV0__EG_STRV_THRESH_0 7 -#define O_SPISTRV0__EG_STRV_THRESH_1 16 -#define W_SPISTRV0__EG_STRV_THRESH_1 7 -#define O_SPISTRV0__EG_STRV_THRESH_2 8 -#define W_SPISTRV0__EG_STRV_THRESH_2 7 -#define O_SPISTRV0__EG_STRV_THRESH_3 0 -#define W_SPISTRV0__EG_STRV_THRESH_3 7 -#define R_SPISTRV1 0x21E -#define O_SPISTRV1__EG_STRV_THRESH_4 24 -#define W_SPISTRV1__EG_STRV_THRESH_4 7 -#define O_SPISTRV1__EG_STRV_THRESH_5 16 -#define W_SPISTRV1__EG_STRV_THRESH_5 7 -#define O_SPISTRV1__EG_STRV_THRESH_6 8 -#define W_SPISTRV1__EG_STRV_THRESH_6 7 -#define O_SPISTRV1__EG_STRV_THRESH_7 0 -#define W_SPISTRV1__EG_STRV_THRESH_7 7 -#define R_SPISTRV2 0x21F -#define O_SPISTRV2__EG_STRV_THRESH_8 24 -#define W_SPISTRV2__EG_STRV_THRESH_8 7 -#define O_SPISTRV2__EG_STRV_THRESH_9 16 -#define W_SPISTRV2__EG_STRV_THRESH_9 7 -#define O_SPISTRV2__EG_STRV_THRESH_10 8 -#define W_SPISTRV2__EG_STRV_THRESH_10 7 -#define O_SPISTRV2__EG_STRV_THRESH_11 0 -#define W_SPISTRV2__EG_STRV_THRESH_11 7 -#define R_SPISTRV3 0x220 -#define O_SPISTRV3__EG_STRV_THRESH_12 24 -#define W_SPISTRV3__EG_STRV_THRESH_12 7 -#define O_SPISTRV3__EG_STRV_THRESH_13 16 -#define W_SPISTRV3__EG_STRV_THRESH_13 7 -#define O_SPISTRV3__EG_STRV_THRESH_14 8 -#define W_SPISTRV3__EG_STRV_THRESH_14 7 -#define O_SPISTRV3__EG_STRV_THRESH_15 0 -#define W_SPISTRV3__EG_STRV_THRESH_15 7 -#define R_TXDATAFIFO0 0x221 -#define O_TXDATAFIFO0__TX0DATAFIFOSTART 24 -#define W_TXDATAFIFO0__TX0DATAFIFOSTART 7 -#define O_TXDATAFIFO0__TX0DATAFIFOSIZE 16 -#define W_TXDATAFIFO0__TX0DATAFIFOSIZE 7 -#define O_TXDATAFIFO0__TX1DATAFIFOSTART 8 -#define W_TXDATAFIFO0__TX1DATAFIFOSTART 7 -#define O_TXDATAFIFO0__TX1DATAFIFOSIZE 0 -#define W_TXDATAFIFO0__TX1DATAFIFOSIZE 7 -#define R_TXDATAFIFO1 0x222 -#define O_TXDATAFIFO1__TX2DATAFIFOSTART 24 -#define W_TXDATAFIFO1__TX2DATAFIFOSTART 7 -#define O_TXDATAFIFO1__TX2DATAFIFOSIZE 16 -#define W_TXDATAFIFO1__TX2DATAFIFOSIZE 7 -#define O_TXDATAFIFO1__TX3DATAFIFOSTART 8 -#define W_TXDATAFIFO1__TX3DATAFIFOSTART 7 -#define O_TXDATAFIFO1__TX3DATAFIFOSIZE 0 -#define W_TXDATAFIFO1__TX3DATAFIFOSIZE 7 -#define R_TXDATAFIFO2 0x223 -#define O_TXDATAFIFO2__TX4DATAFIFOSTART 24 -#define W_TXDATAFIFO2__TX4DATAFIFOSTART 7 -#define O_TXDATAFIFO2__TX4DATAFIFOSIZE 16 -#define W_TXDATAFIFO2__TX4DATAFIFOSIZE 7 -#define O_TXDATAFIFO2__TX5DATAFIFOSTART 8 -#define W_TXDATAFIFO2__TX5DATAFIFOSTART 7 -#define O_TXDATAFIFO2__TX5DATAFIFOSIZE 0 -#define W_TXDATAFIFO2__TX5DATAFIFOSIZE 7 -#define R_TXDATAFIFO3 0x224 -#define O_TXDATAFIFO3__TX6DATAFIFOSTART 24 -#define W_TXDATAFIFO3__TX6DATAFIFOSTART 7 -#define O_TXDATAFIFO3__TX6DATAFIFOSIZE 16 -#define W_TXDATAFIFO3__TX6DATAFIFOSIZE 7 -#define O_TXDATAFIFO3__TX7DATAFIFOSTART 8 -#define W_TXDATAFIFO3__TX7DATAFIFOSTART 7 -#define O_TXDATAFIFO3__TX7DATAFIFOSIZE 0 -#define W_TXDATAFIFO3__TX7DATAFIFOSIZE 7 -#define R_TXDATAFIFO4 0x225 -#define O_TXDATAFIFO4__TX8DATAFIFOSTART 24 -#define W_TXDATAFIFO4__TX8DATAFIFOSTART 7 -#define O_TXDATAFIFO4__TX8DATAFIFOSIZE 16 -#define W_TXDATAFIFO4__TX8DATAFIFOSIZE 7 -#define O_TXDATAFIFO4__TX9DATAFIFOSTART 8 -#define W_TXDATAFIFO4__TX9DATAFIFOSTART 7 -#define O_TXDATAFIFO4__TX9DATAFIFOSIZE 0 -#define W_TXDATAFIFO4__TX9DATAFIFOSIZE 7 -#define R_TXDATAFIFO5 0x226 -#define O_TXDATAFIFO5__TX10DATAFIFOSTART 24 -#define W_TXDATAFIFO5__TX10DATAFIFOSTART 7 -#define O_TXDATAFIFO5__TX10DATAFIFOSIZE 16 -#define W_TXDATAFIFO5__TX10DATAFIFOSIZE 7 -#define O_TXDATAFIFO5__TX11DATAFIFOSTART 8 -#define W_TXDATAFIFO5__TX11DATAFIFOSTART 7 -#define O_TXDATAFIFO5__TX11DATAFIFOSIZE 0 -#define W_TXDATAFIFO5__TX11DATAFIFOSIZE 7 -#define R_TXDATAFIFO6 0x227 -#define O_TXDATAFIFO6__TX12DATAFIFOSTART 24 -#define W_TXDATAFIFO6__TX12DATAFIFOSTART 7 -#define O_TXDATAFIFO6__TX12DATAFIFOSIZE 16 -#define W_TXDATAFIFO6__TX12DATAFIFOSIZE 7 -#define O_TXDATAFIFO6__TX13DATAFIFOSTART 8 -#define W_TXDATAFIFO6__TX13DATAFIFOSTART 7 -#define O_TXDATAFIFO6__TX13DATAFIFOSIZE 0 -#define W_TXDATAFIFO6__TX13DATAFIFOSIZE 7 -#define R_TXDATAFIFO7 0x228 -#define O_TXDATAFIFO7__TX14DATAFIFOSTART 24 -#define W_TXDATAFIFO7__TX14DATAFIFOSTART 7 -#define O_TXDATAFIFO7__TX14DATAFIFOSIZE 16 -#define W_TXDATAFIFO7__TX14DATAFIFOSIZE 7 -#define O_TXDATAFIFO7__TX15DATAFIFOSTART 8 -#define W_TXDATAFIFO7__TX15DATAFIFOSTART 7 -#define O_TXDATAFIFO7__TX15DATAFIFOSIZE 0 -#define W_TXDATAFIFO7__TX15DATAFIFOSIZE 7 -#define R_RXDATAFIFO0 0x229 -#define O_RXDATAFIFO0__RX0DATAFIFOSTART 24 -#define W_RXDATAFIFO0__RX0DATAFIFOSTART 7 -#define O_RXDATAFIFO0__RX0DATAFIFOSIZE 16 -#define W_RXDATAFIFO0__RX0DATAFIFOSIZE 7 -#define O_RXDATAFIFO0__RX1DATAFIFOSTART 8 -#define W_RXDATAFIFO0__RX1DATAFIFOSTART 7 -#define O_RXDATAFIFO0__RX1DATAFIFOSIZE 0 -#define W_RXDATAFIFO0__RX1DATAFIFOSIZE 7 -#define R_RXDATAFIFO1 0x22A -#define O_RXDATAFIFO1__RX2DATAFIFOSTART 24 -#define W_RXDATAFIFO1__RX2DATAFIFOSTART 7 -#define O_RXDATAFIFO1__RX2DATAFIFOSIZE 16 -#define W_RXDATAFIFO1__RX2DATAFIFOSIZE 7 -#define O_RXDATAFIFO1__RX3DATAFIFOSTART 8 -#define W_RXDATAFIFO1__RX3DATAFIFOSTART 7 -#define O_RXDATAFIFO1__RX3DATAFIFOSIZE 0 -#define W_RXDATAFIFO1__RX3DATAFIFOSIZE 7 -#define R_RXDATAFIFO2 0x22B -#define O_RXDATAFIFO2__RX4DATAFIFOSTART 24 -#define W_RXDATAFIFO2__RX4DATAFIFOSTART 7 -#define O_RXDATAFIFO2__RX4DATAFIFOSIZE 16 -#define W_RXDATAFIFO2__RX4DATAFIFOSIZE 7 -#define O_RXDATAFIFO2__RX5DATAFIFOSTART 8 -#define W_RXDATAFIFO2__RX5DATAFIFOSTART 7 -#define O_RXDATAFIFO2__RX5DATAFIFOSIZE 0 -#define W_RXDATAFIFO2__RX5DATAFIFOSIZE 7 -#define R_RXDATAFIFO3 0x22C -#define O_RXDATAFIFO3__RX6DATAFIFOSTART 24 -#define W_RXDATAFIFO3__RX6DATAFIFOSTART 7 -#define O_RXDATAFIFO3__RX6DATAFIFOSIZE 16 -#define W_RXDATAFIFO3__RX6DATAFIFOSIZE 7 -#define O_RXDATAFIFO3__RX7DATAFIFOSTART 8 -#define W_RXDATAFIFO3__RX7DATAFIFOSTART 7 -#define O_RXDATAFIFO3__RX7DATAFIFOSIZE 0 -#define W_RXDATAFIFO3__RX7DATAFIFOSIZE 7 -#define R_RXDATAFIFO4 0x22D -#define O_RXDATAFIFO4__RX8DATAFIFOSTART 24 -#define W_RXDATAFIFO4__RX8DATAFIFOSTART 7 -#define O_RXDATAFIFO4__RX8DATAFIFOSIZE 16 -#define W_RXDATAFIFO4__RX8DATAFIFOSIZE 7 -#define O_RXDATAFIFO4__RX9DATAFIFOSTART 8 -#define W_RXDATAFIFO4__RX9DATAFIFOSTART 7 -#define O_RXDATAFIFO4__RX9DATAFIFOSIZE 0 -#define W_RXDATAFIFO4__RX9DATAFIFOSIZE 7 -#define R_RXDATAFIFO5 0x22E -#define O_RXDATAFIFO5__RX10DATAFIFOSTART 24 -#define W_RXDATAFIFO5__RX10DATAFIFOSTART 7 -#define O_RXDATAFIFO5__RX10DATAFIFOSIZE 16 -#define W_RXDATAFIFO5__RX10DATAFIFOSIZE 7 -#define O_RXDATAFIFO5__RX11DATAFIFOSTART 8 -#define W_RXDATAFIFO5__RX11DATAFIFOSTART 7 -#define O_RXDATAFIFO5__RX11DATAFIFOSIZE 0 -#define W_RXDATAFIFO5__RX11DATAFIFOSIZE 7 -#define R_RXDATAFIFO6 0x22F -#define O_RXDATAFIFO6__RX12DATAFIFOSTART 24 -#define W_RXDATAFIFO6__RX12DATAFIFOSTART 7 -#define O_RXDATAFIFO6__RX12DATAFIFOSIZE 16 -#define W_RXDATAFIFO6__RX12DATAFIFOSIZE 7 -#define O_RXDATAFIFO6__RX13DATAFIFOSTART 8 -#define W_RXDATAFIFO6__RX13DATAFIFOSTART 7 -#define O_RXDATAFIFO6__RX13DATAFIFOSIZE 0 -#define W_RXDATAFIFO6__RX13DATAFIFOSIZE 7 -#define R_RXDATAFIFO7 0x230 -#define O_RXDATAFIFO7__RX14DATAFIFOSTART 24 -#define W_RXDATAFIFO7__RX14DATAFIFOSTART 7 -#define O_RXDATAFIFO7__RX14DATAFIFOSIZE 16 -#define W_RXDATAFIFO7__RX14DATAFIFOSIZE 7 -#define O_RXDATAFIFO7__RX15DATAFIFOSTART 8 -#define W_RXDATAFIFO7__RX15DATAFIFOSTART 7 -#define O_RXDATAFIFO7__RX15DATAFIFOSIZE 0 -#define W_RXDATAFIFO7__RX15DATAFIFOSIZE 7 -#define R_XGMACPADCALIBRATION 0x231 -#define R_FREEQCARVE 0x233 -#define R_SPI4STATICDELAY0 0x240 -#define O_SPI4STATICDELAY0__DATALINE7 28 -#define W_SPI4STATICDELAY0__DATALINE7 4 -#define O_SPI4STATICDELAY0__DATALINE6 24 -#define W_SPI4STATICDELAY0__DATALINE6 4 -#define O_SPI4STATICDELAY0__DATALINE5 20 -#define W_SPI4STATICDELAY0__DATALINE5 4 -#define O_SPI4STATICDELAY0__DATALINE4 16 -#define W_SPI4STATICDELAY0__DATALINE4 4 -#define O_SPI4STATICDELAY0__DATALINE3 12 -#define W_SPI4STATICDELAY0__DATALINE3 4 -#define O_SPI4STATICDELAY0__DATALINE2 8 -#define W_SPI4STATICDELAY0__DATALINE2 4 -#define O_SPI4STATICDELAY0__DATALINE1 4 -#define W_SPI4STATICDELAY0__DATALINE1 4 -#define O_SPI4STATICDELAY0__DATALINE0 0 -#define W_SPI4STATICDELAY0__DATALINE0 4 -#define R_SPI4STATICDELAY1 0x241 -#define O_SPI4STATICDELAY1__DATALINE15 28 -#define W_SPI4STATICDELAY1__DATALINE15 4 -#define O_SPI4STATICDELAY1__DATALINE14 24 -#define W_SPI4STATICDELAY1__DATALINE14 4 -#define O_SPI4STATICDELAY1__DATALINE13 20 -#define W_SPI4STATICDELAY1__DATALINE13 4 -#define O_SPI4STATICDELAY1__DATALINE12 16 -#define W_SPI4STATICDELAY1__DATALINE12 4 -#define O_SPI4STATICDELAY1__DATALINE11 12 -#define W_SPI4STATICDELAY1__DATALINE11 4 -#define O_SPI4STATICDELAY1__DATALINE10 8 -#define W_SPI4STATICDELAY1__DATALINE10 4 -#define O_SPI4STATICDELAY1__DATALINE9 4 -#define W_SPI4STATICDELAY1__DATALINE9 4 -#define O_SPI4STATICDELAY1__DATALINE8 0 -#define W_SPI4STATICDELAY1__DATALINE8 4 -#define R_SPI4STATICDELAY2 0x242 -#define O_SPI4STATICDELAY0__TXSTAT1 8 -#define W_SPI4STATICDELAY0__TXSTAT1 4 -#define O_SPI4STATICDELAY0__TXSTAT0 4 -#define W_SPI4STATICDELAY0__TXSTAT0 4 -#define O_SPI4STATICDELAY0__RXCONTROL 0 -#define W_SPI4STATICDELAY0__RXCONTROL 4 -#define R_SPI4CONTROL 0x243 -#define O_SPI4CONTROL__STATICDELAY 2 -#define O_SPI4CONTROL__LVDS_LVTTL 1 -#define O_SPI4CONTROL__SPI4ENABLE 0 -#define R_CLASSWATERMARKS 0x244 -#define O_CLASSWATERMARKS__CLASS0WATERMARK 24 -#define W_CLASSWATERMARKS__CLASS0WATERMARK 5 -#define O_CLASSWATERMARKS__CLASS1WATERMARK 16 -#define W_CLASSWATERMARKS__CLASS1WATERMARK 5 -#define O_CLASSWATERMARKS__CLASS3WATERMARK 0 -#define W_CLASSWATERMARKS__CLASS3WATERMARK 5 -#define R_RXWATERMARKS1 0x245 -#define O_RXWATERMARKS__RX0DATAWATERMARK 24 -#define W_RXWATERMARKS__RX0DATAWATERMARK 7 -#define O_RXWATERMARKS__RX1DATAWATERMARK 16 -#define W_RXWATERMARKS__RX1DATAWATERMARK 7 -#define O_RXWATERMARKS__RX3DATAWATERMARK 0 -#define W_RXWATERMARKS__RX3DATAWATERMARK 7 -#define R_RXWATERMARKS2 0x246 -#define O_RXWATERMARKS__RX4DATAWATERMARK 24 -#define W_RXWATERMARKS__RX4DATAWATERMARK 7 -#define O_RXWATERMARKS__RX5DATAWATERMARK 16 -#define W_RXWATERMARKS__RX5DATAWATERMARK 7 -#define O_RXWATERMARKS__RX6DATAWATERMARK 8 -#define W_RXWATERMARKS__RX6DATAWATERMARK 7 -#define O_RXWATERMARKS__RX7DATAWATERMARK 0 -#define W_RXWATERMARKS__RX7DATAWATERMARK 7 -#define R_RXWATERMARKS3 0x247 -#define O_RXWATERMARKS__RX8DATAWATERMARK 24 -#define W_RXWATERMARKS__RX8DATAWATERMARK 7 -#define O_RXWATERMARKS__RX9DATAWATERMARK 16 -#define W_RXWATERMARKS__RX9DATAWATERMARK 7 -#define O_RXWATERMARKS__RX10DATAWATERMARK 8 -#define W_RXWATERMARKS__RX10DATAWATERMARK 7 -#define O_RXWATERMARKS__RX11DATAWATERMARK 0 -#define W_RXWATERMARKS__RX11DATAWATERMARK 7 -#define R_RXWATERMARKS4 0x248 -#define O_RXWATERMARKS__RX12DATAWATERMARK 24 -#define W_RXWATERMARKS__RX12DATAWATERMARK 7 -#define O_RXWATERMARKS__RX13DATAWATERMARK 16 -#define W_RXWATERMARKS__RX13DATAWATERMARK 7 -#define O_RXWATERMARKS__RX14DATAWATERMARK 8 -#define W_RXWATERMARKS__RX14DATAWATERMARK 7 -#define O_RXWATERMARKS__RX15DATAWATERMARK 0 -#define W_RXWATERMARKS__RX15DATAWATERMARK 7 -#define R_FREEWATERMARKS 0x249 -#define O_FREEWATERMARKS__FREEOUTWATERMARK 16 -#define W_FREEWATERMARKS__FREEOUTWATERMARK 16 -#define O_FREEWATERMARKS__JUMFRWATERMARK 8 -#define W_FREEWATERMARKS__JUMFRWATERMARK 7 -#define O_FREEWATERMARKS__REGFRWATERMARK 0 -#define W_FREEWATERMARKS__REGFRWATERMARK 7 -#define R_EGRESSFIFOCARVINGSLOTS 0x24a - -#define CTRL_RES0 0 -#define CTRL_RES1 1 -#define CTRL_REG_FREE 2 -#define CTRL_JUMBO_FREE 3 -#define CTRL_CONT 4 -#define CTRL_EOP 5 -#define CTRL_START 6 -#define CTRL_SNGL 7 - -#define CTRL_B0_NOT_EOP 0 -#define CTRL_B0_EOP 1 - -#define R_ROUND_ROBIN_TABLE 0 -#define R_PDE_CLASS_0 0x300 -#define R_PDE_CLASS_1 0x302 -#define R_PDE_CLASS_2 0x304 -#define R_PDE_CLASS_3 0x306 - -#define R_MSG_TX_THRESHOLD 0x308 - -#define R_GMAC_JFR0_BUCKET_SIZE 0x320 -#define R_GMAC_RFR0_BUCKET_SIZE 0x321 -#define R_GMAC_TX0_BUCKET_SIZE 0x322 -#define R_GMAC_TX1_BUCKET_SIZE 0x323 -#define R_GMAC_TX2_BUCKET_SIZE 0x324 -#define R_GMAC_TX3_BUCKET_SIZE 0x325 -#define R_GMAC_JFR1_BUCKET_SIZE 0x326 -#define R_GMAC_RFR1_BUCKET_SIZE 0x327 - -#define R_XGS_TX0_BUCKET_SIZE 0x320 -#define R_XGS_TX1_BUCKET_SIZE 0x321 -#define R_XGS_TX2_BUCKET_SIZE 0x322 -#define R_XGS_TX3_BUCKET_SIZE 0x323 -#define R_XGS_TX4_BUCKET_SIZE 0x324 -#define R_XGS_TX5_BUCKET_SIZE 0x325 -#define R_XGS_TX6_BUCKET_SIZE 0x326 -#define R_XGS_TX7_BUCKET_SIZE 0x327 -#define R_XGS_TX8_BUCKET_SIZE 0x328 -#define R_XGS_TX9_BUCKET_SIZE 0x329 -#define R_XGS_TX10_BUCKET_SIZE 0x32A -#define R_XGS_TX11_BUCKET_SIZE 0x32B -#define R_XGS_TX12_BUCKET_SIZE 0x32C -#define R_XGS_TX13_BUCKET_SIZE 0x32D -#define R_XGS_TX14_BUCKET_SIZE 0x32E -#define R_XGS_TX15_BUCKET_SIZE 0x32F -#define R_XGS_JFR_BUCKET_SIZE 0x330 -#define R_XGS_RFR_BUCKET_SIZE 0x331 - -#define R_CC_CPU0_0 0x380 -#define R_CC_CPU1_0 0x388 -#define R_CC_CPU2_0 0x390 -#define R_CC_CPU3_0 0x398 -#define R_CC_CPU4_0 0x3a0 -#define R_CC_CPU5_0 0x3a8 -#define R_CC_CPU6_0 0x3b0 -#define R_CC_CPU7_0 0x3b8 - -#define XLR_GMAC_BLK_SZ (XLR_IO_GMAC_1_OFFSET - \ - XLR_IO_GMAC_0_OFFSET) - -/* Constants used for configuring the devices */ - -#define XLR_FB_STN 6 /* Bucket used for Tx freeback */ - -#define MAC_B2B_IPG 88 - -#define XLR_NET_PREPAD_LEN 32 - -/* frame sizes need to be cacheline aligned */ -#define MAX_FRAME_SIZE (1536 + XLR_NET_PREPAD_LEN) -#define MAX_FRAME_SIZE_JUMBO 9216 - -#define MAC_SKB_BACK_PTR_SIZE SMP_CACHE_BYTES -#define MAC_PREPAD 0 -#define BYTE_OFFSET 2 -#define XLR_RX_BUF_SIZE (MAX_FRAME_SIZE + BYTE_OFFSET + \ - MAC_PREPAD + MAC_SKB_BACK_PTR_SIZE + SMP_CACHE_BYTES) -#define MAC_CRC_LEN 4 -#define MAX_NUM_MSGRNG_STN_CC 128 -#define MAX_MSG_SND_ATTEMPTS 100 /* 13 stns x 4 entry msg/stn + - * headroom - */ - -#define MAC_FRIN_TO_BE_SENT_THRESHOLD 16 - -#define MAX_NUM_DESC_SPILL 1024 -#define MAX_FRIN_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_FROUT_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_0_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_1_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_2_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_3_SPILL (MAX_NUM_DESC_SPILL << 2) - -enum { - SGMII_SPEED_10 = 0x00000000, - SGMII_SPEED_100 = 0x02000000, - SGMII_SPEED_1000 = 0x04000000, -}; - -enum tsv_rsv_reg { - TX_RX_64_BYTE_FRAME = 0x20, - TX_RX_64_127_BYTE_FRAME, - TX_RX_128_255_BYTE_FRAME, - TX_RX_256_511_BYTE_FRAME, - TX_RX_512_1023_BYTE_FRAME, - TX_RX_1024_1518_BYTE_FRAME, - TX_RX_1519_1522_VLAN_BYTE_FRAME, - - RX_BYTE_COUNTER = 0x27, - RX_PACKET_COUNTER, - RX_FCS_ERROR_COUNTER, - RX_MULTICAST_PACKET_COUNTER, - RX_BROADCAST_PACKET_COUNTER, - RX_CONTROL_FRAME_PACKET_COUNTER, - RX_PAUSE_FRAME_PACKET_COUNTER, - RX_UNKNOWN_OP_CODE_COUNTER, - RX_ALIGNMENT_ERROR_COUNTER, - RX_FRAME_LENGTH_ERROR_COUNTER, - RX_CODE_ERROR_COUNTER, - RX_CARRIER_SENSE_ERROR_COUNTER, - RX_UNDERSIZE_PACKET_COUNTER, - RX_OVERSIZE_PACKET_COUNTER, - RX_FRAGMENTS_COUNTER, - RX_JABBER_COUNTER, - RX_DROP_PACKET_COUNTER, - - TX_BYTE_COUNTER = 0x38, - TX_PACKET_COUNTER, - TX_MULTICAST_PACKET_COUNTER, - TX_BROADCAST_PACKET_COUNTER, - TX_PAUSE_CONTROL_FRAME_COUNTER, - TX_DEFERRAL_PACKET_COUNTER, - TX_EXCESSIVE_DEFERRAL_PACKET_COUNTER, - TX_SINGLE_COLLISION_PACKET_COUNTER, - TX_MULTI_COLLISION_PACKET_COUNTER, - TX_LATE_COLLISION_PACKET_COUNTER, - TX_EXCESSIVE_COLLISION_PACKET_COUNTER, - TX_TOTAL_COLLISION_COUNTER, - TX_PAUSE_FRAME_HONERED_COUNTER, - TX_DROP_FRAME_COUNTER, - TX_JABBER_FRAME_COUNTER, - TX_FCS_ERROR_COUNTER, - TX_CONTROL_FRAME_COUNTER, - TX_OVERSIZE_FRAME_COUNTER, - TX_UNDERSIZE_FRAME_COUNTER, - TX_FRAGMENT_FRAME_COUNTER, - - CARRY_REG_1 = 0x4c, - CARRY_REG_2 = 0x4d, -}; - -struct xlr_adapter { - struct net_device *netdev[4]; -}; - -struct xlr_net_priv { - u32 __iomem *base_addr; - struct net_device *ndev; - struct xlr_adapter *adapter; - struct mii_bus *mii_bus; - int num_rx_desc; - int phy_addr; /* PHY addr on MDIO bus */ - int pcs_id; /* PCS id on MDIO bus */ - int port_id; /* Port(gmac/xgmac) number, i.e 0-7 */ - int tx_stnid; - u32 __iomem *mii_addr; - u32 __iomem *serdes_addr; - u32 __iomem *pcs_addr; - u32 __iomem *gpio_addr; - int phy_speed; - int port_type; - struct timer_list queue_timer; - int wakeup_q; - struct platform_device *pdev; - struct xlr_net_data *nd; - - u64 *frin_spill; - u64 *frout_spill; - u64 *class_0_spill; - u64 *class_1_spill; - u64 *class_2_spill; - u64 *class_3_spill; -}; - -void xlr_set_gmac_speed(struct xlr_net_priv *priv); diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c index 29bd37669059..68c09fa016ed 100644 --- a/drivers/staging/pi433/pi433_if.c +++ b/drivers/staging/pi433/pi433_if.c @@ -92,7 +92,7 @@ struct pi433_device { u32 rx_bytes_to_drop; u32 rx_bytes_dropped; unsigned int rx_position; - struct mutex rx_lock; + struct mutex rx_lock; /* protects rx_* variable accesses */ wait_queue_head_t rx_wait_queue; /* fifo wait queue */ diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c index 7d86bb8be245..d64df072d8e8 100644 --- a/drivers/staging/pi433/rf69.c +++ b/drivers/staging/pi433/rf69.c @@ -113,7 +113,7 @@ int rf69_set_mode(struct spi_device *spi, enum mode mode) }; if (unlikely(mode >= ARRAY_SIZE(mode_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal mode %u", mode); return -EINVAL; } @@ -143,7 +143,7 @@ int rf69_set_modulation(struct spi_device *spi, enum modulation modulation) }; if (unlikely(modulation >= ARRAY_SIZE(modulation_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal modulation %u", modulation); return -EINVAL; } @@ -191,7 +191,7 @@ int rf69_set_modulation_shaping(struct spi_device *spi, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_0_3); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal mod shaping for FSK %u", mod_shaping); return -EINVAL; } case OOK: @@ -209,7 +209,7 @@ int rf69_set_modulation_shaping(struct spi_device *spi, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_2BR); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal mod shaping for OOK %u", mod_shaping); return -EINVAL; } default: @@ -255,13 +255,25 @@ int rf69_set_deviation(struct spi_device *spi, u32 deviation) int retval; u64 f_reg; u64 f_step; + u32 bit_rate_reg; + u32 bit_rate; u8 msb; u8 lsb; u64 factor = 1000000; // to improve precision of calculation - // TODO: Dependency to bitrate - if (deviation < 600 || deviation > 500000) { - dev_dbg(&spi->dev, "set_deviation: illegal input param"); + // calculate bit rate + bit_rate_reg = rf69_read_reg(spi, REG_BITRATE_MSB) << 8; + bit_rate_reg |= rf69_read_reg(spi, REG_BITRATE_LSB); + bit_rate = F_OSC / bit_rate_reg; + + /* + * frequency deviation must exceed 600 Hz but not exceed + * 500kHz when taking bitrate dependency into consideration + * to ensure proper modulation + */ + if (deviation < 600 || (deviation + (bit_rate / 2)) > 500000) { + dev_dbg(&spi->dev, + "set_deviation: illegal input param: %u", deviation); return -EINVAL; } @@ -392,7 +404,7 @@ int rf69_set_output_power_level(struct spi_device *spi, u8 power_level) return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER, power_level); failed: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal power level %u", power_level); return -EINVAL; } @@ -417,7 +429,7 @@ int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp) }; if (unlikely(pa_ramp >= ARRAY_SIZE(pa_ramp_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal pa_ramp %u", pa_ramp); return -EINVAL; } @@ -433,7 +445,7 @@ int rf69_set_antenna_impedance(struct spi_device *spi, case two_hundred_ohm: return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal antenna impedance %u", antenna_impedance); return -EINVAL; } } @@ -451,7 +463,7 @@ int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain) }; if (unlikely(lna_gain >= ARRAY_SIZE(lna_gain_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal lna gain %u", lna_gain); return -EINVAL; } @@ -466,14 +478,14 @@ static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg, // check value for mantisse and exponent if (exponent > 7) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal bandwidth exponent %u", exponent); return -EINVAL; } - if ((mantisse != mantisse16) && - (mantisse != mantisse20) && - (mantisse != mantisse24)) { - dev_dbg(&spi->dev, "set: illegal input param"); + if (mantisse != mantisse16 && + mantisse != mantisse20 && + mantisse != mantisse24) { + dev_dbg(&spi->dev, "set: illegal bandwidth mantisse %u", mantisse); return -EINVAL; } @@ -531,7 +543,7 @@ int rf69_set_ook_threshold_dec(struct spi_device *spi, }; if (unlikely(threshold_decrement >= ARRAY_SIZE(td_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal OOK threshold decrement %u", threshold_decrement); return -EINVAL; } @@ -578,7 +590,7 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value) dio_addr = REG_DIOMAPPING2; break; default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal dio number %u", dio_number); return -EINVAL; } @@ -681,7 +693,7 @@ int rf69_set_fifo_fill_condition(struct spi_device *spi, return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal fifo fill condition %u", fifo_fill_condition); return -EINVAL; } } @@ -690,7 +702,7 @@ int rf69_set_sync_size(struct spi_device *spi, u8 sync_size) { // check input value if (sync_size > 0x07) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal sync size %u", sync_size); return -EINVAL; } @@ -727,7 +739,7 @@ int rf69_set_packet_format(struct spi_device *spi, return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_PACKET_FORMAT_VARIABLE); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal packet format %u", packet_format); return -EINVAL; } } @@ -753,7 +765,7 @@ int rf69_set_address_filtering(struct spi_device *spi, }; if (unlikely(address_filtering >= ARRAY_SIZE(af_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal address filtering %u", address_filtering); return -EINVAL; } @@ -788,7 +800,7 @@ int rf69_set_tx_start_condition(struct spi_device *spi, return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART); default: - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal tx start condition %u", tx_start_condition); return -EINVAL; } } @@ -799,7 +811,7 @@ int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold) /* check input value */ if (threshold & 0x80) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal fifo threshold %u", threshold); return -EINVAL; } @@ -826,7 +838,7 @@ int rf69_set_dagc(struct spi_device *spi, enum dagc dagc) }; if (unlikely(dagc >= ARRAY_SIZE(dagc_map))) { - dev_dbg(&spi->dev, "set: illegal input param"); + dev_dbg(&spi->dev, "set: illegal dagc %u", dagc); return -EINVAL; } diff --git a/drivers/staging/pi433/rf69_enum.h b/drivers/staging/pi433/rf69_enum.h index fbf56fcf5fe8..b33a33a85d3b 100644 --- a/drivers/staging/pi433/rf69_enum.h +++ b/drivers/staging/pi433/rf69_enum.h @@ -110,12 +110,24 @@ enum fifo_fill_condition { }; enum packet_format { + /* + * Used when the size of payload is fixed in advance. This mode of + * operation may be of interest to minimize RF overhead by 1 byte as + * no length byte field is required + */ packet_length_fix, + /* + * Used when the size of payload isn't known in advance. It requires the + * transmitter to send the length byte in each packet so the receiver + * would know how to operate properly + */ packet_length_var }; enum tx_start_condition { + /* the number of bytes in the FIFO exceeds FIFO_THRESHOLD */ fifo_level, + /* at least one byte in the FIFO */ fifo_not_empty }; diff --git a/drivers/staging/r8188eu/Makefile b/drivers/staging/r8188eu/Makefile index 62933b0f29b5..a7a486cc16dd 100644 --- a/drivers/staging/r8188eu/Makefile +++ b/drivers/staging/r8188eu/Makefile @@ -11,7 +11,6 @@ r8188eu-y = \ hal/hal_com.o \ hal/odm.o \ hal/odm_debug.o \ - hal/odm_interface.o \ hal/odm_HWConfig.o \ hal/odm_RegConfig8188E.o \ hal/odm_RTL8188E.o \ @@ -21,9 +20,7 @@ r8188eu-y = \ hal/rtl8188e_phycfg.o \ hal/rtl8188e_rf6052.o \ hal/rtl8188e_rxdesc.o \ - hal/rtl8188e_sreset.o \ hal/rtl8188e_xmit.o \ - hal/rtl8188eu_led.o \ hal/rtl8188eu_recv.o \ hal/rtl8188eu_xmit.o \ hal/usb_halinit.o \ diff --git a/drivers/staging/r8188eu/core/rtw_ap.c b/drivers/staging/r8188eu/core/rtw_ap.c index c78feeb9c862..1675e2e8439c 100644 --- a/drivers/staging/r8188eu/core/rtw_ap.c +++ b/drivers/staging/r8188eu/core/rtw_ap.c @@ -318,7 +318,6 @@ void expire_timeout_chk(struct adapter *padapter) void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) { int i; - u8 rf_type; u32 init_rate = 0; unsigned char sta_band = 0, raid, shortGIrate = false; unsigned char limit; @@ -342,11 +341,7 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) } /* n mode ra_bitmap */ if (psta_ht->ht_option) { - GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - if (rf_type == RF_2T2R) - limit = 16;/* 2R */ - else - limit = 8;/* 1R */ + limit = 8; /* 1R */ for (i = 0; i < limit; i++) { if (psta_ht->ht_cap.mcs.rx_mask[i / 8] & BIT(i % 8)) @@ -452,7 +447,7 @@ void update_bmc_sta(struct adapter *padapter) init_rate = get_highest_rate_idx(tx_ra_bitmap & 0x0fffffff) & 0x3f; /* ap mode */ - rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true); + rtl8188e_SetHalODMVar(padapter, psta, true); { u8 arg = 0; @@ -504,7 +499,7 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) DBG_88E("%s\n", __func__); /* ap mode */ - rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true); + rtl8188e_SetHalODMVar(padapter, psta, true); if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) psta->ieee8021x_blocked = true; diff --git a/drivers/staging/r8188eu/core/rtw_br_ext.c b/drivers/staging/r8188eu/core/rtw_br_ext.c index bcd0f9dd64b1..4951f835feaf 100644 --- a/drivers/staging/r8188eu/core/rtw_br_ext.c +++ b/drivers/staging/r8188eu/core/rtw_br_ext.c @@ -105,19 +105,10 @@ static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len) return 0; } -static unsigned long __nat25_timeout(struct adapter *priv) -{ - unsigned long timeout; - - timeout = jiffies - NAT25_AGEING_TIME*HZ; - - return timeout; -} - static int __nat25_has_expired(struct adapter *priv, struct nat25_network_db_entry *fdb) { - if (time_before_eq(fdb->ageing_timer, __nat25_timeout(priv))) + if (time_before_eq(fdb->ageing_timer, jiffies - NAT25_AGEING_TIME * HZ)) return 1; return 0; diff --git a/drivers/staging/r8188eu/core/rtw_cmd.c b/drivers/staging/r8188eu/core/rtw_cmd.c index 48869a7056fd..8bfb01c2ebb5 100644 --- a/drivers/staging/r8188eu/core/rtw_cmd.c +++ b/drivers/staging/r8188eu/core/rtw_cmd.c @@ -10,7 +10,6 @@ #include "../include/rtw_br_ext.h" #include "../include/rtw_mlme_ext.h" #include "../include/rtl8188e_dm.h" -#include "../include/rtl8188e_sreset.h" /* Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. @@ -51,7 +50,6 @@ static int _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ((size_t)(pcmdpriv->rsp_allocated_buf) & 3); - pcmdpriv->cmd_issued_cnt = 0; pcmdpriv->cmd_done_cnt = 0; pcmdpriv->rsp_cnt = 0; exit: @@ -69,7 +67,7 @@ static int _rtw_init_evt_priv(struct evt_priv *pevtpriv) atomic_set(&pevtpriv->event_seq, 0); pevtpriv->evt_done_cnt = 0; - _init_workitem(&pevtpriv->c2h_wk, c2h_wk_callback, NULL); + INIT_WORK(&pevtpriv->c2h_wk, c2h_wk_callback); pevtpriv->c2h_wk_alive = false; pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN + 1); @@ -78,7 +76,7 @@ static int _rtw_init_evt_priv(struct evt_priv *pevtpriv) void rtw_free_evt_priv(struct evt_priv *pevtpriv) { - _cancel_workitem_sync(&pevtpriv->c2h_wk); + cancel_work_sync(&pevtpriv->c2h_wk); while (pevtpriv->c2h_wk_alive) msleep(10); @@ -255,8 +253,9 @@ int rtw_cmd_thread(void *context) _next: if (padapter->bDriverStopped || padapter->bSurpriseRemoved) { - DBG_88E("%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", - __func__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); + netdev_dbg(padapter->pnetdev, + "DriverStopped(%d) SurpriseRemoved(%d) break\n", + padapter->bDriverStopped, padapter->bSurpriseRemoved); break; } @@ -269,8 +268,6 @@ _next: goto post_process; } - pcmdpriv->cmd_issued_cnt++; - pcmd->cmdsz = _RND4((pcmd->cmdsz));/* _RND4 */ memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); @@ -316,8 +313,6 @@ post_process: if (!pcmd) break; - /* DBG_88E("%s: leaving... drop cmdcode:%u\n", __func__, pcmd->cmdcode); */ - rtw_free_cmd_obj(pcmd); } while (1); @@ -579,7 +574,7 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork) else padapter->pwrctrlpriv.smart_ps = padapter->registrypriv.smart_ps; - DBG_88E("%s: smart_ps =%d\n", __func__, padapter->pwrctrlpriv.smart_ps); + netdev_dbg(padapter->pnetdev, "smart_ps = %d\n", padapter->pwrctrlpriv.smart_ps); pcmd->cmdsz = get_wlan_bssid_ex_sz(psecnetwork);/* get cmdsz before endian conversion */ @@ -800,8 +795,6 @@ u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr) init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq)); - /* DBG_88E("rtw_addbareq_cmd, tid =%d\n", tid); */ - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ res = rtw_enqueue_cmd(pcmdpriv, ph2c); @@ -953,7 +946,19 @@ static void traffic_status_watchdog(struct adapter *padapter) pmlmepriv->LinkDetectInfo.bHigherBusyTxTraffic = bHigherBusyTxTraffic; } -static void dynamic_chk_wk_hdl(struct adapter *padapter, u8 *pbuf, int sz) +static void rtl8188e_sreset_xmit_status_check(struct adapter *padapter) +{ + u32 txdma_status; + + txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); + if (txdma_status != 0x00) { + DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status); + rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status); + } + /* total xmit irp = 4 */ +} + +static void dynamic_chk_wk_hdl(struct adapter *padapter, u8 *pbuf) { struct mlme_priv *pmlmepriv; @@ -1003,7 +1008,6 @@ static void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type) SetHwReg8188EU(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); break; case LPS_CTRL_SPECIAL_PACKET: - /* DBG_88E("LPS_CTRL_SPECIAL_PACKET\n"); */ pwrpriv->DelayLPSLastTimeStamp = jiffies; LPS_Leave(padapter); break; @@ -1374,7 +1378,7 @@ u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf) switch (pdrvextra_cmd->ec_id) { case DYNAMIC_CHK_WK_CID: - dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); + dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf); break; case POWER_SAVING_CTRL_WK_CID: rtw_ps_processor(padapter); diff --git a/drivers/staging/r8188eu/core/rtw_efuse.c b/drivers/staging/r8188eu/core/rtw_efuse.c index 03c8431b2ed3..0e0e60638880 100644 --- a/drivers/staging/r8188eu/core/rtw_efuse.c +++ b/drivers/staging/r8188eu/core/rtw_efuse.c @@ -6,70 +6,7 @@ #include "../include/osdep_service.h" #include "../include/drv_types.h" #include "../include/rtw_efuse.h" - -/*------------------------Define local variable------------------------------*/ -u8 fakeEfuseBank; -u32 fakeEfuseUsedBytes; -u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE] = {0}; -u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN] = {0}; -u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN] = {0}; - -u32 BTEfuseUsedBytes; -u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0}; - -u32 fakeBTEfuseUsedBytes; -u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -/*------------------------Define local variable------------------------------*/ - -#define REG_EFUSE_CTRL 0x0030 -#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ - -static bool Efuse_Read1ByteFromFakeContent(u16 Offset, u8 *Value) -{ - if (Offset >= EFUSE_MAX_HW_SIZE) - return false; - if (fakeEfuseBank == 0) - *Value = fakeEfuseContent[Offset]; - else - *Value = fakeBTEfuseContent[fakeEfuseBank - 1][Offset]; - return true; -} - -static bool -Efuse_Write1ByteToFakeContent( - struct adapter *pAdapter, - u16 Offset, - u8 Value) -{ - if (Offset >= EFUSE_MAX_HW_SIZE) - return false; - if (fakeEfuseBank == 0) { - fakeEfuseContent[Offset] = Value; - } else { - fakeBTEfuseContent[fakeEfuseBank - 1][Offset] = Value; - } - return true; -} - -/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ -u8 -Efuse_CalculateWordCnts(u8 word_en) -{ - u8 word_cnts = 0; - if (!(word_en & BIT(0))) - word_cnts++; /* 0 : write enable */ - if (!(word_en & BIT(1))) - word_cnts++; - if (!(word_en & BIT(2))) - word_cnts++; - if (!(word_en & BIT(3))) - word_cnts++; - return word_cnts; -} +#include "../include/rtl8188e_hal.h" /* */ /* Description: */ @@ -86,18 +23,12 @@ void ReadEFuseByte( struct adapter *Adapter, u16 _offset, - u8 *pbuf, - bool pseudo) + u8 *pbuf) { u32 value32; u8 readbyte; u16 retry; - if (pseudo) { - Efuse_Read1ByteFromFakeContent(_offset, pbuf); - return; - } - /* Write Address */ rtw_write8(Adapter, EFUSE_CTRL + 1, (_offset & 0xff)); readbyte = rtw_read8(Adapter, EFUSE_CTRL + 2); @@ -125,134 +56,6 @@ ReadEFuseByte( *pbuf = (u8)(value32 & 0xff); } -/* 11/16/2008 MH Read one byte from real Efuse. */ -u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data, bool pseudo) -{ - u8 tmpidx = 0; - u8 result; - - if (pseudo) { - result = Efuse_Read1ByteFromFakeContent(addr, data); - return result; - } - /* -----------------e-fuse reg ctrl --------------------------------- */ - /* address */ - rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff)); - rtw_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) | - (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC)); - - rtw_write8(pAdapter, EFUSE_CTRL + 3, 0x72);/* read cmd */ - - while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) - tmpidx++; - if (tmpidx < 100) { - *data = rtw_read8(pAdapter, EFUSE_CTRL); - result = true; - } else { - *data = 0xff; - result = false; - } - return result; -} - -/* 11/16/2008 MH Write one byte to reald Efuse. */ -u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data, bool pseudo) -{ - u8 tmpidx = 0; - u8 result; - - if (pseudo) { - result = Efuse_Write1ByteToFakeContent(pAdapter, addr, data); - return result; - } - - /* -----------------e-fuse reg ctrl --------------------------------- */ - /* address */ - rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff)); - rtw_write8(pAdapter, EFUSE_CTRL + 2, - (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC) | - (u8)((addr >> 8) & 0x03)); - rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */ - - rtw_write8(pAdapter, EFUSE_CTRL + 3, 0xF2);/* write cmd */ - - while ((0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) - tmpidx++; - - if (tmpidx < 100) - result = true; - else - result = false; - - return result; -} - -/*----------------------------------------------------------------------------- - * Function: efuse_WordEnableDataRead - * - * Overview: Read allowed word in current efuse section data. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/16/2008 MHC Create Version 0. - * 11/21/2008 MHC Fix Write bug when we only enable late word. - * - *---------------------------------------------------------------------------*/ -void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata) -{ - if (!(word_en & BIT(0))) { - targetdata[0] = sourdata[0]; - targetdata[1] = sourdata[1]; - } - if (!(word_en & BIT(1))) { - targetdata[2] = sourdata[2]; - targetdata[3] = sourdata[3]; - } - if (!(word_en & BIT(2))) { - targetdata[4] = sourdata[4]; - targetdata[5] = sourdata[5]; - } - if (!(word_en & BIT(3))) { - targetdata[6] = sourdata[6]; - targetdata[7] = sourdata[7]; - } -} - -/*----------------------------------------------------------------------------- - * Function: Efuse_ReadAllMap - * - * Overview: Read All Efuse content - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/11/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse, bool pseudo) -{ - u16 mapLen = 0; - - rtl8188e_EfusePowerSwitch(pAdapter, false, true); - - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo); - - rtl8188e_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, pseudo); - - rtl8188e_EfusePowerSwitch(pAdapter, false, false); -} - /*----------------------------------------------------------------------------- * Function: EFUSE_ShadowMapUpdate * @@ -269,18 +72,16 @@ static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse, * 11/13/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ -void EFUSE_ShadowMapUpdate( - struct adapter *pAdapter, - u8 efuseType, - bool pseudo) +void EFUSE_ShadowMapUpdate(struct adapter *pAdapter) { struct eeprom_priv *pEEPROM = &pAdapter->eeprompriv; - u16 mapLen = 0; - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo); + if (pEEPROM->bautoload_fail_flag) { + memset(pEEPROM->efuse_eeprom_data, 0xFF, EFUSE_MAP_LEN_88E); + return; + } - if (pEEPROM->bautoload_fail_flag) - memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen); - else - Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, pseudo); -} /* EFUSE_ShadowMapUpdate */ + rtl8188e_EfusePowerSwitch(pAdapter, true); + rtl8188e_ReadEFuse(pAdapter, 0, EFUSE_MAP_LEN_88E, pEEPROM->efuse_eeprom_data); + rtl8188e_EfusePowerSwitch(pAdapter, false); +} diff --git a/drivers/staging/r8188eu/core/rtw_ieee80211.c b/drivers/staging/r8188eu/core/rtw_ieee80211.c index 343c2f9a4ce8..ad87954bdeb4 100644 --- a/drivers/staging/r8188eu/core/rtw_ieee80211.c +++ b/drivers/staging/r8188eu/core/rtw_ieee80211.c @@ -1160,63 +1160,26 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork) } /* show MCS rate, unit: 100Kbps */ -u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate) +u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate) { u16 max_rate = 0; - if (rf_type == RF_1T1R) { - if (MCS_rate[0] & BIT(7)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1500 : 1350) : ((short_GI_20) ? 722 : 650); - else if (MCS_rate[0] & BIT(6)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1350 : 1215) : ((short_GI_20) ? 650 : 585); - else if (MCS_rate[0] & BIT(5)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520); - else if (MCS_rate[0] & BIT(4)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390); - else if (MCS_rate[0] & BIT(3)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260); - else if (MCS_rate[0] & BIT(2)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 450 : 405) : ((short_GI_20) ? 217 : 195); - else if (MCS_rate[0] & BIT(1)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130); - else if (MCS_rate[0] & BIT(0)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 150 : 135) : ((short_GI_20) ? 72 : 65); - } else { - if (MCS_rate[1]) { - if (MCS_rate[1] & BIT(7)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 3000 : 2700) : ((short_GI_20) ? 1444 : 1300); - else if (MCS_rate[1] & BIT(6)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 2700 : 2430) : ((short_GI_20) ? 1300 : 1170); - else if (MCS_rate[1] & BIT(5)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 2400 : 2160) : ((short_GI_20) ? 1156 : 1040); - else if (MCS_rate[1] & BIT(4)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1800 : 1620) : ((short_GI_20) ? 867 : 780); - else if (MCS_rate[1] & BIT(3)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520); - else if (MCS_rate[1] & BIT(2)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390); - else if (MCS_rate[1] & BIT(1)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260); - else if (MCS_rate[1] & BIT(0)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130); - } else { - if (MCS_rate[0] & BIT(7)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1500 : 1350) : ((short_GI_20) ? 722 : 650); - else if (MCS_rate[0] & BIT(6)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1350 : 1215) : ((short_GI_20) ? 650 : 585); - else if (MCS_rate[0] & BIT(5)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520); - else if (MCS_rate[0] & BIT(4)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390); - else if (MCS_rate[0] & BIT(3)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260); - else if (MCS_rate[0] & BIT(2)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 450 : 405) : ((short_GI_20) ? 217 : 195); - else if (MCS_rate[0] & BIT(1)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130); - else if (MCS_rate[0] & BIT(0)) - max_rate = (bw_40MHz) ? ((short_GI_40) ? 150 : 135) : ((short_GI_20) ? 72 : 65); - } - } + if (MCS_rate[0] & BIT(7)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 1500 : 1350) : ((short_GI_20) ? 722 : 650); + else if (MCS_rate[0] & BIT(6)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 1350 : 1215) : ((short_GI_20) ? 650 : 585); + else if (MCS_rate[0] & BIT(5)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520); + else if (MCS_rate[0] & BIT(4)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390); + else if (MCS_rate[0] & BIT(3)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260); + else if (MCS_rate[0] & BIT(2)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 450 : 405) : ((short_GI_20) ? 217 : 195); + else if (MCS_rate[0] & BIT(1)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130); + else if (MCS_rate[0] & BIT(0)) + max_rate = (bw_40MHz) ? ((short_GI_40) ? 150 : 135) : ((short_GI_20) ? 72 : 65); + return max_rate; } diff --git a/drivers/staging/r8188eu/core/rtw_ioctl_set.c b/drivers/staging/r8188eu/core/rtw_ioctl_set.c index 411b06e135be..eadfbdb94dd5 100644 --- a/drivers/staging/r8188eu/core/rtw_ioctl_set.c +++ b/drivers/staging/r8188eu/core/rtw_ioctl_set.c @@ -110,7 +110,7 @@ u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid) u32 cur_time = 0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - DBG_88E_LEVEL(_drv_info_, "set bssid:%pM\n", bssid); + netdev_dbg(padapter->pnetdev, "set bssid:%pM\n", bssid); if ((bssid[0] == 0x00 && bssid[1] == 0x00 && bssid[2] == 0x00 && bssid[3] == 0x00 && bssid[4] == 0x00 && bssid[5] == 0x00) || @@ -185,8 +185,8 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *pnetwork = &pmlmepriv->cur_network; - DBG_88E_LEVEL(_drv_info_, "set ssid [%s] fw_state=0x%08x\n", - ssid->Ssid, get_fwstate(pmlmepriv)); + netdev_dbg(padapter->pnetdev, "set ssid [%s] fw_state=0x%08x\n", + ssid->Ssid, get_fwstate(pmlmepriv)); if (!padapter->hw_init_completed) { status = _FAIL; @@ -458,7 +458,6 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter) struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network; struct ieee80211_ht_cap *pht_capie; - u8 rf_type = 0; u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0; u16 mcs_rate = 0; u32 ht_ielen = 0; @@ -480,14 +479,10 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter) short_GI_20 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & IEEE80211_HT_CAP_SGI_20) ? 1 : 0; short_GI_40 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & IEEE80211_HT_CAP_SGI_40) ? 1 : 0; - GetHwReg8188EU(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - max_rate = rtw_mcs_rate( - rf_type, - bw_40MHz & (pregistrypriv->cbw40_enable), - short_GI_20, - short_GI_40, - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate - ); + max_rate = rtw_mcs_rate(bw_40MHz & (pregistrypriv->cbw40_enable), + short_GI_20, + short_GI_40, + pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate); } } else { while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) { diff --git a/drivers/staging/r8188eu/core/rtw_led.c b/drivers/staging/r8188eu/core/rtw_led.c index 0e3453639a8b..ccd43accb7dc 100644 --- a/drivers/staging/r8188eu/core/rtw_led.c +++ b/drivers/staging/r8188eu/core/rtw_led.c @@ -3,25 +3,20 @@ #include "../include/drv_types.h" #include "../include/rtw_led.h" +#include "../include/rtl8188e_spec.h" -void BlinkTimerCallback(struct timer_list *t) -{ - struct LED_871x *pLed = from_timer(pLed, t, BlinkTimer); - struct adapter *padapter = pLed->padapter; +#define LED_BLINK_NO_LINK_INTVL msecs_to_jiffies(1000) +#define LED_BLINK_LINK_INTVL msecs_to_jiffies(500) +#define LED_BLINK_SCAN_INTVL msecs_to_jiffies(180) +#define LED_BLINK_FASTER_INTVL msecs_to_jiffies(50) +#define LED_BLINK_WPS_SUCESS_INTVL msecs_to_jiffies(5000) - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped)) - return; +#define IS_LED_WPS_BLINKING(l) \ + ((l)->CurrLedState == LED_BLINK_WPS || \ + (l)->CurrLedState == LED_BLINK_WPS_STOP || \ + (l)->bLedWPSBlinkInProgress) - _set_workitem(&pLed->BlinkWorkItem); -} - -void BlinkWorkItemCallback(struct work_struct *work) -{ - struct LED_871x *pLed = container_of(work, struct LED_871x, BlinkWorkItem); - BlinkHandler(pLed); -} - -void ResetLedStatus(struct LED_871x *pLed) +static void ResetLedStatus(struct LED_871x *pLed) { pLed->CurrLedState = RTW_LED_OFF; /* Current LED state. */ pLed->bLedOn = false; /* true if LED is ON, false if LED is OFF. */ @@ -34,39 +29,48 @@ void ResetLedStatus(struct LED_871x *pLed) pLed->bLedNoLinkBlinkInProgress = false; pLed->bLedLinkBlinkInProgress = false; - pLed->bLedStartToLinkBlinkInProgress = false; pLed->bLedScanBlinkInProgress = false; } -void InitLed871x(struct adapter *padapter, struct LED_871x *pLed, enum LED_PIN_871x LedPin) +static void SwLedOn(struct adapter *padapter, struct LED_871x *pLed) { - pLed->padapter = padapter; - pLed->LedPin = LedPin; + u8 LedCfg; - ResetLedStatus(pLed); + if (padapter->bSurpriseRemoved || padapter->bDriverStopped) + return; - timer_setup(&pLed->BlinkTimer, BlinkTimerCallback, 0); - _init_workitem(&pLed->BlinkWorkItem, BlinkWorkItemCallback, pLed); + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0xf0) | BIT(5) | BIT(6)); /* SW control led0 on. */ + pLed->bLedOn = true; } -void DeInitLed871x(struct LED_871x *pLed) +static void SwLedOff(struct adapter *padapter, struct LED_871x *pLed) { - _cancel_workitem_sync(&pLed->BlinkWorkItem); - _cancel_timer_ex(&pLed->BlinkTimer); - ResetLedStatus(pLed); + u8 LedCfg; + + if (padapter->bSurpriseRemoved || padapter->bDriverStopped) + goto exit; + + LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */ + + LedCfg &= 0x90; /* Set to software control. */ + rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3))); + LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); + LedCfg &= 0xFE; + rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); +exit: + pLed->bLedOn = false; } -static void SwLedBlink1(struct LED_871x *pLed) +static void blink_work(struct work_struct *work) { + struct delayed_work *dwork = to_delayed_work(work); + struct LED_871x *pLed = container_of(dwork, struct LED_871x, blink_work); struct adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - u8 bStopBlinking = false; - /* Change LED according to BlinkingLedState specified. */ - if (pLed->BlinkingLedState == RTW_LED_ON) - SwLedOn(padapter, pLed); - else - SwLedOff(padapter, pLed); + if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped)) + return; if (padapter->pwrctrlpriv.rf_pwrstate != rf_on) { SwLedOff(padapter, pLed); @@ -74,81 +78,67 @@ static void SwLedBlink1(struct LED_871x *pLed) return; } + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) + SwLedOn(padapter, pLed); + else + SwLedOff(padapter, pLed); + switch (pLed->CurrLedState) { case LED_BLINK_SLOWLY: if (pLed->bLedOn) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_NO_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_NO_LINK_INTVL); break; case LED_BLINK_NORMAL: if (pLed->bLedOn) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_LINK_INTVL); break; case LED_BLINK_SCAN: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; pLed->BlinkTimes--; - if (pLed->BlinkTimes == 0) - bStopBlinking = true; - if (bStopBlinking) { + if (pLed->BlinkTimes == 0) { if (check_fwstate(pmlmepriv, _FW_LINKED)) { pLed->bLedLinkBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_NORMAL; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_LINK_INTVL); } else if (!check_fwstate(pmlmepriv, _FW_LINKED)) { pLed->bLedNoLinkBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_SLOWLY; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_NO_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_NO_LINK_INTVL); } pLed->bLedScanBlinkInProgress = false; } else { - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_SCAN_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_SCAN_INTVL); } break; case LED_BLINK_TXRX: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; pLed->BlinkTimes--; - if (pLed->BlinkTimes == 0) - bStopBlinking = true; - if (bStopBlinking) { + if (pLed->BlinkTimes == 0) { if (check_fwstate(pmlmepriv, _FW_LINKED)) { pLed->bLedLinkBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_NORMAL; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_LINK_INTVL); } else if (!check_fwstate(pmlmepriv, _FW_LINKED)) { pLed->bLedNoLinkBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_SLOWLY; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_NO_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_NO_LINK_INTVL); } pLed->bLedBlinkInProgress = false; } else { - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_FASTER_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_FASTER_INTVL); } break; case LED_BLINK_WPS: @@ -156,27 +146,22 @@ static void SwLedBlink1(struct LED_871x *pLed) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_SCAN_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_SCAN_INTVL); break; case LED_BLINK_WPS_STOP: /* WPS success */ - if (pLed->BlinkingLedState == RTW_LED_ON) - bStopBlinking = false; - else - bStopBlinking = true; - - if (bStopBlinking) { + if (pLed->BlinkingLedState != RTW_LED_ON) { pLed->bLedLinkBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_NORMAL; if (pLed->bLedOn) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_LINK_INTVL); pLed->bLedWPSBlinkInProgress = false; } else { pLed->BlinkingLedState = RTW_LED_OFF; - _set_timer(&pLed->BlinkTimer, LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_WPS_SUCESS_INTVL); } break; default: @@ -184,25 +169,56 @@ static void SwLedBlink1(struct LED_871x *pLed) } } -static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAction) +void rtl8188eu_InitSwLeds(struct adapter *padapter) +{ + struct led_priv *pledpriv = &padapter->ledpriv; + struct LED_871x *pLed = &pledpriv->SwLed0; + + pLed->padapter = padapter; + ResetLedStatus(pLed); + INIT_DELAYED_WORK(&pLed->blink_work, blink_work); +} + +void rtl8188eu_DeInitSwLeds(struct adapter *padapter) +{ + struct led_priv *ledpriv = &padapter->ledpriv; + struct LED_871x *pLed = &ledpriv->SwLed0; + + cancel_delayed_work_sync(&pLed->blink_work); + ResetLedStatus(pLed); + SwLedOff(padapter, pLed); +} + +void rtw_led_control(struct adapter *padapter, enum LED_CTL_MODE LedAction) { struct led_priv *ledpriv = &padapter->ledpriv; + struct registry_priv *registry_par; struct LED_871x *pLed = &ledpriv->SwLed0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped) || + (!padapter->hw_init_completed)) + return; + + if (!ledpriv->bRegUseLed) + return; + + registry_par = &padapter->registrypriv; + if (!registry_par->led_enable) + return; + switch (LedAction) { - case LED_CTL_POWER_ON: case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: if (!pLed->bLedNoLinkBlinkInProgress) { if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) return; if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } @@ -212,7 +228,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_NO_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_NO_LINK_INTVL); } break; case LED_CTL_LINK: @@ -220,11 +236,11 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) return; if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } pLed->bLedLinkBlinkInProgress = true; @@ -233,7 +249,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_LINK_INTVL); } break; case LED_CTL_SITE_SURVEY: @@ -243,15 +259,15 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct if (IS_LED_WPS_BLINKING(pLed)) return; if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } pLed->bLedScanBlinkInProgress = true; @@ -261,7 +277,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_SCAN_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_SCAN_INTVL); } break; case LED_CTL_TX: @@ -270,11 +286,11 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) return; if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } pLed->bLedBlinkInProgress = true; @@ -284,26 +300,25 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_FASTER_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_FASTER_INTVL); } break; case LED_CTL_START_WPS: /* wait until xinpin finish */ - case LED_CTL_START_WPS_BOTTON: if (!pLed->bLedWPSBlinkInProgress) { if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } if (pLed->bLedScanBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedScanBlinkInProgress = false; } pLed->bLedWPSBlinkInProgress = true; @@ -312,42 +327,42 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_SCAN_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_SCAN_INTVL); } break; case LED_CTL_STOP_WPS: if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } if (pLed->bLedScanBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedScanBlinkInProgress = false; } if (pLed->bLedWPSBlinkInProgress) - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); else pLed->bLedWPSBlinkInProgress = true; pLed->CurrLedState = LED_BLINK_WPS_STOP; if (pLed->bLedOn) { pLed->BlinkingLedState = RTW_LED_OFF; - _set_timer(&pLed->BlinkTimer, LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_WPS_SUCESS_INTVL); } else { pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, 0); + schedule_delayed_work(&pLed->blink_work, 0); } break; case LED_CTL_STOP_WPS_FAIL: if (pLed->bLedWPSBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedWPSBlinkInProgress = false; } pLed->bLedNoLinkBlinkInProgress = true; @@ -356,29 +371,29 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; - _set_timer(&pLed->BlinkTimer, LED_BLINK_NO_LINK_INTERVAL_ALPHA); + schedule_delayed_work(&pLed->blink_work, LED_BLINK_NO_LINK_INTVL); break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if (pLed->bLedNoLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedNoLinkBlinkInProgress = false; } if (pLed->bLedLinkBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedBlinkInProgress = false; } if (pLed->bLedWPSBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedWPSBlinkInProgress = false; } if (pLed->bLedScanBlinkInProgress) { - _cancel_timer_ex(&pLed->BlinkTimer); + cancel_delayed_work(&pLed->blink_work); pLed->bLedScanBlinkInProgress = false; } SwLedOff(padapter, pLed); @@ -387,41 +402,3 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct break; } } - -void BlinkHandler(struct LED_871x *pLed) -{ - struct adapter *padapter = pLed->padapter; - - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped)) - return; - - SwLedBlink1(pLed); -} - -void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction) -{ - struct led_priv *ledpriv = &padapter->ledpriv; - struct registry_priv *registry_par; - - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped) || - (!padapter->hw_init_completed)) - return; - - if (!ledpriv->bRegUseLed) - return; - - registry_par = &padapter->registrypriv; - if (!registry_par->led_enable) - return; - - if ((padapter->pwrctrlpriv.rf_pwrstate != rf_on && - padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) && - (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || - LedAction == LED_CTL_SITE_SURVEY || - LedAction == LED_CTL_LINK || - LedAction == LED_CTL_NO_LINK || - LedAction == LED_CTL_POWER_ON)) - return; - - SwLedControlMode1(padapter, LedAction); -} diff --git a/drivers/staging/r8188eu/core/rtw_mlme.c b/drivers/staging/r8188eu/core/rtw_mlme.c index 8d14aff32f61..394e8a5ce03c 100644 --- a/drivers/staging/r8188eu/core/rtw_mlme.c +++ b/drivers/staging/r8188eu/core/rtw_mlme.c @@ -913,7 +913,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, str psta->aid = pnetwork->join_res; psta->mac_id = 0; /* sta mode */ - rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true); + rtl8188e_SetHalODMVar(padapter, psta, true); /* security related */ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { padapter->securitypriv.binstallGrpkey = false; @@ -1198,7 +1198,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf) psta->mac_id = (uint)pstassoc->cam_id; DBG_88E("%s\n", __func__); /* for ad-hoc mode */ - rtl8188e_SetHalODMVar(adapter, HAL_ODM_STA_INFO, psta, true); + rtl8188e_SetHalODMVar(adapter, psta, true); rtw_sta_media_status_rpt(adapter, psta, 1); if (adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm; @@ -1999,17 +1999,11 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len) (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & BIT(1)) && (pmlmeinfo->HT_info.infos[0] & BIT(2))) { int i; - u8 rf_type; - - GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); /* update the MCS rates */ - for (i = 0; i < 16; i++) { - if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - } + for (i = 0; i < 16; i++) + pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; + /* switch to the 40M Hz mode according to the AP */ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) { diff --git a/drivers/staging/r8188eu/core/rtw_mlme_ext.c b/drivers/staging/r8188eu/core/rtw_mlme_ext.c index 55c3d4a6faeb..a9141ab1690e 100644 --- a/drivers/staging/r8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/r8188eu/core/rtw_mlme_ext.c @@ -10,7 +10,6 @@ #include "../include/wlan_bssdef.h" #include "../include/mlme_osdep.h" #include "../include/recv_osdep.h" -#include "../include/rtl8188e_sreset.h" #include "../include/rtl8188e_xmit.h" #include "../include/rtl8188e_dm.h" @@ -77,7 +76,7 @@ unsigned char MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, /******************************************************** ChannelPlan definitions *********************************************************/ -static struct rt_channel_plan_2g RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { +static struct rt_channel_plan RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, /* 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, /* 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, /* 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 */ @@ -107,6 +106,7 @@ static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { {0x01}, /* 0x10, RT_CHANNEL_DOMAIN_JAPAN */ {0x02}, /* 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS */ {0x01}, /* 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS */ + {0x00}, /* 0x13 */ {0x02}, /* 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS */ {0x00}, /* 0x15, RT_CHANNEL_DOMAIN_ETSI_NO_DFS */ {0x00}, /* 0x16, RT_CHANNEL_DOMAIN_KOREA_NO_DFS */ @@ -118,6 +118,7 @@ static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { {0x00}, /* 0x1C, */ {0x00}, /* 0x1D, */ {0x00}, /* 0x1E, */ + {0x00}, /* 0x1F, */ /* 0x20 ~ 0x7F , New Define ===== */ {0x00}, /* 0x20, RT_CHANNEL_DOMAIN_WORLD_NULL */ {0x01}, /* 0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL */ @@ -250,7 +251,8 @@ static void init_mlme_ext_priv_value(struct adapter *padapter) static int has_channel(struct rt_channel_info *channel_set, u8 chanset_size, - u8 chan) { + u8 chan) +{ int i; for (i = 0; i < chanset_size; i++) { @@ -262,7 +264,8 @@ static int has_channel(struct rt_channel_info *channel_set, static void init_channel_list(struct adapter *padapter, struct rt_channel_info *channel_set, u8 chanset_size, - struct p2p_channels *channel_list) { + struct p2p_channels *channel_list) +{ struct p2p_oper_class_map op_class[] = { { IEEE80211G, 81, 1, 13, 1, BW20 }, { IEEE80211G, 82, 14, 14, 1, BW20 }, @@ -653,9 +656,11 @@ unsigned int OnBeacon(struct adapter *padapter, struct recv_frame *precv_frame) if (psta) { ret = rtw_check_bcn_info(padapter, pframe, len); if (!ret) { - DBG_88E_LEVEL(_drv_info_, "ap has changed, disconnect now\n "); - receive_disconnect(padapter, pmlmeinfo->network.MacAddress, 0); - return _SUCCESS; + netdev_dbg(padapter->pnetdev, + "ap has changed, disconnect now\n"); + receive_disconnect(padapter, + pmlmeinfo->network.MacAddress, 0); + return _SUCCESS; } /* update WMM, ERP in the beacon */ /* todo: the timer is used instead of the number of the beacon received */ @@ -929,7 +934,7 @@ unsigned int OnAuthClient(struct adapter *padapter, struct recv_frame *precv_fra } if (go2asoc) { - DBG_88E_LEVEL(_drv_info_, "auth success, start assoc\n"); + netdev_dbg(padapter->pnetdev, "auth success, start assoc\n"); start_clnt_assoc(padapter); return _SUCCESS; } @@ -1501,8 +1506,9 @@ unsigned int OnDeAuth(struct adapter *padapter, struct recv_frame *precv_frame) struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; - DBG_88E_LEVEL(_drv_always_, "ap recv deauth reason code(%d) sta:%pM\n", - reason, GetAddr2Ptr(pframe)); + netdev_dbg(padapter->pnetdev, + "ap recv deauth reason code(%d) sta:%pM\n", + reason, GetAddr2Ptr(pframe)); psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (psta) { @@ -1538,8 +1544,9 @@ unsigned int OnDeAuth(struct adapter *padapter, struct recv_frame *precv_frame) } } - DBG_88E_LEVEL(_drv_always_, "sta recv deauth reason code(%d) sta:%pM, ignore = %d\n", - reason, GetAddr3Ptr(pframe), ignore_received_deauth); + netdev_dbg(padapter->pnetdev, + "sta recv deauth reason code(%d) sta:%pM, ignore = %d\n", + reason, GetAddr3Ptr(pframe), ignore_received_deauth); if (!ignore_received_deauth) receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); @@ -1574,8 +1581,9 @@ unsigned int OnDisassoc(struct adapter *padapter, struct recv_frame *precv_frame struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; - DBG_88E_LEVEL(_drv_always_, "ap recv disassoc reason code(%d) sta:%pM\n", - reason, GetAddr2Ptr(pframe)); + netdev_dbg(padapter->pnetdev, + "ap recv disassoc reason code(%d) sta:%pM\n", + reason, GetAddr2Ptr(pframe)); psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (psta) { @@ -1594,8 +1602,9 @@ unsigned int OnDisassoc(struct adapter *padapter, struct recv_frame *precv_frame return _SUCCESS; } else { - DBG_88E_LEVEL(_drv_always_, "ap recv disassoc reason code(%d) sta:%pM\n", - reason, GetAddr3Ptr(pframe)); + netdev_dbg(padapter->pnetdev, + "ap recv disassoc reason code(%d) sta:%pM\n", + reason, GetAddr3Ptr(pframe)); receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); } @@ -5060,7 +5069,7 @@ void issue_assocreq(struct adapter *padapter) __le16 *fctrl; __le16 le_tmp; unsigned int i, j, ie_len, index = 0; - unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates]; + unsigned char bssrate[NumRates], sta_bssrate[NumRates]; struct ndis_802_11_var_ie *pIE; struct registry_priv *pregpriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -5185,25 +5194,10 @@ void issue_assocreq(struct adapter *padapter) /* todo: disable SM power save mode */ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x000c); - GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - switch (rf_type) { - case RF_1T1R: - if (pregpriv->rx_stbc) - pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);/* RX STBC One spatial stream */ - memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); - break; - case RF_2T2R: - case RF_1T2R: - default: - if ((pregpriv->rx_stbc == 0x3) ||/* enable for 2.4/5 GHz */ - ((pmlmeext->cur_wireless_mode & WIRELESS_11_24N) && (pregpriv->rx_stbc == 0x1)) || /* enable for 2.4GHz */ - (pregpriv->wifi_spec == 1)) { - DBG_88E("declare supporting RX STBC\n"); - pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0200);/* RX STBC two spatial stream */ - } - memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R, 16); - break; - } + if (pregpriv->rx_stbc) + pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);/* RX STBC One spatial stream */ + memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); + pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len, (u8 *)(&pmlmeinfo->HT_caps), &pattrib->pktlen); } } @@ -6491,7 +6485,7 @@ void start_clnt_auth(struct adapter *padapter) /* For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. */ issue_deauth(padapter, (&pmlmeinfo->network)->MacAddress, WLAN_REASON_DEAUTH_LEAVING); - DBG_88E_LEVEL(_drv_info_, "start auth\n"); + netdev_dbg(padapter->pnetdev, "start auth\n"); issue_auth(padapter, NULL, 0); set_link_timer(pmlmeext, REAUTH_TO); @@ -6845,12 +6839,12 @@ void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, unsi struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); + pcmd_obj = kzalloc(sizeof(*pcmd_obj), GFP_ATOMIC); if (!pcmd_obj) return; cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); - pevtcmd = kzalloc(cmdsz, GFP_KERNEL); + pevtcmd = kzalloc(cmdsz, GFP_ATOMIC); if (!pevtcmd) { kfree(pcmd_obj); return; @@ -7130,8 +7124,7 @@ void mlmeext_sta_del_event_callback(struct adapter *padapter) Following are the functions for the timer handlers *****************************************************************************/ -void _linked_rx_signal_strehgth_display(struct adapter *padapter); -void _linked_rx_signal_strehgth_display(struct adapter *padapter) +static void _linked_rx_signal_strength_display(struct adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; @@ -7165,6 +7158,23 @@ static u8 chk_ap_is_alive(struct adapter *padapter, struct sta_info *psta) return ret; } +static void rtl8188e_sreset_linked_status_check(struct adapter *padapter) +{ + u32 rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS); + u8 fw_status; + + if (rx_dma_status != 0x00) { + DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status); + rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status); + } + + fw_status = rtw_read8(padapter, REG_FMETHR); + if (fw_status == 1) + DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status); + else if (fw_status == 2) + DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status); +} + void linked_status_chk(struct adapter *padapter) { u32 i; @@ -7175,7 +7185,7 @@ void linked_status_chk(struct adapter *padapter) struct sta_priv *pstapriv = &padapter->stapriv; if (padapter->bRxRSSIDisplay) - _linked_rx_signal_strehgth_display(padapter); + _linked_rx_signal_strength_display(padapter); rtl8188e_sreset_linked_status_check(padapter); @@ -7236,8 +7246,8 @@ void linked_status_chk(struct adapter *padapter) if (rx_chk == _FAIL) { pmlmeext->retry++; if (pmlmeext->retry > rx_chk_limit) { - DBG_88E_LEVEL(_drv_always_, FUNC_ADPT_FMT" disconnect or roaming\n", - FUNC_ADPT_ARG(padapter)); + netdev_dbg(padapter->pnetdev, + "disconnect or roaming\n"); receive_disconnect(padapter, pmlmeinfo->network.MacAddress, WLAN_REASON_EXPIRATION_CHK); return; @@ -7762,8 +7772,9 @@ u8 setkey_hdl(struct adapter *padapter, u8 *pbuf) /* write cam */ ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; - DBG_88E_LEVEL(_drv_info_, "set group key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) " - "keyid:%d\n", pparm->algorithm, pparm->keyid); + netdev_dbg(padapter->pnetdev, + "set group key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) keyid:%d\n", + pparm->algorithm, pparm->keyid); write_cam(padapter, pparm->keyid, ctrl, null_sta, pparm->key); return H2C_SUCCESS; @@ -7792,8 +7803,9 @@ u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf) cam_id = 4; - DBG_88E_LEVEL(_drv_info_, "set pairwise key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) camid:%d\n", - pparm->algorithm, cam_id); + netdev_dbg(padapter->pnetdev, + "set pairwise key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) camid:%d\n", + pparm->algorithm, cam_id); if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; diff --git a/drivers/staging/r8188eu/core/rtw_p2p.c b/drivers/staging/r8188eu/core/rtw_p2p.c index b265b5e46851..7b30b9b64b41 100644 --- a/drivers/staging/r8188eu/core/rtw_p2p.c +++ b/drivers/staging/r8188eu/core/rtw_p2p.c @@ -1806,8 +1806,6 @@ void reset_global_wifidirect_info(struct adapter *padapter) pwdinfo = &padapter->wdinfo; pwdinfo->persistent_supported = 0; pwdinfo->session_available = true; - pwdinfo->wfd_tdls_enable = 0; - pwdinfo->wfd_tdls_weaksec = 0; } void rtw_init_wifidirect_timers(struct adapter *padapter) @@ -1912,7 +1910,6 @@ void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role) memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4); memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3); memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info)); - pwdinfo->wfd_tdls_enable = 0; memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN); memset(pwdinfo->p2p_peer_device_addr, 0x00, ETH_ALEN); @@ -1944,7 +1941,6 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role) /* Enable P2P function */ init_wifidirect_info(padapter, role); - rtl8188e_SetHalODMVar(padapter, HAL_ODM_P2P_STATE, NULL, true); } else if (role == P2P_ROLE_DISABLE) { if (_FAIL == rtw_pwr_wakeup(padapter)) { ret = _FAIL; @@ -1963,8 +1959,6 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role) memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); } - rtl8188e_SetHalODMVar(padapter, HAL_ODM_P2P_STATE, NULL, false); - /* Restore to initial setting. */ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); } diff --git a/drivers/staging/r8188eu/core/rtw_pwrctrl.c b/drivers/staging/r8188eu/core/rtw_pwrctrl.c index 5d595cf2a47e..46e44aee587f 100644 --- a/drivers/staging/r8188eu/core/rtw_pwrctrl.c +++ b/drivers/staging/r8188eu/core/rtw_pwrctrl.c @@ -15,9 +15,12 @@ void ips_enter(struct adapter *padapter) if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF || pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) { - DBG_88E_LEVEL(_drv_info_, "There are some pkts to transmit\n"); - DBG_88E_LEVEL(_drv_info_, "free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n", - pxmit_priv->free_xmitbuf_cnt, pxmit_priv->free_xmit_extbuf_cnt); + netdev_dbg(padapter->pnetdev, + "There are some pkts to transmit\n"); + netdev_dbg(padapter->pnetdev, + "free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n", + pxmit_priv->free_xmitbuf_cnt, + pxmit_priv->free_xmit_extbuf_cnt); return; } @@ -32,7 +35,7 @@ void ips_enter(struct adapter *padapter) DBG_88E("==>ips_enter cnts:%d\n", pwrpriv->ips_enter_cnts); if (rf_off == pwrpriv->change_rfpwrstate) { pwrpriv->bpower_saving = true; - DBG_88E_LEVEL(_drv_info_, "nolinked power save enter\n"); + netdev_dbg(padapter->pnetdev, "nolinked power save enter\n"); if (pwrpriv->ips_mode == IPS_LEVEL_2) pwrpriv->bkeepfwalive = true; @@ -65,7 +68,7 @@ int ips_leave(struct adapter *padapter) if (result == _SUCCESS) { pwrpriv->rf_pwrstate = rf_on; } - DBG_88E_LEVEL(_drv_info_, "nolinked power save leave\n"); + netdev_dbg(padapter->pnetdev, "nolinked power save leave\n"); if ((_WEP40_ == psecuritypriv->dot11PrivacyAlgrthm) || (_WEP104_ == psecuritypriv->dot11PrivacyAlgrthm)) { DBG_88E("==>%s, channel(%d), processing(%x)\n", __func__, padapter->mlmeextpriv.cur_channel, pwrpriv->bips_processing); @@ -348,7 +351,6 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter) pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL; pwrctrlpriv->pwr_state_check_cnts = 0; - pwrctrlpriv->bInternalAutoSuspend = false; pwrctrlpriv->bInSuspend = false; pwrctrlpriv->bkeepfwalive = false; @@ -393,7 +395,7 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal } /* System suspend is not allowed to wakeup */ - if ((!pwrpriv->bInternalAutoSuspend) && pwrpriv->bInSuspend) { + if (pwrpriv->bInSuspend) { while (pwrpriv->bInSuspend && (rtw_get_passing_time_ms(start) <= 3000 || (rtw_get_passing_time_ms(start) <= 500))) @@ -404,12 +406,6 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal DBG_88E("%s wait bInSuspend done\n", __func__); } - /* block??? */ - if ((pwrpriv->bInternalAutoSuspend) && (padapter->net_closed)) { - ret = _FAIL; - goto exit; - } - /* I think this should be check in IPS, LPS, autosuspend functions... */ if (check_fwstate(pmlmepriv, _FW_LINKED)) { ret = _SUCCESS; diff --git a/drivers/staging/r8188eu/core/rtw_rf.c b/drivers/staging/r8188eu/core/rtw_rf.c index 2ec56012516e..e704092d31d0 100644 --- a/drivers/staging/r8188eu/core/rtw_rf.c +++ b/drivers/staging/r8188eu/core/rtw_rf.c @@ -35,7 +35,7 @@ static struct ch_freq ch_freq_map[] = { {216, 5080},/* Japan, means J16 */ }; -static int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); +static int ch_freq_map_num = ARRAY_SIZE(ch_freq_map); u32 rtw_ch2freq(u32 channel) { diff --git a/drivers/staging/r8188eu/core/rtw_security.c b/drivers/staging/r8188eu/core/rtw_security.c index db35f326bbb1..4e93c720c1b6 100644 --- a/drivers/staging/r8188eu/core/rtw_security.c +++ b/drivers/staging/r8188eu/core/rtw_security.c @@ -545,7 +545,8 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe) if (is_multicast_ether_addr(prxattrib->ra)) { if (!psecuritypriv->binstallGrpkey) { res = _FAIL; - DBG_88E("%s:rx bc/mc packets, but didn't install group key!!!!!!!!!!\n", __func__); + netdev_dbg(padapter->pnetdev, + "rx bc/mc packets, but didn't install group key!\n"); goto exit; } prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; @@ -1145,7 +1146,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe) return res; } -static int aes_decipher(u8 *key, uint hdrlen, +static int aes_decipher(struct adapter *padapter, u8 *key, uint hdrlen, u8 *pframe, uint plen) { static u8 message[MAX_MSG_SIZE]; @@ -1329,8 +1330,10 @@ static int aes_decipher(u8 *key, uint hdrlen, /* compare the mic */ for (i = 0; i < 8; i++) { if (pframe[hdrlen + 8 + plen - 8 + i] != message[hdrlen + 8 + plen - 8 + i]) { - DBG_88E("aes_decipher:mic check error mic[%d]: pframe(%x)!=message(%x)\n", - i, pframe[hdrlen + 8 + plen - 8 + i], message[hdrlen + 8 + plen - 8 + i]); + netdev_dbg(padapter->pnetdev, + "mic check error mic[%d]: pframe(%x)!=message(%x)\n", + i, pframe[hdrlen + 8 + plen - 8 + i], + message[hdrlen + 8 + plen - 8 + i]); res = _FAIL; } } @@ -1358,13 +1361,16 @@ u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe) /* in concurrent we should use sw descrypt in group key, so we remove this message */ if (!psecuritypriv->binstallGrpkey) { res = _FAIL; - DBG_88E("%s:rx bc/mc packets, but didn't install group key!!!!!!!!!!\n", __func__); + netdev_dbg(padapter->pnetdev, + "rx bc/mc packets, but didn't install group key!\n"); goto exit; } prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) { - DBG_88E("not match packet_index=%d, install_index=%d\n", - prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); + netdev_dbg(padapter->pnetdev, + "not match packet_index=%d, install_index=%d\n", + prxattrib->key_index, + psecuritypriv->dot118021XGrpKeyid); res = _FAIL; goto exit; } @@ -1372,7 +1378,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe) prwskey = &stainfo->dot118021x_UncstKey.skey[0]; } length = precvframe->len - prxattrib->hdrlen - prxattrib->iv_len; - res = aes_decipher(prwskey, prxattrib->hdrlen, pframe, length); + res = aes_decipher(padapter, prwskey, prxattrib->hdrlen, pframe, length); } else { res = _FAIL; } diff --git a/drivers/staging/r8188eu/core/rtw_sta_mgt.c b/drivers/staging/r8188eu/core/rtw_sta_mgt.c index a3d4d5d8a785..54561ff239a0 100644 --- a/drivers/staging/r8188eu/core/rtw_sta_mgt.c +++ b/drivers/staging/r8188eu/core/rtw_sta_mgt.c @@ -310,7 +310,7 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta) } if (!(psta->state & WIFI_AP_STATE)) - rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, false); + rtl8188e_SetHalODMVar(padapter, psta, false); spin_lock_bh(&pstapriv->auth_list_lock); if (!list_empty(&psta->auth_list)) { diff --git a/drivers/staging/r8188eu/core/rtw_wlan_util.c b/drivers/staging/r8188eu/core/rtw_wlan_util.c index 6d4e21a16783..d40669c21fc1 100644 --- a/drivers/staging/r8188eu/core/rtw_wlan_util.c +++ b/drivers/staging/r8188eu/core/rtw_wlan_util.c @@ -695,7 +695,6 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { unsigned int i; - u8 rf_type; u8 max_AMPDU_len, min_MPDU_spacing; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; @@ -716,29 +715,19 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]); } else { /* modify from fw by Thomas 2010/11/17 */ - if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) - max_AMPDU_len = (pIE->data[i] & 0x3); - else - max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); + max_AMPDU_len = min(pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3, + pIE->data[i] & 0x3); - if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c)) - min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); - else - min_MPDU_spacing = (pIE->data[i] & 0x1c); + min_MPDU_spacing = max(pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c, + pIE->data[i] & 0x1c); pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing; } } - GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - /* update the MCS rates */ - for (i = 0; i < 16; i++) { - if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - } + for (i = 0; i < 16; i++) + pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; } void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) diff --git a/drivers/staging/r8188eu/core/rtw_xmit.c b/drivers/staging/r8188eu/core/rtw_xmit.c index 0c033a077bf9..8503059edc46 100644 --- a/drivers/staging/r8188eu/core/rtw_xmit.c +++ b/drivers/staging/r8188eu/core/rtw_xmit.c @@ -461,7 +461,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p } } } else if (0x888e == pattrib->ether_type) { - DBG_88E_LEVEL(_drv_info_, "send eapol packet\n"); + netdev_dbg(padapter->pnetdev, "send eapol packet\n"); } if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) diff --git a/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c b/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c index 48ede610cd28..6505e1fcb070 100644 --- a/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c +++ b/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c @@ -4,66 +4,42 @@ #include "../include/Hal8188EPwrSeq.h" #include "../include/rtl8188e_hal.h" -/* - drivers should parse below arrays and do the corresponding actions -*/ -/* 3 Power on Array */ -struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Radio off Array */ -struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_END -}; - -/* 3Card Disable Array */ -struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_CARDDIS - RTL8188E_TRANS_END -}; - -/* 3 Card Enable Array */ -struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDDIS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Suspend Array */ -struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_SUS - RTL8188E_TRANS_END -}; - -/* 3 Resume Array */ -struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_SUS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3HWPDN Array */ -struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_PDN - RTL8188E_TRANS_END -}; - -/* 3 Enter LPS */ -struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_ACT_TO_LPS - RTL8188E_TRANS_END -}; - -/* 3 Leave LPS */ -struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_LPS_TO_ACT - RTL8188E_TRANS_END +struct wl_pwr_cfg rtl8188E_power_on_flow[] = { + { 0x0006, PWR_CMD_POLLING, BIT(1), BIT(1) }, + { 0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0 }, /* reset BB */ + { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */ + { 0x0005, PWR_CMD_WRITE, BIT(7), 0 }, /* disable HWPDN (control by DRV)*/ + { 0x0005, PWR_CMD_WRITE, BIT(4) | BIT(3), 0 }, /* disable WL suspend*/ + { 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) }, + { 0x0005, PWR_CMD_POLLING, BIT(0), 0 }, + { 0x0023, PWR_CMD_WRITE, BIT(4), 0 }, + { 0xFFFF, PWR_CMD_END, 0, 0 }, +}; + +struct wl_pwr_cfg rtl8188E_card_disable_flow[] = { + { 0x001F, PWR_CMD_WRITE, 0xFF, 0 }, /* turn off RF */ + { 0x0023, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* LDO Sleep mode */ + { 0x0005, PWR_CMD_WRITE, BIT(1), BIT(1) }, /* turn off MAC by HW state machine */ + { 0x0005, PWR_CMD_POLLING, BIT(1), 0 }, + { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */ + { 0x0005, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /* enable WL suspend */ + { 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */ + { 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */ + { 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */ + { 0xFFFF, PWR_CMD_END, 0, 0 }, +}; + +/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ +struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = { + { 0x0522, PWR_CMD_WRITE, 0xFF, 0x7F },/* Tx Pause */ + { 0x05F8, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */ + { 0x05F9, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */ + { 0x05FA, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */ + { 0x05FB, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */ + { 0x0002, PWR_CMD_WRITE, BIT(0), 0 }, /* CCK and OFDM are disabled, clocks are gated */ + { 0x0002, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US }, + { 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */ + { 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */ + { 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */ + { 0xFFFF, PWR_CMD_END, 0, 0 }, }; diff --git a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c index 2d351f831289..57e8f5573846 100644 --- a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c +++ b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c @@ -1,20 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 -/* Copyright (c) Realtek Semiconductor Corp. -Module Name: - RateAdaptive.c +/* Copyright (c) Realtek Semiconductor Corp. */ -Abstract: - Implement Rate Adaptive functions for common operations. - -Major Change History: - When Who What - ---------- --------------- ------------------------------- - 2011-08-12 Page Create. - ---*/ -#include "../include/odm_precomp.h" - -/* Rate adaptive parameters */ +#include "../include/drv_types.h" static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = { {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */ @@ -316,19 +303,19 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0000000d; break; case 12: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR0); + MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR0); pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg; break; case 13: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR1); + MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR1); pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg; break; case 14: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR2); + MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR2); pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg; break; case 15: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR3); + MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR3); pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg; break; default: @@ -590,7 +577,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime) { - ODM_Write2Byte(dm_odm, REG_TX_RPT_TIME, minRptTime); + rtw_write16(dm_odm->Adapter, REG_TX_RPT_TIME, minRptTime); } void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1) diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c index f6e4243e0c7b..e7f834b02567 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" #include "../include/rtw_iol.h" #define read_next_pair(array, v1, v2, i) \ diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c index b4c55863d3fb..20ce1571fc26 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" #include "../include/rtw_iol.h" static bool Checkcondition(const u32 condition, const u32 hex) diff --git a/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c b/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c index 5e0a96200078..9dc888a66d09 100644 --- a/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c +++ b/drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" #include "../include/rtw_iol.h" static bool CheckCondition(const u32 Condition, const u32 Hex) diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c index 60d4ba275196..21ecc90a558c 100644 --- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c +++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" +#include "../include/drv_types.h" /*---------------------------Define Local Constant---------------------------*/ /* 2010/04/25 MH Define the max tx power tracking tx agc power. */ @@ -98,7 +98,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( struct adapter *Adapter ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; u8 ThermalValue_AVG_count = 0; u32 ThermalValue_AVG = 0; @@ -137,7 +137,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( /* <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317; - ThermalValue = (u8)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ if (is2t) rf = 2; @@ -146,7 +146,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( if (ThermalValue) { /* Query OFDM path A default setting */ - ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord) & bMaskOFDM_D; + ele_D = rtl8188e_PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord) & bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ if (ele_D == (OFDMSwingTable[i] & bMaskOFDM_D)) { OFDM_index_old[0] = (u8)i; @@ -157,7 +157,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( /* Query OFDM path B default setting */ if (is2t) { - ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord) & bMaskOFDM_D; + ele_D = rtl8188e_PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord) & bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ if (ele_D == (OFDMSwingTable[i] & bMaskOFDM_D)) { OFDM_index_old[1] = (u8)i; @@ -171,13 +171,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( for (i = 0; i < CCK_TABLE_SIZE; i++) { if (dm_odm->RFCalibrateInfo.bCCKinCH14) { - if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4) == 0) { + if (memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) { CCK_index_old = (u8)i; dm_odm->BbSwingIdxCckBase = (u8)i; break; } } else { - if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4) == 0) { + if (memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) { CCK_index_old = (u8)i; dm_odm->BbSwingIdxCckBase = (u8)i; break; @@ -329,17 +329,17 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( /* wtite new elements A, C, D to regC88 and regC9C, element B is always 0 */ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); value32 = (ele_C & 0x000003C0) >> 6; - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); value32 = ((X * ele_D) >> 7) & 0x01; - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(28), value32); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT(28), value32); } else { - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(28), 0x00); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT(28), 0x00); } } } @@ -361,35 +361,33 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( #define IQK_DELAY_TIME 1 /* ms */ static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) +phy_PathA_IQK_8188E(struct adapter *adapt) { u32 regeac, regE94, regE9C; u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; /* 1 Tx IQK */ /* path-A IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160000); /* LO calibration setting */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); /* One shot, path A LOK & IQK */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); /* delay x ms */ /* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */ - ODM_delay_ms(IQK_DELAY_TIME_88E); + mdelay(IQK_DELAY_TIME_88E); /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); + regeac = rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); + regE94 = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); + regE9C = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord); if (!(regeac & BIT(28)) && (((regE94 & 0x03FF0000) >> 16) != 0x142) && @@ -399,51 +397,49 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) } static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) +phy_PathA_RxIQK(struct adapter *adapt) { u32 regeac, regE94, regE9C, regEA4, u4tmp; u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; /* 1 Get TXIMR setting */ /* modify RXIQK mode table */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B); /* PA,PAD off */ - ODM_SetRFReg(dm_odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980); - ODM_SetRFReg(dm_odm, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); /* IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x81004800); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK, bMaskDWord, 0x01007c00); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK, bMaskDWord, 0x81004800); /* path-A IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160000); /* LO calibration setting */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); /* One shot, path A LOK & IQK */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); /* delay x ms */ - ODM_delay_ms(IQK_DELAY_TIME_88E); + mdelay(IQK_DELAY_TIME_88E); /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); + regeac = rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); + regE94 = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); + regE9C = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord); if (!(regeac & BIT(28)) && (((regE94 & 0x03FF0000) >> 16) != 0x142) && @@ -453,46 +449,46 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) return result; u4tmp = 0x80007C00 | (regE94 & 0x3FF0000) | ((regE9C & 0x3FF0000) >> 16); - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, u4tmp); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK, bMaskDWord, u4tmp); /* 1 RX IQK */ /* modify RXIQK mode table */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); /* IQK setting */ - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x01004800); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK, bMaskDWord, 0x01004800); /* path-A IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); /* LO calibration setting */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); /* One shot, path A LOK & IQK */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + rtl8188e_PHY_SetBBReg(adapt, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); /* delay x ms */ /* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */ - ODM_delay_ms(IQK_DELAY_TIME_88E); + mdelay(IQK_DELAY_TIME_88E); /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); - regEA4 = ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_A_2, bMaskDWord); + regeac = rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); + regE94 = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); + regE9C = rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord); + regEA4 = rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_Before_IQK_A_2, bMaskDWord); /* reload RF 0xdf */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180); if (!(regeac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ (((regEA4 & 0x03FF0000) >> 16) != 0x132) && @@ -502,95 +498,54 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) return result; } -static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathB_IQK_8188E(struct adapter *adapt) -{ - u32 regeac, regeb4, regebc, regec4, regecc; - u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - /* One shot, path B LOK & IQK */ - ODM_SetBBReg(dm_odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - ODM_SetBBReg(dm_odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - /* delay x ms */ - ODM_delay_ms(IQK_DELAY_TIME_88E); - - /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - regeb4 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord); - regebc = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord); - regec4 = ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_B_2, bMaskDWord); - regecc = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_B_2, bMaskDWord); - - if (!(regeac & BIT(31)) && - (((regeb4 & 0x03FF0000) >> 16) != 0x142) && - (((regebc & 0x03FF0000) >> 16) != 0x42)) - result |= 0x01; - else - return result; - - if (!(regeac & BIT(30)) && - (((regec4 & 0x03FF0000) >> 16) != 0x132) && - (((regecc & 0x03FF0000) >> 16) != 0x36)) - result |= 0x02; - - return result; -} - static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) { u32 Oldval_0, X, TX0_A, reg; s32 Y, TX0_C; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; if (final_candidate == 0xFF) { return; } else if (iqkok) { - Oldval_0 = (ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + Oldval_0 = (rtl8188e_PHY_QueryBBReg(adapt, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; X = result[final_candidate][0]; if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX0_A = (X * Oldval_0) >> 8; - ODM_SetBBReg(dm_odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0 >> 7) & 0x1)); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0 >> 7) & 0x1)); Y = result[final_candidate][1]; if ((Y & 0x00000200) != 0) Y = Y | 0xFFFFFC00; TX0_C = (Y * Oldval_0) >> 8; - ODM_SetBBReg(dm_odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6)); - ODM_SetBBReg(dm_odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C & 0x3F)); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6)); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C & 0x3F)); - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0 >> 7) & 0x1)); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0 >> 7) & 0x1)); if (txonly) return; reg = result[final_candidate][2]; - ODM_SetBBReg(dm_odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_XARxIQImbalance, 0x3FF, reg); reg = result[final_candidate][3] & 0x3F; - ODM_SetBBReg(dm_odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_XARxIQImbalance, 0xFC00, reg); reg = (result[final_candidate][3] >> 6) & 0xF; - ODM_SetBBReg(dm_odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_RxIQExtAnta, 0xF0000000, reg); } } void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum) { u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; for (i = 0; i < RegisterNum; i++) { - ADDABackup[i] = ODM_GetBBReg(dm_odm, ADDAReg[i], bMaskDWord); + ADDABackup[i] = rtl8188e_PHY_QueryBBReg(adapt, ADDAReg[i], bMaskDWord); } } @@ -601,22 +556,19 @@ static void _PHY_SaveMACRegisters( ) { u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) { - MACBackup[i] = ODM_Read1Byte(dm_odm, MACReg[i]); - } - MACBackup[i] = ODM_Read4Byte(dm_odm, MACReg[i]); + + for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) + MACBackup[i] = rtw_read8(adapt, MACReg[i]); + + MACBackup[i] = rtw_read32(adapt, MACReg[i]); } static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum) { u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; for (i = 0; i < RegiesterNum; i++) - ODM_SetBBReg(dm_odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); + rtl8188e_PHY_SetBBReg(adapt, ADDAReg[i], bMaskDWord, ADDABackup[i]); } static void @@ -627,38 +579,24 @@ _PHY_ReloadMACRegisters( ) { u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u8)MACBackup[i]); - } - ODM_Write4Byte(dm_odm, MACReg[i], MACBackup[i]); + for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) + rtw_write8(adapt, MACReg[i], (u8)MACBackup[i]); + + rtw_write32(adapt, MACReg[i], MACBackup[i]); } -void +static void _PHY_PathADDAOn( struct adapter *adapt, - u32 *ADDAReg, - bool isPathAOn, - bool is2t - ) + u32 *ADDAReg) { - u32 pathOn; u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; - if (!is2t) { - pathOn = 0x0bdb25a0; - ODM_SetBBReg(dm_odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); - } else { - ODM_SetBBReg(dm_odm, ADDAReg[0], bMaskDWord, pathOn); - } + rtl8188e_PHY_SetBBReg(adapt, ADDAReg[0], bMaskDWord, 0x0b1b25a0); for (i = 1; i < IQK_ADDA_REG_NUM; i++) - ODM_SetBBReg(dm_odm, ADDAReg[i], bMaskDWord, pathOn); + rtl8188e_PHY_SetBBReg(adapt, ADDAReg[i], bMaskDWord, 0x0bdb25a0); } void @@ -669,28 +607,13 @@ _PHY_MACSettingCalibration( ) { u32 i = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_Write1Byte(dm_odm, MACReg[i], 0x3F); - for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i] & (~BIT(3)))); - } - ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i] & (~BIT(5)))); -} + rtw_write8(adapt, MACReg[i], 0x3F); -void -_PHY_PathAStandBy( - struct adapter *adapt - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; + for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) + rtw_write8(adapt, MACReg[i], (u8)(MACBackup[i] & (~BIT(3)))); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x0); - ODM_SetBBReg(dm_odm, 0x840, bMaskDWord, 0x00010000); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + rtw_write8(adapt, MACReg[i], (u8)(MACBackup[i] & (~BIT(5)))); } static void _PHY_PIModeSwitch( @@ -699,12 +622,10 @@ static void _PHY_PIModeSwitch( ) { u32 mode; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; mode = PIMode ? 0x01000100 : 0x01000000; - ODM_SetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); - ODM_SetBBReg(dm_odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); } static bool phy_SimularityCompare_8188E( @@ -786,12 +707,12 @@ static bool phy_SimularityCompare_8188E( } } -static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, bool is2t) +static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); + struct hal_data_8188e *pHalData = &adapt->haldata; struct odm_dm_struct *dm_odm = &pHalData->odmpriv; u32 i; - u8 PathAOK, PathBOK; + u8 PathAOK; u32 ADDA_REG[IQK_ADDA_REG_NUM] = { rFPGA0_XCD_SwitchControl, rBlue_Tooth, rRx_Wait_CCA, rTx_CCK_RFON, @@ -823,9 +744,9 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, _PHY_SaveADDARegisters(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); } - _PHY_PathADDAOn(adapt, ADDA_REG, true, is2t); + _PHY_PathADDAOn(adapt, ADDA_REG); if (t == 0) - dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8)); + dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(adapt, rFPGA0_XA_HSSIParameter1, BIT(8)); if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { /* Switch BB to PI mode to do IQ Calibration. */ @@ -833,77 +754,49 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, } /* BB setting */ - ODM_SetBBReg(dm_odm, rFPGA0_RFMOD, BIT(24), 0x00); - ODM_SetBBReg(dm_odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - ODM_SetBBReg(dm_odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - ODM_SetBBReg(dm_odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00); - - if (is2t) { - ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - ODM_SetBBReg(dm_odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); - } + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_RFMOD, BIT(24), 0x00); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); + rtl8188e_PHY_SetBBReg(adapt, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); + + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00); /* MAC settings */ _PHY_MACSettingCalibration(adapt, IQK_MAC_REG, dm_odm->RFCalibrateInfo.IQK_MAC_backup); /* Page B init */ /* AP or IQK */ - ODM_SetBBReg(dm_odm, rConfig_AntA, bMaskDWord, 0x0f600000); + rtl8188e_PHY_SetBBReg(adapt, rConfig_AntA, bMaskDWord, 0x0f600000); - if (is2t) - ODM_SetBBReg(dm_odm, rConfig_AntB, bMaskDWord, 0x0f600000); /* IQ calibration setting */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x81004800); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK, bMaskDWord, 0x01007c00); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK, bMaskDWord, 0x81004800); for (i = 0; i < retryCount; i++) { - PathAOK = phy_PathA_IQK_8188E(adapt, is2t); + PathAOK = phy_PathA_IQK_8188E(adapt); if (PathAOK == 0x01) { - result[t][0] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord) & 0x3FF0000) >> 16; - result[t][1] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord) & 0x3FF0000) >> 16; + result[t][0] = (rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_Before_IQK_A, bMaskDWord) & 0x3FF0000) >> 16; + result[t][1] = (rtl8188e_PHY_QueryBBReg(adapt, rTx_Power_After_IQK_A, bMaskDWord) & 0x3FF0000) >> 16; break; } } for (i = 0; i < retryCount; i++) { - PathAOK = phy_PathA_RxIQK(adapt, is2t); + PathAOK = phy_PathA_RxIQK(adapt); if (PathAOK == 0x03) { - result[t][2] = (ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_A_2, bMaskDWord) & 0x3FF0000) >> 16; - result[t][3] = (ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord) & 0x3FF0000) >> 16; + result[t][2] = (rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_Before_IQK_A_2, bMaskDWord) & 0x3FF0000) >> 16; + result[t][3] = (rtl8188e_PHY_QueryBBReg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord) & 0x3FF0000) >> 16; break; } } - if (is2t) { - _PHY_PathAStandBy(adapt); - - /* Turn Path B ADDA on */ - _PHY_PathADDAOn(adapt, ADDA_REG, false, is2t); - - for (i = 0; i < retryCount; i++) { - PathBOK = phy_PathB_IQK_8188E(adapt); - if (PathBOK == 0x03) { - result[t][4] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord) & 0x3FF0000) >> 16; - result[t][5] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord) & 0x3FF0000) >> 16; - result[t][6] = (ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_B_2, bMaskDWord) & 0x3FF0000) >> 16; - result[t][7] = (ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_B_2, bMaskDWord) & 0x3FF0000) >> 16; - break; - } else if (i == (retryCount - 1) && PathBOK == 0x01) { /* Tx IQK OK */ - result[t][4] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord) & 0x3FF0000) >> 16; - result[t][5] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord) & 0x3FF0000) >> 16; - } - } - } - /* Back to BB mode, load original value */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0); if (t != 0) { if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { @@ -920,13 +813,11 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, reload_adda_reg(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); /* Restore RX initial gain */ - ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if (is2t) - ODM_SetBBReg(dm_odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); + rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); /* load 0xe30 IQC default value */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + rtl8188e_PHY_SetBBReg(adapt, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + rtl8188e_PHY_SetBBReg(adapt, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); } } @@ -934,62 +825,60 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t) { u8 tmpreg; u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; /* Check continuous TX and Packet TX */ - tmpreg = ODM_Read1Byte(dm_odm, 0xd03); + tmpreg = rtw_read8(adapt, 0xd03); if ((tmpreg & 0x70) != 0) /* Deal with contisuous TX case */ - ODM_Write1Byte(dm_odm, 0xd03, tmpreg & 0x8F); /* disable all continuous TX */ + rtw_write8(adapt, 0xd03, tmpreg & 0x8F); /* disable all continuous TX */ else /* Deal with Packet TX case */ - ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0xFF); /* block all queues */ + rtw_write8(adapt, REG_TXPAUSE, 0xFF); /* block all queues */ if ((tmpreg & 0x70) != 0) { /* 1. Read original RF mode */ /* Path-A */ - RF_Amode = PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits); + RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits); /* Path-B */ if (is2t) - RF_Bmode = PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits); + RF_Bmode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits); /* 2. Set RF mode = standby mode */ /* Path-A */ - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000); /* Path-B */ if (is2t) - ODM_SetRFReg(dm_odm, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode & 0x8FFFF) | 0x10000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode & 0x8FFFF) | 0x10000); } /* 3. Read RF reg18 */ - LC_Cal = PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); + LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); /* 4. Set LC calibration begin bit15 */ - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000); - ODM_sleep_ms(100); + msleep(100); /* Restore original situation */ if ((tmpreg & 0x70) != 0) { /* Deal with continuous TX case */ /* Path-A */ - ODM_Write1Byte(dm_odm, 0xd03, tmpreg); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); + rtw_write8(adapt, 0xd03, tmpreg); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); /* Path-B */ if (is2t) - ODM_SetRFReg(dm_odm, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); + rtl8188e_PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); } else { /* Deal with Packet TX case */ - ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0x00); + rtw_write8(adapt, REG_TXPAUSE, 0x00); } } void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); + struct hal_data_8188e *pHalData = &adapt->haldata; struct odm_dm_struct *dm_odm = &pHalData->odmpriv; s32 result[4][8]; /* last is final result */ u8 i, final_candidate; @@ -1032,7 +921,7 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) is13simular = false; for (i = 0; i < 3; i++) { - phy_IQCalibrate_8188E(adapt, result, i, false); + phy_IQCalibrate_8188E(adapt, result, i); if (i == 1) { is12simular = phy_SimularityCompare_8188E(adapt, result, 0, 1); @@ -1101,7 +990,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) { bool singletone = false, carrier_sup = false; u32 timeout = 2000, timecount = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); + struct hal_data_8188e *pHalData = &adapt->haldata; struct odm_dm_struct *dm_odm = &pHalData->odmpriv; if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) @@ -1111,7 +1000,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) return; while (*dm_odm->pbScanInProcess && timecount < timeout) { - ODM_delay_ms(50); + mdelay(50); timecount += 50; } diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c index 0fd11aca7ac7..47ad4ea273cc 100644 --- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c +++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c @@ -25,8 +25,7 @@ Major Change History: * Assumption: * We should follow specific format which was released from HW SD. */ -u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers, - u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[]) +u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[]) { struct wl_pwr_cfg pwrcfgcmd = {0}; u8 poll_bit = false; @@ -39,54 +38,49 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers, do { pwrcfgcmd = pwrseqcmd[aryidx]; - /* 2 Only Handle the command whose FAB, CUT, and Interface are matched */ - if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) && - (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) && - (GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) { - switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { - case PWR_CMD_WRITE: - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); + switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { + case PWR_CMD_WRITE: + offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - /* Read the value from system register */ - value = rtw_read8(padapter, offset); - - value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); - value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)); + /* Read the value from system register */ + value = rtw_read8(padapter, offset); - /* Write the value back to system register */ - rtw_write8(padapter, offset, value); - break; - case PWR_CMD_POLLING: - poll_bit = false; - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - do { - value = rtw_read8(padapter, offset); + value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); + value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)); - value &= GET_PWR_CFG_MASK(pwrcfgcmd); - if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd))) - poll_bit = true; - else - udelay(10); + /* Write the value back to system register */ + rtw_write8(padapter, offset, value); + break; + case PWR_CMD_POLLING: + poll_bit = false; + offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); + do { + value = rtw_read8(padapter, offset); - if (poll_count++ > max_poll_count) { - DBG_88E("Fail to polling Offset[%#x]\n", offset); - return false; - } - } while (!poll_bit); - break; - case PWR_CMD_DELAY: - if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); + value &= GET_PWR_CFG_MASK(pwrcfgcmd); + if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd))) + poll_bit = true; else - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000); - break; - case PWR_CMD_END: - /* When this command is parsed, end the process */ - return true; - break; - default: - break; - } + udelay(10); + + if (poll_count++ > max_poll_count) { + DBG_88E("Fail to polling Offset[%#x]\n", offset); + return false; + } + } while (!poll_bit); + break; + case PWR_CMD_DELAY: + if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) + udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); + else + udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000); + break; + case PWR_CMD_END: + /* When this command is parsed, end the process */ + return true; + break; + default: + break; } aryidx++;/* Add Array Index */ diff --git a/drivers/staging/r8188eu/hal/odm.c b/drivers/staging/r8188eu/hal/odm.c index 21f115194df8..d8fa587ff286 100644 --- a/drivers/staging/r8188eu/hal/odm.c +++ b/drivers/staging/r8188eu/hal/odm.c @@ -1,9 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -/* include files */ - -#include "../include/odm_precomp.h" +#include "../include/drv_types.h" /* avoid to warn in FreeBSD ==> To DO modify */ static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { @@ -142,222 +140,26 @@ u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { #define RxDefaultAnt1 0x65a9 #define RxDefaultAnt2 0x569a -/* 3 Export Interface */ - -/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ -void ODM_DMInit(struct odm_dm_struct *pDM_Odm) -{ - /* 2012.05.03 Luke: For all IC series */ - odm_CommonInfoSelfInit(pDM_Odm); - odm_DIGInit(pDM_Odm); - odm_RateAdaptiveMaskInit(pDM_Odm); - - odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ - odm_DynamicBBPowerSavingInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - ODM_EdcaTurboInit(pDM_Odm); - ODM_RAInfo_Init_all(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_InitHybridAntDiv(pDM_Odm); -} - -/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ -/* You can not add any dummy function here, be care, you can only use DM structure */ -/* to perform any new ODM_DM. */ -void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) -{ - /* 2012.05.03 Luke: For all IC series */ - odm_CommonInfoSelfUpdate(pDM_Odm); - odm_FalseAlarmCounterStatistics(pDM_Odm); - odm_RSSIMonitorCheck(pDM_Odm); - - odm_DIG(pDM_Odm); - odm_CCKPacketDetectionThresh(pDM_Odm); - - if (*pDM_Odm->pbPowerSaving) - return; - - odm_RefreshRateAdaptiveMask(pDM_Odm); - - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_HwAntDiv(pDM_Odm); - - ODM_TXPowerTrackingCheck(pDM_Odm); - odm_EdcaTurboCheck(pDM_Odm); -} - -/* Init /.. Fixed HW value. Only init time. */ -void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) -{ - /* This section is used for init value */ - switch (CmnInfo) { - /* Fixed ODM value. */ - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u32)Value; - break; - case ODM_CMNINFO_MP_TEST_CHIP: - pDM_Odm->bIsMPChip = (u8)Value; - break; - case ODM_CMNINFO_RF_ANTENNA_TYPE: - pDM_Odm->AntDivType = (u8)Value; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; - } - - /* Tx power tracking BB swing table. */ - /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ - pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ - pDM_Odm->BbSwingIdxOfdmCurrent = 12; - pDM_Odm->BbSwingFlagOfdm = false; -} - -void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) -{ - /* */ - /* Hook call by reference pointer. */ - /* */ - switch (CmnInfo) { - /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_TX_UNI: - pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; - break; - case ODM_CMNINFO_RX_UNI: - pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; - break; - case ODM_CMNINFO_WM_MODE: - pDM_Odm->pWirelessMode = (u8 *)pValue; - break; - case ODM_CMNINFO_SEC_CHNL_OFFSET: - pDM_Odm->pSecChOffset = (u8 *)pValue; - break; - case ODM_CMNINFO_SEC_MODE: - pDM_Odm->pSecurity = (u8 *)pValue; - break; - case ODM_CMNINFO_BW: - pDM_Odm->pBandWidth = (u8 *)pValue; - break; - case ODM_CMNINFO_CHNL: - pDM_Odm->pChannel = (u8 *)pValue; - break; - case ODM_CMNINFO_SCAN: - pDM_Odm->pbScanInProcess = (bool *)pValue; - break; - case ODM_CMNINFO_POWER_SAVING: - pDM_Odm->pbPowerSaving = (bool *)pValue; - break; - case ODM_CMNINFO_NET_CLOSED: - pDM_Odm->pbNet_closed = (bool *)pValue; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; - } -} - -/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ -void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) -{ - /* */ - /* This init variable may be changed in run time. */ - /* */ - switch (CmnInfo) { - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u32)Value; - break; - case ODM_CMNINFO_WIFI_DIRECT: - pDM_Odm->bWIFI_Direct = (bool)Value; - break; - case ODM_CMNINFO_WIFI_DISPLAY: - pDM_Odm->bWIFI_Display = (bool)Value; - break; - case ODM_CMNINFO_LINK: - pDM_Odm->bLinked = (bool)Value; - break; - case ODM_CMNINFO_RSSI_MIN: - pDM_Odm->RSSI_Min = (u8)Value; - break; - } -} - -void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) -{ - pDM_Odm->bCckHighPower = (bool)ODM_GetBBReg(pDM_Odm, 0x824, BIT(9)); - pDM_Odm->RFPathRxEnable = (u8)ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); -} - -void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) -{ - u8 EntryCnt = 0; - u8 i; - struct sta_info *pEntry; - - if (*pDM_Odm->pBandWidth == ODM_BW40M) { - if (*pDM_Odm->pSecChOffset == 1) - pDM_Odm->ControlChannel = *pDM_Odm->pChannel - 2; - else if (*pDM_Odm->pSecChOffset == 2) - pDM_Odm->ControlChannel = *pDM_Odm->pChannel + 2; - } else { - pDM_Odm->ControlChannel = *pDM_Odm->pChannel; - } - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - pEntry = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(pEntry)) - EntryCnt++; - } - if (EntryCnt == 1) - pDM_Odm->bOneEntryOnly = true; - else - pDM_Odm->bOneEntryOnly = false; -} - -void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) +static void odm_DIGInit(struct odm_dm_struct *pDM_Odm) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; + struct adapter *adapter = pDM_Odm->Adapter; - if (pDM_DigTable->CurIGValue != CurrentIGI) { - ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); - pDM_DigTable->CurIGValue = CurrentIGI; - } -} - -void odm_DIGInit(struct odm_dm_struct *pDM_Odm) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - - pDM_DigTable->CurIGValue = (u8)ODM_GetBBReg(pDM_Odm, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; + pDM_DigTable->CurIGValue = (u8)rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - pDM_DigTable->PreCCK_CCAThres = 0xFF; pDM_DigTable->CurCCK_CCAThres = 0x83; pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; pDM_DigTable->LargeFAHit = 0; pDM_DigTable->Recover_cnt = 0; pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; - pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; pDM_DigTable->bMediaConnect_0 = false; - pDM_DigTable->bMediaConnect_1 = false; /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ pDM_Odm->bDMInitialGainEnable = true; } -void odm_DIG(struct odm_dm_struct *pDM_Odm) +static void odm_DIG(struct odm_dm_struct *pDM_Odm) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; @@ -367,7 +169,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) u8 dm_dig_max, dm_dig_min; u8 CurrentIGI = pDM_DigTable->CurIGValue; - if ((!(pDM_Odm->SupportAbility & ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) + if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; if (*pDM_Odm->pbScanInProcess) @@ -457,11 +259,11 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) CurrentIGI = pDM_Odm->RSSI_Min; } else { if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ + CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ + CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ + CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ } } else { if (FirstDisConnect) { @@ -489,52 +291,119 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; } -/* 3============================================================ */ -/* 3 FASLE ALARM CHECK */ -/* 3============================================================ */ +static void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) +{ + struct adapter *adapter = pDM_Odm->Adapter; + + pDM_Odm->bCckHighPower = (bool)rtl8188e_PHY_QueryBBReg(adapter, 0x824, BIT(9)); + pDM_Odm->RFPathRxEnable = (u8)rtl8188e_PHY_QueryBBReg(adapter, 0xc04, 0x0F); +} -void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) +static void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) +{ + u8 EntryCnt = 0; + u8 i; + struct sta_info *pEntry; + + if (*pDM_Odm->pBandWidth == ODM_BW40M) { + if (*pDM_Odm->pSecChOffset == 1) + pDM_Odm->ControlChannel = *pDM_Odm->pChannel - 2; + else if (*pDM_Odm->pSecChOffset == 2) + pDM_Odm->ControlChannel = *pDM_Odm->pChannel + 2; + } else { + pDM_Odm->ControlChannel = *pDM_Odm->pChannel; + } + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + pEntry = pDM_Odm->pODM_StaInfo[i]; + if (IS_STA_VALID(pEntry)) + EntryCnt++; + } + if (EntryCnt == 1) + pDM_Odm->bOneEntryOnly = true; + else + pDM_Odm->bOneEntryOnly = false; +} + +static void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) +{ + struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; + + pOdmRA->RATRState = DM_RATR_STA_INIT; + pOdmRA->HighRSSIThresh = 50; + pOdmRA->LowRSSIThresh = 20; +} + +static void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) +{ + u8 i; + struct adapter *pAdapter = pDM_Odm->Adapter; + + if (pAdapter->bDriverStopped) + return; + + for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; + + if (IS_STA_VALID(pstat)) { + if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) + rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); + } + } +} + +static void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) +{ + struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; + + pDM_PSTable->pre_rf_state = RF_MAX; + pDM_PSTable->cur_rf_state = RF_MAX; + pDM_PSTable->initialize = 0; +} + +static void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) { u32 ret_value; struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; + struct adapter *adapter = pDM_Odm->Adapter; if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; /* hold ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); FalseAlmCnt->Cnt_Fast_Fsync = (ret_value & 0xffff); FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff); FalseAlmCnt->Cnt_Parity_Fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); FalseAlmCnt->Cnt_Rate_Illegal = (ret_value & 0xffff); FalseAlmCnt->Cnt_Crc8_fail = ((ret_value & 0xffff0000) >> 16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); FalseAlmCnt->Cnt_Mcs_fail = (ret_value & 0xffff); FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); FalseAlmCnt->Cnt_BW_LSC = (ret_value & 0xffff); FalseAlmCnt->Cnt_BW_USC = ((ret_value & 0xffff0000) >> 16); /* hold cck counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + ret_value = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); FalseAlmCnt->Cnt_CCK_CCA = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8); FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + @@ -548,11 +417,7 @@ void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; } -/* 3============================================================ */ -/* 3 CCK Packet Detect Threshold */ -/* 3============================================================ */ - -void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) +static void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) { u8 CurCCK_CCAThres; struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; @@ -579,235 +444,9 @@ void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); } -void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - - if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ - ODM_Write1Byte(pDM_Odm, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); - pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; - pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; -} - -/* 3============================================================ */ -/* 3 BB Power Save */ -/* 3============================================================ */ -void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) -{ - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - - pDM_PSTable->pre_cca_state = CCA_MAX; - pDM_PSTable->cur_cca_state = CCA_MAX; - pDM_PSTable->pre_rf_state = RF_MAX; - pDM_PSTable->cur_rf_state = RF_MAX; - pDM_PSTable->rssi_val_min = 0; - pDM_PSTable->initialize = 0; -} - -void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) -{ - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - u8 Rssi_Up_bound = 30; - u8 Rssi_Low_bound = 25; - - if (pDM_PSTable->initialize == 0) { - pDM_PSTable->reg_874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord) & 0x1CC000) >> 14; - pDM_PSTable->reg_c70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord) & BIT(3)) >> 3; - pDM_PSTable->reg_85c = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord) & 0xFF000000) >> 24; - pDM_PSTable->reg_a74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord) & 0xF000) >> 12; - pDM_PSTable->initialize = 1; - } - - if (!bForceInNormal) { - if (pDM_Odm->RSSI_Min != 0xFF) { - if (pDM_PSTable->pre_rf_state == RF_Normal) { - if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) - pDM_PSTable->cur_rf_state = RF_Save; - else - pDM_PSTable->cur_rf_state = RF_Normal; - } else { - if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) - pDM_PSTable->cur_rf_state = RF_Normal; - else - pDM_PSTable->cur_rf_state = RF_Save; - } - } else { - pDM_PSTable->cur_rf_state = RF_MAX; - } - } else { - pDM_PSTable->cur_rf_state = RF_Normal; - } - - if (pDM_PSTable->pre_rf_state != pDM_PSTable->cur_rf_state) { - if (pDM_PSTable->cur_rf_state == RF_Save) { - ODM_SetBBReg(pDM_Odm, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ - ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */ - } else { - ODM_SetBBReg(pDM_Odm, 0x874, 0x1CC000, pDM_PSTable->reg_874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), pDM_PSTable->reg_c70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->reg_85c); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->reg_a74); - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); - } - pDM_PSTable->pre_rf_state = pDM_PSTable->cur_rf_state; - } -} - -/* 3============================================================ */ -/* 3 RATR MASK */ -/* 3============================================================ */ -/* 3============================================================ */ -/* 3 Rate Adaptive */ -/* 3============================================================ */ - -void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) -{ - struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; - - pOdmRA->RATRState = DM_RATR_STA_INIT; - pOdmRA->HighRSSIThresh = 50; - pOdmRA->LowRSSIThresh = 20; -} - -u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) -{ - struct sta_info *pEntry; - u32 rate_bitmap = 0x0fffffff; - u8 WirelessMode; - - pEntry = pDM_Odm->pODM_StaInfo[macid]; - if (!IS_STA_VALID(pEntry)) - return ra_mask; - - WirelessMode = pEntry->wireless_mode; - - switch (WirelessMode) { - case ODM_WM_B: - if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ - rate_bitmap = 0x0000000d; - else - rate_bitmap = 0x0000000f; - break; - case (ODM_WM_B | ODM_WM_G): - if (rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else if (rssi_level == DM_RATR_STA_MIDDLE) - rate_bitmap = 0x00000ff0; - else - rate_bitmap = 0x00000ff5; - break; - case (ODM_WM_B | ODM_WM_G | ODM_WM_N24G): - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x000f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x000ff000; - } else { - if (*pDM_Odm->pBandWidth == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } - break; - default: - /* case WIRELESS_11_24N: */ - rate_bitmap = 0x0fffffff; - break; - } - - return rate_bitmap; -} - -/*----------------------------------------------------------------------------- - * Function: odm_RefreshRateAdaptiveMask() - * - * Overview: Update rate table mask according to rssi - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/27/2009 hpfan Create Version 0. - * - *---------------------------------------------------------------------------*/ -void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) -{ - u8 i; - struct adapter *pAdapter = pDM_Odm->Adapter; - - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - - if (pAdapter->bDriverStopped) - return; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(pstat)) { - if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) - rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); - } - } -} - -/* Return Value: bool */ -/* - true: RATRState is changed. */ -bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) -{ - struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; - const u8 GoUpGap = 5; - u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; - u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; - u8 RATRState; - - /* Threshold Adjustment: */ - /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ - /* Here GoUpGap is added to solve the boundary's level alternation issue. */ - switch (*pRATRState) { - case DM_RATR_STA_INIT: - case DM_RATR_STA_HIGH: - break; - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA += GoUpGap; - break; - case DM_RATR_STA_LOW: - HighRSSIThreshForRA += GoUpGap; - LowRSSIThreshForRA += GoUpGap; - break; - default: - break; - } - - /* Decide RATRState by RSSI. */ - if (RSSI > HighRSSIThreshForRA) - RATRState = DM_RATR_STA_HIGH; - else if (RSSI > LowRSSIThreshForRA) - RATRState = DM_RATR_STA_MIDDLE; - else - RATRState = DM_RATR_STA_LOW; - - if (*pRATRState != RATRState || bForceUpdate) { - *pRATRState = RATRState; - return true; - } - return false; -} - -/* 3============================================================ */ -/* 3 RSSI Monitor */ -/* 3============================================================ */ - static void FindMinimumRSSI(struct adapter *pAdapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); + struct hal_data_8188e *pHalData = &pAdapter->haldata; struct dm_priv *pdmpriv = &pHalData->dmpriv; struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; @@ -819,10 +458,10 @@ static void FindMinimumRSSI(struct adapter *pAdapter) pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; } -void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) +static void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) { struct adapter *Adapter = pDM_Odm->Adapter; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct dm_priv *pdmpriv = &pHalData->dmpriv; int i; int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; @@ -877,44 +516,15 @@ void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); } -/* 3============================================================ */ -/* 3 Tx Power Tracking */ -/* 3============================================================ */ - -void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) -{ - odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -} - -void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) +static void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) { pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; pDM_Odm->RFCalibrateInfo.TXPowercount = 0; pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; - MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; } -void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - - if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) - return; - - if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); - - pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; - return; - } else { - odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); - pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; - } -} - -void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) +static void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) { if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; @@ -922,7 +532,7 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) ODM_AntennaDiversityInit_88E(pDM_Odm); } -void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) +static void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) { if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; @@ -930,17 +540,15 @@ void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) ODM_AntennaDiversity_88E(pDM_Odm); } -/* EDCA Turbo */ -void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) +static void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) { struct adapter *Adapter = pDM_Odm->Adapter; pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; Adapter->recvpriv.bIsAnyNonBEPkts = false; +} -} /* ODM_InitEdcaTurbo */ - -void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) +static void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) { struct adapter *Adapter = pDM_Odm->Adapter; u32 trafficIndex; @@ -948,7 +556,7 @@ void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) u64 cur_tx_bytes = 0; u64 cur_rx_bytes = 0; u8 bbtchange = false; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct xmit_priv *pxmitpriv = &Adapter->xmitpriv; struct recv_priv *precvpriv = &Adapter->recvpriv; struct registry_priv *pregpriv = &Adapter->registrypriv; @@ -1004,7 +612,7 @@ void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) } else { /* Turn Off EDCA turbo here. */ /* Restore original EDCA according to the declaration of AP. */ - if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { + if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; } @@ -1016,3 +624,306 @@ dm_CheckEdcaTurbo_EXIT: pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; precvpriv->last_rx_bytes = precvpriv->rx_bytes; } + +/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ +void ODM_DMInit(struct odm_dm_struct *pDM_Odm) +{ + /* 2012.05.03 Luke: For all IC series */ + odm_CommonInfoSelfInit(pDM_Odm); + odm_DIGInit(pDM_Odm); + odm_RateAdaptiveMaskInit(pDM_Odm); + + odm_DynamicBBPowerSavingInit(pDM_Odm); + odm_TXPowerTrackingThermalMeterInit(pDM_Odm); + ODM_EdcaTurboInit(pDM_Odm); + ODM_RAInfo_Init_all(pDM_Odm); + if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + odm_InitHybridAntDiv(pDM_Odm); +} + +/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ +/* You can not add any dummy function here, be care, you can only use DM structure */ +/* to perform any new ODM_DM. */ +void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) +{ + /* 2012.05.03 Luke: For all IC series */ + odm_CommonInfoSelfUpdate(pDM_Odm); + odm_FalseAlarmCounterStatistics(pDM_Odm); + odm_RSSIMonitorCheck(pDM_Odm); + + odm_DIG(pDM_Odm); + odm_CCKPacketDetectionThresh(pDM_Odm); + + if (*pDM_Odm->pbPowerSaving) + return; + + odm_RefreshRateAdaptiveMask(pDM_Odm); + + if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + odm_HwAntDiv(pDM_Odm); + + ODM_TXPowerTrackingCheck(pDM_Odm); + odm_EdcaTurboCheck(pDM_Odm); +} + +/* Init /.. Fixed HW value. Only init time. */ +void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) +{ + /* This section is used for init value */ + switch (CmnInfo) { + /* Fixed ODM value. */ + case ODM_CMNINFO_MP_TEST_CHIP: + pDM_Odm->bIsMPChip = (u8)Value; + break; + case ODM_CMNINFO_RF_ANTENNA_TYPE: + pDM_Odm->AntDivType = (u8)Value; + break; + default: + /* do nothing */ + break; + } + + /* Tx power tracking BB swing table. */ + /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ + pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ + pDM_Odm->BbSwingIdxOfdmCurrent = 12; + pDM_Odm->BbSwingFlagOfdm = false; +} + +void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) +{ + /* */ + /* Hook call by reference pointer. */ + /* */ + switch (CmnInfo) { + /* Dynamic call by reference pointer. */ + case ODM_CMNINFO_WM_MODE: + pDM_Odm->pWirelessMode = (u8 *)pValue; + break; + case ODM_CMNINFO_SEC_CHNL_OFFSET: + pDM_Odm->pSecChOffset = (u8 *)pValue; + break; + case ODM_CMNINFO_BW: + pDM_Odm->pBandWidth = (u8 *)pValue; + break; + case ODM_CMNINFO_CHNL: + pDM_Odm->pChannel = (u8 *)pValue; + break; + case ODM_CMNINFO_SCAN: + pDM_Odm->pbScanInProcess = (bool *)pValue; + break; + case ODM_CMNINFO_POWER_SAVING: + pDM_Odm->pbPowerSaving = (bool *)pValue; + break; + default: + /* do nothing */ + break; + } +} + +/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ +void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) +{ + /* */ + /* This init variable may be changed in run time. */ + /* */ + switch (CmnInfo) { + case ODM_CMNINFO_ABILITY: + pDM_Odm->SupportAbility = (u32)Value; + break; + case ODM_CMNINFO_LINK: + pDM_Odm->bLinked = (bool)Value; + break; + case ODM_CMNINFO_RSSI_MIN: + pDM_Odm->RSSI_Min = (u8)Value; + break; + } +} + +void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) +{ + struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; + struct adapter *adapter = pDM_Odm->Adapter; + + if (pDM_DigTable->CurIGValue != CurrentIGI) { + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); + pDM_DigTable->CurIGValue = CurrentIGI; + } +} + +void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) +{ + struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; + + if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ + rtw_write8(pDM_Odm->Adapter, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); + pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; +} + +void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) +{ + struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; + struct adapter *adapter = pDM_Odm->Adapter; + u8 Rssi_Up_bound = 30; + u8 Rssi_Low_bound = 25; + + if (pDM_PSTable->initialize == 0) { + pDM_PSTable->reg_874 = (rtl8188e_PHY_QueryBBReg(adapter, 0x874, bMaskDWord) & 0x1CC000) >> 14; + pDM_PSTable->reg_c70 = (rtl8188e_PHY_QueryBBReg(adapter, 0xc70, bMaskDWord) & BIT(3)) >> 3; + pDM_PSTable->reg_85c = (rtl8188e_PHY_QueryBBReg(adapter, 0x85c, bMaskDWord) & 0xFF000000) >> 24; + pDM_PSTable->reg_a74 = (rtl8188e_PHY_QueryBBReg(adapter, 0xa74, bMaskDWord) & 0xF000) >> 12; + pDM_PSTable->initialize = 1; + } + + if (!bForceInNormal) { + if (pDM_Odm->RSSI_Min != 0xFF) { + if (pDM_PSTable->pre_rf_state == RF_Normal) { + if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) + pDM_PSTable->cur_rf_state = RF_Save; + else + pDM_PSTable->cur_rf_state = RF_Normal; + } else { + if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) + pDM_PSTable->cur_rf_state = RF_Normal; + else + pDM_PSTable->cur_rf_state = RF_Save; + } + } else { + pDM_PSTable->cur_rf_state = RF_MAX; + } + } else { + pDM_PSTable->cur_rf_state = RF_Normal; + } + + if (pDM_PSTable->pre_rf_state != pDM_PSTable->cur_rf_state) { + if (pDM_PSTable->cur_rf_state == RF_Save) { + rtl8188e_PHY_SetBBReg(adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ + rtl8188e_PHY_SetBBReg(adapter, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */ + rtl8188e_PHY_SetBBReg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ + rtl8188e_PHY_SetBBReg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ + rtl8188e_PHY_SetBBReg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ + rtl8188e_PHY_SetBBReg(adapter, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */ + rtl8188e_PHY_SetBBReg(adapter, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */ + } else { + rtl8188e_PHY_SetBBReg(adapter, 0x874, 0x1CC000, pDM_PSTable->reg_874); + rtl8188e_PHY_SetBBReg(adapter, 0xc70, BIT(3), pDM_PSTable->reg_c70); + rtl8188e_PHY_SetBBReg(adapter, 0x85c, 0xFF000000, pDM_PSTable->reg_85c); + rtl8188e_PHY_SetBBReg(adapter, 0xa74, 0xF000, pDM_PSTable->reg_a74); + rtl8188e_PHY_SetBBReg(adapter, 0x818, BIT(28), 0x0); + } + pDM_PSTable->pre_rf_state = pDM_PSTable->cur_rf_state; + } +} + +u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) +{ + struct sta_info *pEntry; + u32 rate_bitmap = 0x0fffffff; + u8 WirelessMode; + + pEntry = pDM_Odm->pODM_StaInfo[macid]; + if (!IS_STA_VALID(pEntry)) + return ra_mask; + + WirelessMode = pEntry->wireless_mode; + + switch (WirelessMode) { + case ODM_WM_B: + if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ + rate_bitmap = 0x0000000d; + else + rate_bitmap = 0x0000000f; + break; + case (ODM_WM_B | ODM_WM_G): + if (rssi_level == DM_RATR_STA_HIGH) + rate_bitmap = 0x00000f00; + else if (rssi_level == DM_RATR_STA_MIDDLE) + rate_bitmap = 0x00000ff0; + else + rate_bitmap = 0x00000ff5; + break; + case (ODM_WM_B | ODM_WM_G | ODM_WM_N24G): + if (rssi_level == DM_RATR_STA_HIGH) { + rate_bitmap = 0x000f0000; + } else if (rssi_level == DM_RATR_STA_MIDDLE) { + rate_bitmap = 0x000ff000; + } else { + if (*pDM_Odm->pBandWidth == ODM_BW40M) + rate_bitmap = 0x000ff015; + else + rate_bitmap = 0x000ff005; + } + break; + default: + /* case WIRELESS_11_24N: */ + rate_bitmap = 0x0fffffff; + break; + } + + return rate_bitmap; +} + +/* Return Value: bool */ +/* - true: RATRState is changed. */ +bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) +{ + struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; + const u8 GoUpGap = 5; + u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; + u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; + u8 RATRState; + + /* Threshold Adjustment: */ + /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ + /* Here GoUpGap is added to solve the boundary's level alternation issue. */ + switch (*pRATRState) { + case DM_RATR_STA_INIT: + case DM_RATR_STA_HIGH: + break; + case DM_RATR_STA_MIDDLE: + HighRSSIThreshForRA += GoUpGap; + break; + case DM_RATR_STA_LOW: + HighRSSIThreshForRA += GoUpGap; + LowRSSIThreshForRA += GoUpGap; + break; + default: + break; + } + + /* Decide RATRState by RSSI. */ + if (RSSI > HighRSSIThreshForRA) + RATRState = DM_RATR_STA_HIGH; + else if (RSSI > LowRSSIThreshForRA) + RATRState = DM_RATR_STA_MIDDLE; + else + RATRState = DM_RATR_STA_LOW; + + if (*pRATRState != RATRState || bForceUpdate) { + *pRATRState = RATRState; + return true; + } + return false; +} + +void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) +{ + struct adapter *Adapter = pDM_Odm->Adapter; + + if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) + return; + + if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ + rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); + + pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; + return; + } else { + odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); + pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; + } +} diff --git a/drivers/staging/r8188eu/hal/odm_HWConfig.c b/drivers/staging/r8188eu/hal/odm_HWConfig.c index 3125886e6731..d5212a166dd2 100644 --- a/drivers/staging/r8188eu/hal/odm_HWConfig.c +++ b/drivers/staging/r8188eu/hal/odm_HWConfig.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" +#include "../include/drv_types.h" #define READ_AND_CONFIG READ_AND_CONFIG_MP @@ -251,17 +251,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; /* Smart Antenna Debug Message------------------ */ - if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { - if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { - if (pPktinfo->bPacketToSelf) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | - (pDM_FatTable->antsel_rx_keep_1 << 1) | - pDM_FatTable->antsel_rx_keep_0; - pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; - pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; - } - } - } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { + if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) | (pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0; @@ -368,10 +358,8 @@ void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm, struct odm_per_pkt_info *pPktinfo, struct adapter *adapt) { - odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, - pPktinfo, adapt); - if (!dm_odm->RSSI_test) - odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo); + odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt); + odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo); } enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm, diff --git a/drivers/staging/r8188eu/hal/odm_RTL8188E.c b/drivers/staging/r8188eu/hal/odm_RTL8188E.c index e7a765f375d6..c8a3c521bd60 100644 --- a/drivers/staging/r8188eu/hal/odm_RTL8188E.c +++ b/drivers/staging/r8188eu/hal/odm_RTL8188E.c @@ -1,130 +1,98 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" +#include "../include/drv_types.h" static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) { + struct adapter *adapter = dm_odm->Adapter; u32 value32; /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + value32 = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ /* Pin Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); /* Regb2c[22]=1'b0 disable CS/CG switch */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ /* OFDM Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); /* CCK Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT); - ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */ } static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) { + struct adapter *adapter = dm_odm->Adapter; u32 value32; /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + value32 = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ /* Pin Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ /* OFDM Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); /* CCK Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */ /* Tx Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */ ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT); /* antenna mapping table */ if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_DEFUALT_A_11N, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_DEFUALT_A_11N, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ } else { /* MPchip */ - ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */ } } static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm) { - u32 value32, i; - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u32 AntCombination = 2; - - for (i = 0; i < 6; i++) { - dm_fat_tbl->Bssid[i] = 0; - dm_fat_tbl->antSumRSSI[i] = 0; - dm_fat_tbl->antRSSIcnt[i] = 0; - dm_fat_tbl->antAveRSSI[i] = 0; - } - dm_fat_tbl->TrainIdx = 0; - dm_fat_tbl->FAT_State = FAT_NORMAL_STATE; + struct adapter *adapter = dm_odm->Adapter; + u32 value32; /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord); - ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ - value32 = ODM_GetMACReg(dm_odm, 0x7B4, bMaskDWord); - ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ + value32 = rtl8188e_PHY_QueryBBReg(adapter, 0x4c, bMaskDWord); + rtl8188e_PHY_SetBBReg(adapter, 0x4c, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ + value32 = rtl8188e_PHY_QueryBBReg(adapter, 0x7B4, bMaskDWord); + rtl8188e_PHY_SetBBReg(adapter, 0x7b4, bMaskDWord, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ /* Match MAC ADDR */ - ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0); - ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0); + rtl8188e_PHY_SetBBReg(adapter, 0x7b4, 0xFFFF, 0); + rtl8188e_PHY_SetBBReg(adapter, 0x7b0, bMaskDWord, 0); - ODM_SetBBReg(dm_odm, 0x870, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, 0x864, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, 0xb2c, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, 0xb2c, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ - ODM_SetBBReg(dm_odm, 0xca4, bMaskDWord, 0x000000a0); + rtl8188e_PHY_SetBBReg(adapter, 0x870, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ + rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */ + rtl8188e_PHY_SetBBReg(adapter, 0xb2c, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ + rtl8188e_PHY_SetBBReg(adapter, 0xb2c, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */ + rtl8188e_PHY_SetBBReg(adapter, 0xca4, bMaskDWord, 0x000000a0); - /* antenna mapping table */ - if (AntCombination == 2) { - if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, 0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ - ODM_SetBBReg(dm_odm, 0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ - } else { /* MPchip */ - ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 1); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 2); - } - } else if (AntCombination == 7) { - if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, 0x858, BIT(10) | BIT(9) | BIT(8), 0); /* Reg858[10:8]=3'b000 */ - ODM_SetBBReg(dm_odm, 0x858, BIT(13) | BIT(12) | BIT(11), 1); /* Reg858[13:11]=3'b001 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(16), 0); - ODM_SetBBReg(dm_odm, 0x858, BIT(15) | BIT(14), 2); /* Reg878[0],Reg858[14:15])=3'b010 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(19) | BIT(18) | BIT(17), 3);/* Reg878[3:1]=3b'011 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(22) | BIT(21) | BIT(20), 4);/* Reg878[6:4]=3b'100 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(25) | BIT(24) | BIT(23), 5);/* Reg878[9:7]=3b'101 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(28) | BIT(27) | BIT(26), 6);/* Reg878[12:10]=3b'110 */ - ODM_SetBBReg(dm_odm, 0x878, BIT(31) | BIT(30) | BIT(29), 7);/* Reg878[15:13]=3b'111 */ - } else { /* MPchip */ - ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 0); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 1); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte2, 2); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte3, 3); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte0, 4); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte1, 5); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte2, 6); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte3, 7); - } + if (!dm_odm->bIsMPChip) { /* testchip */ + rtl8188e_PHY_SetBBReg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ + rtl8188e_PHY_SetBBReg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ + } else { /* MPchip */ + rtl8188e_PHY_SetBBReg(adapter, 0x914, bMaskByte0, 1); + rtl8188e_PHY_SetBBReg(adapter, 0x914, bMaskByte1, 2); } /* Default Ant Setting when no fast training */ - ODM_SetBBReg(dm_odm, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */ - ODM_SetBBReg(dm_odm, 0x864, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX */ - ODM_SetBBReg(dm_odm, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */ + rtl8188e_PHY_SetBBReg(adapter, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */ + rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX */ + rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */ - /* Enter Traing state */ - ODM_SetBBReg(dm_odm, 0x864, BIT(2) | BIT(1) | BIT(0), (AntCombination - 1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */ - ODM_SetBBReg(dm_odm, 0xc50, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */ + /* Enter Training state */ + rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), 1); + rtl8188e_PHY_SetBBReg(adapter, 0xc50, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */ } void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) @@ -140,6 +108,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; + struct adapter *adapter = dm_odm->Adapter; u32 DefaultAnt, OptionalAnt; if (dm_fat_tbl->RxIdleAnt != Ant) { @@ -152,13 +121,13 @@ void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant) } if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT(14) | BIT(13) | BIT(12), DefaultAnt); /* Default TX */ - ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT(6) | BIT(7), DefaultAnt); /* Resp Tx */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_CTRL_11N, BIT(14) | BIT(13) | BIT(12), DefaultAnt); /* Default TX */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RESP_TX_11N, BIT(6) | BIT(7), DefaultAnt); /* Resp Tx */ } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */ } } dm_fat_tbl->RxIdleAnt = Ant; @@ -267,42 +236,29 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm) void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; + struct adapter *adapter = dm_odm->Adapter; + if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)) return; if (!dm_odm->bLinked) { if (dm_fat_tbl->bBecomeLinked) { - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* RegC50[7]=1'b1 enable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 0); /* Enable CCK AntDiv */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); /* RegC50[7]=1'b1 enable HW AntDiv */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 0); /* Enable CCK AntDiv */ if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */ dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; } return; } else { if (!dm_fat_tbl->bBecomeLinked) { /* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */ - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 1); /* Enable CCK AntDiv */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 1); /* Enable CCK AntDiv */ if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */ + rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */ dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; } } if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) odm_HWAntDiv(dm_odm); } - -/* 3============================================================ */ -/* 3 Dynamic Primary CCA */ -/* 3============================================================ */ - -void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm) -{ - struct dyn_primary_cca *PrimaryCCA = &dm_odm->DM_PriCCA; - - PrimaryCCA->dup_rts_flag = 0; - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - PrimaryCCA->monitor_flag = 0; - PrimaryCCA->pri_cca_flag = 0; -} diff --git a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c index 5f6f0ae5196e..5fb5a88314ed 100644 --- a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c +++ b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c @@ -1,28 +1,28 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" +#include "../include/drv_types.h" -void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, - u32 Data, enum rf_radio_path RF_PATH, - u32 RegAddr) +static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, + u32 Data, enum rf_radio_path RF_PATH, + u32 RegAddr) { - if (Addr == 0xffe) { - ODM_sleep_ms(50); + if (Addr == 0xffe) { + msleep(50); } else if (Addr == 0xfd) { - ODM_delay_ms(5); + mdelay(5); } else if (Addr == 0xfc) { - ODM_delay_ms(1); + mdelay(1); } else if (Addr == 0xfb) { - ODM_delay_us(50); + udelay(50); } else if (Addr == 0xfa) { - ODM_delay_us(5); + udelay(5); } else if (Addr == 0xf9) { - ODM_delay_us(1); + udelay(1); } else { - ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); + rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data); /* Add 1us delay between BB/RF register setting. */ - ODM_delay_us(1); + udelay(1); } } @@ -36,31 +36,31 @@ void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data) { - ODM_Write1Byte(pDM_Odm, Addr, Data); + rtw_write8(pDM_Odm->Adapter, Addr, Data); } void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); /* Add 1us delay between BB/RF register setting. */ - ODM_delay_us(1); + udelay(1); } void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { if (Addr == 0xfe) - ODM_sleep_ms(50); + msleep(50); else if (Addr == 0xfd) - ODM_delay_ms(5); + mdelay(5); else if (Addr == 0xfc) - ODM_delay_ms(1); + mdelay(1); else if (Addr == 0xfb) - ODM_delay_us(50); + udelay(50); else if (Addr == 0xfa) - ODM_delay_us(5); + udelay(5); else if (Addr == 0xf9) - ODM_delay_us(1); + udelay(1); else storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); } @@ -68,23 +68,23 @@ void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { if (Addr == 0xfe) { - ODM_sleep_ms(50); + msleep(50); } else if (Addr == 0xfd) { - ODM_delay_ms(5); + mdelay(5); } else if (Addr == 0xfc) { - ODM_delay_ms(1); + mdelay(1); } else if (Addr == 0xfb) { - ODM_delay_us(50); + udelay(50); } else if (Addr == 0xfa) { - ODM_delay_us(5); + udelay(5); } else if (Addr == 0xf9) { - ODM_delay_us(1); + udelay(1); } else { if (Addr == 0xa24) pDM_Odm->RFCalibrateInfo.RegA24 = Data; - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); /* Add 1us delay between BB/RF register setting. */ - ODM_delay_us(1); + udelay(1); } } diff --git a/drivers/staging/r8188eu/hal/odm_debug.c b/drivers/staging/r8188eu/hal/odm_debug.c index 7029ec4f771e..7a134229fe39 100644 --- a/drivers/staging/r8188eu/hal/odm_debug.c +++ b/drivers/staging/r8188eu/hal/odm_debug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ -#include "../include/odm_precomp.h" +#include "../include/rtw_debug.h" u32 GlobalDebugLevel; diff --git a/drivers/staging/r8188eu/hal/odm_interface.c b/drivers/staging/r8188eu/hal/odm_interface.c deleted file mode 100644 index 7ddba39a0f4b..000000000000 --- a/drivers/staging/r8188eu/hal/odm_interface.c +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#include "../include/odm_precomp.h" -/* ODM IO Relative API. */ - -u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read8(Adapter, RegAddr); -} - -u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read32(Adapter, RegAddr); -} - -void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write8(Adapter, RegAddr, Data); -} - -void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write16(Adapter, RegAddr, Data); -} - -void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write32(Adapter, RegAddr, Data); -} - -void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - -void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - -void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data); -} - -u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask); -} - -/* ODM Memory relative API. */ -s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length) -{ - return !memcmp(pBuf1, pBuf2, length); -} - -/* ODM Timer relative API. */ -void ODM_delay_ms(u32 ms) -{ - mdelay(ms); -} - -void ODM_delay_us(u32 us) -{ - udelay(us); -} - -void ODM_sleep_ms(u32 ms) -{ - msleep(ms); -} diff --git a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c index e44bcde92cc3..a491c37777df 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c @@ -49,7 +49,7 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p u8 h2c_box_num; u32 msgbox_addr; u32 msgbox_ex_addr; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; u8 cmd_idx, ext_cmd_len; u32 h2c_cmd = 0; u32 h2c_cmd_ex = 0; @@ -104,7 +104,7 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask) { u8 buf[3]; u8 res = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; if (haldata->fw_ractrl) { __le32 lmask; @@ -128,7 +128,7 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask) /* arg[5] = Short GI */ void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) { - struct hal_data_8188e *haldata = GET_HAL_DATA(pAdapter); + struct hal_data_8188e *haldata = &pAdapter->haldata; u8 macid, raid, short_gi_rate = false; @@ -440,7 +440,6 @@ void CheckFwRsvdPageContent(struct adapter *Adapter) /* 2009.10.15 by tynli. */ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) { - struct hal_data_8188e *haldata; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; @@ -461,7 +460,6 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) return; } - haldata = GET_HAL_DATA(adapt); pxmitpriv = &adapt->xmitpriv; pmlmeext = &adapt->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; @@ -480,7 +478,6 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) if (PageNeed == 1) PageNeed += 1; PageNum += PageNeed; - haldata->FwRsvdPageStartOffset = PageNum; BufIndex += PageNeed * 128; @@ -547,7 +544,7 @@ exit: void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; bool bSendBeacon = false; @@ -642,7 +639,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct wifidirect_info *pwdinfo = &adapt->wdinfo; struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload; u8 i; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_dm.c b/drivers/staging/r8188eu/hal/rtl8188e_dm.c index 5d76f6ea91c4..bd6eb3878060 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_dm.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_dm.c @@ -24,7 +24,7 @@ static void dm_InitGPIOSetting(struct adapter *Adapter) /* */ static void Init_ODM_ComInfo_88E(struct adapter *Adapter) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct dm_priv *pdmpriv = &hal_data->dmpriv; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; @@ -48,18 +48,14 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter) struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; struct dm_priv *pdmpriv = &hal_data->dmpriv; int i; - pdmpriv->InitODMFlag = ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | + pdmpriv->InitODMFlag = ODM_BB_FA_CNT | ODM_BB_RSSI_MONITOR | ODM_BB_CCK_PD | - ODM_BB_PWR_SAVE | ODM_MAC_EDCA_TURBO | ODM_RF_CALIBRATION | ODM_RF_TX_PWR_TRACK; @@ -68,14 +64,10 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter) ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &Adapter->xmitpriv.tx_bytes); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_RX_UNI, &Adapter->recvpriv.rx_bytes); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_WM_MODE, &pmlmeext->cur_wireless_mode); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &hal_data->nCur40MhzPrimeSC); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_MODE, &Adapter->securitypriv.dot11PrivacyAlgrthm); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &hal_data->CurrentChannelBW); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &hal_data->CurrentChannel); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &Adapter->net_closed); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &pmlmepriv->bScanInProcess); ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &pwrctrlpriv->bpower_saving); ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType); @@ -86,19 +78,18 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter) void rtl8188e_InitHalDm(struct adapter *Adapter) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; dm_InitGPIOSetting(Adapter); Update_ODM_ComInfo_88E(Adapter); ODM_DMInit(dm_odm); - Adapter->fix_rate = 0xFF; } void rtl8188e_HalDmWatchDog(struct adapter *Adapter) { u8 hw_init_completed = Adapter->hw_init_completed; - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; u8 bLinked = false; @@ -120,7 +111,7 @@ void rtl8188e_HalDmWatchDog(struct adapter *Adapter) void rtl8188e_init_dm_priv(struct adapter *Adapter) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct dm_priv *pdmpriv = &hal_data->dmpriv; memset(pdmpriv, 0, sizeof(struct dm_priv)); @@ -131,7 +122,7 @@ void rtl8188e_init_dm_priv(struct adapter *Adapter) /* Compare RSSI for deciding antenna */ void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; if (0 != hal_data->AntDivCfg) { /* select optimum_antenna for before linked =>For antenna diversity */ @@ -145,7 +136,7 @@ void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, stru /* Add new function to reset the state of antenna diversity before link. */ u8 AntDivBeforeLink8188E(struct adapter *Adapter) { - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); + struct hal_data_8188e *hal_data = &Adapter->haldata; struct odm_dm_struct *dm_odm = &hal_data->odmpriv; struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table; struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c index 8c00f2dd67da..b818872e0d19 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c @@ -508,8 +508,6 @@ static s32 _FWFreeToGo(struct adapter *padapter) return _FAIL; } -#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) - static int load_firmware(struct rt_firmware *pFirmware, struct device *device) { s32 rtStatus = _SUCCESS; @@ -541,7 +539,7 @@ static int load_firmware(struct rt_firmware *pFirmware, struct device *device) memcpy(pFirmware->szFwBuffer, fw->data, fw->size); pFirmware->ulFwLength = fw->size; release_firmware(fw); - DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, pFirmware->ulFwLength); + dev_dbg(device, "!bUsedWoWLANFw, FmrmwareLen:%d+\n", pFirmware->ulFwLength); Exit: return rtStatus; @@ -552,7 +550,7 @@ s32 rtl8188e_FirmwareDownload(struct adapter *padapter) s32 rtStatus = _SUCCESS; u8 writeFW_retry = 0; u32 fwdl_start_time; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + struct hal_data_8188e *pHalData = &padapter->haldata; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct device *device = dvobj_to_dev(dvobj); struct rt_firmware_hdr *pFwHdr = NULL; @@ -628,7 +626,7 @@ Exit: void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + struct hal_data_8188e *pHalData = &padapter->haldata; /* Init Fw LPS related. */ padapter->pwrctrlpriv.bFwCurrentInPSMode = false; @@ -637,12 +635,6 @@ void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) pHalData->LastHMEBoxNum = 0; } -void rtl8188e_free_hal_data(struct adapter *padapter) -{ - kfree(padapter->HalData); - padapter->HalData = NULL; -} - /* */ /* Efuse related code */ /* */ @@ -651,31 +643,8 @@ enum{ LDOE25_SHIFT = 28, }; -static bool -hal_EfusePgPacketWrite2ByteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); -static bool -hal_EfusePgPacketWrite1ByteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); -static bool -hal_EfusePgPacketWriteData( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); - -void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState) +void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState) { - u8 tempval; u16 tmpV16; if (PwrState) { @@ -700,31 +669,15 @@ void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState) tmpV16 |= (LOADER_CLK_EN | ANA8M); rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16); } - - if (bWrite) { - /* Enable LDO 2.5V before read/write action */ - tempval = rtw_read8(pAdapter, EFUSE_TEST + 3); - tempval &= 0x0F; - tempval |= (VOLTAGE_V25 << 4); - rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval | 0x80)); - } } else { rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); - - if (bWrite) { - /* Disable LDO 2.5V after read/write action */ - tempval = rtw_read8(pAdapter, EFUSE_TEST + 3); - rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval & 0x7F)); - } } } static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, u16 _offset, u16 _size_byte, - u8 *pbuf, - bool bPseudoTest - ) + u8 *pbuf) { u8 *efuseTbl = NULL; u8 rtemp8[1]; @@ -764,7 +717,7 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, /* 1. Read the first byte to check if efuse is empty!!! */ /* */ /* */ - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); if (*rtemp8 != 0xFF) { efuse_utilized++; eFuse_Addr++; @@ -781,11 +734,11 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, if ((*rtemp8 & 0x1F) == 0x0F) { /* extended header */ u1temp = ((*rtemp8 & 0xE0) >> 5); - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); if ((*rtemp8 & 0x0F) == 0x0F) { eFuse_Addr++; - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) eFuse_Addr++; @@ -806,13 +759,13 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { /* Check word enable condition in the section */ if (!(wren & 0x01)) { - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); eFuse_Addr++; efuse_utilized++; eFuseWord[offset][i] = (*rtemp8 & 0xff); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); eFuse_Addr++; efuse_utilized++; eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); @@ -824,7 +777,7 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, } /* Read next PG header */ - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8); if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { efuse_utilized++; @@ -852,804 +805,37 @@ exit: kfree(eFuseWord); } -static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest) -{ - if (!bPseudoTest) { - int ret = _FAIL; - if (rtw_IOL_applied(Adapter)) { - rtl8188eu_InitPowerOn(Adapter); - - iol_mode_enable(Adapter, 1); - ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); - iol_mode_enable(Adapter, 0); - - if (_SUCCESS == ret) - goto exit; - } - } - Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); - -exit: - return; -} - -static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest) +static void ReadEFuseByIC(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf) { - Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); -} - -void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, - u16 _offset, u16 _size_byte, u8 *pbuf, - bool bPseudoTest) -{ - if (bPseudoTest) - ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); - else - ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); -} - -/* Do not support BT */ -static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut) -{ - switch (type) { - case TYPE_EFUSE_MAX_SECTION: - { - u8 *pMax_section; - pMax_section = (u8 *)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = 0; - } - break; - } -} - -static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut) -{ - switch (type) { - case TYPE_EFUSE_MAX_SECTION: - { - u8 *pMax_section; - pMax_section = (u8 *)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = 0; - } - break; - } -} - -void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest) -{ - if (bPseudoTest) - Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); - else - Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut); -} - -static u8 Hal_EfuseWordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) -{ - u16 tmpaddr = 0; - u16 start_addr = efuse_addr; - u8 badworden = 0x0F; - u8 tmpdata[8]; - - memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE); - - if (!(word_en & BIT(0))) { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest); - - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[1], bPseudoTest); - if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) - badworden &= (~BIT(0)); - } - if (!(word_en & BIT(1))) { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest); - - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[3], bPseudoTest); - if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) - badworden &= (~BIT(1)); - } - if (!(word_en & BIT(2))) { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest); - - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[5], bPseudoTest); - if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) - badworden &= (~BIT(2)); - } - if (!(word_en & BIT(3))) { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest); - - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[7], bPseudoTest); - if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) - badworden &= (~BIT(3)); - } - return badworden; -} - -static u8 Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) -{ - u8 ret; - - ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); - return ret; -} - -static u8 rtl8188e_Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) -{ - u8 ret = 0; - - if (bPseudoTest) - ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest); - else - ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); - return ret; -} - -static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoTest) -{ - int bContinual = true; - u16 efuse_addr = 0; - u8 hworden = 0; - u8 efuse_data, word_cnts = 0; - - if (bPseudoTest) - efuse_addr = (u16)(fakeEfuseUsedBytes); - else - GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); - - while (bContinual && - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && - AVAILABLE_EFUSE_ADDR(efuse_addr)) { - if (efuse_data != 0xFF) { - if ((efuse_data & 0x1F) == 0x0F) { /* extended header */ - efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); - if ((efuse_data & 0x0F) == 0x0F) { - efuse_addr++; - continue; - } else { - hworden = efuse_data & 0x0F; - } - } else { - hworden = efuse_data & 0x0F; - } - word_cnts = Efuse_CalculateWordCnts(hworden); - /* read next header */ - efuse_addr = efuse_addr + (word_cnts * 2) + 1; - } else { - bContinual = false; - } - } - - if (bPseudoTest) - fakeEfuseUsedBytes = efuse_addr; - else - SetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); - - return efuse_addr; -} - -static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudoTest) -{ - u16 ret = 0; - - ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); - return ret; -} - -u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest) -{ - u16 ret = 0; - - if (bPseudoTest) - ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); - else - ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); - return ret; -} - -static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) -{ - u8 ReadState = PG_STATE_HEADER; - int bContinual = true; - int bDataEmpty = true; - u8 efuse_data, word_cnts = 0; - u16 efuse_addr = 0; - u8 hoffset = 0, hworden = 0; - u8 tmpidx = 0; - u8 tmpdata[8]; - u8 max_section = 0; - u8 tmp_header = 0; - - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); - - if (!data) - return false; - if (offset > max_section) - return false; - - memset((void *)data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); - memset((void *)tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); - - /* <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */ - /* Skip dummy parts to prevent unexpected data read from Efuse. */ - /* By pass right now. 2009.02.19. */ - while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) { - /* Header Read ------------- */ - if (ReadState & PG_STATE_HEADER) { - if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { - if (EXT_HEADER(efuse_data)) { - tmp_header = efuse_data; - efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); - if (!ALL_WORDS_DISABLED(efuse_data)) { - hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); - hworden = efuse_data & 0x0F; - } else { - DBG_88E("Error, All words disabled\n"); - efuse_addr++; - continue; - } - } else { - hoffset = (efuse_data >> 4) & 0x0F; - hworden = efuse_data & 0x0F; - } - word_cnts = Efuse_CalculateWordCnts(hworden); - bDataEmpty = true; - - if (hoffset == offset) { - for (tmpidx = 0; tmpidx < word_cnts * 2; tmpidx++) { - if (efuse_OneByteRead(pAdapter, efuse_addr + 1 + tmpidx, &efuse_data, bPseudoTest)) { - tmpdata[tmpidx] = efuse_data; - if (efuse_data != 0xff) - bDataEmpty = false; - } - } - if (!bDataEmpty) { - ReadState = PG_STATE_DATA; - } else {/* read next header */ - efuse_addr = efuse_addr + (word_cnts * 2) + 1; - ReadState = PG_STATE_HEADER; - } - } else {/* read next header */ - efuse_addr = efuse_addr + (word_cnts * 2) + 1; - ReadState = PG_STATE_HEADER; - } - } else { - bContinual = false; - } - } else if (ReadState & PG_STATE_DATA) { - /* Data section Read ------------- */ - efuse_WordEnableDataRead(hworden, tmpdata, data); - efuse_addr = efuse_addr + (word_cnts * 2) + 1; - ReadState = PG_STATE_HEADER; - } - - } - - if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) && - (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff)) - return false; - else - return true; -} - -static int Hal_EfusePgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) -{ - int ret; - - ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); - return ret; -} - -static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) -{ - int ret; - - ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); - return ret; -} - -int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) -{ - int ret; - - if (bPseudoTest) - ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); - else - ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); - return ret; -} - -static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr, bool bPseudoTest) -{ - u8 originaldata[8], badworden = 0; - u16 efuse_addr = *pAddr; - u32 PgWriteSuccess = 0; - - memset((void *)originaldata, 0xff, 8); - - if (rtl8188e_Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { - /* check if data exist */ - badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest); - - if (badworden != 0xf) { /* write fail */ - PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); - - if (!PgWriteSuccess) - return false; - else - efuse_addr = rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); - } else { - efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1; - } - } else { - efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1; - } - *pAddr = efuse_addr; - return true; -} - -static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) -{ - bool bRet = false; - u16 efuse_addr = *pAddr, efuse_max_available_len = 0; - u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0; - u8 repeatcnt = 0; - - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); - - while (efuse_addr < efuse_max_available_len) { - pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - } - - /* to write ext_header */ - if (tmp_header == pg_header) { - efuse_addr++; - pg_header_temp = pg_header; - pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - } - - if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */ - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { - return false; - } else { - efuse_addr++; - continue; - } - } else if (pg_header != tmp_header) { /* offset PG fail */ - struct pgpkt fixPkt; - fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); - fixPkt.word_en = tmp_header & 0x0F; - fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return false; - } else { - bRet = true; - break; - } - } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */ - efuse_addr += 2; - continue; - } - } - - *pAddr = efuse_addr; - return bRet; -} - -static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) -{ - bool bRet = false; - u8 pg_header = 0, tmp_header = 0; - u16 efuse_addr = *pAddr; - u8 repeatcnt = 0; - - pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - } - - if (pg_header == tmp_header) { - bRet = true; - } else { - struct pgpkt fixPkt; - fixPkt.offset = (tmp_header >> 4) & 0x0F; - fixPkt.word_en = tmp_header & 0x0F; - fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return false; - } - - *pAddr = efuse_addr; - return bRet; -} - -static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) -{ - u16 efuse_addr = *pAddr; - u8 badworden; - u32 PgWriteSuccess = 0; - - badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); - if (badworden == 0x0F) { - /* write ok */ - return true; - } else { - /* reorganize other pg packet */ - PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - if (!PgWriteSuccess) - return false; - else - return true; - } -} - -static bool -hal_EfusePgPacketWriteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest) -{ - bool bRet = false; - - if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) - bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); - else - bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); - - return bRet; -} - -static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt, - u8 *pWden) -{ - u8 match_word_en = 0x0F; /* default all words are disabled */ - - /* check if the same words are enabled both target and current PG packet */ - if (((pTargetPkt->word_en & BIT(0)) == 0) && - ((pCurPkt->word_en & BIT(0)) == 0)) - match_word_en &= ~BIT(0); /* enable word 0 */ - if (((pTargetPkt->word_en & BIT(1)) == 0) && - ((pCurPkt->word_en & BIT(1)) == 0)) - match_word_en &= ~BIT(1); /* enable word 1 */ - if (((pTargetPkt->word_en & BIT(2)) == 0) && - ((pCurPkt->word_en & BIT(2)) == 0)) - match_word_en &= ~BIT(2); /* enable word 2 */ - if (((pTargetPkt->word_en & BIT(3)) == 0) && - ((pCurPkt->word_en & BIT(3)) == 0)) - match_word_en &= ~BIT(3); /* enable word 3 */ - - *pWden = match_word_en; - - if (match_word_en != 0xf) - return true; - else - return false; -} - -static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr, bool bPseudoTest) -{ - bool bRet = false; - u8 i, efuse_data; - - for (i = 0; i < (word_cnts * 2); i++) { - if (efuse_OneByteRead(pAdapter, (startAddr + i), &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) - bRet = true; - } - return bRet; -} - -static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) -{ - bool bRet = false; - u8 i, efuse_data = 0, cur_header = 0; - u8 matched_wden = 0, badworden = 0; - u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; - struct pgpkt curPkt; - - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); - - if (efuseType == EFUSE_WIFI) { - if (bPseudoTest) { - startAddr = (u16)(fakeEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); - } else { - GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); - startAddr %= EFUSE_REAL_CONTENT_LEN; - } - } else { - if (bPseudoTest) - startAddr = (u16)(fakeBTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); - else - startAddr = (u16)(BTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); - } + int ret = _FAIL; + if (rtw_IOL_applied(Adapter)) { + rtl8188eu_InitPowerOn(Adapter); - while (1) { - if (startAddr >= efuse_max_available_len) { - bRet = false; - break; - } + iol_mode_enable(Adapter, 1); + ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); + iol_mode_enable(Adapter, 0); - if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { - if (EXT_HEADER(efuse_data)) { - cur_header = efuse_data; - startAddr++; - efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); - if (ALL_WORDS_DISABLED(efuse_data)) { - bRet = false; - break; - } else { - curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); - curPkt.word_en = efuse_data & 0x0F; - } - } else { - cur_header = efuse_data; - curPkt.offset = (cur_header >> 4) & 0x0F; - curPkt.word_en = cur_header & 0x0F; - } - - curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); - /* if same header is found but no data followed */ - /* write some part of data followed by the header. */ - if ((curPkt.offset == pTargetPkt->offset) && - (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1, bPseudoTest)) && - wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) { - /* Here to write partial data */ - badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest); - if (badworden != 0x0F) { - u32 PgWriteSuccess = 0; - /* if write fail on some words, write these bad words again */ - - PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - - if (!PgWriteSuccess) { - bRet = false; /* write fail, return */ - break; - } - } - /* partial write ok, update the target packet for later use */ - for (i = 0; i < 4; i++) { - if ((matched_wden & (0x1 << i)) == 0) /* this word has been written */ - pTargetPkt->word_en |= (0x1 << i); /* disable the word */ - } - pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); - } - /* read from next header */ - startAddr = startAddr + (curPkt.word_cnts * 2) + 1; - } else { - /* not used header, 0xff */ - *pAddr = startAddr; - bRet = true; - break; - } + if (_SUCCESS == ret) + return; } - return bRet; -} - -static bool -hal_EfusePgCheckAvailableAddr( - struct adapter *pAdapter, - u8 efuseType, - bool bPseudoTest - ) -{ - u16 efuse_max_available_len = 0; - /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */ - rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false); - - if (rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) - return false; - return true; -} - -static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt) -{ - memset((void *)pTargetPkt->data, 0xFF, sizeof(u8) * 8); - pTargetPkt->offset = offset; - pTargetPkt->word_en = word_en; - efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); - pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf); } -static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest) +void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf) { - struct pgpkt targetPkt; - u16 startAddr = 0; - u8 efuseType = EFUSE_WIFI; - - if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) - return false; - - hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); - - if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; - - if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; - - if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; - - return true; -} - -static int Hal_EfusePgPacketWrite_Pseudo(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) -{ - int ret; - - ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); - return ret; -} - -static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) -{ - int ret = 0; - ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); - - return ret; -} - -int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) -{ - int ret; - - if (bPseudoTest) - ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); - else - ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); - return ret; + ReadEFuseByIC(Adapter, _offset, _size_byte, pbuf); } void rtl8188e_read_chip_version(struct adapter *padapter) { u32 value32; struct HAL_VERSION ChipVersion; - struct hal_data_8188e *pHalData; - - pHalData = GET_HAL_DATA(padapter); + struct hal_data_8188e *pHalData = &padapter->haldata; value32 = rtw_read32(padapter, REG_SYS_CFG); ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); - ChipVersion.RFType = RF_TYPE_1T1R; ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ ChipVersion.ROMVer = 0; /* ROM code version. */ @@ -1657,39 +843,21 @@ void rtl8188e_read_chip_version(struct adapter *padapter) dump_chip_info(ChipVersion); pHalData->VersionID = ChipVersion; - - pHalData->rf_type = RF_1T1R; - - MSG_88E("RF_Type is %x!!\n", pHalData->rf_type); } -void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) +void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct odm_dm_struct *podmpriv = &pHalData->odmpriv; - switch (eVariable) { - case HAL_ODM_STA_INFO: - { - struct sta_info *psta = (struct sta_info *)pValue1; - - if (bSet) { - DBG_88E("### Set STA_(%d) info\n", psta->mac_id); - podmpriv->pODM_StaInfo[psta->mac_id] = psta; - ODM_RAInfo_Init(podmpriv, psta->mac_id); - } else { - DBG_88E("### Clean STA_(%d) info\n", psta->mac_id); - podmpriv->pODM_StaInfo[psta->mac_id] = NULL; - } - } - break; - case HAL_ODM_P2P_STATE: - ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet); - break; - case HAL_ODM_WIFI_DISPLAY_STATE: - ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet); - break; - default: - break; + struct sta_info *psta = (struct sta_info *)pValue1; + + if (bSet) { + DBG_88E("### Set STA_(%d) info\n", psta->mac_id); + podmpriv->pODM_StaInfo[psta->mac_id] = psta; + ODM_RAInfo_Init(podmpriv, psta->mac_id); + } else { + DBG_88E("### Clean STA_(%d) info\n", psta->mac_id); + podmpriv->pODM_StaInfo[psta->mac_id] = NULL; } } @@ -1713,7 +881,8 @@ u8 GetEEPROMSize8188E(struct adapter *padapter) /* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */ size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; - MSG_88E("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46"); + netdev_dbg(padapter->pnetdev, "EEPROM type is %s\n", + size == 4 ? "E-FUSE" : "93C46"); return size; } @@ -1787,23 +956,6 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) } void -Hal_InitPGData88E(struct adapter *padapter) -{ - struct eeprom_priv *pEEPROM = &padapter->eeprompriv; - - if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */ - if (!is_boot_from_eeprom(padapter)) { - /* Read EFUSE real map to shadow. */ - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false); - } - } else {/* autoload fail */ - /* update to default value 0xFF */ - if (!is_boot_from_eeprom(padapter)) - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false); - } -} - -void Hal_EfuseParseIDCode88E( struct adapter *padapter, u8 *hwinfo @@ -1942,22 +1094,16 @@ static void hal_get_chnl_group_88e(u8 chnl, u8 *group) void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) { if (AutoLoadFail) { - padapter->pwrctrlpriv.bHWPowerdown = false; padapter->pwrctrlpriv.bSupportRemoteWakeup = false; } else { /* hw power down mode selection , 0:rf-off / 1:power down */ - if (padapter->registrypriv.hwpdn_mode == 2) - padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4)); - else - padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode; - /* decide hw if support remote wakeup function */ /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */ padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false; - DBG_88E("%s...bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__, - padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup); + DBG_88E("%s , bSupportRemoteWakeup(%x)\n", __func__, + padapter->pwrctrlpriv.bSupportRemoteWakeup); DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable); } @@ -1965,40 +1111,32 @@ void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoL void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + struct hal_data_8188e *pHalData = &padapter->haldata; struct txpowerinfo24g pwrInfo24G; - u8 rfPath = 0; u8 ch, group; u8 TxCount; Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail); - if (!AutoLoadFail) - pHalData->bTXPowerDataReadFromEEPORM = true; - for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { hal_get_chnl_group_88e(ch, &group); - pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; + pHalData->Index24G_CCK_Base[ch] = pwrInfo24G.IndexCCK_Base[0][group]; if (ch == 14) - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4]; + pHalData->Index24G_BW40_Base[ch] = pwrInfo24G.IndexBW40_Base[0][4]; else - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; + pHalData->Index24G_BW40_Base[ch] = pwrInfo24G.IndexBW40_Base[0][group]; - DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch); - DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]); - DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]); + DBG_88E("======= Path 0, Channel %d =======\n", ch); + DBG_88E("Index24G_CCK_Base[%d] = 0x%x\n", ch, pHalData->Index24G_CCK_Base[ch]); + DBG_88E("Index24G_BW40_Base[%d] = 0x%x\n", ch, pHalData->Index24G_BW40_Base[ch]); } for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount]; - pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount]; - pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount]; - pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount]; + pHalData->OFDM_24G_Diff[TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount]; + pHalData->BW20_24G_Diff[TxCount] = pwrInfo24G.BW20_Diff[0][TxCount]; DBG_88E("======= TxCount %d =======\n", TxCount); - DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]); - DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]); - DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]); - DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]); + DBG_88E("OFDM_24G_Diff[%d] = %d\n", TxCount, pHalData->OFDM_24G_Diff[TxCount]); + DBG_88E("BW20_24G_Diff[%d] = %d\n", TxCount, pHalData->BW20_24G_Diff[TxCount]); } /* 2010/10/19 MH Add Regulator recognize for CU. */ @@ -2014,7 +1152,7 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); + struct hal_data_8188e *pHalData = &pAdapter->haldata; if (!AutoLoadFail) { pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E]; @@ -2026,30 +1164,6 @@ void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoa DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap); } -void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - - if (!AutoLoadFail) - pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E] & 0xE0) >> 5); - else - pHalData->BoardType = 0; - DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType); -} - -void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - - if (!AutoLoadFail) { - pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; - if (pHalData->EEPROMVersion == 0xFF) - pHalData->EEPROMVersion = EEPROM_Default_Version; - } else { - pHalData->EEPROMVersion = 1; - } -} - void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) { padapter->mlmepriv.ChannelPlan = @@ -2061,22 +1175,9 @@ void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool Auto DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); } -void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - - if (!AutoLoadFail) { - pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; - } else { - pHalData->EEPROMCustomerID = 0; - pHalData->EEPROMSubCustomerID = 0; - } - DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); -} - void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); + struct hal_data_8188e *pHalData = &pAdapter->haldata; struct registry_priv *registry_par = &pAdapter->registrypriv; if (!AutoLoadFail) { @@ -2108,7 +1209,7 @@ void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; /* ThermalMeter from EEPROM */ if (!AutoloadFail) @@ -2116,9 +1217,8 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool Aut else pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; - if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) { - pHalData->bAPKThermalMeterIgnore = true; + if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; - } + DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); } diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c index bb0cda0c16a0..302b15b2874d 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c @@ -143,7 +143,7 @@ phy_RFSerialRead( ) { u32 retValue = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; u32 NewOffset; u32 tmplong, tmplong2; @@ -161,31 +161,31 @@ phy_RFSerialRead( /* For 92S LSSI Read RFLSSIRead */ /* For RF A/B write 0x824/82c(does not work in the future) */ /* We must use 0x824 for RF A and B to execute read trigger */ - tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + tmplong = rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); if (eRFPath == RF_PATH_A) tmplong2 = tmplong; else - tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); + tmplong2 = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */ - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong & (~bLSSIReadEdge)); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong & (~bLSSIReadEdge)); udelay(10);/* PlatformStallExecution(10); */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); udelay(100);/* PlatformStallExecution(100); */ udelay(10);/* PlatformStallExecution(10); */ if (eRFPath == RF_PATH_A) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8)); + RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8)); else if (eRFPath == RF_PATH_B) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8)); + RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8)); if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); + retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); } else { /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); + retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); } return retValue; } @@ -242,7 +242,7 @@ phy_RFSerialWrite( ) { u32 DataAndAddr = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; u32 NewOffset; @@ -263,7 +263,7 @@ phy_RFSerialWrite( /* */ /* Write Operation */ /* */ - PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); } /** @@ -355,7 +355,7 @@ rtl8188e_PHY_SetRFReg( *---------------------------------------------------------------------------*/ s32 PHY_MACConfig8188E(struct adapter *Adapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; int rtStatus = _SUCCESS; /* */ @@ -387,19 +387,15 @@ phy_InitBBRFRegisterDefinition( struct adapter *Adapter ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; /* RF Interface Sowrtware Control */ pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */ pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */ - pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 LSBs if read 32-bit from 0x874 */ - pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) */ /* RF Interface Readback Value */ pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */ pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) */ - pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 LSBs if read 32-bit from 0x8E4 */ - pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) */ /* RF Interface Output (and Enable) */ pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */ @@ -416,14 +412,10 @@ phy_InitBBRFRegisterDefinition( /* RF parameter */ pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */ pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; - pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; - pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; /* Tx AGC Gain Stage (same for all path. Should we remove this?) */ pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ /* Tranceiver A~D HSSI Parameter-1 */ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */ @@ -436,50 +428,34 @@ phy_InitBBRFRegisterDefinition( /* RF switch Control */ pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */ pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; - pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; - pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; /* AGC control 1 */ pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; /* AGC control 2 */ pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; /* RX AFE control 1 */ pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; /* RX AFE control 1 */ pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; /* Tx AFE control 1 */ pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; /* Tx AFE control 2 */ pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; /* Tranceiver LSSI Readback SI mode */ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; /* Tranceiver LSSI Readback PI mode */ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; @@ -488,7 +464,7 @@ phy_InitBBRFRegisterDefinition( void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; if (RegAddr == rTxAGC_A_Rate18_06) pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; @@ -506,8 +482,7 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; if (RegAddr == rTxAGC_A_Mcs15_Mcs12) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; - if (pHalData->rf_type == RF_1T1R) - pHalData->pwrGroupCnt++; + pHalData->pwrGroupCnt++; } if (RegAddr == rTxAGC_B_Rate18_06) pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; @@ -523,17 +498,14 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; if (RegAddr == rTxAGC_B_Mcs11_Mcs08) pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; - if (RegAddr == rTxAGC_B_Mcs15_Mcs12) { + if (RegAddr == rTxAGC_B_Mcs15_Mcs12) pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; - if (pHalData->rf_type != RF_1T1R) - pHalData->pwrGroupCnt++; - } } static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter) { struct eeprom_priv *pEEPROM = &Adapter->eeprompriv; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; int rtStatus = _SUCCESS; /* */ @@ -574,7 +546,7 @@ PHY_BBConfig8188E( ) { int rtStatus = _SUCCESS; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u32 RegVal; u8 CrystalCap; @@ -595,7 +567,7 @@ PHY_BBConfig8188E( /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ CrystalCap = pHalData->CrystalCap & 0x3F; - PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); + rtl8188e_PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); return rtStatus; } @@ -613,82 +585,25 @@ static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPower u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u8 index = (channel - 1); - u8 TxCount = 0, path_nums; - if ((RF_1T2R == pHalData->rf_type) || (RF_1T1R == pHalData->rf_type)) - path_nums = 1; - else - path_nums = 2; - - for (TxCount = 0; TxCount < path_nums; TxCount++) { - if (TxCount == RF_PATH_A) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_B) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[TxCount][index]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A] + - pHalData->BW20_24G_Diff[TxCount][index]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_C) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_B][index] + - pHalData->BW20_24G_Diff[TxCount][index]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_B][index] + - pHalData->BW20_24G_Diff[TxCount][index]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_D) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_B][index] + - pHalData->BW20_24G_Diff[RF_PATH_C][index] + - pHalData->BW20_24G_Diff[TxCount][index]; - - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_A][index] + - pHalData->BW20_24G_Diff[RF_PATH_B][index] + - pHalData->BW20_24G_Diff[RF_PATH_C][index] + - pHalData->BW20_24G_Diff[TxCount][index]; - - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } - } + /* 1. CCK */ + cckPowerLevel[RF_PATH_A] = pHalData->Index24G_CCK_Base[index]; + /* 2. OFDM */ + ofdmPowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index] + + pHalData->OFDM_24G_Diff[RF_PATH_A]; + /* 1. BW20 */ + BW20PowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index] + + pHalData->BW20_24G_Diff[RF_PATH_A]; + /* 2. BW40 */ + BW40PowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index]; } static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel, u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; @@ -752,17 +667,10 @@ _PHY_SetBWMode92C( struct adapter *Adapter ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u8 regBwOpMode; u8 regRRSR_RSC; - if (pHalData->rf_chip == RF_PSEUDO_11N) - return; - - /* There is no 40MHz mode in RF_8225. */ - if (pHalData->rf_chip == RF_8225) - return; - if (Adapter->bDriverStopped) return; @@ -796,17 +704,17 @@ _PHY_SetBWMode92C( switch (pHalData->CurrentChannelBW) { /* 20 MHz channel*/ case HT_CHANNEL_WIDTH_20: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); break; /* 40 MHz channel*/ case HT_CHANNEL_WIDTH_40: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); /* Set Control channel to upper or lower. These settings are required only for 40MHz */ - PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); - PHY_SetBBReg(Adapter, 0x818, (BIT(26) | BIT(27)), + rtl8188e_PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); + rtl8188e_PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); + rtl8188e_PHY_SetBBReg(Adapter, 0x818, (BIT(26) | BIT(27)), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); break; default: @@ -814,21 +722,7 @@ _PHY_SetBWMode92C( } /* Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 */ - /* 3<3>Set RF related register */ - switch (pHalData->rf_chip) { - case RF_8225: - break; - case RF_8256: - /* Please implement this function in Hal8190PciPhy8256.c */ - break; - case RF_PSEUDO_11N: - break; - case RF_6052: - rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); - break; - default: - break; - } + rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); } /*----------------------------------------------------------------------------- @@ -848,7 +742,7 @@ _PHY_SetBWMode92C( void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth, /* 20M or 40M */ unsigned char Offset) /* Upper, Lower, or Don't care */ { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; enum ht_channel_width tmpBW = pHalData->CurrentChannelBW; pHalData->CurrentChannelBW = Bandwidth; @@ -865,7 +759,7 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel) { u8 eRFPath = 0; u32 param1, param2; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; if (Adapter->bNotifyChannelChange) DBG_88E("[%s] ch = %d\n", __func__, channel); @@ -877,16 +771,13 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel) param1 = RF_CHNLBW; param2 = channel; pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); - PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); + rtl8188e_PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); } void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel) { /* Call after initialization */ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - if (pHalData->rf_chip == RF_PSEUDO_11N) - return; /* return immediately if it is peudo-phy */ + struct hal_data_8188e *pHalData = &Adapter->haldata; if (channel == 0) channel = 1; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c index 946a1b97d96f..6e0231099986 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c @@ -46,16 +46,16 @@ void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter, enum ht_channel_width Bandwidth) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; switch (Bandwidth) { case HT_CHANNEL_WIDTH_20: pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); break; case HT_CHANNEL_WIDTH_40: pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); break; default: break; @@ -84,31 +84,24 @@ rtl8188e_PHY_RF6052SetCckTxPower( struct adapter *Adapter, u8 *pPowerlevel) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value; - bool TurboScanOff = false; u8 idx1, idx2; u8 *ptr; u8 direction; - /* FOR CE ,must disable turbo scan */ - TurboScanOff = true; if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { TxAGC[RF_PATH_A] = 0x3f3f3f3f; TxAGC[RF_PATH_B] = 0x3f3f3f3f; - TurboScanOff = true;/* disable turbo scan */ - - if (TurboScanOff) { - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) | - (pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24); - /* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */ - if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) - TxAGC[idx1] = 0x20; - } + for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) | + (pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24); + /* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */ + if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) + TxAGC[idx1] = 0x20; } } else { for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { @@ -148,15 +141,15 @@ rtl8188e_PHY_RF6052SetCckTxPower( /* rf-A cck tx power */ tmpval = TxAGC[RF_PATH_A] & 0xff; - PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); + rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); tmpval = TxAGC[RF_PATH_A] >> 8; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); /* rf-B cck tx power */ tmpval = TxAGC[RF_PATH_B] >> 24; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); + rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); tmpval = TxAGC[RF_PATH_B] & 0x00ffffff; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); } /* PHY_RF6052SetCckTxPower */ /* */ @@ -166,7 +159,7 @@ rtl8188e_PHY_RF6052SetCckTxPower( static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM, u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 Channel, u32 *OfdmBase, u32 *MCSBase) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u32 powerBase0, powerBase1; u8 i; @@ -190,7 +183,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, u8 index, u32 *powerBase0, u32 *powerBase1, u32 *pOutWriteVal) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; s8 pwr_diff = 0; u32 writeVal, customer_limit, rf; @@ -272,7 +265,6 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, } static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, @@ -299,13 +291,10 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue) else regoffset = regoffset_b[index]; - PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal); + rtl8188e_PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal); /* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */ - if (((pHalData->rf_type == RF_2T2R) && - (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) || - ((pHalData->rf_type != RF_2T2R) && - (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) { + if (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04) { writeVal = pwr_val[3]; if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04) regoffset = 0xc90; @@ -353,7 +342,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower( u8 *pPowerLevelBW40, u8 Channel) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value; u8 direction; u8 index = 0; @@ -383,7 +372,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower( static int phy_RF6052_Config_ParaFile(struct adapter *Adapter) { struct bb_reg_def *pPhyReg; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + struct hal_data_8188e *pHalData = &Adapter->haldata; u32 u4RegValue = 0; u8 eRFPath = 0; int rtStatus = _SUCCESS; @@ -393,21 +382,21 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter) pPhyReg = &pHalData->PHYRegDef[eRFPath]; /*----Store original RFENV control type----*/ - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + u4RegValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); /*----Set RF_ENV enable----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); udelay(1);/* PlatformStallExecution(1); */ /*----Set RF_ENV output high----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); udelay(1);/* PlatformStallExecution(1); */ /* Set bit number of Address and Data for RF register */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ udelay(1);/* PlatformStallExecution(1); */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ udelay(1);/* PlatformStallExecution(1); */ /*----Initialize RF fom connfiguration file----*/ @@ -415,7 +404,7 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter) rtStatus = _FAIL; /*----Restore RFENV control type----*/; - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); if (rtStatus != _SUCCESS) goto phy_RF6052_Config_ParaFile_Fail; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c b/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c index 053d9549873d..90d426199f52 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c @@ -126,7 +126,7 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat { struct adapter *padapter = precvframe->adapter; struct rx_pkt_attrib *pattrib = &precvframe->attrib; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + struct hal_data_8188e *pHalData = &padapter->haldata; struct phy_info *pPHYInfo = &pattrib->phy_info; u8 *wlanhdr; struct odm_per_pkt_info pkt_info; diff --git a/drivers/staging/r8188eu/hal/rtl8188e_sreset.c b/drivers/staging/r8188eu/hal/rtl8188e_sreset.c deleted file mode 100644 index 7b3ac6e306ce..000000000000 --- a/drivers/staging/r8188eu/hal/rtl8188e_sreset.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#define _RTL8188E_SRESET_C_ - -#include "../include/rtl8188e_sreset.h" -#include "../include/rtl8188e_hal.h" - -void rtl8188e_sreset_xmit_status_check(struct adapter *padapter) -{ - u32 txdma_status; - - txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); - if (txdma_status != 0x00) { - DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status); - rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status); - } - /* total xmit irp = 4 */ -} - -void rtl8188e_sreset_linked_status_check(struct adapter *padapter) -{ - u32 rx_dma_status = 0; - u8 fw_status = 0; - rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS); - if (rx_dma_status != 0x00) { - DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status); - rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status); - } - fw_status = rtw_read8(padapter, REG_FMETHR); - if (fw_status != 0x00) { - if (fw_status == 1) - DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status); - else if (fw_status == 2) - DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status); - } -} diff --git a/drivers/staging/r8188eu/hal/rtl8188eu_led.c b/drivers/staging/r8188eu/hal/rtl8188eu_led.c deleted file mode 100644 index 452d4bb87aba..000000000000 --- a/drivers/staging/r8188eu/hal/rtl8188eu_led.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#include "../include/osdep_service.h" -#include "../include/drv_types.h" -#include "../include/rtl8188e_hal.h" -#include "../include/rtl8188e_led.h" - -/* LED object. */ - -/* LED_819xUsb routines. */ -/* Description: */ -/* Turn on LED according to LedPin specified. */ -void SwLedOn(struct adapter *padapter, struct LED_871x *pLed) -{ - u8 LedCfg; - - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) - return; - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - switch (pLed->LedPin) { - case LED_PIN_LED0: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0xf0) | BIT(5) | BIT(6)); /* SW control led0 on. */ - break; - case LED_PIN_LED1: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0x0f) | BIT(5)); /* SW control led1 on. */ - break; - default: - break; - } - pLed->bLedOn = true; -} - -/* Description: */ -/* Turn off LED according to LedPin specified. */ -void SwLedOff(struct adapter *padapter, struct LED_871x *pLed) -{ - u8 LedCfg; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) - goto exit; - - LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */ - - switch (pLed->LedPin) { - case LED_PIN_LED0: - if (pHalData->bLedOpenDrain) { - /* Open-drain arrangement for controlling the LED) */ - LedCfg &= 0x90; /* Set to software control. */ - rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3))); - LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); - LedCfg &= 0xFE; - rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); - } else { - rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3) | BIT(5) | BIT(6))); - } - break; - case LED_PIN_LED1: - LedCfg &= 0x0f; /* Set to software control. */ - rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3))); - break; - default: - break; - } -exit: - pLed->bLedOn = false; -} - -/* Interface to manipulate LED objects. */ -/* Default LED behavior. */ - -/* Description: */ -/* Initialize all LED_871x objects. */ -void rtl8188eu_InitSwLeds(struct adapter *padapter) -{ - struct led_priv *pledpriv = &padapter->ledpriv; - - pledpriv->LedControlHandler = LedControl8188eu; - - InitLed871x(padapter, &pledpriv->SwLed0, LED_PIN_LED0); - - InitLed871x(padapter, &pledpriv->SwLed1, LED_PIN_LED1); -} - -/* Description: */ -/* DeInitialize all LED_819xUsb objects. */ -void rtl8188eu_DeInitSwLeds(struct adapter *padapter) -{ - struct led_priv *ledpriv = &padapter->ledpriv; - - DeInitLed871x(&ledpriv->SwLed0); - DeInitLed871x(&ledpriv->SwLed1); -} diff --git a/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c b/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c index b7feb4d8c8aa..293541db597d 100644 --- a/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c +++ b/drivers/staging/r8188eu/hal/rtl8188eu_xmit.c @@ -154,7 +154,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag u8 data_rate, pwr_status, offset; struct adapter *adapt = pxmitframe->padapter; struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct tx_desc *ptxdesc = (struct tx_desc *)pmem; struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; @@ -382,7 +382,7 @@ static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct xmit_frame *pxmitframe = NULL; struct xmit_frame *pfirstframe = NULL; diff --git a/drivers/staging/r8188eu/hal/usb_halinit.c b/drivers/staging/r8188eu/hal/usb_halinit.c index ef1ae95d7db0..96db9a8e7667 100644 --- a/drivers/staging/r8188eu/hal/usb_halinit.c +++ b/drivers/staging/r8188eu/hal/usb_halinit.c @@ -8,10 +8,10 @@ #include "../include/rtw_efuse.h" #include "../include/rtl8188e_hal.h" -#include "../include/rtl8188e_led.h" #include "../include/rtw_iol.h" #include "../include/usb_ops.h" #include "../include/usb_osintf.h" +#include "../include/Hal8188EPwrSeq.h" #define HAL_MAC_ENABLE 1 #define HAL_BB_ENABLE 1 @@ -19,7 +19,7 @@ static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; switch (NumOutPipe) { case 3: @@ -40,29 +40,16 @@ static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe) DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber); } -static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe) +static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumOutPipe) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - bool result = false; _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe); - - /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */ - if (1 == haldata->OutEpNumber) { - if (1 != NumInPipe) - return result; - } - - /* All config other than above support one Bulk IN and one Interrupt IN. */ - - result = Hal_MappingOutPipe(adapt, NumOutPipe); - - return result; + return Hal_MappingOutPipe(adapt, NumOutPipe); } void rtl8188eu_interface_configure(struct adapter *adapt) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt); if (pdvobjpriv->ishighspeed) @@ -70,8 +57,6 @@ void rtl8188eu_interface_configure(struct adapter *adapt) else haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */ - haldata->interfaceIndex = pdvobjpriv->InterfaceNumber; - haldata->UsbTxAggMode = 1; haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */ @@ -81,19 +66,18 @@ void rtl8188eu_interface_configure(struct adapter *adapt) haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */ haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */ - HalUsbSetQueuePipeMapping8188EUsb(adapt, - pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); + HalUsbSetQueuePipeMapping8188EUsb(adapt, pdvobjpriv->RtNumOutPipes); } u32 rtl8188eu_InitPowerOn(struct adapter *adapt) { u16 value16; /* HW Power on sequence */ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; if (haldata->bMacPwrCtrlOn) return _SUCCESS; - if (!HalPwrSeqCmdParsing(adapt, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) { + if (!HalPwrSeqCmdParsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW)) { DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__); return _FAIL; } @@ -144,7 +128,7 @@ static void _InitInterrupt(struct adapter *Adapter) static void _InitQueueReservedPage(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; struct registry_priv *pregistrypriv = &Adapter->registrypriv; u32 numHQ = 0; u32 numLQ = 0; @@ -212,7 +196,7 @@ static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ, static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; u16 value = 0; switch (haldata->OutEpQueueSel) { @@ -234,7 +218,7 @@ static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter) static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; struct registry_priv *pregistrypriv = &Adapter->registrypriv; u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; u16 valueHi = 0; @@ -300,7 +284,7 @@ static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter) static void _InitQueuePriority(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; switch (haldata->OutEpNumber) { case 1: @@ -344,7 +328,7 @@ static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize) static void _InitWMACSetting(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | @@ -400,13 +384,6 @@ static void _InitEDCA(struct adapter *Adapter) rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); } -static void _InitRDGSetting(struct adapter *Adapter) -{ - rtw_write8(Adapter, REG_RD_CTRL, 0xFF); - rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); - rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); -} - static void _InitRetryFunction(struct adapter *Adapter) { u8 value8; @@ -436,7 +413,7 @@ static void _InitRetryFunction(struct adapter *Adapter) *---------------------------------------------------------------------------*/ static void usb_AggSettingTxUpdate(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; u32 value32; if (Adapter->registrypriv.wifi_spec) @@ -471,7 +448,7 @@ usb_AggSettingRxUpdate( struct adapter *Adapter ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; u8 valueDMA; u8 valueUSB; @@ -525,16 +502,11 @@ usb_AggSettingRxUpdate( static void InitUsbAggregationSetting(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - /* Tx aggregation setting */ usb_AggSettingTxUpdate(Adapter); /* Rx aggregation setting */ usb_AggSettingRxUpdate(Adapter); - - /* 201/12/10 MH Add for USB agg mode dynamic switch. */ - haldata->UsbRxHighSpeedMode = false; } static void _InitOperationMode(struct adapter *Adapter) @@ -543,7 +515,7 @@ static void _InitOperationMode(struct adapter *Adapter) static void _InitBeaconParameters(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); @@ -572,8 +544,8 @@ static void _BeaconFunctionEnable(struct adapter *Adapter, /* Set CCK and OFDM Block "ON" */ static void _BBTurnOnBlock(struct adapter *Adapter) { - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); } enum { @@ -583,16 +555,16 @@ enum { static void _InitAntenna_Selection(struct adapter *Adapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; if (haldata->AntDivCfg == 0) return; DBG_88E("==> %s ....\n", __func__); rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0) | BIT(23)); - PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01); + rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01); - if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) + if (rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) haldata->CurAntenna = Antenna_A; else haldata->CurAntenna = Antenna_B; @@ -605,18 +577,12 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) u16 value16; u8 txpktbuf_bndy; u32 status = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; struct registry_priv *pregistrypriv = &Adapter->registrypriv; u32 init_start_time = jiffies; - #define HAL_INIT_PROFILE_TAG(stage) do {} while (0) - - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN); - if (Adapter->pwrctrlpriv.bkeepfwalive) { - _ps_open_RF(Adapter); - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { PHY_IQCalibrate_8188E(Adapter, true); } else { @@ -630,7 +596,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) goto exit; } - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); status = rtl8188eu_InitPowerOn(Adapter); if (status == _FAIL) goto exit; @@ -653,7 +618,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E; } - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); _InitQueueReservedPage(Adapter); _InitQueuePriority(Adapter); _InitPageBoundary(Adapter); @@ -661,7 +625,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) _InitTxBufferBoundary(Adapter, 0); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); status = rtl8188e_FirmwareDownload(Adapter); if (status != _SUCCESS) { @@ -675,7 +638,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) } rtl8188e_InitializeFirmwareVars(Adapter); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); #if (HAL_MAC_ENABLE == 1) status = PHY_MACConfig8188E(Adapter); if (status == _FAIL) { @@ -687,7 +649,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) /* */ /* d. Initialize BB related configurations. */ /* */ - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); #if (HAL_BB_ENABLE == 1) status = PHY_BBConfig8188E(Adapter); if (status == _FAIL) { @@ -696,7 +657,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) } #endif - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); #if (HAL_RF_ENABLE == 1) status = PHY_RFConfig8188E(Adapter); if (status == _FAIL) { @@ -705,7 +665,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) } #endif - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); status = rtl8188e_iol_efuse_patch(Adapter); if (status == _FAIL) { DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__); @@ -714,12 +673,10 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) _InitTxBufferBoundary(Adapter, txpktbuf_bndy); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); status = InitLLTTable(Adapter, txpktbuf_bndy); if (status == _FAIL) goto exit; - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); /* Get Rx PHY status in order to report RSSI and others. */ _InitDriverInfoSize(Adapter, DRVINFO_SZ); @@ -743,9 +700,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) value16 |= (MACTXEN | MACRXEN); rtw_write8(Adapter, REG_CR, value16); - if (haldata->bRDGEnable) - _InitRDGSetting(Adapter); - /* Enable TX Report */ /* Enable Tx Report Timer */ value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); @@ -761,16 +715,13 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ /* Keep RfRegChnlVal for later use. */ - haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); - haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); + haldata->RfRegChnlVal[0] = rtl8188e_PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); + haldata->RfRegChnlVal[1] = rtl8188e_PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); _BBTurnOnBlock(Adapter); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); invalidate_cam_all(Adapter); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel); @@ -795,7 +746,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) /* Nav limit , suggest by scott */ rtw_write8(Adapter, 0x652, 0x0); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8188e_InitHalDm(Adapter); /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ @@ -819,7 +769,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) /* enable tx DMA to drop the redundate data of packet */ rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); /* 2010/08/26 MH Merge from 8192CE. */ if (pwrctrlpriv->rf_pwrstate == rf_on) { if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { @@ -829,15 +778,11 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; } - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); - ODM_TXPowerTrackingCheck(&haldata->odmpriv); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); PHY_LCCalibrate_8188E(Adapter); } -/* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */ /* _InitPABias(Adapter); */ rtw_write8(Adapter, REG_USB_HRPWM, 0); @@ -845,29 +790,15 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12)); exit: - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); - DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time)); return status; } -void _ps_open_RF(struct adapter *adapt) -{ - /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */ - /* phy_SsPwrSwitch92CU(adapt, rf_on, 1); */ -} - -static void _ps_close_RF(struct adapter *adapt) -{ - /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */ - /* phy_SsPwrSwitch92CU(adapt, rf_off, 1); */ -} - static void CardDisableRTL8188EU(struct adapter *Adapter) { u8 val8; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); @@ -877,7 +808,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) rtw_write8(Adapter, REG_CR, 0x0); /* Run LPS WL RFOFF flow */ - HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); + HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_LPS_ENTER_FLOW); /* 2. 0x1F[7:0] = 0 turn off RF */ @@ -898,7 +829,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) rtw_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0))); /* Card disable power action flow */ - HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW); + HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_DISABLE_FLOW); /* Reset MCU IO Wrapper */ val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1); @@ -929,9 +860,7 @@ u32 rtl8188eu_hal_deinit(struct adapter *Adapter) rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E); DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive); - if (Adapter->pwrctrlpriv.bkeepfwalive) { - _ps_close_RF(Adapter); - } else { + if (!Adapter->pwrctrlpriv.bkeepfwalive) { if (Adapter->hw_init_completed) { CardDisableRTL8188EU(Adapter); } @@ -948,12 +877,10 @@ unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) status = _SUCCESS; - precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; - /* issue Rx irp to receive data */ precvbuf = (struct recv_buf *)precvpriv->precv_buf; for (i = 0; i < NR_RECVBUFF; i++) { - if (!rtw_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf)) { + if (!rtw_read_port(Adapter, (unsigned char *)precvbuf)) { status = _FAIL; goto exit; } @@ -971,39 +898,6 @@ exit: /* EEPROM/EFUSE Content Parsing */ /* */ /* */ -static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) -{ - struct led_priv *pledpriv = &Adapter->ledpriv; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - - pledpriv->bRegUseLed = true; - haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */ -} - -static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (!AutoLoadFail) { - /* VID, PID */ - haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]); - haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]); - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E]; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - } else { - haldata->EEPROMVID = EEPROM_Default_VID; - haldata->EEPROMPID = EEPROM_Default_PID; - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = EEPROM_Default_CustomerID; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - } - - DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID); - DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID); -} static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) { @@ -1020,76 +914,43 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool } } -static void -readAdapterInfo_8188EU( - struct adapter *adapt - ) -{ - struct eeprom_priv *eeprom = &adapt->eeprompriv; - - /* parse the eeprom/efuse content */ - Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data); - Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - - Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - - _ReadLEDSetting(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); -} - -static void _ReadPROMContent( - struct adapter *Adapter - ) +void ReadAdapterInfo8188EU(struct adapter *Adapter) { struct eeprom_priv *eeprom = &Adapter->eeprompriv; + struct led_priv *ledpriv = &Adapter->ledpriv; u8 eeValue; + /* Read EEPROM size before call any EEPROM function */ + Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); + /* check system boot selection */ eeValue = rtw_read8(Adapter, REG_9346CR); - eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false; - eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true; + eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM); + eeprom->bautoload_fail_flag = !(eeValue & EEPROM_EN); DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"), (eeprom->bautoload_fail_flag ? "Fail" : "OK")); - Hal_InitPGData88E(Adapter); - readAdapterInfo_8188EU(Adapter); -} - -static void _ReadRFType(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + if (!is_boot_from_eeprom(Adapter)) + EFUSE_ShadowMapUpdate(Adapter); - haldata->rf_chip = RF_6052; -} + /* parse the eeprom/efuse content */ + Hal_EfuseParseIDCode88E(Adapter, eeprom->efuse_eeprom_data); + Hal_EfuseParseMACAddr_8188EU(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); -static int _ReadAdapterInfo8188EU(struct adapter *Adapter) -{ - _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */ - _ReadPROMContent(Adapter); + Hal_ReadPowerSavingMode88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_ReadTxPowerInfo88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + rtl8188e_EfuseParseChnlPlan(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_EfuseParseXtal_8188E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_ReadAntennaDiversity88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_ReadThermalMeter_88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - return _SUCCESS; -} - -void ReadAdapterInfo8188EU(struct adapter *Adapter) -{ - /* Read EEPROM size before call any EEPROM function */ - Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); - - _ReadAdapterInfo8188EU(Adapter); + ledpriv->bRegUseLed = true; } static void ResumeTxBeacon(struct adapter *adapt) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ /* which should be read from register to a global variable. */ @@ -1103,7 +964,7 @@ static void ResumeTxBeacon(struct adapter *adapt) static void StopTxBeacon(struct adapter *adapt) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ /* which should be read from register to a global variable. */ @@ -1210,7 +1071,7 @@ static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val) void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; struct dm_priv *pdmpriv = &haldata->dmpriv; struct odm_dm_struct *podmpriv = &haldata->odmpriv; @@ -1727,7 +1588,7 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; struct odm_dm_struct *podmpriv = &haldata->odmpriv; switch (variable) { @@ -1744,9 +1605,6 @@ void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) case HW_VAR_DM_FLAG: val[0] = podmpriv->SupportAbility; break; - case HW_VAR_RF_TYPE: - val[0] = haldata->rf_type; - break; case HW_VAR_FWLPS_RF_ON: { /* When we halt NIC, we should check if FW LPS is leave. */ @@ -1786,7 +1644,7 @@ void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) /* Query setting of specified variable. */ u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; u8 bResult = _SUCCESS; switch (eVariable) { @@ -1871,7 +1729,7 @@ u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable /* Change default setting of specified variable. */ u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + struct hal_data_8188e *haldata = &Adapter->haldata; u8 bResult = _SUCCESS; switch (eVariable) { @@ -1925,7 +1783,7 @@ void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level) u8 shortGIrate = false; int supportRateNum = 0; struct sta_info *psta; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; @@ -2036,11 +1894,10 @@ void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) void rtl8188eu_init_default_value(struct adapter *adapt) { - struct hal_data_8188e *haldata; + struct hal_data_8188e *haldata = &adapt->haldata; struct pwrctrl_priv *pwrctrlpriv; u8 i; - haldata = GET_HAL_DATA(adapt); pwrctrlpriv = &adapt->pwrctrlpriv; /* init default value */ @@ -2057,11 +1914,3 @@ void rtl8188eu_init_default_value(struct adapter *adapt) for (i = 0; i < HP_THERMAL_NUM; i++) haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; } - -void rtl8188eu_alloc_haldata(struct adapter *adapt) -{ - adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL); - if (!adapt->HalData) - DBG_88E("cant not alloc memory for HAL DATA\n"); - adapt->hal_data_sz = sizeof(struct hal_data_8188e); -} diff --git a/drivers/staging/r8188eu/hal/usb_ops_linux.c b/drivers/staging/r8188eu/hal/usb_ops_linux.c index e4a9350376bf..4a0ab4053e90 100644 --- a/drivers/staging/r8188eu/hal/usb_ops_linux.c +++ b/drivers/staging/r8188eu/hal/usb_ops_linux.c @@ -183,24 +183,6 @@ int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *data) return RTW_STATUS_CODE(ret); } -static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) { - DBG_88E("%s Invalid interrupt content length (%d)!\n", __func__, pkt_len); - return; - } - - /* HISR */ - memcpy(&haldata->IntArray[0], &pbuf[USB_INTR_CONTENT_HISR_OFFSET], 4); - memcpy(&haldata->IntArray[1], &pbuf[USB_INTR_CONTENT_HISRE_OFFSET], 4); - - /* C2H Event */ - if (pbuf[0] != 0) - memcpy(&haldata->C2hArray[0], &pbuf[USB_INTR_CONTENT_C2H_OFFSET], 16); -} - static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) { u8 *pbuf; @@ -213,7 +195,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) struct sk_buff *pkt_copy = NULL; struct recv_frame *precvframe = NULL; struct rx_pkt_attrib *pattrib = NULL; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + struct hal_data_8188e *haldata = &adapt->haldata; struct recv_priv *precvpriv = &adapt->recvpriv; struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue; @@ -342,8 +324,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) pattrib->MacIDValidEntry[0], pattrib->MacIDValidEntry[1] ); - } else if (pattrib->pkt_rpt_type == HIS_REPORT) { - interrupt_handler_8188eu(adapt, pattrib->pkt_len, precvframe->rx_data); } rtw_free_recvframe(precvframe, pfree_recv_queue); } @@ -401,7 +381,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) if (purb->status == 0) { /* SUCCESS */ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { precvbuf->reuse = true; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + rtw_read_port(adapt, (unsigned char *)precvbuf); DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__); } else { rtw_reset_continual_urb_error(adapter_to_dvobj(adapt)); @@ -415,7 +395,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) precvbuf->pskb = NULL; precvbuf->reuse = false; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + rtw_read_port(adapt, (unsigned char *)precvbuf); } } else { DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status); @@ -436,7 +416,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) case -EPROTO: case -EOVERFLOW: precvbuf->reuse = true; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + rtw_read_port(adapt, (unsigned char *)precvbuf); break; case -EINPROGRESS: DBG_88E("ERROR: URB IS IN PROGRESS!/n"); @@ -447,7 +427,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) } } -u32 rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *rmem) +u32 rtw_read_port(struct adapter *adapter, u8 *rmem) { struct urb *purb = NULL; struct recv_buf *precvbuf = (struct recv_buf *)rmem; @@ -507,7 +487,7 @@ u32 rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *rmem) purb = precvbuf->purb; /* translate DMA FIFO addr to pipehandle */ - pipe = ffaddr2pipehdl(pdvobj, addr); + pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe); usb_fill_bulk_urb(purb, pusbd, pipe, precvbuf->pbuf, diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h index 6f901ce607e8..2517a08bc95a 100644 --- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h +++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h @@ -4,37 +4,11 @@ #ifndef __INC_HAL8188EPHYCFG_H__ #define __INC_HAL8188EPHYCFG_H__ -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 -#define IQK_BB_REG_NUM 9 -#define HP_THERMAL_NUM 8 - #define MAX_AGGR_NUM 0x07 -/*--------------------------Define Parameters-------------------------------*/ - -/*------------------------------Define structure----------------------------*/ - -enum hw90_block { - HW90_BLOCK_MAC = 0, - HW90_BLOCK_PHY0 = 1, - HW90_BLOCK_PHY1 = 2, - HW90_BLOCK_RF = 3, - HW90_BLOCK_MAXIMUM = 4, /* Never use this */ -}; - enum rf_radio_path { RF_PATH_A = 0, /* Radio Path A */ RF_PATH_B = 1, /* Radio Path B */ - RF_PATH_C = 2, /* Radio Path C */ - RF_PATH_D = 3, /* Radio Path D */ }; #define MAX_PG_GROUP 13 @@ -46,17 +20,6 @@ enum rf_radio_path { #define MAX_CHNL_GROUP_24G 6 /* ch1~2, ch3~5, ch6~8, *ch9~11, ch12~13, CH 14 * total three groups */ -#define CHANNEL_GROUP_MAX_88E 6 - -/* BB/RF related */ -enum RF_TYPE_8190P { - RF_TYPE_MIN, /* 0 */ - RF_8225 = 1, /* 1 11b/g RF for verification only */ - RF_8256 = 2, /* 2 11b/g/n */ - RF_6052 = 4, /* 4 11b/g/n RF */ - /* TODO: We should remove this psudo PHY RF after we get new RF. */ - RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */ -}; struct bb_reg_def { u32 rfintfs; /* set software control: */ @@ -106,18 +69,7 @@ struct bb_reg_def { * Path A and B */ }; -/*------------------------------Define structure----------------------------*/ - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - -/*------------------------Export Marco Definition---------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -/* */ /* BB and RF register read/write */ -/* */ u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask); void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 mask, u32 data); @@ -144,15 +96,5 @@ void PHY_SwChnl8188E(struct adapter *adapter, u8 channel); void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr, u32 mask, u32 data); -/*--------------------------Exported Function prototype---------------------*/ - -#define PHY_QueryBBReg(adapt, regaddr, mask) \ - rtl8188e_PHY_QueryBBReg((adapt), (regaddr), (mask)) -#define PHY_SetBBReg(adapt, regaddr, bitmask, data) \ - rtl8188e_PHY_SetBBReg((adapt), (regaddr), (bitmask), (data)) -#define PHY_QueryRFReg(adapt, rfpath, regaddr, bitmask) \ - rtl8188e_PHY_QueryRFReg((adapt), (rfpath), (regaddr), (bitmask)) -#define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data) \ - rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data)) -#endif /* __INC_HAL8192CPHYCFG_H */ +#endif diff --git a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h b/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h index a73bd1a5d57b..e4c5b5d23cb4 100644 --- a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h +++ b/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h @@ -6,150 +6,8 @@ #include "HalPwrSeqCmd.h" -/* - Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END - - PWR SEQ Version: rtl8188E_PwrSeq_V09.h -*/ -#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 -#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 -#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 -#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8188E_TRANS_END_STEPS 1 - -#define RTL8188E_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0)|BIT(1), 0}, /* 0x02[1:0] = 0 reset BB*/ \ - {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)}, /*0x24[23] = 2b'01 schmit trigger */ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4)|BIT(3), 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*0x04[8] = 1 polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0}, /*wait till 0x04[8] = 0*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*LDO normal mode*/ \ - {0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*SDIO Driving*/ \ - -#define RTL8188E_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*LDO Sleep mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - -#define RTL8188E_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)|BIT(4)}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, BIT(7)}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ - {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ - {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ - -#define RTL8188E_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)}, /*0x24[23] = 2b'01 schmit trigger */ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ - {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ - {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ - -#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8188E_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)},/* 0x04[15] = 1*/ - -#define RTL8188E_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* 0x04[15] = 0*/ - -/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ -#define RTL8188E_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled,and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*check if removed later*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)},/*Respond TxOK to scheduler*/ \ - -#define RTL8188E_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6)|BIT(7), 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1)|BIT(0), BIT(1)|BIT(0)}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8188E_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0, PWR_CMD_END, 0, 0}, /* */ - -extern struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; -extern struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; +extern struct wl_pwr_cfg rtl8188E_power_on_flow[]; +extern struct wl_pwr_cfg rtl8188E_card_disable_flow[]; +extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[]; #endif /* __HAL8188EPWRSEQ_H__ */ diff --git a/drivers/staging/r8188eu/include/HalPhyRf_8188e.h b/drivers/staging/r8188eu/include/HalPhyRf_8188e.h index d4a27662309f..b75a5d869c56 100644 --- a/drivers/staging/r8188eu/include/HalPhyRf_8188e.h +++ b/drivers/staging/r8188eu/include/HalPhyRf_8188e.h @@ -30,12 +30,7 @@ void PHY_DigitalPredistortion_8188E(struct adapter *pAdapter); void _PHY_SaveADDARegisters(struct adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum); -void _PHY_PathADDAOn(struct adapter *pAdapter, u32 *ADDAReg, - bool isPathAOn, bool is2T); - void _PHY_MACSettingCalibration(struct adapter *pAdapter, u32 *MACReg, u32 *MACBackup); -void _PHY_PathAStandBy(struct adapter *pAdapter); - #endif /* #ifndef __HAL_PHY_RF_8188E_H__ */ diff --git a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h index fe7ac910beb8..49c02cce569e 100644 --- a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h +++ b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h @@ -9,11 +9,6 @@ /*---------------------------------------------*/ /* 3 The value of cmd: 4 bits */ /*---------------------------------------------*/ -#define PWR_CMD_READ 0x00 - /* offset: the read register offset */ - /* msk: the mask of the read value */ - /* value: N/A, left by 0 */ - /* note: dirver shall implement this function by read & msk */ #define PWR_CMD_WRITE 0x01 /* offset: the read register offset */ @@ -41,43 +36,6 @@ /* msk: N/A */ /* value: N/A */ -/*---------------------------------------------*/ -/* 3 The value of base: 4 bits */ -/*---------------------------------------------*/ - /* define the base address of each block */ -#define PWR_BASEADDR_MAC 0x00 -#define PWR_BASEADDR_USB 0x01 -#define PWR_BASEADDR_PCIE 0x02 -#define PWR_BASEADDR_SDIO 0x03 - -/*---------------------------------------------*/ -/* 3 The value of interface_msk: 4 bits */ -/*---------------------------------------------*/ -#define PWR_INTF_SDIO_MSK BIT(0) -#define PWR_INTF_USB_MSK BIT(1) -#define PWR_INTF_PCI_MSK BIT(2) -#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) - -/*---------------------------------------------*/ -/* 3 The value of fab_msk: 4 bits */ -/*---------------------------------------------*/ -#define PWR_FAB_TSMC_MSK BIT(0) -#define PWR_FAB_UMC_MSK BIT(1) -#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) - -/*---------------------------------------------*/ -/* 3 The value of cut_msk: 8 bits */ -/*---------------------------------------------*/ -#define PWR_CUT_TESTCHIP_MSK BIT(0) -#define PWR_CUT_A_MSK BIT(1) -#define PWR_CUT_B_MSK BIT(2) -#define PWR_CUT_C_MSK BIT(3) -#define PWR_CUT_D_MSK BIT(4) -#define PWR_CUT_E_MSK BIT(5) -#define PWR_CUT_F_MSK BIT(6) -#define PWR_CUT_G_MSK BIT(7) -#define PWR_CUT_ALL_MSK 0xFF - enum pwrseq_cmd_delat_unit { PWRSEQ_DELAY_US, PWRSEQ_DELAY_MS, @@ -85,26 +43,17 @@ enum pwrseq_cmd_delat_unit { struct wl_pwr_cfg { u16 offset; - u8 cut_msk; - u8 fab_msk:4; - u8 interface_msk:4; - u8 base:4; u8 cmd:4; u8 msk; u8 value; }; #define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset -#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk -#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk -#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk -#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base #define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk #define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value /* Prototype of protected function. */ -u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 CutVersion, u8 FabVersion, - u8 InterfaceType, struct wl_pwr_cfg PwrCfgCmd[]); +u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg PwrCfgCmd[]); #endif diff --git a/drivers/staging/r8188eu/include/HalVerDef.h b/drivers/staging/r8188eu/include/HalVerDef.h index 796a44a1e697..62b94c993f0d 100644 --- a/drivers/staging/r8188eu/include/HalVerDef.h +++ b/drivers/staging/r8188eu/include/HalVerDef.h @@ -24,22 +24,10 @@ enum HAL_VENDOR { CHIP_VENDOR_UMC = 1, }; -enum HAL_RF_TYPE { - RF_TYPE_1T1R = 0, - RF_TYPE_1T2R = 1, - RF_TYPE_2T2R = 2, - RF_TYPE_2T3R = 3, - RF_TYPE_2T4R = 4, - RF_TYPE_3T3R = 5, - RF_TYPE_3T4R = 6, - RF_TYPE_4T4R = 7, -}; - struct HAL_VERSION { enum HAL_CHIP_TYPE ChipType; enum HAL_CUT_VERSION CUTVersion; enum HAL_VENDOR VendorType; - enum HAL_RF_TYPE RFType; u8 ROMVer; }; @@ -47,7 +35,6 @@ struct HAL_VERSION { #define GET_CVID_CHIP_TYPE(version) (((version).ChipType)) #define GET_CVID_MANUFACTUER(version) (((version).VendorType)) #define GET_CVID_CUT_VERSION(version) (((version).CUTVersion)) -#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK) /* Common Macro. -- */ /* HAL_VERSION VersionID */ diff --git a/drivers/staging/r8188eu/include/drv_types.h b/drivers/staging/r8188eu/include/drv_types.h index 3e4928320f17..2dd5ebaaa921 100644 --- a/drivers/staging/r8188eu/include/drv_types.h +++ b/drivers/staging/r8188eu/include/drv_types.h @@ -34,6 +34,7 @@ #include "rtw_p2p.h" #include "rtw_ap.h" #include "rtw_br_ext.h" +#include "rtl8188e_hal.h" #define DRIVERVERSION "v4.1.4_6773.20130222" @@ -85,7 +86,6 @@ struct registry_priv { u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */ u8 lowrate_two_xmit; - u8 rf_config; u8 low_power; u8 wifi_spec;/* !turbo_mode */ @@ -114,12 +114,6 @@ struct registry_priv { u8 notch_filter; }; -/* For registry parameters */ -#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field)) -#define RGTRY_SZ(field) sizeof(((struct registry_priv *)0)->field) -#define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field)) -#define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *)0)->field) - #define MAX_CONTINUAL_URB_ERR 4 struct rt_firmware { @@ -129,14 +123,13 @@ struct rt_firmware { struct dvobj_priv { struct adapter *if1; - struct adapter *if2; /* For 92D, DMDP have 2 interface. */ u8 InterfaceNumber; u8 NumInterfaces; /* In /Out Pipe information */ - int RtInPipe[2]; + int RtInPipe; int RtOutPipe[3]; u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */ @@ -146,11 +139,8 @@ struct dvobj_priv { /*-------- below is for USB INTERFACE --------*/ - u8 nr_endpoint; u8 ishighspeed; - u8 RtNumInPipes; u8 RtNumOutPipes; - int ep_num[5]; /* endpoint number */ int RegUsbSS; struct semaphore usb_suspend_sema; struct mutex usb_vendor_req_mutex; @@ -210,8 +200,7 @@ struct adapter { struct hostapd_priv *phostapdpriv; struct wifidirect_info wdinfo; - void *HalData; - u32 hal_data_sz; + struct hal_data_8188e haldata; s32 bDriverStopped; s32 bSurpriseRemoved; @@ -275,8 +264,6 @@ struct adapter { unsigned char br_ip[4]; struct br_ext_info ethBrExtInfo; - u8 fix_rate; - unsigned char in_cta_test; }; diff --git a/drivers/staging/r8188eu/include/hal_intf.h b/drivers/staging/r8188eu/include/hal_intf.h index d777ad9071e2..b4a7e0ce3116 100644 --- a/drivers/staging/r8188eu/include/hal_intf.h +++ b/drivers/staging/r8188eu/include/hal_intf.h @@ -29,7 +29,6 @@ enum hw_variables { HW_VAR_ACK_PREAMBLE, HW_VAR_SEC_CFG, HW_VAR_BCN_VALID, - HW_VAR_RF_TYPE, HW_VAR_DM_FLAG, HW_VAR_DM_FUNC_OP, HW_VAR_DM_FUNC_SET, @@ -95,40 +94,17 @@ enum hal_def_variable { HAL_DEF_DBG_DUMP_TXPKT, }; -enum hal_odm_variable { - HAL_ODM_STA_INFO, - HAL_ODM_P2P_STATE, - HAL_ODM_WIFI_DISPLAY_STATE, -}; - typedef s32 (*c2h_id_filter)(u8 id); -#define RF_CHANGE_BY_INIT 0 -#define RF_CHANGE_BY_IPS BIT(28) -#define RF_CHANGE_BY_PS BIT(29) -#define RF_CHANGE_BY_HW BIT(30) -#define RF_CHANGE_BY_SW BIT(31) - #define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse) -void rtl8188eu_alloc_haldata(struct adapter *adapt); - void rtl8188eu_interface_configure(struct adapter *adapt); void ReadAdapterInfo8188EU(struct adapter *Adapter); void rtl8188eu_init_default_value(struct adapter *adapt); -void rtl8188e_SetHalODMVar(struct adapter *Adapter, - enum hal_odm_variable eVariable, void *pValue1, bool bSet); +void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet); u32 rtl8188eu_InitPowerOn(struct adapter *adapt); -void rtl8188e_free_hal_data(struct adapter *padapter); -void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState); -void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, - u16 _offset, u16 _size_byte, u8 *pbuf, - bool bPseudoTest); -void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, - u8 type, void *pOut, bool bPseudoTest); -u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest); -int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest); -int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest); +void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState); +void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf); void hal_notch_filter_8188e(struct adapter *adapter, bool enable); diff --git a/drivers/staging/r8188eu/include/ieee80211.h b/drivers/staging/r8188eu/include/ieee80211.h index 6c8206bd5466..3a23d5299314 100644 --- a/drivers/staging/r8188eu/include/ieee80211.h +++ b/drivers/staging/r8188eu/include/ieee80211.h @@ -1149,7 +1149,6 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork); void rtw_macaddr_cfg(u8 *mac_addr); -u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, - unsigned char *MCS_rate); +u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate); #endif /* IEEE80211_H */ diff --git a/drivers/staging/r8188eu/include/ieee80211_ext.h b/drivers/staging/r8188eu/include/ieee80211_ext.h deleted file mode 100644 index e7ade835d478..000000000000 --- a/drivers/staging/r8188eu/include/ieee80211_ext.h +++ /dev/null @@ -1,271 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef __IEEE80211_EXT_H -#define __IEEE80211_EXT_H - -#include "osdep_service.h" -#include "drv_types.h" - -#define WMM_OUI_TYPE 2 -#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 -#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 -#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 -#define WMM_VERSION 1 - -#define WPA_PROTO_WPA BIT(0) -#define WPA_PROTO_RSN BIT(1) - -#define WPA_KEY_MGMT_IEEE8021X BIT(0) -#define WPA_KEY_MGMT_PSK BIT(1) -#define WPA_KEY_MGMT_NONE BIT(2) -#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) -#define WPA_KEY_MGMT_WPA_NONE BIT(4) - -#define WPA_CAPABILITY_PREAUTH BIT(0) -#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) -#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) - -#define PMKID_LEN 16 - -struct wpa_ie_hdr { - u8 elem_id; - u8 len; - u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ - u8 version[2]; /* little endian */ -} __packed; - -struct rsn_ie_hdr { - u8 elem_id; /* WLAN_EID_RSN */ - u8 len; - u8 version[2]; /* little endian */ -} __packed; - -struct wme_ac_parameter { -#if defined(__LITTLE_ENDIAN) - /* byte 1 */ - u8 aifsn:4, - acm:1, - aci:2, - reserved:1; - - /* byte 2 */ - u8 eCWmin:4, - eCWmax:4; -#elif defined(__BIG_ENDIAN) - /* byte 1 */ - u8 reserved:1, - aci:2, - acm:1, - aifsn:4; - - /* byte 2 */ - u8 eCWmax:4, - eCWmin:4; -#else -#error "Please fix <endian.h>" -#endif - - /* bytes 3 & 4 */ - u16 txopLimit; -} __packed; - -struct wme_parameter_element { - /* required fields for WME version 1 */ - u8 oui[3]; - u8 oui_type; - u8 oui_subtype; - u8 version; - u8 acInfo; - u8 reserved; - struct wme_ac_parameter ac[4]; - -} __packed; - -#define WPA_PUT_LE16(a, val) \ - do { \ - (a)[1] = ((u16) (val)) >> 8; \ - (a)[0] = ((u16) (val)) & 0xff; \ - } while (0) - -#define WPA_PUT_BE32(a, val) \ - do { \ - (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ - (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ - (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ - (a)[3] = (u8) (((u32) (val)) & 0xff); \ - } while (0) - -#define WPA_PUT_LE32(a, val) \ - do { \ - (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ - (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ - (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ - (a)[0] = (u8) (((u32) (val)) & 0xff); \ - } while (0) - -#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *)(a), (val)) - -/* Action category code */ -enum ieee80211_category { - WLAN_CATEGORY_SPECTRUM_MGMT = 0, - WLAN_CATEGORY_QOS = 1, - WLAN_CATEGORY_DLS = 2, - WLAN_CATEGORY_BACK = 3, - WLAN_CATEGORY_HT = 7, - WLAN_CATEGORY_WMM = 17, -}; - -/* SPECTRUM_MGMT action code */ -enum ieee80211_spectrum_mgmt_actioncode { - WLAN_ACTION_SPCT_MSR_REQ = 0, - WLAN_ACTION_SPCT_MSR_RPRT = 1, - WLAN_ACTION_SPCT_TPC_REQ = 2, - WLAN_ACTION_SPCT_TPC_RPRT = 3, - WLAN_ACTION_SPCT_CHL_SWITCH = 4, - WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, -}; - -/* BACK action code */ -enum ieee80211_back_actioncode { - WLAN_ACTION_ADDBA_REQ = 0, - WLAN_ACTION_ADDBA_RESP = 1, - WLAN_ACTION_DELBA = 2, -}; - -/* HT features action code */ -enum ieee80211_ht_actioncode { - WLAN_ACTION_NOTIFY_CH_WIDTH = 0, - WLAN_ACTION_SM_PS = 1, - WLAN_ACTION_PSPM = 2, - WLAN_ACTION_PCO_PHASE = 3, - WLAN_ACTION_MIMO_CSI_MX = 4, - WLAN_ACTION_MIMO_NONCP_BF = 5, - WLAN_ACTION_MIMP_CP_BF = 6, - WLAN_ACTION_ASEL_INDICATES_FB = 7, - WLAN_ACTION_HI_INFO_EXCHG = 8, -}; - -/* BACK (block-ack) parties */ -enum ieee80211_back_parties { - WLAN_BACK_RECIPIENT = 0, - WLAN_BACK_INITIATOR = 1, - WLAN_BACK_TIMER = 2, -}; - -struct ieee80211_mgmt { - u16 frame_control; - u16 duration; - u8 da[6]; - u8 sa[6]; - u8 bssid[6]; - u16 seq_ctrl; - union { - struct { - u16 auth_alg; - u16 auth_transaction; - u16 status_code; - /* possibly followed by Challenge text */ - u8 variable[0]; - } __packed auth; - struct { - u16 reason_code; - } __packed deauth; - struct { - u16 capab_info; - u16 listen_interval; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } __packed assoc_req; - struct { - u16 capab_info; - u16 status_code; - u16 aid; - /* followed by Supported rates */ - u8 variable[0]; - } __packed assoc_resp, reassoc_resp; - struct { - u16 capab_info; - u16 listen_interval; - u8 current_ap[6]; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } __packed reassoc_req; - struct { - u16 reason_code; - } __packed disassoc; - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params, TIM */ - u8 variable[0]; - } __packed beacon; - struct { - /* only variable items: SSID, Supported rates */ - u8 variable[0]; - } __packed probe_req; - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params */ - u8 variable[0]; - } __packed probe_resp; - struct { - u8 category; - union { - struct { - u8 action_code; - u8 dialog_token; - u8 status_code; - u8 variable[0]; - } __packed wme_action; - struct { - u8 action_code; - u8 dialog_token; - u16 capab; - u16 timeout; - u16 start_seq_num; - } __packed addba_req; - struct { - u8 action_code; - u8 dialog_token; - u16 status; - u16 capab; - u16 timeout; - } __packed addba_resp; - struct { - u8 action_code; - u16 params; - u16 reason_code; - } __packed delba; - structi { - u8 action_code; - /* capab_info for open and confirm, - * reason for close - */ - u16 aux; - /* Followed in plink_confirm by status - * code, AID and supported rates, - * and directly by supported rates in - * plink_open and plink_close - */ - u8 variable[0]; - } __packed plink_action; - struct{ - u8 action_code; - u8 variable[0]; - } __packed mesh_action; - } __packed u; - } __packed action; - } __packed u; -} __packed; - -/* mgmt header + 1 byte category code */ -#define IEEE80211_MIN_ACTION_SIZE \ - FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) - -#endif diff --git a/drivers/staging/r8188eu/include/odm.h b/drivers/staging/r8188eu/include/odm.h index f08655208b32..23a151c558dc 100644 --- a/drivers/staging/r8188eu/include/odm.h +++ b/drivers/staging/r8188eu/include/odm.h @@ -4,64 +4,30 @@ #ifndef __HALDMOUTSRC_H__ #define __HALDMOUTSRC_H__ -/* Add for AP/ADSLpseudo DM structuer requirement. */ -/* We need to remove to other position??? */ -struct rtl8192cd_priv { - u8 temp; -}; - struct rtw_dig { - u8 Dig_Enable_Flag; - u8 Dig_Ext_Port_Stage; - - int RssiLowThresh; - int RssiHighThresh; - - u32 FALowThresh; - u32 FAHighThresh; - - u8 CurSTAConnectState; - u8 PreSTAConnectState; - u8 CurMultiSTAConnectState; - u8 PreIGValue; u8 CurIGValue; u8 BackupIGValue; - s8 BackoffVal; - s8 BackoffVal_range_max; - s8 BackoffVal_range_min; u8 rx_gain_range_max; u8 rx_gain_range_min; - u8 Rssi_val_min; - u8 PreCCK_CCAThres; u8 CurCCK_CCAThres; - u8 PreCCKPDState; - u8 CurCCKPDState; u8 LargeFAHit; u8 ForbiddenIGI; u32 Recover_cnt; u8 DIG_Dynamic_MIN_0; - u8 DIG_Dynamic_MIN_1; bool bMediaConnect_0; - bool bMediaConnect_1; u32 AntDiv_RSSI_max; u32 RSSI_max; }; struct rtl_ps { - u8 pre_cca_state; - u8 cur_cca_state; - u8 pre_rf_state; u8 cur_rf_state; - - int rssi_val_min; - u8 initialize; u32 reg_874; u32 reg_c70; @@ -87,59 +53,11 @@ struct false_alarm_stats { u32 Cnt_BW_LSC; /* Gary */ }; -struct dyn_primary_cca { - u8 pri_cca_flag; - u8 intf_flag; - u8 intf_type; - u8 dup_rts_flag; - u8 monitor_flag; -}; - -struct rx_hpc { - u8 RXHP_flag; - u8 PSD_func_trigger; - u8 PSD_bitmap_RXHP[80]; - u8 Pre_IGI; - u8 Cur_IGI; - u8 Pre_pw_th; - u8 Cur_pw_th; - bool First_time_enter; - bool RXHP_enable; - u8 TP_Mode; - struct timer_list PSDTimer; -}; - #define ODM_ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */ struct sw_ant_switch { - u8 try_flag; - s32 PreRSSI; u8 CurAntenna; - u8 PreAntenna; - u8 RSSI_Trying; - u8 TestMode; - u8 bTriggerAntennaSwitch; - u8 SelectAntennaMap; - u8 RSSI_target; - - /* Before link Antenna Switch check */ - u8 SWAS_NoLink_State; - u32 SWAS_NoLink_BK_Reg860; - - s32 RSSI_sum_A; - s32 RSSI_sum_B; - s32 RSSI_cnt_A; - s32 RSSI_cnt_B; - u64 lastTxOkCnt; - u64 lastRxOkCnt; - u64 TXByteCnt_A; - u64 TXByteCnt_B; - u64 RXByteCnt_A; - u64 RXByteCnt_B; - u8 TrafficLoad; - struct timer_list SwAntennaSwitchTimer; - u8 TxAnt[ODM_ASSOCIATE_ENTRY_NUM]; - u8 TargetSTA; + u8 SWAS_NoLink_State; /* Before link Antenna Switch check */ u8 RxIdleAnt; }; @@ -182,10 +100,6 @@ struct odm_per_pkt_info { bool bPacketBeacon; }; -struct odm_mac_status_info { - u8 test; -}; - enum odm_ability { /* BB Team */ ODM_DIG = 0x00000001, @@ -202,22 +116,6 @@ enum odm_ability { ODM_PSD2AFH = 0x00000800 }; -/* 2011/20/20 MH For MP driver RT_WLAN_STA = struct sta_info */ -/* Please declare below ODM relative info in your STA info structure. */ - -struct odm_sta_info { - /* Driver Write */ - bool bUsed; /* record the sta status link or not? */ - u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */ - - /* ODM Write */ - /* 1 PHY_STATUS_INFO */ - u8 RSSI_Path[4]; /* */ - u8 RSSI_Ave; - u8 RXEVM[4]; - u8 RXSNR[4]; -}; - /* 2011/10/20 MH Define Common info enum for all team. */ enum odm_common_info_def { @@ -230,22 +128,16 @@ enum odm_common_info_def { /* Dynamic value: */ /* POINTER REFERENCE----------- */ - ODM_CMNINFO_TX_UNI, - ODM_CMNINFO_RX_UNI, ODM_CMNINFO_WM_MODE, /* ODM_WIRELESS_MODE_E */ ODM_CMNINFO_SEC_CHNL_OFFSET, /* ODM_SEC_CHNL_OFFSET_E */ - ODM_CMNINFO_SEC_MODE, /* ODM_SECURITY_E */ ODM_CMNINFO_BW, /* ODM_BW_E */ ODM_CMNINFO_CHNL, ODM_CMNINFO_SCAN, ODM_CMNINFO_POWER_SAVING, - ODM_CMNINFO_NET_CLOSED, /* POINTER REFERENCE----------- */ /* CALL BY VALUE------------- */ - ODM_CMNINFO_WIFI_DIRECT, - ODM_CMNINFO_WIFI_DISPLAY, ODM_CMNINFO_LINK, ODM_CMNINFO_RSSI_MIN, ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */ @@ -256,27 +148,17 @@ enum odm_common_info_def { enum odm_ability_def { /* BB ODM section BIT 0-15 */ - ODM_BB_DIG = BIT(0), - ODM_BB_RA_MASK = BIT(1), - ODM_BB_DYNAMIC_TXPWR = BIT(2), ODM_BB_FA_CNT = BIT(3), ODM_BB_RSSI_MONITOR = BIT(4), ODM_BB_CCK_PD = BIT(5), ODM_BB_ANT_DIV = BIT(6), - ODM_BB_PWR_SAVE = BIT(7), ODM_BB_PWR_TRA = BIT(8), - ODM_BB_RATE_ADAPTIVE = BIT(9), - ODM_BB_PATH_DIV = BIT(10), - ODM_BB_PSD = BIT(11), - ODM_BB_RXHP = BIT(12), /* MAC DM section BIT 16-23 */ ODM_MAC_EDCA_TURBO = BIT(16), - ODM_MAC_EARLY_MODE = BIT(17), /* RF ODM section BIT 24-31 */ ODM_RF_TX_PWR_TRACK = BIT(24), - ODM_RF_RX_GAIN_TRACK = BIT(25), ODM_RF_CALIBRATION = BIT(26), }; @@ -424,15 +306,9 @@ struct odm_rf_cal { /* ODM Dynamic common info value definition */ struct fast_ant_train { - u8 Bssid[6]; u8 antsel_rx_keep_0; u8 antsel_rx_keep_1; u8 antsel_rx_keep_2; - u32 antSumRSSI[7]; - u32 antRSSIcnt[7]; - u32 antAveRSSI[7]; - u8 FAT_State; - u32 TrainIdx; u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; @@ -444,11 +320,6 @@ struct fast_ant_train { bool bBecomeLinked; }; -enum fat_state { - FAT_NORMAL_STATE = 0, - FAT_TRAINING_STATE = 1, -}; - enum ant_div_type { NO_ANTDIV = 0xFF, CG_TRX_HW_ANTDIV = 0x01, @@ -459,13 +330,7 @@ enum ant_div_type { /* Copy from SD4 defined structure. We use to support PHY DM integration. */ struct odm_dm_struct { - /* Add for different team use temporarily */ struct adapter *Adapter; /* For CE/NIC team */ - struct rtl8192cd_priv *priv; /* For AP/ADSL team */ - /* WHen you use above pointers, they must be initialized. */ - bool odm_ready; - - struct rtl8192cd_priv *fake_priv; /* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */ bool bCckHighPower; @@ -485,55 +350,25 @@ struct odm_dm_struct { /* Dynamic Value */ /* POINTER REFERENCE----------- */ - - u8 u8_temp; - bool bool_temp; - struct adapter *adapter_temp; - - /* TX Unicast byte count */ - u64 *pNumTxBytesUnicast; - /* RX Unicast byte count */ - u64 *pNumRxBytesUnicast; /* Wireless mode B/G/A/N = BIT(0)/BIT(1)/BIT(2)/BIT(3) */ u8 *pWirelessMode; /* ODM_WIRELESS_MODE_E */ /* Secondary channel offset don't_care/below/above = 0/1/2 */ u8 *pSecChOffset; - /* Security mode Open/WEP/AES/TKIP = 0/1/2/3 */ - u8 *pSecurity; /* BW info 20M/40M/80M = 0/1/2 */ u8 *pBandWidth; /* Central channel location Ch1/Ch2/.... */ u8 *pChannel; /* central channel number */ - /* Common info for 92D DMSP */ - bool *pbGetValueFromOtherMac; - struct adapter **pBuddyAdapter; - bool *pbMasterOfDMSP; /* MAC0: master, MAC1: slave */ /* Common info for Status */ bool *pbScanInProcess; bool *pbPowerSaving; - /* CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. */ - u8 *pOnePathCCA; - /* pMgntInfo->AntennaTest */ - u8 *pAntennaTest; - bool *pbNet_closed; /* POINTER REFERENCE----------- */ /* */ /* CALL BY VALUE------------- */ - bool bWIFI_Direct; - bool bWIFI_Display; bool bLinked; u8 RSSI_Min; - u8 InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */ bool bIsMPChip; bool bOneEntryOnly; - /* Common info for BTDM */ - bool bBtDisabled; /* BT is disabled */ - bool bBtHsOperation; /* BT HS mode is under progress */ - u8 btHsDigVal; /* use BT rssi to decide the DIG value */ - bool bBtDisableEdcaTurbo;/* Under some condition, don't enable the - * EDCA Turbo */ - bool bBtBusy; /* BT is busy. */ /* CALL BY VALUE------------- */ /* 2 Define STA info. */ @@ -549,38 +384,16 @@ struct odm_dm_struct { /* Latest packet phy info (ODM write) */ struct odm_phy_dbg_info PhyDbgInfo; - /* Latest packet phy info (ODM write) */ - struct odm_mac_status_info *pMacInfo; - - /* Different Team independt structure?? */ - /* ODM Structure */ struct fast_ant_train DM_FatTable; struct rtw_dig DM_DigTable; struct rtl_ps DM_PSTable; - struct dyn_primary_cca DM_PriCCA; - struct rx_hpc DM_RXHP_Table; struct false_alarm_stats FalseAlmCnt; - struct false_alarm_stats FlaseAlmCntBuddyAdapter; struct sw_ant_switch DM_SWAT_Table; - bool RSSI_test; struct edca_turbo DM_EDCA_Table; - u32 WMMEDCA_BE; - /* Copy from SD4 structure */ - /* */ - /* ================================================== */ - /* */ - - bool *pbDriverStopped; - bool *pbDriverIsGoingToPnpSetPowerSleep; - bool *pinit_adpt_in_progress; /* PSD */ - bool bUserAssignLevel; - struct timer_list PSDTimer; - u8 RSSI_BT; /* come from BT */ - bool bPSDinProcess; bool bDMInitialGainEnable; struct odm_rate_adapt RateAdaptive; @@ -596,14 +409,7 @@ struct odm_dm_struct { u8 BbSwingIdxCckCurrent; u8 BbSwingIdxCckBase; bool BbSwingFlagCck; - /* ODM system resource. */ - - /* ODM relative time. */ - struct timer_list PathDivSwitchTimer; - /* 2011.09.27 add for Path Diversity */ - struct timer_list CCKPathDiversityTimer; - struct timer_list FastAntTrainingTimer; -}; /* DM_Dynamic_Mechanism_Structure */ +}; enum odm_bb_config_type { CONFIG_BB_PHY_REG, @@ -612,12 +418,6 @@ enum odm_bb_config_type { CONFIG_BB_PHY_REG_PG, }; -#define DM_DIG_THRESH_HIGH 40 -#define DM_DIG_THRESH_LOW 35 - -#define DM_false_ALARM_THRESH_LOW 400 -#define DM_false_ALARM_THRESH_HIGH 1000 - #define DM_DIG_MAX_NIC 0x4e #define DM_DIG_MIN_NIC 0x1e /* 0x22/0x1c */ @@ -629,10 +429,6 @@ enum odm_bb_config_type { #define DM_DIG_FA_TH1 0x300/* 0x100 */ #define DM_DIG_FA_TH2 0x400/* 0x200 */ -#define DM_DIG_BACKOFF_MAX 12 -#define DM_DIG_BACKOFF_MIN -4 -#define DM_DIG_BACKOFF_DEFAULT 10 - /* 3=========================================================== */ /* 3 Rate Adaptive */ /* 3=========================================================== */ @@ -645,12 +441,6 @@ enum odm_bb_config_type { /* 3 BB Power Save */ /* 3=========================================================== */ -enum dm_1r_cca { - CCA_1R = 0, - CCA_2R = 1, - CCA_MAX = 2, -}; - enum dm_rf { RF_Save = 0, RF_Normal = 1, @@ -680,8 +470,6 @@ extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI); void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres); -void ODM_SetAntenna(struct odm_dm_struct *pDM_Odm, u8 Antenna); - void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal); void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm); diff --git a/drivers/staging/r8188eu/include/odm_RTL8188E.h b/drivers/staging/r8188eu/include/odm_RTL8188E.h index 96e50c9224aa..3c6471f1a893 100644 --- a/drivers/staging/r8188eu/include/odm_RTL8188E.h +++ b/drivers/staging/r8188eu/include/odm_RTL8188E.h @@ -25,10 +25,4 @@ void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8 antsel_tr_mux, void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm); -void odm_FastAntTrainingCallback(struct odm_dm_struct *pDM_Odm); - -void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm); - -void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm); - #endif diff --git a/drivers/staging/r8188eu/include/odm_RegConfig8188E.h b/drivers/staging/r8188eu/include/odm_RegConfig8188E.h index 634454bffdb6..683fa4a07956 100644 --- a/drivers/staging/r8188eu/include/odm_RegConfig8188E.h +++ b/drivers/staging/r8188eu/include/odm_RegConfig8188E.h @@ -4,9 +4,6 @@ #ifndef __INC_ODM_REGCONFIG_H_8188E #define __INC_ODM_REGCONFIG_H_8188E -void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data, - enum rf_radio_path RF_PATH, u32 RegAddr); - void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data); diff --git a/drivers/staging/r8188eu/include/odm_interface.h b/drivers/staging/r8188eu/include/odm_interface.h deleted file mode 100644 index 17a315d19a50..000000000000 --- a/drivers/staging/r8188eu/include/odm_interface.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef __ODM_INTERFACE_H__ -#define __ODM_INTERFACE_H__ - -enum odm_h2c_cmd { - ODM_H2C_RSSI_REPORT = 0, - ODM_H2C_PSD_RESULT= 1, - ODM_H2C_PathDiv = 2, - ODM_MAX_H2CCMD -}; - -/* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */ -/* Suggest HW team to use thread instead of workitem. Windows also support the feature. */ -typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext); - -/* =========== Extern Variable ??? It should be forbidden. */ - -/* =========== EXtern Function Prototype */ - -u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr); - -u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr); - -void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data); - -void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data); - -void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data); - -void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, - u32 BitMask, u32 Data); - -u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask); - -void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, - u32 BitMask, u32 Data); - -u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask); - -void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, - u32 RegAddr, u32 BitMask, u32 Data); - -u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, - u32 RegAddr, u32 BitMask); - -/* Memory Relative Function. */ -s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, - u32 length); - -/* ODM Timer relative API. */ -void ODM_delay_ms(u32 ms); - -void ODM_delay_us(u32 us); - -void ODM_sleep_ms(u32 ms); - -#endif /* __ODM_INTERFACE_H__ */ diff --git a/drivers/staging/r8188eu/include/odm_precomp.h b/drivers/staging/r8188eu/include/odm_precomp.h deleted file mode 100644 index 22299f167af8..000000000000 --- a/drivers/staging/r8188eu/include/odm_precomp.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. i*/ - -#ifndef __ODM_PRECOMP_H__ -#define __ODM_PRECOMP_H__ - -#include "odm_types.h" - -#define TEST_FALG___ 1 - -/* 2 Config Flags and Structs - defined by each ODM Type */ - -#include "osdep_service.h" -#include "drv_types.h" -#include "hal_intf.h" - -/* 2 OutSrc Header Files */ - -#include "odm.h" -#include "odm_HWConfig.h" -#include "odm_RegDefine11N.h" - -#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */ -#include "Hal8188ERateAdaptive.h"/* for RA,Power training */ -#include "rtl8188e_hal.h" - -#include "odm_interface.h" - -#include "HalHWImg8188E_MAC.h" -#include "HalHWImg8188E_RF.h" -#include "HalHWImg8188E_BB.h" - -#include "odm_RegConfig8188E.h" -#include "odm_RTL8188E.h" - -void odm_DIGInit(struct odm_dm_struct *pDM_Odm); -void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm); -void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm); -void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm); -void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm); -void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm); -void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm); -void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm); -void odm_DIG(struct odm_dm_struct *pDM_Odm); -void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm); -void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm); -void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm); -void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm); -void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm); -void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm); -void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm); -void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm); - -#endif /* __ODM_PRECOMP_H__ */ diff --git a/drivers/staging/r8188eu/include/osdep_service.h b/drivers/staging/r8188eu/include/osdep_service.h index f6f5e4581212..6c8241372a06 100644 --- a/drivers/staging/r8188eu/include/osdep_service.h +++ b/drivers/staging/r8188eu/include/osdep_service.h @@ -74,38 +74,6 @@ static inline void _cancel_timer(struct timer_list *ptimer,u8 *bcancelled) #define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl #define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS) -static inline void _init_workitem(struct work_struct *pwork, void *pfunc, void * cntx) -{ - INIT_WORK(pwork, pfunc); -} - -static inline void _set_workitem(struct work_struct *pwork) -{ - schedule_work(pwork); -} - -static inline void _cancel_workitem_sync(struct work_struct *pwork) -{ - cancel_work_sync(pwork); -} -/* */ -/* Global Mutex: can only be used at PASSIVE level. */ -/* */ - -#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ - { \ - atomic_dec((atomic_t *)&(_MutexCounter)); \ - msleep(10); \ - } \ -} - -#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - atomic_dec((atomic_t *)&(_MutexCounter)); \ -} - static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) { return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && diff --git a/drivers/staging/r8188eu/include/rtl8188e_dm.h b/drivers/staging/r8188eu/include/rtl8188e_dm.h index 208bea050f6f..0b3a9a1a4e5c 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_dm.h +++ b/drivers/staging/r8188eu/include/rtl8188e_dm.h @@ -8,12 +8,7 @@ enum{ UP_LINK, DOWN_LINK, }; -/* duplicate code,will move to ODM ######### */ -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 -#define IQK_BB_REG_NUM 9 -#define HP_THERMAL_NUM 8 -/* duplicate code,will move to ODM ######### */ + struct dm_priv { u32 InitODMFlag; diff --git a/drivers/staging/r8188eu/include/rtl8188e_hal.h b/drivers/staging/r8188eu/include/rtl8188e_hal.h index d7db1dfc39d0..8134a173ea07 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_hal.h +++ b/drivers/staging/r8188eu/include/rtl8188e_hal.h @@ -13,11 +13,18 @@ #include "rtl8188e_recv.h" #include "rtl8188e_xmit.h" #include "rtl8188e_cmd.h" -#include "Hal8188EPwrSeq.h" -#include "rtl8188e_sreset.h" #include "rtw_efuse.h" - -#include "odm_precomp.h" +#include "odm_types.h" +#include "odm.h" +#include "odm_HWConfig.h" +#include "odm_RegDefine11N.h" +#include "HalPhyRf_8188e.h" +#include "Hal8188ERateAdaptive.h" +#include "HalHWImg8188E_MAC.h" +#include "HalHWImg8188E_RF.h" +#include "HalHWImg8188E_BB.h" +#include "odm_RegConfig8188E.h" +#include "odm_RTL8188E.h" /* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */ #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow @@ -168,42 +175,15 @@ struct hal_data_8188e { u16 BasicRateSet; - /* rf_ctrl */ - u8 rf_chip; - u8 rf_type; - - u8 BoardType; - - /* EEPROM setting. */ - u16 EEPROMVID; - u16 EEPROMPID; - u16 EEPROMSVID; - u16 EEPROMSDID; - u8 EEPROMCustomerID; - u8 EEPROMSubCustomerID; - u8 EEPROMVersion; u8 EEPROMRegulatory; - - u8 bTXPowerDataReadFromEEPORM; u8 EEPROMThermalMeter; - u8 bAPKThermalMeterIgnore; - - bool EepromOrEfuse; - struct efuse_hal EfuseHal; - u8 Index24G_CCK_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - u8 Index24G_BW40_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + u8 Index24G_CCK_Base[CHANNEL_MAX_NUMBER]; + u8 Index24G_BW40_Base[CHANNEL_MAX_NUMBER]; /* If only one tx, only BW20 and OFDM are used. */ - s8 CCK_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; - s8 OFDM_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; - s8 BW20_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; - s8 BW40_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; - - u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - /* For HT 40MHZ pwr */ - u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - /* For HT 40MHZ pwr */ - u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + s8 OFDM_24G_Diff[MAX_TX_COUNT]; + s8 BW20_24G_Diff[MAX_TX_COUNT]; + /* HT 20<->40 Pwr diff */ u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; /* For HT<->legacy pwr diff */ @@ -212,7 +192,6 @@ struct hal_data_8188e { u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */ /* The current Tx Power Level */ u8 CurrentCckTxPwrIdx; u8 CurrentOfdm24GTxPwrIdx; @@ -220,32 +199,18 @@ struct hal_data_8188e { u8 CurrentBW4024GTxPwrIdx; /* Read/write are allow for following hardware information variables */ - u8 framesync; - u32 framesyncC34; - u8 framesyncMonitor; - u8 DefaultInitialGain[4]; u8 pwrGroupCnt; u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; - u32 CCKTxPowerLevelOriginalOffset; u8 CrystalCap; - u32 AntennaTxPath; /* Antenna path Tx */ - u32 AntennaRxPath; /* Antenna path Rx */ u8 ExternalPA; - u8 bLedOpenDrain; /* Open-drain support for controlling the LED.*/ - - u8 b1x1RecvCombine; /* for 1T1R receive combining */ - u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */ - struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */ + struct bb_reg_def PHYRegDef[2]; /* Radio A/B */ u32 RfRegChnlVal[2]; - /* RDG enable */ - bool bRDGEnable; - /* for host message to fw */ u8 LastHMEBoxNum; @@ -263,26 +228,10 @@ struct hal_data_8188e { u8 bDumpRxPkt;/* for debug */ u8 bDumpTxPkt;/* for debug */ - u8 FwRsvdPageStartOffset; /* Reserve page start offset except - * beacon in TxQ. */ - - /* 2010/08/09 MH Add CU power down mode. */ - bool pwrdown; - - /* Add for dual MAC 0--Mac0 1--Mac1 */ - u32 interfaceIndex; u8 OutEpQueueSel; u8 OutEpNumber; - /* Add for USB aggreation mode dynamic shceme. */ - bool UsbRxHighSpeedMode; - - /* 2010/11/22 MH Add for slim combo debug mode selective. */ - /* This is used for fix the drawback of CU TSMC-A/UMC-A cut. - * HW auto suspend ability. Close BT clock. */ - bool SlimComboDbg; - u16 EfuseUsedBytes; struct P2P_PS_Offload_t p2p_ps_offload; @@ -293,12 +242,8 @@ struct hal_data_8188e { u32 UsbBulkOutSize; - /* Interrupt relatd register information. */ - u32 IntArray[3];/* HISR0,HISR1,HSISR */ - u8 C2hArray[16]; u8 UsbTxAggMode; u8 UsbTxAggDescNum; - u32 MaxUsbRxAggBlock; enum usb_rx_agg_mode UsbRxAggMode; u8 UsbRxAggBlockCount; /* USB Block count. Block size is @@ -309,9 +254,6 @@ struct hal_data_8188e { u8 UsbRxAggPageTimeout; }; -#define GET_HAL_DATA(__pAdapter) \ - ((struct hal_data_8188e *)((__pAdapter)->HalData)) - /* rtl8188e_hal_init.c */ s32 rtl8188e_FirmwareDownload(struct adapter *padapter); void _8051Reset88E(struct adapter *padapter); @@ -321,25 +263,18 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy); /* EFuse */ u8 GetEEPROMSize8188E(struct adapter *padapter); -void Hal_InitPGData88E(struct adapter *padapter); void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo); void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail); -void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, - bool AutoLoadFail); void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail); -void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, - bool AutoLoadFail); void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter,u8 *PROMContent, bool AutoLoadFail); void Hal_ReadThermalMeter_88E(struct adapter * dapter, u8 *PROMContent, bool AutoloadFail); void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail); -void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, - bool AutoLoadFail); void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail); @@ -347,6 +282,5 @@ void rtl8188e_read_chip_version(struct adapter *padapter); s32 rtl8188e_iol_efuse_patch(struct adapter *padapter); void rtw_cancel_all_timer(struct adapter *padapter); -void _ps_open_RF(struct adapter *adapt); #endif /* __RTL8188E_HAL_H__ */ diff --git a/drivers/staging/r8188eu/include/rtl8188e_led.h b/drivers/staging/r8188eu/include/rtl8188e_led.h deleted file mode 100644 index 02cdc970bb17..000000000000 --- a/drivers/staging/r8188eu/include/rtl8188e_led.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef __RTL8188E_LED_H__ -#define __RTL8188E_LED_H__ - -#include "osdep_service.h" -#include "drv_types.h" - -/* */ -/* Interface to manipulate LED objects. */ -/* */ -void rtl8188eu_InitSwLeds(struct adapter *padapter); -void rtl8188eu_DeInitSwLeds(struct adapter *padapter); - -#endif diff --git a/drivers/staging/r8188eu/include/rtl8188e_recv.h b/drivers/staging/r8188eu/include/rtl8188e_recv.h index 2ab395ef579b..0be9896eaf0f 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_recv.h +++ b/drivers/staging/r8188eu/include/rtl8188e_recv.h @@ -9,8 +9,6 @@ #define RECV_BLK_SZ 512 #define RECV_BLK_CNT 16 #define RECV_BLK_TH RECV_BLK_CNT -#define RECV_BULK_IN_ADDR 0x80 -#define RECV_INT_IN_ADDR 0x81 #define NR_PREALLOC_RECV_SKB (8) @@ -39,7 +37,6 @@ enum rx_packet_type { HIS_REPORT,/* USB HISR RPT */ }; -#define INTERRUPT_MSG_FORMAT_LEN 60 void rtl8188eu_init_recvbuf(struct recv_buf *buf); s32 rtl8188eu_init_recv_priv(struct adapter *padapter); void rtl8188eu_free_recv_priv(struct adapter * padapter); diff --git a/drivers/staging/r8188eu/include/rtl8188e_spec.h b/drivers/staging/r8188eu/include/rtl8188e_spec.h index 01aeaa4ac605..009222b4a95d 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_spec.h +++ b/drivers/staging/r8188eu/include/rtl8188e_spec.h @@ -475,13 +475,6 @@ Default: 00b. #define MSR_INFRA 0x02 #define MSR_AP 0x03 -/* 88EU (MSR) Media Status Register (Offset 0x4C, 8 bits) */ -#define USB_INTR_CONTENT_C2H_OFFSET 0 -#define USB_INTR_CONTENT_CPWM1_OFFSET 16 -#define USB_INTR_CONTENT_CPWM2_OFFSET 20 -#define USB_INTR_CONTENT_HISR_OFFSET 48 -#define USB_INTR_CONTENT_HISRE_OFFSET 52 - /* 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) */ /* IOL config for REG_FDHM0(Reg0x88) */ #define CMD_INIT_LLT BIT(0) @@ -1283,53 +1276,15 @@ Current IOREG MAP #define EEPROM_RF_BOARD_OPTION_88E 0xC1 #define EEPROM_RF_FEATURE_OPTION_88E 0xC2 -#define EEPROM_RF_BT_SETTING_88E 0xC3 -#define EEPROM_VERSION_88E 0xC4 -#define EEPROM_CUSTOMERID_88E 0xC5 #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 -/* RTL88EE */ -#define EEPROM_MAC_ADDR_88EE 0xD0 -#define EEPROM_VID_88EE 0xD6 -#define EEPROM_DID_88EE 0xD8 -#define EEPROM_SVID_88EE 0xDA -#define EEPROM_SMID_88EE 0xDC - /* RTL88EU */ #define EEPROM_MAC_ADDR_88EU 0xD7 -#define EEPROM_VID_88EU 0xD0 -#define EEPROM_PID_88EU 0xD2 #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* RTL88ES */ #define EEPROM_MAC_ADDR_88ES 0x11A -/* EEPROM/Efuse Value Type */ -#define EETYPE_TX_PWR 0x0 - -/* Default Value for EEPROM or EFUSE!!! */ -#define EEPROM_Default_TSSI 0x0 -#define EEPROM_Default_TxPowerDiff 0x0 -#define EEPROM_Default_CrystalCap 0x5 -/* Default: 2X2, RTL8192CE(QFPN68) */ -#define EEPROM_Default_BoardType 0x02 -#define EEPROM_Default_TxPower 0x1010 -#define EEPROM_Default_HT2T_TxPwr 0x10 - -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_ThermalMeter 0x12 - -#define EEPROM_Default_AntTxPowerDiff 0x0 -#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 -#define EEPROM_Default_TxPowerLevel 0x2A - -#define EEPROM_Default_HT40_2SDiff 0x0 -/* HT20<->40 default Tx Power Index Difference */ -#define EEPROM_Default_HT20_Diff 2 -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_HT40_PwrMaxOffset 0 -#define EEPROM_Default_HT20_PwrMaxOffset 0 - #define EEPROM_Default_CrystalCap_88E 0x20 #define EEPROM_Default_ThermalMeter_88E 0x18 @@ -1339,18 +1294,7 @@ Current IOREG MAP #define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 #define EEPROM_DEFAULT_DIFF 0XFE -#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F #define EEPROM_DEFAULT_BOARD_OPTION 0x00 -#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 -#define EEPROM_DEFAULT_BT_OPTION 0x10 - -/* For debug */ -#define EEPROM_Default_PID 0x1234 -#define EEPROM_Default_VID 0x5678 -#define EEPROM_Default_CustomerID 0xAB -#define EEPROM_Default_CustomerID_8188E 0x00 -#define EEPROM_Default_SubCustomerID 0xCD -#define EEPROM_Default_Version 0 #define EEPROM_CHANNEL_PLAN_FCC 0x0 #define EEPROM_CHANNEL_PLAN_IC 0x1 @@ -1367,11 +1311,6 @@ Current IOREG MAP #define EEPROM_USB_OPTIONAL1 0xE #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 -#define EEPROM_CID_DEFAULT 0x0 -#define EEPROM_CID_TOSHIBA 0x4 -#define EEPROM_CID_CCX 0x10 /* CCX test. */ -#define EEPROM_CID_QMI 0x0D -#define EEPROM_CID_WHQL 0xFE #define RTL_EEPROM_ID 0x8129 #endif /* __RTL8188E_SPEC_H__ */ diff --git a/drivers/staging/r8188eu/include/rtl8188e_sreset.h b/drivers/staging/r8188eu/include/rtl8188e_sreset.h deleted file mode 100644 index bb8b0048fbf9..000000000000 --- a/drivers/staging/r8188eu/include/rtl8188e_sreset.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef _RTL8188E_SRESET_H_ -#define _RTL8188E_SRESET_H_ - -#include "osdep_service.h" -#include "drv_types.h" - -void rtl8188e_sreset_xmit_status_check(struct adapter *padapter); -void rtl8188e_sreset_linked_status_check(struct adapter *padapter); - -#endif diff --git a/drivers/staging/r8188eu/include/rtw_cmd.h b/drivers/staging/r8188eu/include/rtw_cmd.h index 47c3c80cc24a..cf0945ae11c1 100644 --- a/drivers/staging/r8188eu/include/rtw_cmd.h +++ b/drivers/staging/r8188eu/include/rtw_cmd.h @@ -42,7 +42,6 @@ struct cmd_priv { u8 *cmd_allocated_buf; u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */ u8 *rsp_allocated_buf; - u32 cmd_issued_cnt; u32 cmd_done_cnt; u32 rsp_cnt; u8 cmdthd_running; diff --git a/drivers/staging/r8188eu/include/rtw_debug.h b/drivers/staging/r8188eu/include/rtw_debug.h index 0a77e3e73a45..311051757715 100644 --- a/drivers/staging/r8188eu/include/rtw_debug.h +++ b/drivers/staging/r8188eu/include/rtw_debug.h @@ -54,22 +54,10 @@ extern u32 GlobalDebugLevel; -#define DBG_88E_LEVEL(_level, fmt, arg...) \ - do { \ - if (_level <= GlobalDebugLevel) \ - pr_info(DRIVER_PREFIX"INFO " fmt, ##arg); \ - } while (0) - #define DBG_88E(...) \ do { \ if (_drv_err_ <= GlobalDebugLevel) \ pr_info(DRIVER_PREFIX __VA_ARGS__); \ } while (0) -#define MSG_88E(...) \ - do { \ - if (_drv_err_ <= GlobalDebugLevel) \ - pr_info(DRIVER_PREFIX __VA_ARGS__); \ - } while (0) - #endif /* __RTW_DEBUG_H__ */ diff --git a/drivers/staging/r8188eu/include/rtw_eeprom.h b/drivers/staging/r8188eu/include/rtw_eeprom.h index e517239bd75e..3e8d3bb48903 100644 --- a/drivers/staging/r8188eu/include/rtw_eeprom.h +++ b/drivers/staging/r8188eu/include/rtw_eeprom.h @@ -7,38 +7,7 @@ #include "osdep_service.h" #include "drv_types.h" -#define RTL8712_EEPROM_ID 0x8712 - #define HWSET_MAX_SIZE_512 512 -#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512 - -#define CLOCK_RATE 50 /* 100us */ - -/* EEPROM opcodes */ -#define EEPROM_READ_OPCODE 06 -#define EEPROM_WRITE_OPCODE 05 -#define EEPROM_ERASE_OPCODE 07 -#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */ -#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */ - -/* Country codes */ -#define USA 0x555320 -#define EUROPE 0x1 /* temp, should be provided later */ -#define JAPAN 0x2 /* temp, should be provided later */ - -#define EEPROM_CID_DEFAULT 0x0 -#define EEPROM_CID_ALPHA 0x1 -#define EEPROM_CID_Senao 0x3 -#define EEPROM_CID_NetCore 0x5 -#define EEPROM_CID_CAMEO 0X8 -#define EEPROM_CID_SITECOM 0x9 -#define EEPROM_CID_COREGA 0xB -#define EEPROM_CID_EDIMAX_BELK 0xC -#define EEPROM_CID_SERCOMM_BELK 0xE -#define EEPROM_CID_CAMEO1 0xF -#define EEPROM_CID_WNC_COREGA 0x12 -#define EEPROM_CID_CLEVO 0x13 -#define EEPROM_CID_WHQL 0xFE struct eeprom_priv { u8 bautoload_fail_flag; diff --git a/drivers/staging/r8188eu/include/rtw_efuse.h b/drivers/staging/r8188eu/include/rtw_efuse.h index 2e19b7be1075..2daf69f554d5 100644 --- a/drivers/staging/r8188eu/include/rtw_efuse.h +++ b/drivers/staging/r8188eu/include/rtw_efuse.h @@ -4,110 +4,10 @@ #ifndef __RTW_EFUSE_H__ #define __RTW_EFUSE_H__ -#include "osdep_service.h" - -#define EFUSE_ERROE_HANDLE 1 - -#define PG_STATE_HEADER 0x01 -#define PG_STATE_WORD_0 0x02 -#define PG_STATE_WORD_1 0x04 -#define PG_STATE_WORD_2 0x08 -#define PG_STATE_WORD_3 0x10 -#define PG_STATE_DATA 0x20 - -#define PG_SWBYTE_H 0x01 -#define PG_SWBYTE_L 0x02 - -#define PGPKT_DATA_SIZE 8 - -#define EFUSE_WIFI 0 -#define EFUSE_BT 1 - -enum _EFUSE_DEF_TYPE { - TYPE_EFUSE_MAX_SECTION = 0, - TYPE_EFUSE_REAL_CONTENT_LEN = 1, - TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2, - TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3, - TYPE_EFUSE_MAP_LEN = 4, - TYPE_EFUSE_PROTECT_BYTES_BANK = 5, - TYPE_EFUSE_CONTENT_LEN_BANK = 6, -}; - -/* E-Fuse */ -#define EFUSE_MAP_SIZE 512 -#define EFUSE_MAX_SIZE 256 -/* end of E-Fuse */ - -#define EFUSE_MAX_MAP_LEN 512 -#define EFUSE_MAX_HW_SIZE 512 -#define EFUSE_MAX_SECTION_BASE 16 - -#define EXT_HEADER(header) ((header & 0x1F) == 0x0F) -#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F) -#define GET_HDR_OFFSET_2_0(header) ((header & 0xE0) >> 5) - -#define EFUSE_REPEAT_THRESHOLD_ 3 - -/* The following is for BT Efuse definition */ -#define EFUSE_BT_MAX_MAP_LEN 1024 -#define EFUSE_MAX_BANK 4 -#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1) -/*--------------------------Define Parameters-------------------------------*/ #define EFUSE_MAX_WORD_UNIT 4 -/*------------------------------Define structure----------------------------*/ -struct pgpkt { - u8 offset; - u8 word_en; - u8 data[8]; - u8 word_cnts; -}; - -/*------------------------------Define structure----------------------------*/ -struct efuse_hal { - u8 fakeEfuseBank; - u32 fakeEfuseUsedBytes; - u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]; - u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]; - u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]; - - u16 BTEfuseUsedBytes; - u8 BTEfuseUsedPercentage; - u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; - u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; - u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; - - u16 fakeBTEfuseUsedBytes; - u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; - u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; - u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; -}; - -/*------------------------Export global variable----------------------------*/ -extern u8 fakeEfuseBank; -extern u32 fakeEfuseUsedBytes; -extern u8 fakeEfuseContent[]; -extern u8 fakeEfuseInitMap[]; -extern u8 fakeEfuseModifiedMap[]; - -extern u32 BTEfuseUsedBytes; -extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -extern u8 BTEfuseInitMap[]; -extern u8 BTEfuseModifiedMap[]; - -extern u32 fakeBTEfuseUsedBytes; -extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -extern u8 fakeBTEfuseInitMap[]; -extern u8 fakeBTEfuseModifiedMap[]; -/*------------------------Export global variable----------------------------*/ - -u8 Efuse_CalculateWordCnts(u8 word_en); -void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf, bool test); -u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data, bool test); -u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data, bool test); - -void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); +void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf); -void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype, bool test); +void EFUSE_ShadowMapUpdate(struct adapter *adapter); #endif diff --git a/drivers/staging/r8188eu/include/rtw_io.h b/drivers/staging/r8188eu/include/rtw_io.h index c6a078210eeb..6910e2b430e2 100644 --- a/drivers/staging/r8188eu/include/rtw_io.h +++ b/drivers/staging/r8188eu/include/rtw_io.h @@ -224,7 +224,7 @@ u8 rtw_read8(struct adapter *adapter, u32 addr); u16 rtw_read16(struct adapter *adapter, u32 addr); u32 rtw_read32(struct adapter *adapter, u32 addr); void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -u32 rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); +u32 rtw_read_port(struct adapter *adapter, u8 *pmem); void rtw_read_port_cancel(struct adapter *adapter); int rtw_write8(struct adapter *adapter, u32 addr, u8 val); diff --git a/drivers/staging/r8188eu/include/rtw_led.h b/drivers/staging/r8188eu/include/rtw_led.h index c035fe267635..2c14cb23d9ad 100644 --- a/drivers/staging/r8188eu/include/rtw_led.h +++ b/drivers/staging/r8188eu/include/rtw_led.h @@ -7,41 +7,7 @@ #include "osdep_service.h" #include "drv_types.h" -#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) - -#define LED_BLINK_NORMAL_INTERVAL 100 -#define LED_BLINK_SLOWLY_INTERVAL 200 -#define LED_BLINK_LONG_INTERVAL 400 - -#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 -#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */ -#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */ -#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 -#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 - -#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100 -#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000 - -#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000 -#define LED_BLINK_NORMAL_INTERVAL_PORNET 100 - -#define LED_BLINK_FAST_INTERVAL_BITLAND 30 - -/* 060403, rcnjko: Customized for AzWave. */ -#define LED_CM2_BLINK_ON_INTERVAL 250 -#define LED_CM2_BLINK_OFF_INTERVAL 4750 - -#define LED_CM8_BLINK_INTERVAL 500 /* for QMI */ -#define LED_CM8_BLINK_OFF_INTERVAL 3750 /* for QMI */ - -/* 080124, lanhsin: Customized for RunTop */ -#define LED_RunTop_BLINK_INTERVAL 300 - -/* 060421, rcnjko: Customized for Sercomm Printer Server case. */ -#define LED_CM3_BLINK_INTERVAL 1500 - enum LED_CTL_MODE { - LED_CTL_POWER_ON = 1, LED_CTL_LINK = 2, LED_CTL_NO_LINK = 3, LED_CTL_TX = 4, @@ -51,10 +17,7 @@ enum LED_CTL_MODE { LED_CTL_START_TO_LINK = 8, LED_CTL_START_WPS = 9, LED_CTL_STOP_WPS = 10, - LED_CTL_START_WPS_BOTTON = 11, /* added for runtop */ - LED_CTL_STOP_WPS_FAIL = 12, /* added for ALPHA */ - LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, /* added for BELKIN */ - LED_CTL_CONNECTION_NO_TRANSFER = 14, + LED_CTL_STOP_WPS_FAIL = 12, }; enum LED_STATE_871x { @@ -63,99 +26,46 @@ enum LED_STATE_871x { RTW_LED_OFF = 2, LED_BLINK_NORMAL = 3, LED_BLINK_SLOWLY = 4, - LED_BLINK_POWER_ON = 5, LED_BLINK_SCAN = 6, /* LED is blinking during scanning period, * the # of times to blink is depend on time * for scanning. */ - LED_BLINK_NO_LINK = 7, /* LED is blinking during no link state. */ LED_BLINK_StartToBlink = 8,/* Customzied for Sercomm Printer * Server case */ LED_BLINK_TXRX = 9, LED_BLINK_WPS = 10, /* LED is blinkg during WPS communication */ - LED_BLINK_WPS_STOP = 11, /* for ALPHA */ - LED_BLINK_WPS_STOP_OVERLAP = 12, /* for BELKIN */ + LED_BLINK_WPS_STOP = 11, LED_BLINK_RUNTOP = 13, /* Customized for RunTop */ - LED_BLINK_CAMEO = 14, - LED_BLINK_XAVI = 15, - LED_BLINK_ALWAYS_ON = 16, -}; - -enum LED_PIN_871x { - LED_PIN_NULL = 0, - LED_PIN_LED0 = 1, - LED_PIN_LED1 = 2, - LED_PIN_LED2 = 3, - LED_PIN_GPIO0 = 4, }; struct LED_871x { struct adapter *padapter; - enum LED_PIN_871x LedPin; /* Identify how to implement this - * SW led. */ enum LED_STATE_871x CurrLedState; /* Current LED state. */ enum LED_STATE_871x BlinkingLedState; /* Next state for blinking, * either RTW_LED_ON or RTW_LED_OFF are. */ - u8 bLedOn; /* true if LED is ON, false if LED is OFF. */ + bool bLedOn; /* true if LED is ON, false if LED is OFF. */ - u8 bLedBlinkInProgress; /* true if it is blinking, false o.w.. */ + bool bLedBlinkInProgress; /* true if it is blinking, false o.w.. */ - u8 bLedWPSBlinkInProgress; + bool bLedWPSBlinkInProgress; u32 BlinkTimes; /* Number of times to toggle led state for blinking. */ - struct timer_list BlinkTimer; /* Timer object for led blinking. */ - - /* ALPHA, added by chiyoko, 20090106 */ - u8 bLedNoLinkBlinkInProgress; - u8 bLedLinkBlinkInProgress; - u8 bLedStartToLinkBlinkInProgress; - u8 bLedScanBlinkInProgress; - struct work_struct BlinkWorkItem; /* Workitem used by BlinkTimer to - * manipulate H/W to blink LED. */ + bool bLedNoLinkBlinkInProgress; + bool bLedLinkBlinkInProgress; + bool bLedScanBlinkInProgress; + struct delayed_work blink_work; }; -#define IS_LED_WPS_BLINKING(_LED_871x) \ - (((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS || \ - ((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS_STOP || \ - ((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress) - -#define IS_LED_BLINKING(_LED_871x) \ - (((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress || \ - ((struct LED_871x *)_LED_871x)->bLedScanBlinkInProgress) - -void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction); - struct led_priv{ - /* add for led control */ struct LED_871x SwLed0; - struct LED_871x SwLed1; - u8 bRegUseLed; - void (*LedControlHandler)(struct adapter *padapter, - enum LED_CTL_MODE LedAction); - /* add for led control */ + bool bRegUseLed; }; -#define rtw_led_control(adapt, action) \ - do { \ - if ((adapt)->ledpriv.LedControlHandler) \ - (adapt)->ledpriv.LedControlHandler((adapt), (action)); \ - } while (0) - -void BlinkTimerCallback(struct timer_list *t); -void BlinkWorkItemCallback(struct work_struct *work); - -void ResetLedStatus(struct LED_871x * pLed); - -void InitLed871x(struct adapter *padapter, struct LED_871x *pLed, - enum LED_PIN_871x LedPin); - -void DeInitLed871x(struct LED_871x *pLed); +void rtl8188eu_InitSwLeds(struct adapter *padapter); +void rtl8188eu_DeInitSwLeds(struct adapter *padapter); -/* hal... */ -void BlinkHandler(struct LED_871x * pLed); -void SwLedOn(struct adapter *padapter, struct LED_871x *pLed); -void SwLedOff(struct adapter *padapter, struct LED_871x *pLed); +void rtw_led_control(struct adapter *padapter, enum LED_CTL_MODE LedAction); #endif /* __RTW_LED_H_ */ diff --git a/drivers/staging/r8188eu/include/rtw_mlme.h b/drivers/staging/r8188eu/include/rtw_mlme.h index e8d51f495702..77169c15080a 100644 --- a/drivers/staging/r8188eu/include/rtw_mlme.h +++ b/drivers/staging/r8188eu/include/rtw_mlme.h @@ -243,18 +243,6 @@ struct wifidirect_info { * by using the sta_preset CAPI. */ /* 0: disable */ /* 1: enable */ - u8 wfd_tdls_enable; /* Flag to enable or disable the TDLS by WFD Sigma*/ - /* 0: disable */ - /* 1: enable */ - u8 wfd_tdls_weaksec; /* Flag to enable or disable the weak security - * function for TDLS by WFD Sigma */ - /* 0: disable */ - /* In this case, the driver can't issue the tdsl - * setup request frame. */ - /* 1: enable */ - /* In this case, the driver can issue the tdls - * setup request frame */ - /* even the current security is weak security. */ /* This field will store the WPS value (PIN value or PBC) that UI had * got from the user. */ diff --git a/drivers/staging/r8188eu/include/rtw_mlme_ext.h b/drivers/staging/r8188eu/include/rtw_mlme_ext.h index 5b307ad3afa5..26f31f20e428 100644 --- a/drivers/staging/r8188eu/include/rtw_mlme_ext.h +++ b/drivers/staging/r8188eu/include/rtw_mlme_ext.h @@ -162,11 +162,6 @@ struct rt_channel_plan { unsigned char Len; }; -struct rt_channel_plan_2g { - unsigned char Channel[MAX_CHANNEL_NUM_2G]; - unsigned char Len; -}; - struct rt_channel_plan_map { unsigned char Index2G; }; diff --git a/drivers/staging/r8188eu/include/rtw_pwrctrl.h b/drivers/staging/r8188eu/include/rtw_pwrctrl.h index b19ef796ab54..2d5298373d74 100644 --- a/drivers/staging/r8188eu/include/rtw_pwrctrl.h +++ b/drivers/staging/r8188eu/include/rtw_pwrctrl.h @@ -19,10 +19,6 @@ enum power_mgnt { PS_MODE_DTIM, PS_MODE_VOIP, PS_MODE_UAPSD_WMM, - PS_MODE_UAPSD, - PS_MODE_IBSS, - PS_MODE_WWLAN, - PM_Radio_Off, PM_Card_Disable, PS_MODE_NUM }; @@ -57,7 +53,6 @@ struct pwrctrl_priv { u8 reg_rfoff; u8 reg_pdnmode; /* powerdown mode */ - u32 rfoff_reason; /* RF OFF Level */ u32 cur_ps_level; @@ -80,7 +75,6 @@ struct pwrctrl_priv { s32 pnp_current_pwr_state; u8 pnp_bstop_trx; - u8 bInternalAutoSuspend; u8 bInSuspend; u8 bSupportRemoteWakeup; struct timer_list pwr_state_check_timer; @@ -93,7 +87,6 @@ struct pwrctrl_priv { enum rt_rf_power_state change_rfpwrstate; u8 wepkeymask; - u8 bHWPowerdown;/* if support hw power down */ u8 bkeepfwalive; }; diff --git a/drivers/staging/r8188eu/include/rtw_recv.h b/drivers/staging/r8188eu/include/rtw_recv.h index 1e28ec731547..b43a46887343 100644 --- a/drivers/staging/r8188eu/include/rtw_recv.h +++ b/drivers/staging/r8188eu/include/rtw_recv.h @@ -177,7 +177,6 @@ struct recv_priv { uint rx_smallpacket_crcerr; uint rx_middlepacket_crcerr; struct semaphore allrxreturnevt; - uint ff_hwaddr; u8 rx_pending_cnt; struct tasklet_struct irq_prepare_beacon_tasklet; diff --git a/drivers/staging/r8188eu/include/rtw_rf.h b/drivers/staging/r8188eu/include/rtw_rf.h index 7ec252fec054..b7267e75346c 100644 --- a/drivers/staging/r8188eu/include/rtw_rf.h +++ b/drivers/staging/r8188eu/include/rtw_rf.h @@ -6,33 +6,16 @@ #include "rtw_cmd.h" -#define OFDM_PHY 1 -#define MIXED_PHY 2 -#define CCK_PHY 3 - #define NumRates (13) /* slot time for 11g */ #define SHORT_SLOT_TIME 9 #define NON_SHORT_SLOT_TIME 20 -#define RTL8711_RF_MAX_SENS 6 -#define RTL8711_RF_DEF_SENS 4 - -/* We now define the following channels as the max channels in each - * channel plan. */ -/* 2G, total 14 chnls */ -/* {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */ -#define MAX_CHANNEL_NUM_2G 14 #define MAX_CHANNEL_NUM 14 /* 2.4 GHz only */ #define NUM_REGULATORYS 1 -/* Country codes */ -#define USA 0x555320 -#define EUROPE 0x1 /* temp, should be provided later */ -#define JAPAN 0x2 /* temp, should be provided later */ - struct regulatory_class { u32 starting_freq; /* MHz, */ u8 channel_set[MAX_CHANNEL_NUM]; @@ -69,13 +52,6 @@ enum _REG_PREAMBLE_MODE { PREAMBLE_SHORT = 3, }; -enum rf90_radio_path { - RF90_PATH_A = 0, /* Radio Path A */ - RF90_PATH_B = 1, /* Radio Path B */ - RF90_PATH_C = 2, /* Radio Path C */ - RF90_PATH_D = 3 /* Radio Path D */ -}; - /* Bandwidth Offset */ #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 #define HAL_PRIME_CHNL_OFFSET_LOWER 1 @@ -99,16 +75,6 @@ enum ht_extchnl_offset { HT_EXTCHNL_OFFSET_LOWER = 3, }; -/* 2007/11/15 MH Define different RF type. */ -enum rt_rf_type_def { - RF_1T2R = 0, - RF_2T4R = 1, - RF_2T2R = 2, - RF_1T1R = 3, - RF_2T2R_GREEN = 4, - RF_819X_MAX_TYPE = 5, -}; - u32 rtw_ch2freq(u32 ch); #endif /* _RTL8711_RF_H_ */ diff --git a/drivers/staging/r8188eu/include/usb_osintf.h b/drivers/staging/r8188eu/include/usb_osintf.h index 624298b4bd0b..3e777ca52745 100644 --- a/drivers/staging/r8188eu/include/usb_osintf.h +++ b/drivers/staging/r8188eu/include/usb_osintf.h @@ -16,7 +16,6 @@ extern int rtw_mc2u_disable; u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, enum bt_usb_request brequest, enum rt_usb_wvalue wvalue, u8 windex, void *data, u8 datalen, u8 isdirectionin); -int pm_netdev_open(struct net_device *pnetdev, u8 bnormal); void netdev_br_init(struct net_device *netdev); void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb); void *scdb_findEntry(struct adapter *priv, unsigned char *ipAddr); diff --git a/drivers/staging/r8188eu/include/wifi.h b/drivers/staging/r8188eu/include/wifi.h index 193a557f0f47..0b0bd39a257f 100644 --- a/drivers/staging/r8188eu/include/wifi.h +++ b/drivers/staging/r8188eu/include/wifi.h @@ -13,32 +13,9 @@ #define BIT(x) (1 << (x)) #define WLAN_ETHHDR_LEN 14 -#define WLAN_ETHADDR_LEN 6 -#define WLAN_IEEE_OUI_LEN 3 -#define WLAN_ADDR_LEN 6 -#define WLAN_CRC_LEN 4 -#define WLAN_BSSID_LEN 6 -#define WLAN_BSS_TS_LEN 8 #define WLAN_HDR_A3_LEN 24 -#define WLAN_HDR_A4_LEN 30 #define WLAN_HDR_A3_QOS_LEN 26 -#define WLAN_HDR_A4_QOS_LEN 32 #define WLAN_SSID_MAXLEN 32 -#define WLAN_DATA_MAXLEN 2312 - -#define WLAN_A3_PN_OFFSET 24 -#define WLAN_A4_PN_OFFSET 30 - -#define WLAN_MIN_ETHFRM_LEN 60 -#define WLAN_MAX_ETHFRM_LEN 1514 -#define WLAN_ETHHDR_LEN 14 - -#define P80211CAPTURE_VERSION 0x80211001 - -/* This value is tested by WiFi 11n Test Plan 5.2.3. */ -/* This test verifies the WLAN NIC can update the NAV through sending - * the CTS with large duration. */ -#define WiFiNavUpperUs 30000 /* 30 ms */ enum WIFI_FRAME_TYPE { WIFI_MGT_TYPE = (0), @@ -487,13 +464,6 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe) #define _STATUS_CODE_ 2 #define _TIMESTAMP_ 8 -#define AUTH_ODD_TO 0 -#define AUTH_EVEN_TO 1 - -#define WLAN_ETHCONV_ENCAP 1 -#define WLAN_ETHCONV_RFC1042 2 -#define WLAN_ETHCONV_8021h 3 - #define cap_ESS BIT(0) #define cap_IBSS BIT(1) #define cap_CFPollable BIT(2) @@ -632,13 +602,6 @@ enum ht_cap_ampdu_factor { #define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3)) #define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4)) -#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6)) -#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7)) -#define HT_INFO_STBC_PARAM_SECONDARY_BC ((u16) BIT(8)) -#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9)) -#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) -#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) - /* ===============WPS Section=============== */ /* For WPSv1.0 */ #define WPSOUI 0x0050f204 @@ -930,7 +893,7 @@ enum P2P_PROTO_WK_ID { P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4, - P2P_AP_P2P_CH_SWITCH_PROCESS_WK =5, + P2P_AP_P2P_CH_SWITCH_PROCESS_WK = 5, P2P_RO_CH_WK = 6, }; @@ -949,26 +912,6 @@ enum P2P_PS_MODE { P2P_PS_MIX = 3, /* CTWindow and NoA */ }; -/* =====================WFD Section===================== */ -/* For Wi-Fi Display */ -#define WFD_ATTR_DEVICE_INFO 0x00 -#define WFD_ATTR_ASSOC_BSSID 0x01 -#define WFD_ATTR_COUPLED_SINK_INFO 0x06 -#define WFD_ATTR_LOCAL_IP_ADDR 0x08 -#define WFD_ATTR_SESSION_INFO 0x09 -#define WFD_ATTR_ALTER_MAC 0x0a - -/* For WFD Device Information Attribute */ -#define WFD_DEVINFO_SOURCE 0x0000 -#define WFD_DEVINFO_PSINK 0x0001 -#define WFD_DEVINFO_SSINK 0x0002 -#define WFD_DEVINFO_DUAL 0x0003 - -#define WFD_DEVINFO_SESSION_AVAIL 0x0010 -#define WFD_DEVINFO_WSD 0x0040 -#define WFD_DEVINFO_PC_TDLS 0x0080 -#define WFD_DEVINFO_HDCP_SUPPORT 0x0100 - #define IP_MCAST_MAC(mac) \ ((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e)) #define ICMPV6_MCAST_MAC(mac) \ diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c index 52d42e576443..41b457838a5b 100644 --- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c @@ -1,8 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2012 Realtek Corporation. */ -#define _IOCTL_LINUX_C_ - #include "../include/osdep_service.h" #include "../include/drv_types.h" #include "../include/wlan_bssdef.h" @@ -14,7 +12,7 @@ #include "../include/rtw_ioctl_set.h" #include "../include/usb_ops.h" #include "../include/rtl8188e_hal.h" -#include "../include/rtl8188e_led.h" +#include "../include/rtw_led.h" #include "../include/rtw_iol.h" @@ -60,7 +58,7 @@ void rtw_indicate_wx_assoc_event(struct adapter *padapter) memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN); - DBG_88E_LEVEL(_drv_always_, "assoc success\n"); + netdev_dbg(padapter->pnetdev, "assoc success\n"); wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); } @@ -73,7 +71,7 @@ void rtw_indicate_wx_disassoc_event(struct adapter *padapter) wrqu.ap_addr.sa_family = ARPHRD_ETHER; memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); - DBG_88E_LEVEL(_drv_always_, "indicate disassoc\n"); + netdev_dbg(padapter->pnetdev, "indicate disassoc\n"); wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); } @@ -1980,6 +1978,7 @@ static int rtw_wx_read32(struct net_device *dev, u32 data32; u32 bytes; u8 *ptmp; + int ret; padapter = (struct adapter *)rtw_netdev_priv(dev); p = &wrqu->data; @@ -2007,12 +2006,17 @@ static int rtw_wx_read32(struct net_device *dev, break; default: DBG_88E(KERN_INFO "%s: usage> read [bytes],[address(hex)]\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_free_ptmp; } DBG_88E(KERN_INFO "%s: addr = 0x%08X data =%s\n", __func__, addr, extra); kfree(ptmp); return 0; + +err_free_ptmp: + kfree(ptmp); + return ret; } static int rtw_wx_write32(struct net_device *dev, @@ -2086,18 +2090,6 @@ static int rtw_wx_write_rf(struct net_device *dev, return 0; } -static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a, - union iwreq_data *wrqu, char *b) -{ - return -1; -} - -static int dummy(struct net_device *dev, struct iw_request_info *a, - union iwreq_data *wrqu, char *b) -{ - return -1; -} - static int rtw_wx_set_channel_plan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2114,37 +2106,6 @@ static int rtw_wx_set_channel_plan(struct net_device *dev, return 0; } -static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev, - struct iw_request_info *a, - union iwreq_data *wrqu, char *b) -{ - return 0; -} - -static int rtw_wx_get_sensitivity(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *buf) -{ - return 0; -} - -static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - return 0; -} - -/* - * For all data larger than 16 octets, we need to use a - * pointer to memory allocated in user space. - */ -static int rtw_drvext_hdl(struct net_device *dev, struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - return 0; -} - static int rtw_get_ap_info(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -3037,7 +2998,7 @@ static int rtw_p2p_connect(struct net_device *dev, struct list_head *plist, *phead; struct __queue *queue = &pmlmepriv->scanned_queue; struct wlan_network *pnetwork = NULL; - uint uintPeerChannel = 0; + u32 peer_channel = 0; /* Commented by Albert 20110304 */ /* The input data contains two informations. */ @@ -3067,7 +3028,7 @@ static int rtw_p2p_connect(struct net_device *dev, while (phead != plist) { pnetwork = container_of(plist, struct wlan_network, list); if (!memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; + peer_channel = pnetwork->network.Configuration.DSConfig; break; } @@ -3076,11 +3037,11 @@ static int rtw_p2p_connect(struct net_device *dev, spin_unlock_bh(&pmlmepriv->scanned_queue.lock); - if (uintPeerChannel) { + if (peer_channel) { memset(&pwdinfo->nego_req_info, 0x00, sizeof(struct tx_nego_req_info)); memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info)); - pwdinfo->nego_req_info.peer_channel_num[0] = uintPeerChannel; + pwdinfo->nego_req_info.peer_channel_num[0] = peer_channel; memcpy(pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN); pwdinfo->nego_req_info.benable = true; @@ -3115,7 +3076,7 @@ static int rtw_p2p_invite_req(struct net_device *dev, struct list_head *plist, *phead; struct __queue *queue = &pmlmepriv->scanned_queue; struct wlan_network *pnetwork = NULL; - uint uintPeerChannel = 0; + uint peer_channel = 0; u8 attr_content[50] = {0x00}; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; @@ -3171,13 +3132,13 @@ static int rtw_p2p_invite_req(struct net_device *dev, if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { /* Handle the P2P Device ID attribute of Beacon first */ if (!memcmp(attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; + peer_channel = pnetwork->network.Configuration.DSConfig; break; } } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { /* Handle the P2P Device Info attribute of probe response */ if (!memcmp(attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; + peer_channel = pnetwork->network.Configuration.DSConfig; break; } } @@ -3187,7 +3148,7 @@ static int rtw_p2p_invite_req(struct net_device *dev, spin_unlock_bh(&pmlmepriv->scanned_queue.lock); - if (uintPeerChannel) { + if (peer_channel) { /* Store the GO's bssid */ for (jj = 0, kk = 18; jj < ETH_ALEN; jj++, kk += 3) pinvite_req_info->go_bssid[jj] = key_2char2num(extra[kk], extra[kk + 1]); @@ -3196,12 +3157,12 @@ static int rtw_p2p_invite_req(struct net_device *dev, pinvite_req_info->ssidlen = wrqu->data.length - 36; memcpy(pinvite_req_info->go_ssid, &extra[36], (u32)pinvite_req_info->ssidlen); pinvite_req_info->benable = true; - pinvite_req_info->peer_ch = uintPeerChannel; + pinvite_req_info->peer_ch = peer_channel; rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INVITE_REQ); - set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + set_channel_bwmode(padapter, peer_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); @@ -3254,7 +3215,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, struct list_head *plist, *phead; struct __queue *queue = &pmlmepriv->scanned_queue; struct wlan_network *pnetwork = NULL; - uint uintPeerChannel = 0; + uint peer_channel = 0; u8 attr_content[100] = {0x00}; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; @@ -3304,7 +3265,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, plist = phead->next; while (phead != plist) { - if (uintPeerChannel != 0) + if (peer_channel != 0) break; pnetwork = container_of(plist, struct wlan_network, list); @@ -3322,13 +3283,13 @@ static int rtw_p2p_prov_disc(struct net_device *dev, if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { /* Handle the P2P Device ID attribute of Beacon first */ if (!memcmp(attr_content, peerMAC, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; + peer_channel = pnetwork->network.Configuration.DSConfig; break; } } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { /* Handle the P2P Device Info attribute of probe response */ if (!memcmp(attr_content, peerMAC, ETH_ALEN)) { - uintPeerChannel = pnetwork->network.Configuration.DSConfig; + peer_channel = pnetwork->network.Configuration.DSConfig; break; } } @@ -3343,11 +3304,11 @@ static int rtw_p2p_prov_disc(struct net_device *dev, spin_unlock_bh(&pmlmepriv->scanned_queue.lock); - if (uintPeerChannel) { - DBG_88E("[%s] peer channel: %d!\n", __func__, uintPeerChannel); + if (peer_channel) { + DBG_88E("[%s] peer channel: %d!\n", __func__, peer_channel); memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN); memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN); - pwdinfo->tx_prov_disc_info.peer_channel_num[0] = (u16)uintPeerChannel; + pwdinfo->tx_prov_disc_info.peer_channel_num[0] = (u16)peer_channel; pwdinfo->tx_prov_disc_info.benable = true; rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ); @@ -3359,7 +3320,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, pwdinfo->tx_prov_disc_info.ssid.SsidLength = P2P_WILDCARD_SSID_LEN; } - set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + set_channel_bwmode(padapter, peer_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); @@ -3611,27 +3572,18 @@ static void bb_reg_dump(struct adapter *padapter) static void rf_reg_dump(struct adapter *padapter) { - int i, j = 1, path; + int i, j = 1, path = 0; u32 value; - u8 rf_type, path_nums = 0; - GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); pr_info("\n ======= RF REG =======\n"); - if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) - path_nums = 1; - else - path_nums = 2; - - for (path = 0; path < path_nums; path++) { - pr_info("\nRF_Path(%x)\n", path); - for (i = 0; i < 0x100; i++) { - value = rtl8188e_PHY_QueryRFReg(padapter, path, i, 0xffffffff); - if (j % 4 == 1) - pr_info("0x%02x ", i); - pr_info(" 0x%08x ", value); - if ((j++) % 4 == 0) - pr_info("\n"); - } + pr_info("\nRF_Path(%x)\n", path); + for (i = 0; i < 0x100; i++) { + value = rtl8188e_PHY_QueryRFReg(padapter, path, i, 0xffffffff); + if (j % 4 == 1) + pr_info("0x%02x ", i); + pr_info(" 0x%08x ", value); + if ((j++) % 4 == 0) + pr_info("\n"); } } @@ -4052,12 +4004,6 @@ static int rtw_dbg_port(struct net_device *dev, DBG_88E("turn %s the bShowGetP2PState Variable\n", (extra_arg == 1) ? "on" : "off"); padapter->bShowGetP2PState = extra_arg; break; - case 0xaa: - if (extra_arg > 0x13) - extra_arg = 0xFF; - DBG_88E("chang data rate to :0x%02x\n", extra_arg); - padapter->fix_rate = extra_arg; - break; case 0xdd:/* registers dump, 0 for mac reg, 1 for bb reg, 2 for rf reg */ if (extra_arg == 0) mac_reg_dump(padapter); @@ -4224,81 +4170,21 @@ static int rtw_pm_set(struct net_device *dev, return ret; } -extern int wifirate2_ratetbl_inx(unsigned char rate); - -static int rtw_tdls(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - return 0; -} - -static int rtw_tdls_get(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - return 0; -} - -static int rtw_test( - struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - u32 len; - u8 *pbuf, *pch; - char *ptmp; - u8 *delim = ","; - - DBG_88E("+%s\n", __func__); - len = wrqu->data.length; - - pbuf = kzalloc(len, GFP_KERNEL); - if (!pbuf) { - DBG_88E("%s: no memory!\n", __func__); - return -ENOMEM; - } - - if (copy_from_user(pbuf, wrqu->data.pointer, len)) { - kfree(pbuf); - DBG_88E("%s: copy from user fail!\n", __func__); - return -EFAULT; - } - DBG_88E("%s: string =\"%s\"\n", __func__, pbuf); - - ptmp = (char *)pbuf; - pch = strsep(&ptmp, delim); - if (!pch || strlen(pch) == 0) { - kfree(pbuf); - DBG_88E("%s: parameter error(level 1)!\n", __func__); - return -EFAULT; - } - kfree(pbuf); - return 0; -} - static iw_handler rtw_handlers[] = { IW_HANDLER(SIOCGIWNAME, rtw_wx_get_name), - IW_HANDLER(SIOCSIWNWID, dummy), - IW_HANDLER(SIOCGIWNWID, dummy), IW_HANDLER(SIOCGIWFREQ, rtw_wx_get_freq), IW_HANDLER(SIOCSIWMODE, rtw_wx_set_mode), IW_HANDLER(SIOCGIWMODE, rtw_wx_get_mode), - IW_HANDLER(SIOCSIWSENS, dummy), IW_HANDLER(SIOCGIWSENS, rtw_wx_get_sens), IW_HANDLER(SIOCGIWRANGE, rtw_wx_get_range), IW_HANDLER(SIOCSIWPRIV, rtw_wx_set_priv), - IW_HANDLER(SIOCSIWSPY, dummy), - IW_HANDLER(SIOCGIWSPY, dummy), IW_HANDLER(SIOCSIWAP, rtw_wx_set_wap), IW_HANDLER(SIOCGIWAP, rtw_wx_get_wap), IW_HANDLER(SIOCSIWMLME, rtw_wx_set_mlme), - IW_HANDLER(SIOCGIWAPLIST, dummy), IW_HANDLER(SIOCSIWSCAN, rtw_wx_set_scan), IW_HANDLER(SIOCGIWSCAN, rtw_wx_get_scan), IW_HANDLER(SIOCSIWESSID, rtw_wx_set_essid), IW_HANDLER(SIOCGIWESSID, rtw_wx_get_essid), - IW_HANDLER(SIOCSIWNICKN, dummy), IW_HANDLER(SIOCGIWNICKN, rtw_wx_get_nick), IW_HANDLER(SIOCSIWRATE, rtw_wx_set_rate), IW_HANDLER(SIOCGIWRATE, rtw_wx_get_rate), @@ -4306,13 +4192,9 @@ static iw_handler rtw_handlers[] = { IW_HANDLER(SIOCGIWRTS, rtw_wx_get_rts), IW_HANDLER(SIOCSIWFRAG, rtw_wx_set_frag), IW_HANDLER(SIOCGIWFRAG, rtw_wx_get_frag), - IW_HANDLER(SIOCSIWTXPOW, dummy), - IW_HANDLER(SIOCGIWTXPOW, dummy), - IW_HANDLER(SIOCSIWRETRY, dummy), IW_HANDLER(SIOCGIWRETRY, rtw_wx_get_retry), IW_HANDLER(SIOCSIWENCODE, rtw_wx_set_enc), IW_HANDLER(SIOCGIWENCODE, rtw_wx_get_enc), - IW_HANDLER(SIOCSIWPOWER, dummy), IW_HANDLER(SIOCGIWPOWER, rtw_wx_get_power), IW_HANDLER(SIOCSIWGENIE, rtw_wx_set_gen_ie), IW_HANDLER(SIOCSIWAUTH, rtw_wx_set_auth), @@ -4334,9 +4216,6 @@ static const struct iw_priv_args rtw_private_args[] = { SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext" }, { - SIOCIWFIRSTPRIV + 0x3, 0, 0, "mp_ioctl" - }, - { SIOCIWFIRSTPRIV + 0x4, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" }, @@ -4349,19 +4228,6 @@ static const struct iw_priv_args rtw_private_args[] = { IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start" }, { - SIOCIWFIRSTPRIV + 0x7, - IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity" - }, - { - SIOCIWFIRSTPRIV + 0x8, - IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie" - }, - { - SIOCIWFIRSTPRIV + 0x9, - IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie" - }, - - { SIOCIWFIRSTPRIV + 0xA, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan" }, @@ -4390,33 +4256,18 @@ static const struct iw_priv_args rtw_private_args[] = { SIOCIWFIRSTPRIV + 0x12, IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IFNAMSIZ, "p2p_get2" }, - {SIOCIWFIRSTPRIV + 0x13, IW_PRIV_TYPE_CHAR | 128, 0, "NULL"}, - { - SIOCIWFIRSTPRIV + 0x14, - IW_PRIV_TYPE_CHAR | 64, 0, "tdls" - }, - { - SIOCIWFIRSTPRIV + 0x15, - IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | P2P_PRIVATE_IOCTL_SET_LEN, "tdls_get" - }, { SIOCIWFIRSTPRIV + 0x16, IW_PRIV_TYPE_CHAR | 64, 0, "pm_set" }, {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ, 0, "rereg_nd_name"}, - - {SIOCIWFIRSTPRIV + 0x1D, IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test" - }, - - {SIOCIWFIRSTPRIV + 0x0E, IW_PRIV_TYPE_CHAR | 1024, 0, ""}, /* set */ - {SIOCIWFIRSTPRIV + 0x0F, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, ""},/* get */ }; static iw_handler rtw_private_handler[] = { rtw_wx_write32, /* 0x00 */ rtw_wx_read32, /* 0x01 */ -rtw_drvext_hdl, /* 0x02 */ + NULL, /* 0x02 */ NULL, /* 0x03 */ /* for MM DTV platform */ rtw_get_ap_info, /* 0x04 */ @@ -4424,9 +4275,9 @@ NULL, /* 0x03 */ rtw_set_pid, /* 0x05 */ rtw_wps_start, /* 0x06 */ - rtw_wx_get_sensitivity, /* 0x07 */ - rtw_wx_set_mtk_wps_probe_ie, /* 0x08 */ - rtw_wx_set_mtk_wps_ie, /* 0x09 */ + NULL, /* 0x07 */ + NULL, /* 0x08 */ + NULL, /* 0x09 */ /* Set Channel depend on the country code */ rtw_wx_set_channel_plan, /* 0x0A */ @@ -4442,18 +4293,12 @@ NULL, /* 0x03 */ rtw_p2p_get2, /* 0x12 */ NULL, /* 0x13 */ - rtw_tdls, /* 0x14 */ - rtw_tdls_get, /* 0x15 */ + NULL, /* 0x14 */ + NULL, /* 0x15 */ rtw_pm_set, /* 0x16 */ - rtw_wx_priv_null, /* 0x17 */ + NULL, /* 0x17 */ rtw_rereg_nd_name, /* 0x18 */ - rtw_wx_priv_null, /* 0x19 */ - - NULL, /* 0x1A */ - NULL, /* 0x1B */ - NULL, /* 0x1C is reserved for hostapd */ - rtw_test, /* 0x1D */ }; static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) diff --git a/drivers/staging/r8188eu/os_dep/mlme_linux.c b/drivers/staging/r8188eu/os_dep/mlme_linux.c index a9b6ffdbf31a..f7ce724ebf87 100644 --- a/drivers/staging/r8188eu/os_dep/mlme_linux.c +++ b/drivers/staging/r8188eu/os_dep/mlme_linux.c @@ -112,7 +112,7 @@ void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) buff = NULL; if (authmode == _WPA_IE_ID_) { - buff = kzalloc(IW_CUSTOM_MAX, GFP_KERNEL); + buff = kzalloc(IW_CUSTOM_MAX, GFP_ATOMIC); if (!buff) return; p = buff; diff --git a/drivers/staging/r8188eu/os_dep/os_intfs.c b/drivers/staging/r8188eu/os_dep/os_intfs.c index 10059240bf54..b65e44f97826 100644 --- a/drivers/staging/r8188eu/os_dep/os_intfs.c +++ b/drivers/staging/r8188eu/os_dep/os_intfs.c @@ -11,7 +11,7 @@ #include "../include/rtw_ioctl.h" #include "../include/usb_osintf.h" #include "../include/rtw_br_ext.h" -#include "../include/rtl8188e_led.h" +#include "../include/rtw_led.h" #include "../include/rtl8188e_dm.h" MODULE_LICENSE("GPL"); @@ -75,7 +75,6 @@ static int rtw_ampdu_amsdu;/* 0: disabled, 1:enabled, 2:auto */ static int rtw_lowrate_two_xmit = 1;/* Use 2 path Tx to transmit MCS0~7 and legacy mode */ -static int rtw_rf_config = RF_819X_MAX_TYPE; /* auto */ static int rtw_low_power; static int rtw_wifi_spec; static int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; @@ -123,7 +122,6 @@ module_param(rtw_ampdu_enable, int, 0644); module_param(rtw_rx_stbc, int, 0644); module_param(rtw_ampdu_amsdu, int, 0644); module_param(rtw_lowrate_two_xmit, int, 0644); -module_param(rtw_rf_config, int, 0644); module_param(rtw_power_mgnt, int, 0644); module_param(rtw_smart_ps, int, 0644); module_param(rtw_low_power, int, 0644); @@ -153,7 +151,7 @@ MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P") module_param_named(debug, rtw_debug, int, 0444); MODULE_PARM_DESC(debug, "Set debug level (1-9) (default 1)"); -static uint loadparam(struct adapter *padapter, struct net_device *pnetdev) +static uint loadparam(struct adapter *padapter) { struct registry_priv *registry_par = &padapter->registrypriv; @@ -205,7 +203,6 @@ static uint loadparam(struct adapter *padapter, struct net_device *pnetdev) registry_par->rx_stbc = (u8)rtw_rx_stbc; registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu; registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; - registry_par->rf_config = (u8)rtw_rf_config; registry_par->low_power = (u8)rtw_low_power; registry_par->wifi_spec = (u8)rtw_wifi_spec; registry_par->channel_plan = (u8)rtw_channel_plan; @@ -371,7 +368,7 @@ struct net_device *rtw_init_netdev(struct adapter *old_padapter) pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; /* step 2. */ - loadparam(padapter, pnetdev); + loadparam(padapter); return pnetdev; } @@ -399,7 +396,7 @@ void rtw_stop_drv_threads(struct adapter *padapter) wait_for_completion(&padapter->cmdpriv.stop_cmd_thread); } -static u8 rtw_init_default_value(struct adapter *padapter) +static void rtw_init_default_value(struct adapter *padapter) { struct registry_priv *pregistrypriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -444,7 +441,6 @@ static u8 rtw_init_default_value(struct adapter *padapter) padapter->bRxRSSIDisplay = 0; padapter->bNotifyChannelChange = 0; padapter->bShowGetP2PState = 1; - return _SUCCESS; } u8 rtw_reset_drv_sw(struct adapter *padapter) @@ -478,50 +474,37 @@ u8 rtw_reset_drv_sw(struct adapter *padapter) u8 rtw_init_drv_sw(struct adapter *padapter) { - u8 ret8 = _SUCCESS; - - if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) { - ret8 = _FAIL; - goto exit; - } + if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) + return _FAIL; padapter->cmdpriv.padapter = padapter; - if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) { - ret8 = _FAIL; - goto exit; - } + if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) + return _FAIL; - if (rtw_init_mlme_priv(padapter) == _FAIL) { - ret8 = _FAIL; - goto exit; - } + if (rtw_init_mlme_priv(padapter) == _FAIL) + return _FAIL; rtw_init_wifidirect_timers(padapter); init_wifidirect_info(padapter, P2P_ROLE_DISABLE); reset_global_wifidirect_info(padapter); - if (init_mlme_ext_priv(padapter) == _FAIL) { - ret8 = _FAIL; - goto exit; - } + if (init_mlme_ext_priv(padapter) == _FAIL) + return _FAIL; if (_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) { DBG_88E("Can't _rtw_init_xmit_priv\n"); - ret8 = _FAIL; - goto exit; + return _FAIL; } if (_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) { DBG_88E("Can't _rtw_init_recv_priv\n"); - ret8 = _FAIL; - goto exit; + return _FAIL; } if (_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) { DBG_88E("Can't _rtw_init_sta_priv\n"); - ret8 = _FAIL; - goto exit; + return _FAIL; } padapter->stapriv.padapter = padapter; @@ -530,15 +513,14 @@ u8 rtw_init_drv_sw(struct adapter *padapter) rtw_init_pwrctrl_priv(padapter); - ret8 = rtw_init_default_value(padapter); + rtw_init_default_value(padapter); rtl8188e_init_dm_priv(padapter); rtl8188eu_InitSwLeds(padapter); spin_lock_init(&padapter->br_ext_lock); -exit: - return ret8; + return _SUCCESS; } void rtw_cancel_all_timer(struct adapter *padapter) @@ -585,8 +567,6 @@ u8 rtw_free_drv_sw(struct adapter *padapter) _rtw_free_recv_priv(&padapter->recvpriv); - rtl8188e_free_hal_data(padapter); - /* free the old_pnetdev */ if (padapter->rereg_nd_name_priv.old_pnetdev) { free_netdev(padapter->rereg_nd_name_priv.old_pnetdev); @@ -775,26 +755,11 @@ void rtw_ips_dev_unload(struct adapter *padapter) rtw_hal_deinit(padapter); } -int pm_netdev_open(struct net_device *pnetdev, u8 bnormal) -{ - int status; - - if (bnormal) - status = netdev_open(pnetdev); - else - status = (_SUCCESS == ips_netdrv_open((struct adapter *)rtw_netdev_priv(pnetdev))) ? (0) : (-1); - return status; -} - int netdev_close(struct net_device *pnetdev) { struct adapter *padapter = (struct adapter *)rtw_netdev_priv(pnetdev); struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - if (padapter->pwrctrlpriv.bInternalAutoSuspend) { - if (padapter->pwrctrlpriv.rf_pwrstate == rf_off) - padapter->pwrctrlpriv.ps_flag = true; - } padapter->net_closed = true; if (padapter->pwrctrlpriv.rf_pwrstate == rf_on) { diff --git a/drivers/staging/r8188eu/os_dep/usb_intf.c b/drivers/staging/r8188eu/os_dep/usb_intf.c index 5a35d9fe3fc9..91792dfd3bbe 100644 --- a/drivers/staging/r8188eu/os_dep/usb_intf.c +++ b/drivers/staging/r8188eu/os_dep/usb_intf.c @@ -29,13 +29,12 @@ static struct usb_device_id rtw_usb_id_tbl[] = { /*=== Realtek demoboard ===*/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8179)}, /* 8188EUS */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0179)}, /* 8188ETV */ - {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xf179)}, /* 8188FU */ /*=== Customer ID ===*/ /****** 8188EUS ********/ {USB_DEVICE(0x07B8, 0x8179)}, /* Abocom - Abocom */ {USB_DEVICE(0x0DF6, 0x0076)}, /* Sitecom N150 v2 */ {USB_DEVICE(0x2001, 0x330F)}, /* DLink DWA-125 REV D1 */ - {USB_DEVICE(0x2001, 0x3310)}, /* Dlink DWA-123 REV D1 */ + {USB_DEVICE(0x2001, 0x3310)}, /* Dlink DWA-123 REV D1 */ {USB_DEVICE(0x2001, 0x3311)}, /* DLink GO-USB-N150 REV B1 */ {USB_DEVICE(0x2001, 0x331B)}, /* D-Link DWA-121 rev B1 */ {USB_DEVICE(0x056E, 0x4008)}, /* Elecom WDC-150SU2M */ @@ -70,6 +69,7 @@ static struct rtw_usb_drv *usb_drv = &rtl8188e_usb_drv; static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) { int i; + u8 rt_num_in_pipes = 0; struct dvobj_priv *pdvobjpriv; struct usb_host_config *phost_conf; struct usb_config_descriptor *pconf_desc; @@ -80,14 +80,13 @@ static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) pdvobjpriv = kzalloc(sizeof(*pdvobjpriv), GFP_KERNEL); if (!pdvobjpriv) - goto exit; + goto err; pdvobjpriv->pusbintf = usb_intf; pusbd = interface_to_usbdev(usb_intf); pdvobjpriv->pusbdev = pusbd; usb_set_intfdata(usb_intf, pdvobjpriv); - pdvobjpriv->RtNumInPipes = 0; pdvobjpriv->RtNumOutPipes = 0; phost_conf = pusbd->actconfig; @@ -98,28 +97,26 @@ static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces; pdvobjpriv->InterfaceNumber = piface_desc->bInterfaceNumber; - pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; - for (i = 0; i < pdvobjpriv->nr_endpoint; i++) { + for (i = 0; i < piface_desc->bNumEndpoints; i++) { int ep_num; pendp_desc = &phost_iface->endpoint[i].desc; ep_num = usb_endpoint_num(pendp_desc); if (usb_endpoint_is_bulk_in(pendp_desc)) { - pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] = ep_num; - pdvobjpriv->RtNumInPipes++; - } else if (usb_endpoint_is_int_in(pendp_desc)) { - pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] = ep_num; - pdvobjpriv->RtNumInPipes++; + pdvobjpriv->RtInPipe = ep_num; + rt_num_in_pipes++; } else if (usb_endpoint_is_bulk_out(pendp_desc)) { pdvobjpriv->RtOutPipe[pdvobjpriv->RtNumOutPipes] = ep_num; pdvobjpriv->RtNumOutPipes++; } - pdvobjpriv->ep_num[i] = ep_num; } + if (rt_num_in_pipes != 1) + goto err; + if (pusbd->speed == USB_SPEED_HIGH) { pdvobjpriv->ishighspeed = true; DBG_88E("USB_SPEED_HIGH\n"); @@ -133,9 +130,11 @@ static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) rtw_reset_continual_urb_error(pdvobjpriv); usb_get_dev(pusbd); - -exit: return pdvobjpriv; + +err: + kfree(pdvobjpriv); + return NULL; } static void usb_dvobj_deinit(struct usb_interface *usb_intf) @@ -193,8 +192,7 @@ static void rtw_dev_unload(struct adapter *padapter) if (padapter->intf_stop) padapter->intf_stop(padapter); /* s4. */ - if (!padapter->pwrctrlpriv.bInternalAutoSuspend) - rtw_stop_drv_threads(padapter); + rtw_stop_drv_threads(padapter); /* s5. */ if (!padapter->bSurpriseRemoved) { @@ -298,7 +296,7 @@ static int rtw_resume(struct usb_interface *pusb_intf) pwrpriv->bkeepfwalive = false; DBG_88E("bkeepfwalive(%x)\n", pwrpriv->bkeepfwalive); - if (pm_netdev_open(pnetdev, true) != 0) { + if (netdev_open(pnetdev) != 0) { mutex_unlock(&pwrpriv->lock); goto exit; } @@ -362,9 +360,6 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); padapter = rtw_netdev_priv(pnetdev); - /* step 2. allocate HalData */ - rtl8188eu_alloc_haldata(padapter); - padapter->intf_start = &usb_intf_start; padapter->intf_stop = &usb_intf_stop; @@ -386,7 +381,7 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, /* step 5. */ if (rtw_init_drv_sw(padapter) == _FAIL) - goto free_hal_data; + goto handle_dualmac; #ifdef CONFIG_PM if (padapter->pwrctrlpriv.bSupportRemoteWakeup) { @@ -414,7 +409,7 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, /* step 6. Tell the network stack we exist */ if (register_netdev(pnetdev) != 0) - goto free_hal_data; + goto handle_dualmac; DBG_88E("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" , padapter->bDriverStopped @@ -425,9 +420,6 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, status = _SUCCESS; -free_hal_data: - if (status != _SUCCESS) - kfree(padapter->HalData); handle_dualmac: if (status != _SUCCESS) rtw_handle_dualmac(padapter, 0); diff --git a/drivers/staging/r8188eu/os_dep/usb_ops_linux.c b/drivers/staging/r8188eu/os_dep/usb_ops_linux.c index ef2ea68ae873..d1cb33d3e6a7 100644 --- a/drivers/staging/r8188eu/os_dep/usb_ops_linux.c +++ b/drivers/staging/r8188eu/os_dep/usb_ops_linux.c @@ -12,11 +12,7 @@ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) unsigned int pipe = 0, ep_num = 0; struct usb_device *pusbd = pdvobj->pusbdev; - if (addr == RECV_BULK_IN_ADDR) { - pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[0]); - } else if (addr == RECV_INT_IN_ADDR) { - pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[1]); - } else if (addr < HW_QUEUE_ENTRY) { + if (addr < HW_QUEUE_ENTRY) { ep_num = pdvobj->Queue2Pipe[addr]; pipe = usb_sndbulkpipe(pusbd, ep_num); } diff --git a/drivers/staging/ralink-gdma/Kconfig b/drivers/staging/ralink-gdma/Kconfig deleted file mode 100644 index 0017376234e2..000000000000 --- a/drivers/staging/ralink-gdma/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config DMA_RALINK - tristate "RALINK DMA support" - depends on RALINK && !SOC_RT288X - depends on DMADEVICES - select DMA_ENGINE - select DMA_VIRTUAL_CHANNELS - diff --git a/drivers/staging/ralink-gdma/Makefile b/drivers/staging/ralink-gdma/Makefile deleted file mode 100644 index 5c4566b2e405..000000000000 --- a/drivers/staging/ralink-gdma/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_DMA_RALINK) += ralink-gdma.o - -ccflags-y += -I$(srctree)/drivers/dma diff --git a/drivers/staging/ralink-gdma/ralink-gdma.c b/drivers/staging/ralink-gdma/ralink-gdma.c deleted file mode 100644 index b5229bc6eae5..000000000000 --- a/drivers/staging/ralink-gdma/ralink-gdma.c +++ /dev/null @@ -1,917 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * GDMA4740 DMAC support - */ - -#include <linux/dmaengine.h> -#include <linux/dma-mapping.h> -#include <linux/err.h> -#include <linux/init.h> -#include <linux/list.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/irq.h> -#include <linux/of_dma.h> -#include <linux/reset.h> -#include <linux/of_device.h> - -#include "virt-dma.h" - -#define GDMA_REG_SRC_ADDR(x) (0x00 + (x) * 0x10) -#define GDMA_REG_DST_ADDR(x) (0x04 + (x) * 0x10) - -#define GDMA_REG_CTRL0(x) (0x08 + (x) * 0x10) -#define GDMA_REG_CTRL0_TX_MASK 0xffff -#define GDMA_REG_CTRL0_TX_SHIFT 16 -#define GDMA_REG_CTRL0_CURR_MASK 0xff -#define GDMA_REG_CTRL0_CURR_SHIFT 8 -#define GDMA_REG_CTRL0_SRC_ADDR_FIXED BIT(7) -#define GDMA_REG_CTRL0_DST_ADDR_FIXED BIT(6) -#define GDMA_REG_CTRL0_BURST_MASK 0x7 -#define GDMA_REG_CTRL0_BURST_SHIFT 3 -#define GDMA_REG_CTRL0_DONE_INT BIT(2) -#define GDMA_REG_CTRL0_ENABLE BIT(1) -#define GDMA_REG_CTRL0_SW_MODE BIT(0) - -#define GDMA_REG_CTRL1(x) (0x0c + (x) * 0x10) -#define GDMA_REG_CTRL1_SEG_MASK 0xf -#define GDMA_REG_CTRL1_SEG_SHIFT 22 -#define GDMA_REG_CTRL1_REQ_MASK 0x3f -#define GDMA_REG_CTRL1_SRC_REQ_SHIFT 16 -#define GDMA_REG_CTRL1_DST_REQ_SHIFT 8 -#define GDMA_REG_CTRL1_NEXT_MASK 0x1f -#define GDMA_REG_CTRL1_NEXT_SHIFT 3 -#define GDMA_REG_CTRL1_COHERENT BIT(2) -#define GDMA_REG_CTRL1_FAIL BIT(1) -#define GDMA_REG_CTRL1_MASK BIT(0) - -#define GDMA_REG_UNMASK_INT 0x200 -#define GDMA_REG_DONE_INT 0x204 - -#define GDMA_REG_GCT 0x220 -#define GDMA_REG_GCT_CHAN_MASK 0x3 -#define GDMA_REG_GCT_CHAN_SHIFT 3 -#define GDMA_REG_GCT_VER_MASK 0x3 -#define GDMA_REG_GCT_VER_SHIFT 1 -#define GDMA_REG_GCT_ARBIT_RR BIT(0) - -#define GDMA_REG_REQSTS 0x2a0 -#define GDMA_REG_ACKSTS 0x2a4 -#define GDMA_REG_FINSTS 0x2a8 - -/* for RT305X gdma registers */ -#define GDMA_RT305X_CTRL0_REQ_MASK 0xf -#define GDMA_RT305X_CTRL0_SRC_REQ_SHIFT 12 -#define GDMA_RT305X_CTRL0_DST_REQ_SHIFT 8 - -#define GDMA_RT305X_CTRL1_FAIL BIT(4) -#define GDMA_RT305X_CTRL1_NEXT_MASK 0x7 -#define GDMA_RT305X_CTRL1_NEXT_SHIFT 1 - -#define GDMA_RT305X_STATUS_INT 0x80 -#define GDMA_RT305X_STATUS_SIGNAL 0x84 -#define GDMA_RT305X_GCT 0x88 - -/* for MT7621 gdma registers */ -#define GDMA_REG_PERF_START(x) (0x230 + (x) * 0x8) -#define GDMA_REG_PERF_END(x) (0x234 + (x) * 0x8) - -enum gdma_dma_transfer_size { - GDMA_TRANSFER_SIZE_4BYTE = 0, - GDMA_TRANSFER_SIZE_8BYTE = 1, - GDMA_TRANSFER_SIZE_16BYTE = 2, - GDMA_TRANSFER_SIZE_32BYTE = 3, - GDMA_TRANSFER_SIZE_64BYTE = 4, -}; - -struct gdma_dma_sg { - dma_addr_t src_addr; - dma_addr_t dst_addr; - u32 len; -}; - -struct gdma_dma_desc { - struct virt_dma_desc vdesc; - - enum dma_transfer_direction direction; - bool cyclic; - - u32 residue; - unsigned int num_sgs; - struct gdma_dma_sg sg[]; -}; - -struct gdma_dmaengine_chan { - struct virt_dma_chan vchan; - unsigned int id; - unsigned int slave_id; - - dma_addr_t fifo_addr; - enum gdma_dma_transfer_size burst_size; - - struct gdma_dma_desc *desc; - unsigned int next_sg; -}; - -struct gdma_dma_dev { - struct dma_device ddev; - struct device_dma_parameters dma_parms; - struct gdma_data *data; - void __iomem *base; - struct tasklet_struct task; - volatile unsigned long chan_issued; - atomic_t cnt; - - struct gdma_dmaengine_chan chan[]; -}; - -struct gdma_data { - int chancnt; - u32 done_int_reg; - void (*init)(struct gdma_dma_dev *dma_dev); - int (*start_transfer)(struct gdma_dmaengine_chan *chan); -}; - -static struct gdma_dma_dev *gdma_dma_chan_get_dev( - struct gdma_dmaengine_chan *chan) -{ - return container_of(chan->vchan.chan.device, struct gdma_dma_dev, - ddev); -} - -static struct gdma_dmaengine_chan *to_gdma_dma_chan(struct dma_chan *c) -{ - return container_of(c, struct gdma_dmaengine_chan, vchan.chan); -} - -static struct gdma_dma_desc *to_gdma_dma_desc(struct virt_dma_desc *vdesc) -{ - return container_of(vdesc, struct gdma_dma_desc, vdesc); -} - -static inline uint32_t gdma_dma_read(struct gdma_dma_dev *dma_dev, - unsigned int reg) -{ - return readl(dma_dev->base + reg); -} - -static inline void gdma_dma_write(struct gdma_dma_dev *dma_dev, - unsigned int reg, uint32_t val) -{ - writel(val, dma_dev->base + reg); -} - -static enum gdma_dma_transfer_size gdma_dma_maxburst(u32 maxburst) -{ - if (maxburst < 2) - return GDMA_TRANSFER_SIZE_4BYTE; - else if (maxburst < 4) - return GDMA_TRANSFER_SIZE_8BYTE; - else if (maxburst < 8) - return GDMA_TRANSFER_SIZE_16BYTE; - else if (maxburst < 16) - return GDMA_TRANSFER_SIZE_32BYTE; - else - return GDMA_TRANSFER_SIZE_64BYTE; -} - -static int gdma_dma_config(struct dma_chan *c, - struct dma_slave_config *config) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan); - - if (config->device_fc) { - dev_err(dma_dev->ddev.dev, "not support flow controller\n"); - return -EINVAL; - } - - switch (config->direction) { - case DMA_MEM_TO_DEV: - if (config->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) { - dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n"); - return -EINVAL; - } - chan->slave_id = config->slave_id; - chan->fifo_addr = config->dst_addr; - chan->burst_size = gdma_dma_maxburst(config->dst_maxburst); - break; - case DMA_DEV_TO_MEM: - if (config->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) { - dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n"); - return -EINVAL; - } - chan->slave_id = config->slave_id; - chan->fifo_addr = config->src_addr; - chan->burst_size = gdma_dma_maxburst(config->src_maxburst); - break; - default: - dev_err(dma_dev->ddev.dev, "direction type %d error\n", - config->direction); - return -EINVAL; - } - - return 0; -} - -static int gdma_dma_terminate_all(struct dma_chan *c) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan); - unsigned long flags, timeout; - LIST_HEAD(head); - int i = 0; - - spin_lock_irqsave(&chan->vchan.lock, flags); - chan->desc = NULL; - clear_bit(chan->id, &dma_dev->chan_issued); - vchan_get_all_descriptors(&chan->vchan, &head); - spin_unlock_irqrestore(&chan->vchan.lock, flags); - - vchan_dma_desc_free_list(&chan->vchan, &head); - - /* wait dma transfer complete */ - timeout = jiffies + msecs_to_jiffies(5000); - while (gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id)) & - GDMA_REG_CTRL0_ENABLE) { - if (time_after_eq(jiffies, timeout)) { - dev_err(dma_dev->ddev.dev, "chan %d wait timeout\n", - chan->id); - /* restore to init value */ - gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), 0); - break; - } - cpu_relax(); - i++; - } - - if (i) - dev_dbg(dma_dev->ddev.dev, "terminate chan %d loops %d\n", - chan->id, i); - - return 0; -} - -static void rt305x_dump_reg(struct gdma_dma_dev *dma_dev, int id) -{ - dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, ctr1 %08x, intr %08x, signal %08x\n", - id, - gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)), - gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)), - gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)), - gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)), - gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_INT), - gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_SIGNAL)); -} - -static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan) -{ - struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan); - dma_addr_t src_addr, dst_addr; - struct gdma_dma_sg *sg; - u32 ctrl0, ctrl1; - - /* verify chan is already stopped */ - ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id)); - if (unlikely(ctrl0 & GDMA_REG_CTRL0_ENABLE)) { - dev_err(dma_dev->ddev.dev, "chan %d is start(%08x).\n", - chan->id, ctrl0); - rt305x_dump_reg(dma_dev, chan->id); - return -EINVAL; - } - - sg = &chan->desc->sg[chan->next_sg]; - if (chan->desc->direction == DMA_MEM_TO_DEV) { - src_addr = sg->src_addr; - dst_addr = chan->fifo_addr; - ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED | - (8 << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | - (chan->slave_id << GDMA_RT305X_CTRL0_DST_REQ_SHIFT); - } else if (chan->desc->direction == DMA_DEV_TO_MEM) { - src_addr = chan->fifo_addr; - dst_addr = sg->dst_addr; - ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED | - (chan->slave_id << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | - (8 << GDMA_RT305X_CTRL0_DST_REQ_SHIFT); - } else if (chan->desc->direction == DMA_MEM_TO_MEM) { - /* - * TODO: memcpy function have bugs. sometime it will copy - * more 8 bytes data when using dmatest verify. - */ - src_addr = sg->src_addr; - dst_addr = sg->dst_addr; - ctrl0 = GDMA_REG_CTRL0_SW_MODE | - (8 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | - (8 << GDMA_REG_CTRL1_DST_REQ_SHIFT); - } else { - dev_err(dma_dev->ddev.dev, "direction type %d error\n", - chan->desc->direction); - return -EINVAL; - } - - ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | - (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | - GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE; - ctrl1 = chan->id << GDMA_REG_CTRL1_NEXT_SHIFT; - - chan->next_sg++; - gdma_dma_write(dma_dev, GDMA_REG_SRC_ADDR(chan->id), src_addr); - gdma_dma_write(dma_dev, GDMA_REG_DST_ADDR(chan->id), dst_addr); - gdma_dma_write(dma_dev, GDMA_REG_CTRL1(chan->id), ctrl1); - - /* make sure next_sg is update */ - wmb(); - gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), ctrl0); - - return 0; -} - -static void rt3883_dump_reg(struct gdma_dma_dev *dma_dev, int id) -{ - dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, ctr1 %08x, unmask %08x, done %08x, req %08x, ack %08x, fin %08x\n", - id, - gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)), - gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)), - gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)), - gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)), - gdma_dma_read(dma_dev, GDMA_REG_UNMASK_INT), - gdma_dma_read(dma_dev, GDMA_REG_DONE_INT), - gdma_dma_read(dma_dev, GDMA_REG_REQSTS), - gdma_dma_read(dma_dev, GDMA_REG_ACKSTS), - gdma_dma_read(dma_dev, GDMA_REG_FINSTS)); -} - -static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan) -{ - struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan); - dma_addr_t src_addr, dst_addr; - struct gdma_dma_sg *sg; - u32 ctrl0, ctrl1; - - /* verify chan is already stopped */ - ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id)); - if (unlikely(ctrl0 & GDMA_REG_CTRL0_ENABLE)) { - dev_err(dma_dev->ddev.dev, "chan %d is start(%08x).\n", - chan->id, ctrl0); - rt3883_dump_reg(dma_dev, chan->id); - return -EINVAL; - } - - sg = &chan->desc->sg[chan->next_sg]; - if (chan->desc->direction == DMA_MEM_TO_DEV) { - src_addr = sg->src_addr; - dst_addr = chan->fifo_addr; - ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED; - ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | - (chan->slave_id << GDMA_REG_CTRL1_DST_REQ_SHIFT); - } else if (chan->desc->direction == DMA_DEV_TO_MEM) { - src_addr = chan->fifo_addr; - dst_addr = sg->dst_addr; - ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED; - ctrl1 = (chan->slave_id << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | - (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | - GDMA_REG_CTRL1_COHERENT; - } else if (chan->desc->direction == DMA_MEM_TO_MEM) { - src_addr = sg->src_addr; - dst_addr = sg->dst_addr; - ctrl0 = GDMA_REG_CTRL0_SW_MODE; - ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | - (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | - GDMA_REG_CTRL1_COHERENT; - } else { - dev_err(dma_dev->ddev.dev, "direction type %d error\n", - chan->desc->direction); - return -EINVAL; - } - - ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | - (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | - GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE; - ctrl1 |= chan->id << GDMA_REG_CTRL1_NEXT_SHIFT; - - chan->next_sg++; - gdma_dma_write(dma_dev, GDMA_REG_SRC_ADDR(chan->id), src_addr); - gdma_dma_write(dma_dev, GDMA_REG_DST_ADDR(chan->id), dst_addr); - gdma_dma_write(dma_dev, GDMA_REG_CTRL1(chan->id), ctrl1); - - /* make sure next_sg is update */ - wmb(); - gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), ctrl0); - - return 0; -} - -static inline int gdma_start_transfer(struct gdma_dma_dev *dma_dev, - struct gdma_dmaengine_chan *chan) -{ - return dma_dev->data->start_transfer(chan); -} - -static int gdma_next_desc(struct gdma_dmaengine_chan *chan) -{ - struct virt_dma_desc *vdesc; - - vdesc = vchan_next_desc(&chan->vchan); - if (!vdesc) { - chan->desc = NULL; - return 0; - } - chan->desc = to_gdma_dma_desc(vdesc); - chan->next_sg = 0; - - return 1; -} - -static void gdma_dma_chan_irq(struct gdma_dma_dev *dma_dev, - struct gdma_dmaengine_chan *chan) -{ - struct gdma_dma_desc *desc; - unsigned long flags; - int chan_issued; - - chan_issued = 0; - spin_lock_irqsave(&chan->vchan.lock, flags); - desc = chan->desc; - if (desc) { - if (desc->cyclic) { - vchan_cyclic_callback(&desc->vdesc); - if (chan->next_sg == desc->num_sgs) - chan->next_sg = 0; - chan_issued = 1; - } else { - desc->residue -= desc->sg[chan->next_sg - 1].len; - if (chan->next_sg == desc->num_sgs) { - list_del(&desc->vdesc.node); - vchan_cookie_complete(&desc->vdesc); - chan_issued = gdma_next_desc(chan); - } else { - chan_issued = 1; - } - } - } else { - dev_dbg(dma_dev->ddev.dev, "chan %d no desc to complete\n", - chan->id); - } - if (chan_issued) - set_bit(chan->id, &dma_dev->chan_issued); - spin_unlock_irqrestore(&chan->vchan.lock, flags); -} - -static irqreturn_t gdma_dma_irq(int irq, void *devid) -{ - struct gdma_dma_dev *dma_dev = devid; - u32 done, done_reg; - unsigned int i; - - done_reg = dma_dev->data->done_int_reg; - done = gdma_dma_read(dma_dev, done_reg); - if (unlikely(!done)) - return IRQ_NONE; - - /* clean done bits */ - gdma_dma_write(dma_dev, done_reg, done); - - i = 0; - while (done) { - if (done & 0x1) { - gdma_dma_chan_irq(dma_dev, &dma_dev->chan[i]); - atomic_dec(&dma_dev->cnt); - } - done >>= 1; - i++; - } - - /* start only have work to do */ - if (dma_dev->chan_issued) - tasklet_schedule(&dma_dev->task); - - return IRQ_HANDLED; -} - -static void gdma_dma_issue_pending(struct dma_chan *c) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan); - unsigned long flags; - - spin_lock_irqsave(&chan->vchan.lock, flags); - if (vchan_issue_pending(&chan->vchan) && !chan->desc) { - if (gdma_next_desc(chan)) { - set_bit(chan->id, &dma_dev->chan_issued); - tasklet_schedule(&dma_dev->task); - } else { - dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n", - chan->id); - } - } - spin_unlock_irqrestore(&chan->vchan.lock, flags); -} - -static struct dma_async_tx_descriptor *gdma_dma_prep_slave_sg( - struct dma_chan *c, struct scatterlist *sgl, - unsigned int sg_len, enum dma_transfer_direction direction, - unsigned long flags, void *context) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_desc *desc; - struct scatterlist *sg; - unsigned int i; - - desc = kzalloc(struct_size(desc, sg, sg_len), GFP_ATOMIC); - if (!desc) { - dev_err(c->device->dev, "alloc sg decs error\n"); - return NULL; - } - desc->residue = 0; - - for_each_sg(sgl, sg, sg_len, i) { - if (direction == DMA_MEM_TO_DEV) { - desc->sg[i].src_addr = sg_dma_address(sg); - } else if (direction == DMA_DEV_TO_MEM) { - desc->sg[i].dst_addr = sg_dma_address(sg); - } else { - dev_err(c->device->dev, "direction type %d error\n", - direction); - goto free_desc; - } - - if (unlikely(sg_dma_len(sg) > GDMA_REG_CTRL0_TX_MASK)) { - dev_err(c->device->dev, "sg len too large %d\n", - sg_dma_len(sg)); - goto free_desc; - } - desc->sg[i].len = sg_dma_len(sg); - desc->residue += sg_dma_len(sg); - } - - desc->num_sgs = sg_len; - desc->direction = direction; - desc->cyclic = false; - - return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); - -free_desc: - kfree(desc); - return NULL; -} - -static struct dma_async_tx_descriptor *gdma_dma_prep_dma_memcpy( - struct dma_chan *c, dma_addr_t dest, dma_addr_t src, - size_t len, unsigned long flags) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_desc *desc; - unsigned int num_periods, i; - size_t xfer_count; - - if (len <= 0) - return NULL; - - chan->burst_size = gdma_dma_maxburst(len >> 2); - - xfer_count = GDMA_REG_CTRL0_TX_MASK; - num_periods = DIV_ROUND_UP(len, xfer_count); - - desc = kzalloc(struct_size(desc, sg, num_periods), GFP_ATOMIC); - if (!desc) { - dev_err(c->device->dev, "alloc memcpy decs error\n"); - return NULL; - } - desc->residue = len; - - for (i = 0; i < num_periods; i++) { - desc->sg[i].src_addr = src; - desc->sg[i].dst_addr = dest; - if (len > xfer_count) - desc->sg[i].len = xfer_count; - else - desc->sg[i].len = len; - src += desc->sg[i].len; - dest += desc->sg[i].len; - len -= desc->sg[i].len; - } - - desc->num_sgs = num_periods; - desc->direction = DMA_MEM_TO_MEM; - desc->cyclic = false; - - return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); -} - -static struct dma_async_tx_descriptor *gdma_dma_prep_dma_cyclic( - struct dma_chan *c, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction direction, - unsigned long flags) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct gdma_dma_desc *desc; - unsigned int num_periods, i; - - if (buf_len % period_len) - return NULL; - - if (period_len > GDMA_REG_CTRL0_TX_MASK) { - dev_err(c->device->dev, "cyclic len too large %d\n", - period_len); - return NULL; - } - - num_periods = buf_len / period_len; - desc = kzalloc(struct_size(desc, sg, num_periods), GFP_ATOMIC); - if (!desc) { - dev_err(c->device->dev, "alloc cyclic decs error\n"); - return NULL; - } - desc->residue = buf_len; - - for (i = 0; i < num_periods; i++) { - if (direction == DMA_MEM_TO_DEV) { - desc->sg[i].src_addr = buf_addr; - } else if (direction == DMA_DEV_TO_MEM) { - desc->sg[i].dst_addr = buf_addr; - } else { - dev_err(c->device->dev, "direction type %d error\n", - direction); - goto free_desc; - } - desc->sg[i].len = period_len; - buf_addr += period_len; - } - - desc->num_sgs = num_periods; - desc->direction = direction; - desc->cyclic = true; - - return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); - -free_desc: - kfree(desc); - return NULL; -} - -static enum dma_status gdma_dma_tx_status(struct dma_chan *c, - dma_cookie_t cookie, - struct dma_tx_state *state) -{ - struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c); - struct virt_dma_desc *vdesc; - enum dma_status status; - unsigned long flags; - struct gdma_dma_desc *desc; - - status = dma_cookie_status(c, cookie, state); - if (status == DMA_COMPLETE || !state) - return status; - - spin_lock_irqsave(&chan->vchan.lock, flags); - desc = chan->desc; - if (desc && (cookie == desc->vdesc.tx.cookie)) { - /* - * We never update edesc->residue in the cyclic case, so we - * can tell the remaining room to the end of the circular - * buffer. - */ - if (desc->cyclic) - state->residue = desc->residue - - ((chan->next_sg - 1) * desc->sg[0].len); - else - state->residue = desc->residue; - } else { - vdesc = vchan_find_desc(&chan->vchan, cookie); - if (vdesc) - state->residue = to_gdma_dma_desc(vdesc)->residue; - } - spin_unlock_irqrestore(&chan->vchan.lock, flags); - - dev_dbg(c->device->dev, "tx residue %d bytes\n", state->residue); - - return status; -} - -static void gdma_dma_free_chan_resources(struct dma_chan *c) -{ - vchan_free_chan_resources(to_virt_chan(c)); -} - -static void gdma_dma_desc_free(struct virt_dma_desc *vdesc) -{ - kfree(container_of(vdesc, struct gdma_dma_desc, vdesc)); -} - -static void gdma_dma_tasklet(struct tasklet_struct *t) -{ - struct gdma_dma_dev *dma_dev = from_tasklet(dma_dev, t, task); - struct gdma_dmaengine_chan *chan; - static unsigned int last_chan; - unsigned int i, chan_mask; - - /* record last chan to round robin all chans */ - i = last_chan; - chan_mask = dma_dev->data->chancnt - 1; - do { - /* - * on mt7621. when verify with dmatest with all - * channel is enable. we need to limit only two - * channel is working at the same time. otherwise the - * data will have problem. - */ - if (atomic_read(&dma_dev->cnt) >= 2) { - last_chan = i; - break; - } - - if (test_and_clear_bit(i, &dma_dev->chan_issued)) { - chan = &dma_dev->chan[i]; - if (chan->desc) { - atomic_inc(&dma_dev->cnt); - gdma_start_transfer(dma_dev, chan); - } else { - dev_dbg(dma_dev->ddev.dev, - "chan %d no desc to issue\n", - chan->id); - } - if (!dma_dev->chan_issued) - break; - } - - i = (i + 1) & chan_mask; - } while (i != last_chan); -} - -static void rt305x_gdma_init(struct gdma_dma_dev *dma_dev) -{ - u32 gct; - - /* all chans round robin */ - gdma_dma_write(dma_dev, GDMA_RT305X_GCT, GDMA_REG_GCT_ARBIT_RR); - - gct = gdma_dma_read(dma_dev, GDMA_RT305X_GCT); - dev_info(dma_dev->ddev.dev, "revision: %d, channels: %d\n", - (gct >> GDMA_REG_GCT_VER_SHIFT) & GDMA_REG_GCT_VER_MASK, - 8 << ((gct >> GDMA_REG_GCT_CHAN_SHIFT) & - GDMA_REG_GCT_CHAN_MASK)); -} - -static void rt3883_gdma_init(struct gdma_dma_dev *dma_dev) -{ - u32 gct; - - /* all chans round robin */ - gdma_dma_write(dma_dev, GDMA_REG_GCT, GDMA_REG_GCT_ARBIT_RR); - - gct = gdma_dma_read(dma_dev, GDMA_REG_GCT); - dev_info(dma_dev->ddev.dev, "revision: %d, channels: %d\n", - (gct >> GDMA_REG_GCT_VER_SHIFT) & GDMA_REG_GCT_VER_MASK, - 8 << ((gct >> GDMA_REG_GCT_CHAN_SHIFT) & - GDMA_REG_GCT_CHAN_MASK)); -} - -static struct gdma_data rt305x_gdma_data = { - .chancnt = 8, - .done_int_reg = GDMA_RT305X_STATUS_INT, - .init = rt305x_gdma_init, - .start_transfer = rt305x_gdma_start_transfer, -}; - -static struct gdma_data rt3883_gdma_data = { - .chancnt = 16, - .done_int_reg = GDMA_REG_DONE_INT, - .init = rt3883_gdma_init, - .start_transfer = rt3883_gdma_start_transfer, -}; - -static const struct of_device_id gdma_of_match_table[] = { - { .compatible = "ralink,rt305x-gdma", .data = &rt305x_gdma_data }, - { .compatible = "ralink,rt3883-gdma", .data = &rt3883_gdma_data }, - { }, -}; -MODULE_DEVICE_TABLE(of, gdma_of_match_table); - -static int gdma_dma_probe(struct platform_device *pdev) -{ - const struct of_device_id *match; - struct gdma_dmaengine_chan *chan; - struct gdma_dma_dev *dma_dev; - struct dma_device *dd; - unsigned int i; - int ret; - int irq; - void __iomem *base; - struct gdma_data *data; - - ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); - if (ret) - return ret; - - match = of_match_device(gdma_of_match_table, &pdev->dev); - if (!match) - return -EINVAL; - data = (struct gdma_data *)match->data; - - dma_dev = devm_kzalloc(&pdev->dev, - struct_size(dma_dev, chan, data->chancnt), - GFP_KERNEL); - if (!dma_dev) - return -EINVAL; - dma_dev->data = data; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - dma_dev->base = base; - tasklet_setup(&dma_dev->task, gdma_dma_tasklet); - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -EINVAL; - ret = devm_request_irq(&pdev->dev, irq, gdma_dma_irq, - 0, dev_name(&pdev->dev), dma_dev); - if (ret) { - dev_err(&pdev->dev, "failed to request irq\n"); - return ret; - } - - ret = device_reset(&pdev->dev); - if (ret) - dev_err(&pdev->dev, "failed to reset: %d\n", ret); - - dd = &dma_dev->ddev; - dma_cap_set(DMA_MEMCPY, dd->cap_mask); - dma_cap_set(DMA_SLAVE, dd->cap_mask); - dma_cap_set(DMA_CYCLIC, dd->cap_mask); - dd->device_free_chan_resources = gdma_dma_free_chan_resources; - dd->device_prep_dma_memcpy = gdma_dma_prep_dma_memcpy; - dd->device_prep_slave_sg = gdma_dma_prep_slave_sg; - dd->device_prep_dma_cyclic = gdma_dma_prep_dma_cyclic; - dd->device_config = gdma_dma_config; - dd->device_terminate_all = gdma_dma_terminate_all; - dd->device_tx_status = gdma_dma_tx_status; - dd->device_issue_pending = gdma_dma_issue_pending; - - dd->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); - dd->dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); - dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); - dd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; - - dd->dev = &pdev->dev; - dd->dev->dma_parms = &dma_dev->dma_parms; - dma_set_max_seg_size(dd->dev, GDMA_REG_CTRL0_TX_MASK); - INIT_LIST_HEAD(&dd->channels); - - for (i = 0; i < data->chancnt; i++) { - chan = &dma_dev->chan[i]; - chan->id = i; - chan->vchan.desc_free = gdma_dma_desc_free; - vchan_init(&chan->vchan, dd); - } - - /* init hardware */ - data->init(dma_dev); - - ret = dma_async_device_register(dd); - if (ret) { - dev_err(&pdev->dev, "failed to register dma device\n"); - return ret; - } - - ret = of_dma_controller_register(pdev->dev.of_node, - of_dma_xlate_by_chan_id, dma_dev); - if (ret) { - dev_err(&pdev->dev, "failed to register of dma controller\n"); - goto err_unregister; - } - - platform_set_drvdata(pdev, dma_dev); - - return 0; - -err_unregister: - dma_async_device_unregister(dd); - return ret; -} - -static int gdma_dma_remove(struct platform_device *pdev) -{ - struct gdma_dma_dev *dma_dev = platform_get_drvdata(pdev); - - tasklet_kill(&dma_dev->task); - of_dma_controller_free(pdev->dev.of_node); - dma_async_device_unregister(&dma_dev->ddev); - - return 0; -} - -static struct platform_driver gdma_dma_driver = { - .probe = gdma_dma_probe, - .remove = gdma_dma_remove, - .driver = { - .name = "gdma-rt2880", - .of_match_table = gdma_of_match_table, - }, -}; -module_platform_driver(gdma_dma_driver); - -MODULE_DESCRIPTION("Ralink/MTK DMA driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index d2e9df60e9ba..b9ce71848023 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -2549,13 +2549,14 @@ static void _rtl92e_pci_disconnect(struct pci_dev *pdev) free_irq(dev->irq, dev); priv->irq = 0; } - free_rtllib(dev); if (dev->mem_start != 0) { iounmap((void __iomem *)dev->mem_start); release_mem_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); } + + free_rtllib(dev); } pci_disable_device(pdev); diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index c6f8b772335c..c985e4ebc545 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -1980,7 +1980,7 @@ void SendDisassociation(struct rtllib_device *ieee, bool deauth, u16 asRsn); void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee); void rtllib_start_ibss(struct rtllib_device *ieee); -void rtllib_softmac_init(struct rtllib_device *ieee); +int rtllib_softmac_init(struct rtllib_device *ieee); void rtllib_softmac_free(struct rtllib_device *ieee); void rtllib_disassociate(struct rtllib_device *ieee); void rtllib_stop_scan(struct rtllib_device *ieee); diff --git a/drivers/staging/rtl8192e/rtllib_module.c b/drivers/staging/rtl8192e/rtllib_module.c index 64d9feee1f39..41697ef55dbd 100644 --- a/drivers/staging/rtl8192e/rtllib_module.c +++ b/drivers/staging/rtl8192e/rtllib_module.c @@ -88,7 +88,7 @@ struct net_device *alloc_rtllib(int sizeof_priv) err = rtllib_networks_allocate(ieee); if (err) { pr_err("Unable to allocate beacon storage: %d\n", err); - goto failed; + goto free_netdev; } rtllib_networks_initialize(ieee); @@ -121,11 +121,13 @@ struct net_device *alloc_rtllib(int sizeof_priv) ieee->hwsec_active = 0; memset(ieee->swcamtable, 0, sizeof(struct sw_cam_table) * 32); - rtllib_softmac_init(ieee); + err = rtllib_softmac_init(ieee); + if (err) + goto free_crypt_info; ieee->pHTInfo = kzalloc(sizeof(struct rt_hi_throughput), GFP_KERNEL); if (!ieee->pHTInfo) - return NULL; + goto free_softmac; HTUpdateDefaultSetting(ieee); HTInitializeHTInfo(ieee); @@ -141,8 +143,14 @@ struct net_device *alloc_rtllib(int sizeof_priv) return dev; - failed: +free_softmac: + rtllib_softmac_free(ieee); +free_crypt_info: + lib80211_crypt_info_free(&ieee->crypt_info); + rtllib_networks_free(ieee); +free_netdev: free_netdev(dev); + return NULL; } EXPORT_SYMBOL(alloc_rtllib); @@ -153,7 +161,6 @@ void free_rtllib(struct net_device *dev) netdev_priv_rsl(dev); kfree(ieee->pHTInfo); - ieee->pHTInfo = NULL; rtllib_softmac_free(ieee); lib80211_crypt_info_free(&ieee->crypt_info); diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index d2726d01c757..4b6c2295a3cf 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -2515,7 +2515,7 @@ void rtllib_stop_all_queues(struct rtllib_device *ieee) unsigned int i; for (i = 0; i < ieee->dev->num_tx_queues; i++) - netdev_get_tx_queue(ieee->dev, i)->trans_start = jiffies; + txq_trans_cond_update(netdev_get_tx_queue(ieee->dev, i)); netif_tx_stop_all_queues(ieee->dev); } @@ -2952,7 +2952,7 @@ void rtllib_start_protocol(struct rtllib_device *ieee) } } -void rtllib_softmac_init(struct rtllib_device *ieee) +int rtllib_softmac_init(struct rtllib_device *ieee) { int i; @@ -2963,7 +2963,8 @@ void rtllib_softmac_init(struct rtllib_device *ieee) ieee->seq_ctrl[i] = 0; ieee->dot11d_info = kzalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC); if (!ieee->dot11d_info) - netdev_err(ieee->dev, "Can't alloc memory for DOT11D\n"); + return -ENOMEM; + ieee->LinkDetectInfo.SlotIndex = 0; ieee->LinkDetectInfo.SlotNum = 2; ieee->LinkDetectInfo.NumRecvBcnInPeriod = 0; @@ -3029,6 +3030,7 @@ void rtllib_softmac_init(struct rtllib_device *ieee) tasklet_setup(&ieee->ps_task, rtllib_sta_ps); + return 0; } void rtllib_softmac_free(struct rtllib_device *ieee) diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c index 1a193f900779..1a43979939a8 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c @@ -1346,7 +1346,7 @@ inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee short apset, ssidset, ssidbroad, apmatch, ssidmatch; - /* we are interested in new new only if we are not associated + /* we are interested in new only if we are not associated * and we are not associating / authenticating */ if (ieee->state != IEEE80211_NOLINK) @@ -2027,7 +2027,7 @@ ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb, * N = MAX_PACKET_SIZE / MIN_FRAG_THRESHOLD. * In this way you need just one and the 802.11 stack * will take care of buffering fragments and pass them to - * to the driver later, when it wakes the queue. + * the driver later, when it wakes the queue. */ void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee) { diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index 726d7ad9408b..364e1ca94f70 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -2531,13 +2531,13 @@ static short rtl8192_init(struct net_device *dev) #ifdef PIPE12 { int i = 0; - u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5}; + static const u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5}; memcpy(priv->txqueue_to_outpipemap, queuetopipe, 9); } #else { - u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 0, 4, 4}; + const u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 0, 4, 4}; memcpy(priv->txqueue_to_outpipemap, queuetopipe, 9); } @@ -2666,14 +2666,7 @@ static bool rtl8192_adapter_start(struct net_device *dev) /* config CPUReset Register */ /* Firmware Reset or not? */ read_nic_dword(dev, CPU_GEN, &dwRegRead); - if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT) - dwRegRead |= CPU_GEN_SYSTEM_RESET; /* do nothing here? */ - else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY) - dwRegRead |= CPU_GEN_FIRMWARE_RESET; - else - RT_TRACE(COMP_ERR, - "ERROR in %s(): undefined firmware state(%d)\n", - __func__, priv->pFirmware->firmware_status); + dwRegRead |= CPU_GEN_SYSTEM_RESET; /* do nothing here? */ write_nic_dword(dev, CPU_GEN, dwRegRead); /* config BB. */ diff --git a/drivers/staging/rtl8712/rtl8712_efuse.c b/drivers/staging/rtl8712/rtl8712_efuse.c index 4f3b54a7c3be..c9400e40a1d6 100644 --- a/drivers/staging/rtl8712/rtl8712_efuse.c +++ b/drivers/staging/rtl8712/rtl8712_efuse.c @@ -298,25 +298,23 @@ static u8 fix_header(struct _adapter *adapter, u8 header, u16 header_addr) continue; } for (i = 0; i < PGPKG_MAX_WORDS; i++) { - if (BIT(i) & word_en) { - if (BIT(i) & pkt.word_en) { - if (efuse_one_byte_read( - adapter, addr, + if (!(BIT(i) & word_en)) + continue; + if (BIT(i) & pkt.word_en) { + if (efuse_one_byte_read(adapter, + addr, &value)) - pkt.data[i * 2] = value; - else - return false; - if (efuse_one_byte_read( - adapter, + pkt.data[i * 2] = value; + else + return false; + if (efuse_one_byte_read(adapter, addr + 1, &value)) - pkt.data[i * 2 + 1] = - value; - else - return false; - } - addr += 2; + pkt.data[i * 2 + 1] = value; + else + return false; } + addr += 2; } } if (addr != header_addr) diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c index bd24d913b464..b28351a97cd3 100644 --- a/drivers/staging/rtl8723bs/core/rtw_cmd.c +++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c @@ -1498,8 +1498,7 @@ static void rtw_lps_change_dtim_hdl(struct adapter *padapter, u8 dtim) mutex_lock(&pwrpriv->lock); - if (pwrpriv->dtim != dtim) - pwrpriv->dtim = dtim; + pwrpriv->dtim = dtim; if (pwrpriv->fw_current_in_ps_mode && (pwrpriv->pwr_mode > PS_MODE_ACTIVE)) { u8 ps_mode = pwrpriv->pwr_mode; diff --git a/drivers/staging/rtl8723bs/core/rtw_efuse.c b/drivers/staging/rtl8723bs/core/rtw_efuse.c index 430e2d81924c..3d3c77273026 100644 --- a/drivers/staging/rtl8723bs/core/rtw_efuse.c +++ b/drivers/staging/rtl8723bs/core/rtw_efuse.c @@ -31,10 +31,7 @@ u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0}; #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ static bool -Efuse_Read1ByteFromFakeContent( - struct adapter *padapter, - u16 Offset, - u8 *Value) +Efuse_Read1ByteFromFakeContent(u16 Offset, u8 *Value) { if (Offset >= EFUSE_MAX_HW_SIZE) return false; @@ -46,10 +43,7 @@ Efuse_Read1ByteFromFakeContent( } static bool -Efuse_Write1ByteToFakeContent( - struct adapter *padapter, - u16 Offset, - u8 Value) +Efuse_Write1ByteToFakeContent(u16 Offset, u8 Value) { if (Offset >= EFUSE_MAX_HW_SIZE) return false; @@ -250,7 +244,7 @@ bool bPseudoTest) u8 readbyte; if (bPseudoTest) - return Efuse_Read1ByteFromFakeContent(padapter, addr, data); + return Efuse_Read1ByteFromFakeContent(addr, data); /* <20130121, Kordan> For SMIC EFUSE specificatoin. */ /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */ @@ -291,7 +285,7 @@ u8 efuse_OneByteWrite(struct adapter *padapter, u16 addr, u8 data, bool bPseudoT u32 efuseValue = 0; if (bPseudoTest) - return Efuse_Write1ByteToFakeContent(padapter, addr, data); + return Efuse_Write1ByteToFakeContent(addr, data); /* -----------------e-fuse reg ctrl --------------------------------- */ diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c b/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c index 7fe3df863fe1..b5d5e922231c 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c @@ -31,9 +31,6 @@ static u8 rtw_sdio_wait_enough_TxOQT_space(struct adapter *padapter, u8 agg_num) pHalData->SdioTxOQTFreeSpace -= agg_num; - /* if (n > 1) */ - /* ++priv->pshare->nr_out_of_txoqt_space; */ - return true; } @@ -310,8 +307,6 @@ static s32 xmit_xmitframes(struct adapter *padapter, struct xmit_priv *pxmitpriv txlen = txdesc_size + pxmitframe->attrib.last_txcmdsz; pxmitframe->pg_num = (txlen + 127) / 128; pxmitbuf->pg_num += (txlen + 127) / 128; - /* if (k != 1) */ - /* ((struct xmit_frame*)pxmitbuf->priv_data)->pg_num += pxmitframe->pg_num; */ pxmitbuf->ptail += _RND(txlen, 8); /* round to 8 bytes alignment */ pxmitbuf->len = _RND(pxmitbuf->len, 8) + txlen; } diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c index 0868f56e2979..5157b5b12597 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c @@ -2200,7 +2200,7 @@ static netdev_tx_t rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struc memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for - * for two MAC addresses + * two MAC addresses */ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); pdata = (unsigned char *)skb->data; diff --git a/drivers/staging/unisys/visorhba/visorhba_main.c b/drivers/staging/unisys/visorhba/visorhba_main.c index 694644112447..8eee131e834d 100644 --- a/drivers/staging/unisys/visorhba/visorhba_main.c +++ b/drivers/staging/unisys/visorhba/visorhba_main.c @@ -266,7 +266,7 @@ static int forward_taskmgmt_command(enum task_mgmt_types tasktype, ¬ifyevent, ¬ifyresult); if (ret) { dev_dbg(&scsidev->sdev_gendev, - "visorhba: setup_scsitaskmgmt_handles returned %d\n", ret); + "visorhba: setup_scsitaskmgmt_handles returned %d\n", ret); return FAILED; } diff --git a/drivers/staging/unisys/visornic/visornic_main.c b/drivers/staging/unisys/visornic/visornic_main.c index 62cd9b783732..643432458105 100644 --- a/drivers/staging/unisys/visornic/visornic_main.c +++ b/drivers/staging/unisys/visornic/visornic_main.c @@ -1590,7 +1590,7 @@ static void send_rcv_posts_if_needed(struct visornic_devdata *devdata) netdev = devdata->netdev; rcv_bufs_allocated = 0; /* this code is trying to prevent getting stuck here forever, - * but still retry it if you cant allocate them all this time. + * but still retry it if you can't allocate them all this time. */ cur_num_rcv_bufs_to_alloc = devdata->num_rcv_bufs_could_not_alloc; while (cur_num_rcv_bufs_to_alloc > 0) { @@ -1759,13 +1759,11 @@ static void visornic_channel_interrupt(struct visor_device *dev) if (!devdata) return; - if (!visorchannel_signalempty( - devdata->dev->visorchannel, - IOCHAN_FROM_IOPART)) + if (!visorchannel_signalempty(devdata->dev->visorchannel, + IOCHAN_FROM_IOPART)) napi_schedule(&devdata->napi); atomic_set(&devdata->interrupt_rcvd, 0); - } /* visornic_probe - probe function for visornic devices diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c index c250fbef2fa3..628732d7bf6a 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c @@ -52,20 +52,14 @@ static int bcm2835_devm_add_vchi_ctx(struct device *dev) return 0; } -typedef int (*bcm2835_audio_newpcm_func)(struct bcm2835_chip *chip, - const char *name, - enum snd_bcm2835_route route, - u32 numchannels); - -typedef int (*bcm2835_audio_newctl_func)(struct bcm2835_chip *chip); - struct bcm2835_audio_driver { struct device_driver driver; const char *shortname; const char *longname; int minchannels; - bcm2835_audio_newpcm_func newpcm; - bcm2835_audio_newctl_func newctl; + int (*newpcm)(struct bcm2835_chip *chip, const char *name, + enum snd_bcm2835_route route, u32 numchannels); + int (*newctl)(struct bcm2835_chip *chip); enum snd_bcm2835_route route; }; diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c index 1b184d5c6b82..253d755e547f 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * @@ -64,7 +64,7 @@ MODULE_PARM_DESC(max_video_height, "Threshold for video mode"); static atomic_t camera_instance = ATOMIC_INIT(0); /* global device data array */ -static struct bm2835_mmal_dev *gdev[MAX_BCM2835_CAMERAS]; +static struct bcm2835_mmal_dev *gdev[MAX_BCM2835_CAMERAS]; #define FPS_MIN 1 #define FPS_MAX 90 @@ -210,7 +210,7 @@ static int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, unsigned int *nplanes, unsigned int sizes[], struct device *alloc_ctxs[]) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vq); unsigned long size; /* refuse queue setup if port is not configured */ @@ -265,7 +265,7 @@ static int queue_setup(struct vb2_queue *vq, static int buffer_init(struct vb2_buffer *vb) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); struct vb2_mmal_buffer *buf = container_of(vb2, struct vb2_mmal_buffer, vb); @@ -280,7 +280,7 @@ static int buffer_init(struct vb2_buffer *vb) static int buffer_prepare(struct vb2_buffer *vb) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); unsigned long size; v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p, vb %p\n", @@ -302,7 +302,7 @@ static int buffer_prepare(struct vb2_buffer *vb) static void buffer_cleanup(struct vb2_buffer *vb) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); struct vb2_mmal_buffer *buf = container_of(vb2, struct vb2_mmal_buffer, vb); @@ -313,7 +313,7 @@ static void buffer_cleanup(struct vb2_buffer *vb) mmal_vchi_buffer_cleanup(&buf->mmal); } -static inline bool is_capturing(struct bm2835_mmal_dev *dev) +static inline bool is_capturing(struct bcm2835_mmal_dev *dev) { return dev->capture.camera_port == &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; @@ -324,7 +324,7 @@ static void buffer_cb(struct vchiq_mmal_instance *instance, int status, struct mmal_buffer *mmal_buf) { - struct bm2835_mmal_dev *dev = port->cb_ctx; + struct bcm2835_mmal_dev *dev = port->cb_ctx; struct vb2_mmal_buffer *buf = container_of(mmal_buf, struct vb2_mmal_buffer, mmal); @@ -416,7 +416,7 @@ static void buffer_cb(struct vchiq_mmal_instance *instance, } } -static int enable_camera(struct bm2835_mmal_dev *dev) +static int enable_camera(struct bcm2835_mmal_dev *dev) { int ret; @@ -447,7 +447,7 @@ static int enable_camera(struct bm2835_mmal_dev *dev) return 0; } -static int disable_camera(struct bm2835_mmal_dev *dev) +static int disable_camera(struct bcm2835_mmal_dev *dev) { int ret; @@ -482,7 +482,7 @@ static int disable_camera(struct bm2835_mmal_dev *dev) static void buffer_queue(struct vb2_buffer *vb) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); struct vb2_mmal_buffer *buf = container_of(vb2, struct vb2_mmal_buffer, vb); @@ -501,7 +501,7 @@ static void buffer_queue(struct vb2_buffer *vb) static int start_streaming(struct vb2_queue *vq, unsigned int count) { - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vq); int ret; u32 parameter_size; @@ -596,7 +596,7 @@ static void stop_streaming(struct vb2_queue *vq) { int ret; unsigned long timeout; - struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); + struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vq); struct vchiq_mmal_port *port = dev->capture.port; v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", @@ -654,7 +654,7 @@ static void stop_streaming(struct vb2_queue *vq) v4l2_err(&dev->v4l2_dev, "Failed to disable camera\n"); } -static const struct vb2_ops bm2835_mmal_video_qops = { +static const struct vb2_ops bcm2835_mmal_video_qops = { .queue_setup = queue_setup, .buf_init = buffer_init, .buf_prepare = buffer_prepare, @@ -671,7 +671,7 @@ static const struct vb2_ops bm2835_mmal_video_qops = { * ------------------------------------------------------------------ */ -static int set_overlay_params(struct bm2835_mmal_dev *dev, +static int set_overlay_params(struct bcm2835_mmal_dev *dev, struct vchiq_mmal_port *port) { struct mmal_parameter_displayregion prev_config = { @@ -713,7 +713,7 @@ static int vidioc_enum_fmt_vid_overlay(struct file *file, void *priv, static int vidioc_g_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); f->fmt.win = dev->overlay; @@ -723,7 +723,7 @@ static int vidioc_g_fmt_vid_overlay(struct file *file, void *priv, static int vidioc_try_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); f->fmt.win.field = V4L2_FIELD_NONE; f->fmt.win.chromakey = 0; @@ -754,7 +754,7 @@ static int vidioc_try_fmt_vid_overlay(struct file *file, void *priv, static int vidioc_s_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); vidioc_try_fmt_vid_overlay(file, priv, f); @@ -770,7 +770,7 @@ static int vidioc_s_fmt_vid_overlay(struct file *file, void *priv, static int vidioc_overlay(struct file *file, void *f, unsigned int on) { int ret; - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); struct vchiq_mmal_port *src; struct vchiq_mmal_port *dst; @@ -829,7 +829,7 @@ static int vidioc_g_fbuf(struct file *file, void *fh, /* The video overlay must stay within the framebuffer and can't be * positioned independently. */ - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); struct vchiq_mmal_port *preview_port = &dev->component[COMP_CAMERA]->output[CAM_PORT_PREVIEW]; @@ -878,18 +878,16 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i) static int vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); u32 major; u32 minor; vchiq_mmal_version(dev->instance, &major, &minor); - strscpy(cap->driver, "bm2835 mmal", sizeof(cap->driver)); - snprintf((char *)cap->card, sizeof(cap->card), "mmal service %d.%d", - major, minor); + strscpy(cap->driver, "bcm2835 mmal", sizeof(cap->driver)); + snprintf((char *)cap->card, sizeof(cap->card), "mmal service %d.%d", major, minor); - snprintf((char *)cap->bus_info, sizeof(cap->bus_info), - "platform:%s", dev->v4l2_dev.name); + snprintf((char *)cap->bus_info, sizeof(cap->bus_info), "platform:%s", dev->v4l2_dev.name); return 0; } @@ -911,7 +909,7 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); f->fmt.pix.width = dev->capture.width; f->fmt.pix.height = dev->capture.height; @@ -936,7 +934,7 @@ static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); struct mmal_fmt *mfmt; mfmt = get_format(f); @@ -1010,7 +1008,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, } -static int mmal_setup_video_component(struct bm2835_mmal_dev *dev, +static int mmal_setup_video_component(struct bcm2835_mmal_dev *dev, struct v4l2_format *f) { bool overlay_enabled = !!dev->component[COMP_PREVIEW]->enabled; @@ -1056,7 +1054,7 @@ static int mmal_setup_video_component(struct bm2835_mmal_dev *dev, return ret; } -static int mmal_setup_encode_component(struct bm2835_mmal_dev *dev, +static int mmal_setup_encode_component(struct bcm2835_mmal_dev *dev, struct v4l2_format *f, struct vchiq_mmal_port *port, struct vchiq_mmal_port *camera_port, @@ -1144,7 +1142,7 @@ static int mmal_setup_encode_component(struct bm2835_mmal_dev *dev, return 0; } -static int mmal_setup_components(struct bm2835_mmal_dev *dev, +static int mmal_setup_components(struct bcm2835_mmal_dev *dev, struct v4l2_format *f) { int ret; @@ -1290,7 +1288,7 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { int ret; - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); struct mmal_fmt *mfmt; /* try the format to set valid parameters */ @@ -1333,7 +1331,7 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, static int vidioc_enum_framesizes(struct file *file, void *fh, struct v4l2_frmsizeenum *fsize) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); static const struct v4l2_frmsize_stepwise sizes = { MIN_WIDTH, 0, 2, MIN_HEIGHT, 0, 2 @@ -1358,7 +1356,7 @@ static int vidioc_enum_framesizes(struct file *file, void *fh, static int vidioc_enum_frameintervals(struct file *file, void *priv, struct v4l2_frmivalenum *fival) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); int i; if (fival->index) @@ -1388,7 +1386,7 @@ static int vidioc_enum_frameintervals(struct file *file, void *priv, static int vidioc_g_parm(struct file *file, void *priv, struct v4l2_streamparm *parm) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) return -EINVAL; @@ -1402,7 +1400,7 @@ static int vidioc_g_parm(struct file *file, void *priv, static int vidioc_s_parm(struct file *file, void *priv, struct v4l2_streamparm *parm) { - struct bm2835_mmal_dev *dev = video_drvdata(file); + struct bcm2835_mmal_dev *dev = video_drvdata(file); struct v4l2_fract tpf; if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) @@ -1530,7 +1528,7 @@ static int get_num_cameras(struct vchiq_mmal_instance *instance, static int set_camera_parameters(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *camera, - struct bm2835_mmal_dev *dev) + struct bcm2835_mmal_dev *dev) { struct mmal_parameter_camera_config cam_config = { .max_stills_w = dev->max_width, @@ -1555,7 +1553,7 @@ static int set_camera_parameters(struct vchiq_mmal_instance *instance, #define MAX_SUPPORTED_ENCODINGS 20 /* MMAL instance and component init */ -static int mmal_init(struct bm2835_mmal_dev *dev) +static int mmal_init(struct bcm2835_mmal_dev *dev) { int ret; struct mmal_es_format_local *format; @@ -1735,7 +1733,7 @@ static int mmal_init(struct bm2835_mmal_dev *dev) &enable, sizeof(enable)); } - ret = bm2835_mmal_set_all_camera_controls(dev); + ret = bcm2835_mmal_set_all_camera_controls(dev); if (ret < 0) { v4l2_err(&dev->v4l2_dev, "%s: failed to set all camera controls: %d\n", __func__, ret); @@ -1769,8 +1767,7 @@ unreg_mmal: return ret; } -static int bm2835_mmal_init_device(struct bm2835_mmal_dev *dev, - struct video_device *vfd) +static int bcm2835_mmal_init_device(struct bcm2835_mmal_dev *dev, struct video_device *vfd) { int ret; @@ -1798,7 +1795,7 @@ static int bm2835_mmal_init_device(struct bm2835_mmal_dev *dev, return 0; } -static void bcm2835_cleanup_instance(struct bm2835_mmal_dev *dev) +static void bcm2835_cleanup_instance(struct bcm2835_mmal_dev *dev) { if (!dev) return; @@ -1849,7 +1846,7 @@ static struct v4l2_format default_v4l2_format = { static int bcm2835_mmal_probe(struct platform_device *pdev) { int ret; - struct bm2835_mmal_dev *dev; + struct bcm2835_mmal_dev *dev; struct vb2_queue *q; int camera; unsigned int num_cameras; @@ -1908,7 +1905,7 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) } /* setup v4l controls */ - ret = bm2835_mmal_init_controls(dev, &dev->ctrl_handler); + ret = bcm2835_mmal_init_controls(dev, &dev->ctrl_handler); if (ret < 0) { v4l2_err(&dev->v4l2_dev, "%s: could not init controls: %d\n", __func__, ret); @@ -1931,7 +1928,7 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ; q->drv_priv = dev; q->buf_struct_size = sizeof(struct vb2_mmal_buffer); - q->ops = &bm2835_mmal_video_qops; + q->ops = &bcm2835_mmal_video_qops; q->mem_ops = &vb2_vmalloc_memops; q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; q->lock = &dev->mutex; @@ -1940,7 +1937,7 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) goto unreg_dev; /* initialise video devices */ - ret = bm2835_mmal_init_device(dev, &dev->vdev); + ret = bcm2835_mmal_init_device(dev, &dev->vdev); if (ret < 0) { v4l2_err(&dev->v4l2_dev, "%s: could not init device: %d\n", __func__, ret); diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h index 75524adff0f5..0f0c6f7a3764 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * @@ -32,7 +32,7 @@ enum { extern int bcm2835_v4l2_debug; -struct bm2835_mmal_dev { +struct bcm2835_mmal_dev { /* v4l2 devices */ struct v4l2_device v4l2_dev; struct video_device vdev; @@ -110,12 +110,10 @@ struct bm2835_mmal_dev { unsigned int rgb_bgr_swapped; }; -int bm2835_mmal_init_controls( - struct bm2835_mmal_dev *dev, - struct v4l2_ctrl_handler *hdl); +int bcm2835_mmal_init_controls(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl_handler *hdl); -int bm2835_mmal_set_all_camera_controls(struct bm2835_mmal_dev *dev); -int set_framerate_params(struct bm2835_mmal_dev *dev); +int bcm2835_mmal_set_all_camera_controls(struct bcm2835_mmal_dev *dev); +int set_framerate_params(struct bcm2835_mmal_dev *dev); /* Debug helpers */ diff --git a/drivers/staging/vc04_services/bcm2835-camera/controls.c b/drivers/staging/vc04_services/bcm2835-camera/controls.c index b096a12387f7..eb722f16fb91 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/controls.c +++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * @@ -58,23 +58,16 @@ static const u32 iso_values[] = { 0, 100, 200, 400, 800, }; -enum bm2835_mmal_ctrl_type { +enum bcm2835_mmal_ctrl_type { MMAL_CONTROL_TYPE_STD, MMAL_CONTROL_TYPE_STD_MENU, MMAL_CONTROL_TYPE_INT_MENU, MMAL_CONTROL_TYPE_CLUSTER, /* special cluster entry */ }; -struct bm2835_mmal_v4l2_ctrl; - -typedef int(bm2835_mmal_v4l2_ctrl_cb)( - struct bm2835_mmal_dev *dev, - struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl); - -struct bm2835_mmal_v4l2_ctrl { +struct bcm2835_mmal_v4l2_ctrl { u32 id; /* v4l2 control identifier */ - enum bm2835_mmal_ctrl_type type; + enum bcm2835_mmal_ctrl_type type; /* control minimum value or * mask for MMAL_CONTROL_TYPE_STD_MENU */ @@ -84,7 +77,8 @@ struct bm2835_mmal_v4l2_ctrl { u64 step; /* step size of the control */ const s64 *imenu; /* integer menu array */ u32 mmal_id; /* mmal parameter id */ - bm2835_mmal_v4l2_ctrl_cb *setter; + int (*setter)(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl); }; struct v4l2_to_mmal_effects_setting { @@ -156,9 +150,9 @@ static const struct v4l2_mmal_scene_config scene_configs[] = { /* control handlers*/ -static int ctrl_set_rational(struct bm2835_mmal_dev *dev, +static int ctrl_set_rational(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { struct mmal_parameter_rational rational_value; struct vchiq_mmal_port *control; @@ -174,9 +168,9 @@ static int ctrl_set_rational(struct bm2835_mmal_dev *dev, sizeof(rational_value)); } -static int ctrl_set_value(struct bm2835_mmal_dev *dev, +static int ctrl_set_value(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *control; @@ -190,9 +184,9 @@ static int ctrl_set_value(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_iso(struct bm2835_mmal_dev *dev, +static int ctrl_set_iso(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *control; @@ -218,9 +212,9 @@ static int ctrl_set_iso(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_value_ev(struct bm2835_mmal_dev *dev, +static int ctrl_set_value_ev(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { s32 s32_value; struct vchiq_mmal_port *control; @@ -234,9 +228,9 @@ static int ctrl_set_value_ev(struct bm2835_mmal_dev *dev, &s32_value, sizeof(s32_value)); } -static int ctrl_set_rotate(struct bm2835_mmal_dev *dev, +static int ctrl_set_rotate(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret; u32 u32_value; @@ -263,9 +257,9 @@ static int ctrl_set_rotate(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_flip(struct bm2835_mmal_dev *dev, +static int ctrl_set_flip(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret; u32 u32_value; @@ -304,9 +298,9 @@ static int ctrl_set_flip(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_exposure(struct bm2835_mmal_dev *dev, +static int ctrl_set_exposure(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { enum mmal_parameter_exposuremode exp_mode = dev->exposure_mode_user; u32 shutter_speed = 0; @@ -360,9 +354,9 @@ static int ctrl_set_exposure(struct bm2835_mmal_dev *dev, return ret; } -static int ctrl_set_metering_mode(struct bm2835_mmal_dev *dev, +static int ctrl_set_metering_mode(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { switch (ctrl->val) { case V4L2_EXPOSURE_METERING_AVERAGE: @@ -396,9 +390,9 @@ static int ctrl_set_metering_mode(struct bm2835_mmal_dev *dev, } } -static int ctrl_set_flicker_avoidance(struct bm2835_mmal_dev *dev, +static int ctrl_set_flicker_avoidance(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *control; @@ -425,9 +419,9 @@ static int ctrl_set_flicker_avoidance(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_awb_mode(struct bm2835_mmal_dev *dev, +static int ctrl_set_awb_mode(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *control; @@ -481,9 +475,9 @@ static int ctrl_set_awb_mode(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_awb_gains(struct bm2835_mmal_dev *dev, +static int ctrl_set_awb_gains(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { struct vchiq_mmal_port *control; struct mmal_parameter_awbgains gains; @@ -504,9 +498,9 @@ static int ctrl_set_awb_gains(struct bm2835_mmal_dev *dev, &gains, sizeof(gains)); } -static int ctrl_set_image_effect(struct bm2835_mmal_dev *dev, +static int ctrl_set_image_effect(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret = -EINVAL; int i, j; @@ -561,9 +555,9 @@ exit: return (ret == 0 ? 0 : -EINVAL); } -static int ctrl_set_colfx(struct bm2835_mmal_dev *dev, +static int ctrl_set_colfx(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret; struct vchiq_mmal_port *control; @@ -585,9 +579,9 @@ static int ctrl_set_colfx(struct bm2835_mmal_dev *dev, return (ret == 0 ? 0 : -EINVAL); } -static int ctrl_set_bitrate(struct bm2835_mmal_dev *dev, +static int ctrl_set_bitrate(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret; struct vchiq_mmal_port *encoder_out; @@ -613,9 +607,9 @@ static int ctrl_set_bitrate(struct bm2835_mmal_dev *dev, return 0; } -static int ctrl_set_bitrate_mode(struct bm2835_mmal_dev *dev, +static int ctrl_set_bitrate_mode(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 bitrate_mode; struct vchiq_mmal_port *encoder_out; @@ -640,9 +634,9 @@ static int ctrl_set_bitrate_mode(struct bm2835_mmal_dev *dev, return 0; } -static int ctrl_set_image_encode_output(struct bm2835_mmal_dev *dev, +static int ctrl_set_image_encode_output(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *jpeg_out; @@ -656,9 +650,9 @@ static int ctrl_set_image_encode_output(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_video_encode_param_output(struct bm2835_mmal_dev *dev, +static int ctrl_set_video_encode_param_output(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { u32 u32_value; struct vchiq_mmal_port *vid_enc_ctl; @@ -672,9 +666,9 @@ static int ctrl_set_video_encode_param_output(struct bm2835_mmal_dev *dev, &u32_value, sizeof(u32_value)); } -static int ctrl_set_video_encode_profile_level(struct bm2835_mmal_dev *dev, +static int ctrl_set_video_encode_profile_level(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { struct mmal_parameter_video_profile param; int ret = 0; @@ -783,9 +777,9 @@ static int ctrl_set_video_encode_profile_level(struct bm2835_mmal_dev *dev, return ret; } -static int ctrl_set_scene_mode(struct bm2835_mmal_dev *dev, +static int ctrl_set_scene_mode(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl *ctrl, - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl) { int ret = 0; int shutter_speed; @@ -890,12 +884,11 @@ static int ctrl_set_scene_mode(struct bm2835_mmal_dev *dev, return 0; } -static int bm2835_mmal_s_ctrl(struct v4l2_ctrl *ctrl) +static int bcm2835_mmal_s_ctrl(struct v4l2_ctrl *ctrl) { - struct bm2835_mmal_dev *dev = - container_of(ctrl->handler, struct bm2835_mmal_dev, - ctrl_handler); - const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl = ctrl->priv; + struct bcm2835_mmal_dev *dev = container_of(ctrl->handler, struct bcm2835_mmal_dev, + ctrl_handler); + const struct bcm2835_mmal_v4l2_ctrl *mmal_ctrl = ctrl->priv; int ret; if (!mmal_ctrl || mmal_ctrl->id != ctrl->id || !mmal_ctrl->setter) { @@ -910,11 +903,11 @@ static int bm2835_mmal_s_ctrl(struct v4l2_ctrl *ctrl) return ret; } -static const struct v4l2_ctrl_ops bm2835_mmal_ctrl_ops = { - .s_ctrl = bm2835_mmal_s_ctrl, +static const struct v4l2_ctrl_ops bcm2835_mmal_ctrl_ops = { + .s_ctrl = bcm2835_mmal_s_ctrl, }; -static const struct bm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { +static const struct bcm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { { .id = V4L2_CID_SATURATION, .type = MMAL_CONTROL_TYPE_STD, @@ -1253,7 +1246,7 @@ static const struct bm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { }, }; -int bm2835_mmal_set_all_camera_controls(struct bm2835_mmal_dev *dev) +int bcm2835_mmal_set_all_camera_controls(struct bcm2835_mmal_dev *dev) { int c; int ret = 0; @@ -1273,7 +1266,7 @@ int bm2835_mmal_set_all_camera_controls(struct bm2835_mmal_dev *dev) return ret; } -int set_framerate_params(struct bm2835_mmal_dev *dev) +int set_framerate_params(struct bcm2835_mmal_dev *dev) { struct mmal_parameter_fps_range fps_range; int ret; @@ -1318,11 +1311,10 @@ int set_framerate_params(struct bm2835_mmal_dev *dev) return ret; } -int bm2835_mmal_init_controls(struct bm2835_mmal_dev *dev, - struct v4l2_ctrl_handler *hdl) +int bcm2835_mmal_init_controls(struct bcm2835_mmal_dev *dev, struct v4l2_ctrl_handler *hdl) { int c; - const struct bm2835_mmal_v4l2_ctrl *ctrl; + const struct bcm2835_mmal_v4l2_ctrl *ctrl; v4l2_ctrl_handler_init(hdl, V4L2_CTRL_COUNT); @@ -1331,12 +1323,9 @@ int bm2835_mmal_init_controls(struct bm2835_mmal_dev *dev, switch (ctrl->type) { case MMAL_CONTROL_TYPE_STD: - dev->ctrls[c] = - v4l2_ctrl_new_std(hdl, - &bm2835_mmal_ctrl_ops, - ctrl->id, ctrl->min, - ctrl->max, ctrl->step, - ctrl->def); + dev->ctrls[c] = v4l2_ctrl_new_std(hdl, &bcm2835_mmal_ctrl_ops, + ctrl->id, ctrl->min, ctrl->max, + ctrl->step, ctrl->def); break; case MMAL_CONTROL_TYPE_STD_MENU: @@ -1360,20 +1349,16 @@ int bm2835_mmal_init_controls(struct bm2835_mmal_dev *dev, mask = ~mask; } - dev->ctrls[c] = - v4l2_ctrl_new_std_menu(hdl, - &bm2835_mmal_ctrl_ops, - ctrl->id, ctrl->max, - mask, ctrl->def); + dev->ctrls[c] = v4l2_ctrl_new_std_menu(hdl, &bcm2835_mmal_ctrl_ops, + ctrl->id, ctrl->max, mask, + ctrl->def); break; } case MMAL_CONTROL_TYPE_INT_MENU: - dev->ctrls[c] = - v4l2_ctrl_new_int_menu(hdl, - &bm2835_mmal_ctrl_ops, - ctrl->id, ctrl->max, - ctrl->def, ctrl->imenu); + dev->ctrls[c] = v4l2_ctrl_new_int_menu(hdl, &bcm2835_mmal_ctrl_ops, + ctrl->id, ctrl->max, + ctrl->def, ctrl->imenu); break; case MMAL_CONTROL_TYPE_CLUSTER: diff --git a/drivers/staging/vc04_services/interface/TODO b/drivers/staging/vc04_services/interface/TODO index 39810ce017cd..241ca004735c 100644 --- a/drivers/staging/vc04_services/interface/TODO +++ b/drivers/staging/vc04_services/interface/TODO @@ -80,11 +80,7 @@ vchiq-core.ko and vchiq-dev.ko. This would also ease the upstreaming process. The code in vchiq_bcm2835_arm.c should fit in the generic platform file. -12) Get rid of all the struct typedefs - -Most structs are typedefd, it's not encouraged in the kernel. - -13) Get rid of all non essential global structures and create a proper per +11) Get rid of all non essential global structures and create a proper per device structure The first thing one generally sees in a probe function is a memory allocation @@ -92,6 +88,6 @@ for all the device specific data. This structure is then passed all over the driver. This is good practice since it makes the driver work regardless of the number of devices probed. -14) Clean up Sparse warnings from __user annotations. See +12) Clean up Sparse warnings from __user annotations. See vchiq_irq_queue_bulk_tx_rx(). Ensure that the address of "&waiter->bulk_waiter" is never disclosed to userspace. diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index c650a32bcedf..6759a6261500 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -1661,7 +1661,7 @@ vchiq_dump_service_use_state(struct vchiq_state *state) service_data[i].clientid, service_data[i].use_count, service_data[i].use_count ? nz : ""); } - vchiq_log_warning(vchiq_susp_log_level, "----- VCHIQ use count count %d", peer_count); + vchiq_log_warning(vchiq_susp_log_level, "----- VCHIQ use count %d", peer_count); vchiq_log_warning(vchiq_susp_log_level, "--- Overall vchiq instance use count %d", vc_use_count); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h index 53a98949b294..55abaf02a196 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h @@ -74,8 +74,6 @@ ((fourcc) >> 8) & 0xff, \ (fourcc) & 0xff -static_assert((sizeof(u32) * 8) == 32); - #define BITSET_SIZE(b) ((b + 31) >> 5) #define BITSET_WORD(b) (b >> 5) #define BITSET_BIT(b) (1 << (b & 31)) diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h index 5bd7410a034a..b33129403a30 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h index 2be9941a1f30..e15ae7b24f73 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-common.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-common.h index 342c9b670f7e..d77e15f25dda 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-common.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-format.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-format.h index a118efd21d98..1e996d8cd283 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-format.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-format.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-port.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-port.h index 3fa3f2a578f0..6ee4c1ed7f19 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-port.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-port.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h index b636e889c8a1..471413248a14 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h index a1e39b1b1701..2277e05b1e31 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c index 76d3f0399964..cb6cdbfaf6ec 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h index 1dc81ecf9268..6006e29232b3 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Broadcom BM2835 V4L2 driver + * Broadcom BCM2835 V4L2 driver * * Copyright © 2013 Raspberry Pi (Trading) Ltd. * diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index 26e08fec6e6a..ee2d145778ed 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c @@ -183,7 +183,7 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) unsigned char bySlot = 0; unsigned char bySIFS = 0; unsigned char byDIFS = 0; - unsigned char byData; + unsigned char data; int i; /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */ @@ -194,15 +194,15 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) priv->abyBBVGA[0] = 0x20; priv->abyBBVGA[2] = 0x10; priv->abyBBVGA[3] = 0x10; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x1C) + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x1C) bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); } else if (priv->byRFType == RF_UW2452) { MACvSetBBType(priv->port_offset, BB_TYPE_11A); priv->abyBBVGA[0] = 0x18; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x14) { + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x14) { bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); bb_write_embedded(priv, 0xE1, 0x57); } @@ -220,14 +220,14 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) priv->abyBBVGA[0] = 0x1C; priv->abyBBVGA[2] = 0x00; priv->abyBBVGA[3] = 0x00; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x20) + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x20) bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); } else if (priv->byRFType == RF_UW2452) { priv->abyBBVGA[0] = 0x14; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x18) { + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x18) { bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); bb_write_embedded(priv, 0xE1, 0xD3); } @@ -243,14 +243,14 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) priv->abyBBVGA[0] = 0x1C; priv->abyBBVGA[2] = 0x00; priv->abyBBVGA[3] = 0x00; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x20) + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x20) bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); } else if (priv->byRFType == RF_UW2452) { priv->abyBBVGA[0] = 0x14; - bb_read_embedded(priv, 0xE7, &byData); - if (byData == 0x18) { + bb_read_embedded(priv, 0xE7, &data); + if (data == 0x18) { bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); bb_write_embedded(priv, 0xE1, 0xD3); } @@ -404,7 +404,7 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv, */ void CARDbRadioPowerOff(struct vnt_private *priv) { - if (priv->bRadioOff) + if (priv->radio_off) return; switch (priv->byRFType) { @@ -429,7 +429,7 @@ void CARDbRadioPowerOff(struct vnt_private *priv) bb_set_deep_sleep(priv, priv->local_id); - priv->bRadioOff = true; + priv->radio_off = true; pr_debug("chester power off\n"); MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ @@ -798,12 +798,12 @@ bool CARDbGetCurrentTSF(struct vnt_private *priv, u64 *pqwCurrTSF) { void __iomem *iobase = priv->port_offset; unsigned short ww; - unsigned char byData; + unsigned char data; MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD); for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { - VNSvInPortB(iobase + MAC_REG_TFTCTL, &byData); - if (!(byData & TFTCTL_TSFCNTRRD)) + VNSvInPortB(iobase + MAC_REG_TFTCTL, &data); + if (!(data & TFTCTL_TSFCNTRRD)) break; } if (ww == W_MAX_TIMEOUT) diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/channel.c index b550a1a0844e..e37c8e35a45b 100644 --- a/drivers/staging/vt6655/channel.c +++ b/drivers/staging/vt6655/channel.c @@ -189,7 +189,7 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) /* Init Synthesizer Table */ if (priv->bEnablePSMode) - RFvWriteWakeProgSyn(priv, priv->byRFType, ch->hw_value); + rf_write_wake_prog_syn(priv, priv->byRFType, ch->hw_value); bb_software_reset(priv); diff --git a/drivers/staging/vt6655/device.h b/drivers/staging/vt6655/device.h index 4706bde1ec1d..c272a4ab2fa0 100644 --- a/drivers/staging/vt6655/device.h +++ b/drivers/staging/vt6655/device.h @@ -128,8 +128,6 @@ struct vnt_private { u32 memaddr; u32 ioaddr; - unsigned char byRxMode; - spinlock_t lock; volatile int iTDUsed[TYPE_MAXTD]; @@ -157,7 +155,7 @@ struct vnt_private { unsigned char local_id; unsigned char byRFType; - unsigned char byMaxPwrLevel; + unsigned char max_pwr_level; unsigned char byZoneType; bool bZoneRegExist; unsigned char byOriginalZonetype; @@ -165,7 +163,7 @@ struct vnt_private { unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2) bool bLinkPass; /* link status: OK or fail */ - unsigned int uCurrRSSI; + unsigned int current_rssi; unsigned char byCurrSQ; unsigned long dwTxAntennaSel; @@ -221,7 +219,7 @@ struct vnt_private { bool bBarkerPreambleMd; bool bRadioControlOff; - bool bRadioOff; + bool radio_off; bool bEnablePSMode; unsigned short wListenInterval; bool bPWBitOn; @@ -229,7 +227,7 @@ struct vnt_private { /* GPIO Radio Control */ unsigned char byRadioCtl; unsigned char byGPIO; - bool bHWRadioOff; + bool hw_radio_off; bool bPrvActive4RadioOFF; bool bGPIOBlockRead; diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index 212d2a287b2c..897d70cf32b8 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c @@ -369,11 +369,11 @@ static void device_init_registers(struct vnt_private *priv) /* Set Short Slot Time, xIFS, and RSPINF. */ priv->wCurrentRate = RATE_54M; - priv->bRadioOff = false; + priv->radio_off = false; priv->byRadioCtl = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RADIOCTL); - priv->bHWRadioOff = false; + priv->hw_radio_off = false; if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) { /* Get GPIO */ @@ -383,10 +383,10 @@ static void device_init_registers(struct vnt_private *priv) !(priv->byRadioCtl & EEP_RADIOCTL_INV)) || (!(priv->byGPIO & GPIO0_DATA) && (priv->byRadioCtl & EEP_RADIOCTL_INV))) - priv->bHWRadioOff = true; + priv->hw_radio_off = true; } - if (priv->bHWRadioOff || priv->bRadioControlOff) + if (priv->hw_radio_off || priv->bRadioControlOff) CARDbRadioPowerOff(priv); /* get Permanent network address */ @@ -980,10 +980,10 @@ static void vnt_check_bb_vga(struct vnt_private *priv) if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) return; - if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI)) + if (!(priv->vif->bss_conf.assoc && priv->current_rssi)) return; - RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm); + RFvRSSITodBm(priv, (u8)priv->current_rssi, &dbm); for (i = 0; i < BB_VGA_LEVEL; i++) { if (dbm < priv->dbm_threshold[i]) { diff --git a/drivers/staging/vt6655/dpc.c b/drivers/staging/vt6655/dpc.c index a7d1d35de5d4..c6ed3537f439 100644 --- a/drivers/staging/vt6655/dpc.c +++ b/drivers/staging/vt6655/dpc.c @@ -80,7 +80,7 @@ static bool vnt_rx_data(struct vnt_private *priv, struct sk_buff *skb, RFvRSSITodBm(priv, *rssi, &rx_dbm); priv->byBBPreEDRSSI = (u8)rx_dbm + 1; - priv->uCurrRSSI = *rssi; + priv->current_rssi = *rssi; skb_pull(skb, 4); skb_trim(skb, frame_size); diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c index bc4abe77db7b..ba7056f5a5da 100644 --- a/drivers/staging/vt6655/rf.c +++ b/drivers/staging/vt6655/rf.c @@ -609,11 +609,11 @@ bool RFbInit(struct vnt_private *priv) switch (priv->byRFType) { case RF_AIROHA: case RF_AL2230S: - priv->byMaxPwrLevel = AL2230_PWR_IDX_LEN; + priv->max_pwr_level = AL2230_PWR_IDX_LEN; ret = RFbAL2230Init(priv); break; case RF_AIROHA7230: - priv->byMaxPwrLevel = AL7230_PWR_IDX_LEN; + priv->max_pwr_level = AL7230_PWR_IDX_LEN; ret = s_bAL7230Init(priv); break; case RF_NOTHING: @@ -669,20 +669,22 @@ bool RFbSelectChannel(struct vnt_private *priv, unsigned char byRFType, * * Parameters: * In: - * iobase - I/O base address - * channel - channel number - * bySleepCnt - SleepProgSyn count + * priv - Device Structure + * rf_type - RF type + * channel - Channel number * - * Return Value: None. + * Return Value: true if succeeded; false if failed. * */ -bool RFvWriteWakeProgSyn(struct vnt_private *priv, unsigned char rf_type, - u16 channel) +bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type, + u16 channel) { void __iomem *iobase = priv->port_offset; int i; unsigned char init_count = 0; unsigned char sleep_count = 0; + unsigned short idx = MISCFIFO_SYNDATA_IDX; + const unsigned long *init_table; VNSvOutPortW(iobase + MAC_REG_MISCFFNDEX, 0); switch (rf_type) { @@ -695,15 +697,12 @@ bool RFvWriteWakeProgSyn(struct vnt_private *priv, unsigned char rf_type, /* Init Reg + Channel Reg (2) */ init_count = CB_AL2230_INIT_SEQ + 2; sleep_count = 0; - if (init_count > (MISCFIFO_SYNDATASIZE - sleep_count)) - return false; for (i = 0; i < CB_AL2230_INIT_SEQ; i++) - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al2230_init_table[i]); + MACvSetMISCFifo(priv, idx++, al2230_init_table[i]); - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al2230_channel_table0[channel - 1]); - i++; - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al2230_channel_table1[channel - 1]); + MACvSetMISCFifo(priv, idx++, al2230_channel_table0[channel - 1]); + MACvSetMISCFifo(priv, idx++, al2230_channel_table1[channel - 1]); break; /* Need to check, PLLON need to be low for channel setting */ @@ -711,22 +710,15 @@ bool RFvWriteWakeProgSyn(struct vnt_private *priv, unsigned char rf_type, /* Init Reg + Channel Reg (3) */ init_count = CB_AL7230_INIT_SEQ + 3; sleep_count = 0; - if (init_count > (MISCFIFO_SYNDATASIZE - sleep_count)) - return false; - if (channel <= CB_MAX_CHANNEL_24G) { - for (i = 0; i < CB_AL7230_INIT_SEQ; i++) - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al7230_init_table[i]); - } else { - for (i = 0; i < CB_AL7230_INIT_SEQ; i++) - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al7230_init_table_a_mode[i]); - } + init_table = (channel <= CB_MAX_CHANNEL_24G) ? + al7230_init_table : al7230_init_table_a_mode; + for (i = 0; i < CB_AL7230_INIT_SEQ; i++) + MACvSetMISCFifo(priv, idx++, init_table[i]); - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al7230_channel_table0[channel - 1]); - i++; - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al7230_channel_table1[channel - 1]); - i++; - MACvSetMISCFifo(priv, (unsigned short)(MISCFIFO_SYNDATA_IDX + i), al7230_channel_table2[channel - 1]); + MACvSetMISCFifo(priv, idx++, al7230_channel_table0[channel - 1]); + MACvSetMISCFifo(priv, idx++, al7230_channel_table1[channel - 1]); + MACvSetMISCFifo(priv, idx++, al7230_channel_table2[channel - 1]); break; case RF_NOTHING: @@ -786,8 +778,8 @@ bool RFbSetPower(struct vnt_private *priv, unsigned int rate, u16 uCH) else byDec = byPwr + 10; - if (byDec >= priv->byMaxPwrLevel) - byDec = priv->byMaxPwrLevel - 1; + if (byDec >= priv->max_pwr_level) + byDec = priv->max_pwr_level - 1; byPwr = byDec; break; @@ -829,7 +821,7 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned char byPwr, bool ret = true; unsigned long dwMax7230Pwr = 0; - if (byPwr >= priv->byMaxPwrLevel) + if (byPwr >= priv->max_pwr_level) return false; switch (priv->byRFType) { diff --git a/drivers/staging/vt6655/rf.h b/drivers/staging/vt6655/rf.h index 0939937d47a8..9fef81846a9f 100644 --- a/drivers/staging/vt6655/rf.h +++ b/drivers/staging/vt6655/rf.h @@ -60,7 +60,7 @@ bool IFRFbWriteEmbedded(struct vnt_private *priv, unsigned long dwData); bool RFbSelectChannel(struct vnt_private *priv, unsigned char byRFType, u16 byChannel); bool RFbInit(struct vnt_private *priv); -bool RFvWriteWakeProgSyn(struct vnt_private *priv, unsigned char rf_type, u16 channel); +bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type, u16 channel); bool RFbSetPower(struct vnt_private *priv, unsigned int rate, u16 uCH); bool RFbRawSetPower(struct vnt_private *priv, unsigned char byPwr, unsigned int rate); diff --git a/drivers/staging/wlan-ng/prism2mib.c b/drivers/staging/wlan-ng/prism2mib.c index 24ba10d6bd0b..fcf8313870af 100644 --- a/drivers/staging/wlan-ng/prism2mib.c +++ b/drivers/staging/wlan-ng/prism2mib.c @@ -679,16 +679,8 @@ static int prism2mib_priv(struct mibrec *mib, HFA384x_RID_CNFWPADATA, (u8 *)&wpa, sizeof(wpa)); - /* - pstr->len = le16_to_cpu(wpa.datalen); - memcpy(pstr->data, wpa.data, pstr->len); - */ pstr->len = 0; } else { - /* - wpa.datalen = cpu_to_le16(pstr->len); - memcpy(wpa.data, pstr->data, pstr->len); - */ wpa.datalen = 0; hfa384x_drvr_setconfig(hw, |