diff options
Diffstat (limited to 'drivers/tty/hvc')
| -rw-r--r-- | drivers/tty/hvc/Kconfig | 19 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvc_dcc.c | 194 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvc_opal.c | 6 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvc_vio.c | 2 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvc_xen.c | 2 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvcs.c | 5 | ||||
| -rw-r--r-- | drivers/tty/hvc/hvsi.c | 2 |
7 files changed, 217 insertions, 13 deletions
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig index 8d60e0ff67b4..4f9264d005c0 100644 --- a/drivers/tty/hvc/Kconfig +++ b/drivers/tty/hvc/Kconfig @@ -87,6 +87,25 @@ config HVC_DCC driver. This console is used through a JTAG only on ARM. If you don't have a JTAG then you probably don't want this option. +config HVC_DCC_SERIALIZE_SMP + bool "Use DCC only on CPU core 0" + depends on SMP && HVC_DCC + help + This is a DEBUG option to serialize all console input and output to CPU 0. + Some external debuggers, do not handle reads/writes from/to DCC on more + than one CPU core. Each core has its own DCC device registers, so when a + CPU core reads or writes from/to DCC, it only accesses its own DCC device. + Since kernel code can run on any CPU core, every time the kernel wants to + write to the console, it might write to a different DCC. + + In SMP mode, external debuggers create multiple windows, and each window + shows the DCC output only from that core's DCC. The result is that + console output is either lost or scattered across windows. + + Enable this option only if you are sure that you do not need features like + CPU hotplug to work. For example, during early chipset bringups without + debug serial console support. If unsure, say N. + config HVC_RISCV_SBI bool "RISC-V SBI console support" depends on RISCV_SBI_V01 diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c index bd61f9372d83..1751108cf763 100644 --- a/drivers/tty/hvc/hvc_dcc.c +++ b/drivers/tty/hvc/hvc_dcc.c @@ -1,10 +1,15 @@ // SPDX-License-Identifier: GPL-2.0 -/* Copyright (c) 2010, 2014 The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2010, 2014, 2022 The Linux Foundation. All rights reserved. */ #include <linux/console.h> +#include <linux/cpu.h> +#include <linux/cpumask.h> #include <linux/init.h> +#include <linux/kfifo.h> #include <linux/serial.h> #include <linux/serial_core.h> +#include <linux/smp.h> +#include <linux/spinlock.h> #include <asm/dcc.h> #include <asm/processor.h> @@ -15,6 +20,15 @@ #define DCC_STATUS_RX (1 << 30) #define DCC_STATUS_TX (1 << 29) +#define DCC_INBUF_SIZE 128 +#define DCC_OUTBUF_SIZE 1024 + +/* Lock to serialize access to DCC fifo */ +static DEFINE_SPINLOCK(dcc_lock); + +static DEFINE_KFIFO(inbuf, unsigned char, DCC_INBUF_SIZE); +static DEFINE_KFIFO(outbuf, unsigned char, DCC_OUTBUF_SIZE); + static void dcc_uart_console_putchar(struct uart_port *port, unsigned char ch) { while (__dcc_getstatus() & DCC_STATUS_TX) @@ -67,24 +81,176 @@ static int hvc_dcc_get_chars(uint32_t vt, char *buf, int count) return i; } +/* + * Check if the DCC is enabled. If CONFIG_HVC_DCC_SERIALIZE_SMP is enabled, + * then we assume then this function will be called first on core0. That way, + * dcc_core0_available will be true only if it's available on core0. + */ static bool hvc_dcc_check(void) { unsigned long time = jiffies + (HZ / 10); + static bool dcc_core0_available; + + /* + * If we're not on core 0, but we previously confirmed that DCC is + * active, then just return true. + */ + int cpu = get_cpu(); + + if (IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP) && cpu && dcc_core0_available) { + put_cpu(); + return true; + } + + put_cpu(); /* Write a test character to check if it is handled */ __dcc_putchar('\n'); while (time_is_after_jiffies(time)) { - if (!(__dcc_getstatus() & DCC_STATUS_TX)) + if (!(__dcc_getstatus() & DCC_STATUS_TX)) { + dcc_core0_available = true; return true; + } } return false; } +/* + * Workqueue function that writes the output FIFO to the DCC on core 0. + */ +static void dcc_put_work(struct work_struct *work) +{ + unsigned char ch; + unsigned long irqflags; + + spin_lock_irqsave(&dcc_lock, irqflags); + + /* While there's data in the output FIFO, write it to the DCC */ + while (kfifo_get(&outbuf, &ch)) + hvc_dcc_put_chars(0, &ch, 1); + + /* While we're at it, check for any input characters */ + while (!kfifo_is_full(&inbuf)) { + if (!hvc_dcc_get_chars(0, &ch, 1)) + break; + kfifo_put(&inbuf, ch); + } + + spin_unlock_irqrestore(&dcc_lock, irqflags); +} + +static DECLARE_WORK(dcc_pwork, dcc_put_work); + +/* + * Workqueue function that reads characters from DCC and puts them into the + * input FIFO. + */ +static void dcc_get_work(struct work_struct *work) +{ + unsigned char ch; + unsigned long irqflags; + + /* + * Read characters from DCC and put them into the input FIFO, as + * long as there is room and we have characters to read. + */ + spin_lock_irqsave(&dcc_lock, irqflags); + + while (!kfifo_is_full(&inbuf)) { + if (!hvc_dcc_get_chars(0, &ch, 1)) + break; + kfifo_put(&inbuf, ch); + } + spin_unlock_irqrestore(&dcc_lock, irqflags); +} + +static DECLARE_WORK(dcc_gwork, dcc_get_work); + +/* + * Write characters directly to the DCC if we're on core 0 and the FIFO + * is empty, or write them to the FIFO if we're not. + */ +static int hvc_dcc0_put_chars(u32 vt, const char *buf, int count) +{ + int len; + unsigned long irqflags; + + if (!IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP)) + return hvc_dcc_put_chars(vt, buf, count); + + spin_lock_irqsave(&dcc_lock, irqflags); + if (smp_processor_id() || (!kfifo_is_empty(&outbuf))) { + len = kfifo_in(&outbuf, buf, count); + spin_unlock_irqrestore(&dcc_lock, irqflags); + + /* + * We just push data to the output FIFO, so schedule the + * workqueue that will actually write that data to DCC. + * CPU hotplug is disabled in dcc_init so CPU0 cannot be + * offlined after the cpu online check. + */ + if (cpu_online(0)) + schedule_work_on(0, &dcc_pwork); + + return len; + } + + /* + * If we're already on core 0, and the FIFO is empty, then just + * write the data to DCC. + */ + len = hvc_dcc_put_chars(vt, buf, count); + spin_unlock_irqrestore(&dcc_lock, irqflags); + + return len; +} + +/* + * Read characters directly from the DCC if we're on core 0 and the FIFO + * is empty, or read them from the FIFO if we're not. + */ +static int hvc_dcc0_get_chars(u32 vt, char *buf, int count) +{ + int len; + unsigned long irqflags; + + if (!IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP)) + return hvc_dcc_get_chars(vt, buf, count); + + spin_lock_irqsave(&dcc_lock, irqflags); + + if (smp_processor_id() || (!kfifo_is_empty(&inbuf))) { + len = kfifo_out(&inbuf, buf, count); + spin_unlock_irqrestore(&dcc_lock, irqflags); + + /* + * If the FIFO was empty, there may be characters in the DCC + * that we haven't read yet. Schedule a workqueue to fill + * the input FIFO, so that the next time this function is + * called, we'll have data. CPU hotplug is disabled in dcc_init + * so CPU0 cannot be offlined after the cpu online check. + */ + if (!len && cpu_online(0)) + schedule_work_on(0, &dcc_gwork); + + return len; + } + + /* + * If we're already on core 0, and the FIFO is empty, then just + * read the data from DCC. + */ + len = hvc_dcc_get_chars(vt, buf, count); + spin_unlock_irqrestore(&dcc_lock, irqflags); + + return len; +} + static const struct hv_ops hvc_dcc_get_put_ops = { - .get_chars = hvc_dcc_get_chars, - .put_chars = hvc_dcc_put_chars, + .get_chars = hvc_dcc0_get_chars, + .put_chars = hvc_dcc0_put_chars, }; static int __init hvc_dcc_console_init(void) @@ -108,6 +274,26 @@ static int __init hvc_dcc_init(void) if (!hvc_dcc_check()) return -ENODEV; + if (IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP)) { + pr_warn("\n"); + pr_warn("********************************************************************\n"); + pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); + pr_warn("** **\n"); + pr_warn("** HVC_DCC_SERIALIZE_SMP SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n"); + pr_warn("** **\n"); + pr_warn("** This means that this is a DEBUG kernel and unsafe for **\n"); + pr_warn("** production use and has important feature like CPU hotplug **\n"); + pr_warn("** disabled. **\n"); + pr_warn("** **\n"); + pr_warn("** If you see this message and you are not debugging the **\n"); + pr_warn("** kernel, report this immediately to your vendor! **\n"); + pr_warn("** **\n"); + pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); + pr_warn("********************************************************************\n"); + + cpu_hotplug_disable(); + } + p = hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); return PTR_ERR_OR_ZERO(p); diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c index 056ae21a5121..794c7b18aa06 100644 --- a/drivers/tty/hvc/hvc_opal.c +++ b/drivers/tty/hvc/hvc_opal.c @@ -13,12 +13,12 @@ #include <linux/slab.h> #include <linux/console.h> #include <linux/of.h> +#include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/export.h> #include <linux/interrupt.h> #include <asm/hvconsole.h> -#include <asm/prom.h> #include <asm/firmware.h> #include <asm/hvsi.h> #include <asm/udbg.h> @@ -342,9 +342,9 @@ void __init hvc_opal_init_early(void) * path, so we hard wire it */ opal = of_find_node_by_path("/ibm,opal/consoles"); - if (opal) + if (opal) { pr_devel("hvc_opal: Found consoles in new location\n"); - if (!opal) { + } else { opal = of_find_node_by_path("/ibm,opal"); if (opal) pr_devel("hvc_opal: " diff --git a/drivers/tty/hvc/hvc_vio.c b/drivers/tty/hvc/hvc_vio.c index 72b11aa7e0a6..736b230f5ec0 100644 --- a/drivers/tty/hvc/hvc_vio.c +++ b/drivers/tty/hvc/hvc_vio.c @@ -28,10 +28,10 @@ #include <linux/delay.h> #include <linux/slab.h> #include <linux/console.h> +#include <linux/of.h> #include <asm/hvconsole.h> #include <asm/vio.h> -#include <asm/prom.h> #include <asm/hvsi.h> #include <asm/udbg.h> #include <asm/machdep.h> diff --git a/drivers/tty/hvc/hvc_xen.c b/drivers/tty/hvc/hvc_xen.c index ebaf7500f48f..7c23112dc923 100644 --- a/drivers/tty/hvc/hvc_xen.c +++ b/drivers/tty/hvc/hvc_xen.c @@ -253,7 +253,7 @@ static int xen_hvm_console_init(void) if (r < 0 || v == 0) goto err; gfn = v; - info->intf = xen_remap(gfn << XEN_PAGE_SHIFT, XEN_PAGE_SIZE); + info->intf = memremap(gfn << XEN_PAGE_SHIFT, XEN_PAGE_SIZE, MEMREMAP_WB); if (info->intf == NULL) goto err; info->vtermno = HVC_COOKIE; diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c index 245da1dfd818..9b7e8246a464 100644 --- a/drivers/tty/hvc/hvcs.c +++ b/drivers/tty/hvc/hvcs.c @@ -581,10 +581,9 @@ static int hvcs_io(struct hvcs_struct *hvcsd) spin_unlock_irqrestore(&hvcsd->lock, flags); /* This is synch -- FIXME :js: it is not! */ - if(got) + if (got) tty_flip_buffer_push(&hvcsd->port); - - if (!got) { + else { /* Do this _after_ the flip_buffer_push */ spin_lock_irqsave(&hvcsd->lock, flags); vio_enable_interrupts(hvcsd->vdev); diff --git a/drivers/tty/hvc/hvsi.c b/drivers/tty/hvc/hvsi.c index aa81f4835fef..a200d01eceed 100644 --- a/drivers/tty/hvc/hvsi.c +++ b/drivers/tty/hvc/hvsi.c @@ -26,13 +26,13 @@ #include <linux/module.h> #include <linux/major.h> #include <linux/kernel.h> +#include <linux/of_irq.h> #include <linux/spinlock.h> #include <linux/sysrq.h> #include <linux/tty.h> #include <linux/tty_flip.h> #include <asm/hvcall.h> #include <asm/hvconsole.h> -#include <asm/prom.h> #include <linux/uaccess.h> #include <asm/vio.h> #include <asm/param.h> |