diff options
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/bcm-sr.h | 101 | ||||
| -rw-r--r-- | include/dt-bindings/clock/gxbb-clkc.h | 10 |
2 files changed, 110 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/bcm-sr.h b/include/dt-bindings/clock/bcm-sr.h new file mode 100644 index 000000000000..cff6c6fe2947 --- /dev/null +++ b/include/dt-bindings/clock/bcm-sr.h @@ -0,0 +1,101 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _CLOCK_BCM_SR_H +#define _CLOCK_BCM_SR_H + +/* GENPLL 0 clock channel ID SCR HSLS FS PCIE */ +#define BCM_SR_GENPLL0 0 +#define BCM_SR_GENPLL0_SATA_CLK 1 +#define BCM_SR_GENPLL0_SCR_CLK 2 +#define BCM_SR_GENPLL0_250M_CLK 3 +#define BCM_SR_GENPLL0_PCIE_AXI_CLK 4 +#define BCM_SR_GENPLL0_PAXC_AXI_X2_CLK 5 +#define BCM_SR_GENPLL0_PAXC_AXI_CLK 6 + +/* GENPLL 1 clock channel ID MHB PCIE NITRO */ +#define BCM_SR_GENPLL1 0 +#define BCM_SR_GENPLL1_PCIE_TL_CLK 1 +#define BCM_SR_GENPLL1_MHB_APB_CLK 2 + +/* GENPLL 2 clock channel ID NITRO MHB*/ +#define BCM_SR_GENPLL2 0 +#define BCM_SR_GENPLL2_NIC_CLK 1 +#define BCM_SR_GENPLL2_250_NITRO_CLK 2 +#define BCM_SR_GENPLL2_125_NITRO_CLK 3 +#define BCM_SR_GENPLL2_CHIMP_CLK 4 + +/* GENPLL 3 HSLS clock channel ID */ +#define BCM_SR_GENPLL3 0 +#define BCM_SR_GENPLL3_HSLS_CLK 1 +#define BCM_SR_GENPLL3_SDIO_CLK 2 + +/* GENPLL 4 SCR clock channel ID */ +#define BCM_SR_GENPLL4 0 +#define BCM_SR_GENPLL4_CCN_CLK 1 + +/* GENPLL 5 FS4 clock channel ID */ +#define BCM_SR_GENPLL5 0 +#define BCM_SR_GENPLL5_FS_CLK 1 +#define BCM_SR_GENPLL5_SPU_CLK 2 + +/* GENPLL 6 NITRO clock channel ID */ +#define BCM_SR_GENPLL6 0 +#define BCM_SR_GENPLL6_48_USB_CLK 1 + +/* LCPLL0 clock channel ID */ +#define BCM_SR_LCPLL0 0 +#define BCM_SR_LCPLL0_SATA_REF_CLK 1 +#define BCM_SR_LCPLL0_USB_REF_CLK 2 +#define BCM_SR_LCPLL0_SATA_REFPN_CLK 3 + +/* LCPLL1 clock channel ID */ +#define BCM_SR_LCPLL1 0 +#define BCM_SR_LCPLL1_WAN_CLK 1 + +/* LCPLL PCIE clock channel ID */ +#define BCM_SR_LCPLL_PCIE 0 +#define BCM_SR_LCPLL_PCIE_PHY_REF_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL0 0 +#define BCM_SR_EMEMPLL0_EMEM_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL1 0 +#define BCM_SR_EMEMPLL1_EMEM_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL2 0 +#define BCM_SR_EMEMPLL2_EMEM_CLK 1 + +#endif /* _CLOCK_BCM_SR_H */ diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 3190e30b9398..e3e9f7919c31 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -5,7 +5,6 @@ #ifndef __GXBB_CLKC_H #define __GXBB_CLKC_H -#define CLKID_CPUCLK 1 #define CLKID_HDMI_PLL 2 #define CLKID_FCLK_DIV2 4 #define CLKID_FCLK_DIV3 5 @@ -13,24 +12,30 @@ #define CLKID_GP0_PLL 9 #define CLKID_CLK81 12 #define CLKID_MPLL2 15 +#define CLKID_SPICC 21 #define CLKID_I2C 22 #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 +#define CLKID_UART0 26 #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 +#define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 +#define CLKID_UART1 48 #define CLKID_USB0 50 #define CLKID_USB1 51 #define CLKID_USB 55 #define CLKID_HDMI_PCLK 63 #define CLKID_USB1_DDR_BRIDGE 64 #define CLKID_USB0_DDR_BRIDGE 65 +#define CLKID_UART2 68 #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 +#define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95 @@ -42,5 +47,8 @@ #define CLKID_MALI_1_SEL 103 #define CLKID_MALI_1 105 #define CLKID_MALI 106 +#define CLKID_CTS_AMCLK 107 +#define CLKID_CTS_MCLK_I958 110 +#define CLKID_CTS_I958 113 #endif /* __GXBB_CLKC_H */ |