diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/nehalemex/other.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/nehalemex/other.json | 48 |
1 files changed, 13 insertions, 35 deletions
diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/other.json b/tools/perf/pmu-events/arch/x86/nehalemex/other.json index fb706cb51832..5fe5ca778e9f 100644 --- a/tools/perf/pmu-events/arch/x86/nehalemex/other.json +++ b/tools/perf/pmu-events/arch/x86/nehalemex/other.json @@ -1,6 +1,7 @@ [ { "BriefDescription": "ES segment renames", + "Counter": "0,1,2,3", "EventCode": "0xD5", "EventName": "ES_REG_RENAMES", "SampleAfterValue": "2000000", @@ -8,48 +9,15 @@ }, { "BriefDescription": "I/O transactions", + "Counter": "0,1,2,3", "EventCode": "0x6C", "EventName": "IO_TRANSACTIONS", "SampleAfterValue": "2000000", "UMask": "0x1" }, { - "BriefDescription": "L1I instruction fetch stall cycles", - "EventCode": "0x80", - "EventName": "L1I.CYCLES_STALLED", - "SampleAfterValue": "2000000", - "UMask": "0x4" - }, - { - "BriefDescription": "L1I instruction fetch hits", - "EventCode": "0x80", - "EventName": "L1I.HITS", - "SampleAfterValue": "2000000", - "UMask": "0x1" - }, - { - "BriefDescription": "L1I instruction fetch misses", - "EventCode": "0x80", - "EventName": "L1I.MISSES", - "SampleAfterValue": "2000000", - "UMask": "0x2" - }, - { - "BriefDescription": "L1I Instruction fetches", - "EventCode": "0x80", - "EventName": "L1I.READS", - "SampleAfterValue": "2000000", - "UMask": "0x3" - }, - { - "BriefDescription": "Large ITLB hit", - "EventCode": "0x82", - "EventName": "LARGE_ITLB.HIT", - "SampleAfterValue": "200000", - "UMask": "0x1" - }, - { "BriefDescription": "All loads dispatched", + "Counter": "0,1,2,3", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.ANY", "SampleAfterValue": "2000000", @@ -57,6 +25,7 @@ }, { "BriefDescription": "Loads dispatched from the MOB", + "Counter": "0,1,2,3", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.MOB", "SampleAfterValue": "2000000", @@ -64,6 +33,7 @@ }, { "BriefDescription": "Loads dispatched that bypass the MOB", + "Counter": "0,1,2,3", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.RS", "SampleAfterValue": "2000000", @@ -71,6 +41,7 @@ }, { "BriefDescription": "Loads dispatched from stage 305", + "Counter": "0,1,2,3", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.RS_DELAYED", "SampleAfterValue": "2000000", @@ -78,6 +49,7 @@ }, { "BriefDescription": "False dependencies due to partial address aliasing", + "Counter": "0,1,2,3", "EventCode": "0x7", "EventName": "PARTIAL_ADDRESS_ALIAS", "SampleAfterValue": "200000", @@ -85,6 +57,7 @@ }, { "BriefDescription": "All Store buffer stall cycles", + "Counter": "0,1,2,3", "EventCode": "0x4", "EventName": "SB_DRAIN.ANY", "SampleAfterValue": "200000", @@ -92,6 +65,7 @@ }, { "BriefDescription": "Segment rename stall cycles", + "Counter": "0,1,2,3", "EventCode": "0xD4", "EventName": "SEG_RENAME_STALLS", "SampleAfterValue": "2000000", @@ -99,6 +73,7 @@ }, { "BriefDescription": "Thread responded HIT to snoop", + "Counter": "0,1,2,3", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HIT", "SampleAfterValue": "100000", @@ -106,6 +81,7 @@ }, { "BriefDescription": "Thread responded HITE to snoop", + "Counter": "0,1,2,3", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HITE", "SampleAfterValue": "100000", @@ -113,6 +89,7 @@ }, { "BriefDescription": "Thread responded HITM to snoop", + "Counter": "0,1,2,3", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HITM", "SampleAfterValue": "100000", @@ -120,6 +97,7 @@ }, { "BriefDescription": "Super Queue full stall cycles", + "Counter": "0,1,2,3", "EventCode": "0xF6", "EventName": "SQ_FULL_STALL_CYCLES", "SampleAfterValue": "2000000", |