diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/skylake/cache.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/skylake/cache.json | 4092 |
1 files changed, 2045 insertions, 2047 deletions
diff --git a/tools/perf/pmu-events/arch/x86/skylake/cache.json b/tools/perf/pmu-events/arch/x86/skylake/cache.json index 720458139049..27ea2b00ad00 100644 --- a/tools/perf/pmu-events/arch/x86/skylake/cache.json +++ b/tools/perf/pmu-events/arch/x86/skylake/cache.json @@ -1,2928 +1,2926 @@ [ { - "PublicDescription": "Counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted.", - "EventCode": "0x24", - "Counter": "0,1,2,3", - "UMask": "0x21", - "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS", - "SampleAfterValue": "200003", - "BriefDescription": "Demand Data Read miss L2, no rejects", - "CounterHTOff": "0,1,2,3,4,5,6,7" - }, - { - "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x22", - "EventName": "L2_RQSTS.RFO_MISS", - "SampleAfterValue": "200003", - "BriefDescription": "RFO requests that miss L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400400002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts L2 cache misses when fetching instructions.", - "EventCode": "0x24", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x24", - "EventName": "L2_RQSTS.CODE_RD_MISS", - "SampleAfterValue": "200003", - "BriefDescription": "L2 cache misses when fetching instructions", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400108000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Demand requests that miss L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x27", - "EventName": "L2_RQSTS.ALL_DEMAND_MISS", - "SampleAfterValue": "200003", - "BriefDescription": "Demand requests that miss L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100040002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x38", - "EventName": "L2_RQSTS.PF_MISS", - "SampleAfterValue": "200003", - "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0080001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "All requests that miss L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM", "Counter": "0,1,2,3", - "UMask": "0x3f", - "EventName": "L2_RQSTS.MISS", - "SampleAfterValue": "200003", - "BriefDescription": "All requests that miss L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB0", + "EventName": "OFFCORE_REQUESTS.DEMAND_RFO", + "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.", + "SampleAfterValue": "100003", + "UMask": "0x4" }, { - "PublicDescription": "Counts the number of demand Data Read requests, initiated by load instructions, that hit L2 cache", - "EventCode": "0x24", + "BriefDescription": "Counts all demand code readshave any response type.", "Counter": "0,1,2,3", - "UMask": "0xc1", - "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT", - "SampleAfterValue": "200003", - "BriefDescription": "Demand Data Read requests that hit L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010004", + "Offcore": "1", + "PublicDescription": "Counts all demand code readshave any response type.", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0xc2", - "EventName": "L2_RQSTS.RFO_HIT", - "SampleAfterValue": "200003", - "BriefDescription": "RFO requests that hit L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100020002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.", - "EventCode": "0x24", + "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache", "Counter": "0,1,2,3", - "UMask": "0xc4", - "EventName": "L2_RQSTS.CODE_RD_HIT", - "SampleAfterValue": "200003", - "BriefDescription": "L2 cache hits when fetching instructions, code reads.", - "CounterHTOff": "0,1,2,3,4,5,6,7" - }, - { - "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache.", + "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0x24", - "Counter": "0,1,2,3", - "UMask": "0xd8", - "EventName": "L2_RQSTS.PF_HIT", + "EventName": "L2_RQSTS.PF_MISS", + "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache.", "SampleAfterValue": "200003", - "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x38" }, { - "PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted.", - "EventCode": "0x24", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0xe1", - "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD", - "SampleAfterValue": "200003", - "BriefDescription": "Demand Data Read requests", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC01C0004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.", - "EventCode": "0x24", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0xe2", - "EventName": "L2_RQSTS.ALL_RFO", - "SampleAfterValue": "200003", - "BriefDescription": "RFO requests to L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100040001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the total number of L2 code requests.", - "EventCode": "0x24", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0xe4", - "EventName": "L2_RQSTS.ALL_CODE_RD", - "SampleAfterValue": "200003", - "BriefDescription": "L2 code requests", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040100001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Demand requests to L2 cache.", - "EventCode": "0x24", + "BriefDescription": "Demand requests that miss L2 cache", "Counter": "0,1,2,3", - "UMask": "0xe7", - "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES", - "SampleAfterValue": "200003", - "BriefDescription": "Demand requests to L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" - }, - { - "PublicDescription": "Counts the total number of requests from the L2 hardware prefetchers.", + "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0x24", - "Counter": "0,1,2,3", - "UMask": "0xf8", - "EventName": "L2_RQSTS.ALL_PF", + "EventName": "L2_RQSTS.ALL_DEMAND_MISS", + "PublicDescription": "Demand requests that miss L2 cache.", "SampleAfterValue": "200003", - "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x27" }, { - "PublicDescription": "All L2 requests.", - "EventCode": "0x24", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0xff", - "EventName": "L2_RQSTS.REFERENCES", - "SampleAfterValue": "200003", - "BriefDescription": "All L2 requests", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400100002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2. It does not include all misses to the L3.", - "EventCode": "0x2E", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x41", - "Errata": "SKL057", - "EventName": "LONGEST_LAT_CACHE.MISS", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080028000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", "SampleAfterValue": "100003", - "BriefDescription": "Core-originated cacheable demand requests missed L3", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2. It does not include all accesses to the L3.", - "EventCode": "0x2E", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x4f", - "Errata": "SKL057", - "EventName": "LONGEST_LAT_CACHE.REFERENCE", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040080004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", - "BriefDescription": "Core-originated cacheable demand requests that refer to L3", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.", - "EventCode": "0x48", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "L1D_PEND_MISS.PENDING", - "SampleAfterValue": "2000003", - "BriefDescription": "L1D miss outstandings duration in cycles", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0408000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts duration of L1D miss outstanding in cycles.", - "EventCode": "0x48", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "L1D_PEND_MISS.PENDING_CYCLES", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles with L1D load Misses outstanding.", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400400004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "EventCode": "0x48", + "BriefDescription": "Retired load instructions with L3 cache hits as data sources", "Counter": "0,1,2,3", - "UMask": "0x1", - "AnyThread": "1", - "EventName": "L1D_PEND_MISS.PENDING_CYCLES_ANY", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L3_HIT", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache.", + "SampleAfterValue": "50021", + "UMask": "0x4" }, { - "PublicDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry available for it. A request includes cacheable/uncacheable demands that are load, store or SW prefetch instructions.", - "EventCode": "0x48", + "BriefDescription": "L2 writebacks that access L2 cache", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "L1D_PEND_MISS.FB_FULL", - "SampleAfterValue": "2000003", - "BriefDescription": "Number of times a request needed a FB entry but there was no entry available for it. That is the FB unavailability was dominant reason for blocking the request. A request includes cacheable/uncacheable demands that is load, store or SW prefetch.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF0", + "EventName": "L2_TRANS.L2_WB", + "PublicDescription": "Counts L2 writebacks that access L2 cache.", + "SampleAfterValue": "200003", + "UMask": "0x40" }, { - "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", - "EventCode": "0x51", + "BriefDescription": "L2 cache lines filling L2", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "L1D.REPLACEMENT", - "SampleAfterValue": "2000003", - "BriefDescription": "L1D data line replacements", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF1", + "EventName": "L2_LINES_IN.ALL", + "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.", + "SampleAfterValue": "100003", + "UMask": "0x1f" }, { - "PublicDescription": "Counts the number of offcore outstanding Demand Data Read transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor. See the corresponding Umask under OFFCORE_REQUESTS.Note: A prefetch promoted to Demand is counted from the promotion point.", - "EventCode": "0x60", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Offcore outstanding Demand Data Read transactions in uncore queue.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400408000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts cycles when offcore outstanding Demand Data Read transactions are present in the super queue (SQ). A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation).", - "EventCode": "0x60", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00401C0002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "EventCode": "0x60", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue.", - "CounterMask": "6", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400040004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Demand Data Read requests sent to uncore", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB0", + "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD", + "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore.", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0400004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of offcore outstanding RFO (store) transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", - "SampleAfterValue": "2000003", - "BriefDescription": "Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles with offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore.", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080080002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x8", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080100001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", - "EventCode": "0x60", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x8", - "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD", - "SampleAfterValue": "2000003", - "BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore.", - "CounterMask": "1", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.", - "EventCode": "0xB0", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001C0004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", - "BriefDescription": "Demand Data Read requests sent to uncore", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts both cacheable and non-cacheable code read requests.", - "EventCode": "0xB0", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00801C0002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", "SampleAfterValue": "100003", - "BriefDescription": "Cacheable and noncachaeble code read requests", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.", - "EventCode": "0xB0", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "OFFCORE_REQUESTS.DEMAND_RFO", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080100004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", - "BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.", - "EventCode": "0xB0", + "BriefDescription": "Retired load instructions missed L3 cache as data sources", "Counter": "0,1,2,3", - "UMask": "0x8", - "EventName": "OFFCORE_REQUESTS.ALL_DATA_RD", - "SampleAfterValue": "100003", - "BriefDescription": "Demand and prefetch data reads", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L3_MISS", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache.", + "SampleAfterValue": "100007", + "UMask": "0x20" }, { - "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..", - "EventCode": "0xB0", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x80", - "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040020001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", "SampleAfterValue": "100003", - "BriefDescription": "Any memory transaction that reached the SQ.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of cases when the offcore requests buffer cannot take more entries for the core. This can happen when the superqueue does not contain eligible entries, or when L1D writeback pending FIFO requests is full.Note: Writeback pending FIFO has six entries.", - "EventCode": "0xB2", + "BriefDescription": "All retired store instructions.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_REQUESTS_BUFFER.SQ_FULL", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.ALL_STORES", + "L1_Hit_Indication": "1", + "PEBS": "1", "SampleAfterValue": "2000003", - "BriefDescription": "Offcore requests buffer cannot take more entries for this thread core.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x82" }, { - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "EventCode": "0xB7, 0xBB", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080020004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", - "BriefDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions that miss the STLB.", - "EventCode": "0xD0", + "BriefDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", "Counter": "0,1,2,3", - "UMask": "0x11", - "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS", - "SampleAfterValue": "100003", - "BriefDescription": "Retired load instructions that miss the STLB. (Precise Event)", - "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF2", + "EventName": "L2_LINES_OUT.SILENT", + "SampleAfterValue": "200003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired store instructions that miss the STLB.", - "EventCode": "0xD0", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x12", - "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES", - "SampleAfterValue": "100003", - "BriefDescription": "Retired store instructions that miss the STLB. (Precise Event)", "CounterHTOff": "0,1,2,3", - "Data_LA": "1", - "L1_Hit_Indication": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040048000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD0", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x21", - "EventName": "MEM_INST_RETIRED.LOCK_LOADS", - "SampleAfterValue": "100007", - "BriefDescription": "Retired load instructions with locked access. (Precise Event)", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000088000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD0", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x41", - "EventName": "MEM_INST_RETIRED.SPLIT_LOADS", - "SampleAfterValue": "100003", - "BriefDescription": "Retired load instructions that split across a cacheline boundary. (Precise Event)", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040400004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD0", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x42", - "EventName": "MEM_INST_RETIRED.SPLIT_STORES", - "SampleAfterValue": "100003", - "BriefDescription": "Retired store instructions that split across a cacheline boundary. (Precise Event)", "CounterHTOff": "0,1,2,3", - "Data_LA": "1", - "L1_Hit_Indication": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x02001C0002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD0", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x81", - "EventName": "MEM_INST_RETIRED.ALL_LOADS", - "SampleAfterValue": "2000003", - "BriefDescription": "All retired load instructions. (Precise Event)", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080020001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "All retired store instructions.", - "EventCode": "0xD0", + "BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore.", "Counter": "0,1,2,3", - "UMask": "0x82", - "EventName": "MEM_INST_RETIRED.ALL_STORES", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD", + "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", "SampleAfterValue": "2000003", - "BriefDescription": "All retired store instructions. (Precise Event)", - "CounterHTOff": "0,1,2,3", - "Data_LA": "1", - "L1_Hit_Indication": "1" + "UMask": "0x8" }, { - "PEBS": "1", - "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source.", - "EventCode": "0xD1", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "MEM_LOAD_RETIRED.L1_HIT", - "SampleAfterValue": "2000003", - "BriefDescription": "Retired load instructions with L1 cache hits as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x02001C0004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions with L2 cache hits as data sources.", - "EventCode": "0xD1", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "MEM_LOAD_RETIRED.L2_HIT", - "SampleAfterValue": "100003", - "BriefDescription": "Retired load instructions with L2 cache hits as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400040002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions with L3 cache hits as data sources.", - "EventCode": "0xD1", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "MEM_LOAD_RETIRED.L3_HIT", - "SampleAfterValue": "50021", - "BriefDescription": "Retired load instructions with L3 cache hits as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000028000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache.", - "EventCode": "0xD1", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x8", - "EventName": "MEM_LOAD_RETIRED.L1_MISS", - "SampleAfterValue": "100003", - "BriefDescription": "Retired load instructions missed L1 cache as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200028000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions missed L2 cache as data sources.", - "EventCode": "0xD1", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x10", - "EventName": "MEM_LOAD_RETIRED.L2_MISS", - "SampleAfterValue": "50021", - "BriefDescription": "Retired load instructions missed L2 cache as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x04001C0001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions missed L3 cache as data sources.", - "EventCode": "0xD1", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x20", - "EventName": "MEM_LOAD_RETIRED.L3_MISS", - "SampleAfterValue": "100007", - "BriefDescription": "Retired load instructions missed L3 cache as data sources", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready.", - "EventCode": "0xD1", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x40", - "EventName": "MEM_LOAD_RETIRED.FB_HIT", - "SampleAfterValue": "100007", - "BriefDescription": "Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x04001C8000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD2", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", - "SampleAfterValue": "20011", - "BriefDescription": "Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache.", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache.", - "EventCode": "0xD2", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", - "SampleAfterValue": "20011", - "BriefDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200020001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions which data sources were HitM responses from shared L3.", - "EventCode": "0xD2", + "BriefDescription": "Core-originated cacheable demand requests missed L3", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", - "SampleAfterValue": "20011", - "BriefDescription": "Retired load instructions which data sources were HitM responses from shared L3", - "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "Errata": "SKL057", + "EventCode": "0x2E", + "EventName": "LONGEST_LAT_CACHE.MISS", + "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2. It does not include all misses to the L3.", + "SampleAfterValue": "100003", + "UMask": "0x41" }, { - "PEBS": "1", - "PublicDescription": "Retired load instructions which data sources were hits in L3 without snoops required.", - "EventCode": "0xD2", + "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.ALL_PF", + "PublicDescription": "Counts the total number of requests from the L2 hardware prefetchers.", + "SampleAfterValue": "200003", + "UMask": "0xf8" + }, + { + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x8", - "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", - "SampleAfterValue": "100003", - "BriefDescription": "Retired load instructions which data sources were hits in L3 without snoops required", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0080004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xD4", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "MEM_LOAD_MISC_RETIRED.UC", - "SampleAfterValue": "100007", - "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.", "CounterHTOff": "0,1,2,3", - "Data_LA": "1" + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts L2 writebacks that access L2 cache.", - "EventCode": "0xF0", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x40", - "EventName": "L2_TRANS.L2_WB", - "SampleAfterValue": "200003", - "BriefDescription": "L2 writebacks that access L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040040002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.", - "EventCode": "0xF1", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1f", - "EventName": "L2_LINES_IN.ALL", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", "SampleAfterValue": "100003", - "BriefDescription": "L2 cache lines filling L2", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "EventCode": "0xF2", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "L2_LINES_OUT.SILENT", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100028000", + "Offcore": "1", + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "EventCode": "0xF2", + "BriefDescription": "Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle", "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "L2_LINES_OUT.NON_SILENT", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", + "PublicDescription": "Counts the number of offcore outstanding RFO (store) transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", + "SampleAfterValue": "2000003", + "UMask": "0x4" }, { - "PublicDescription": "This event is deprecated. Refer to new event L2_LINES_OUT.USELESS_HWPF", - "EventCode": "0xF2", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "L2_LINES_OUT.USELESS_PREF", - "SampleAfterValue": "200003", - "BriefDescription": "This event is deprecated. Refer to new event L2_LINES_OUT.USELESS_HWPF", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200080004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "EventCode": "0xF2", + "BriefDescription": "RFO requests that miss L2 cache", "Counter": "0,1,2,3", - "UMask": "0x4", - "EventName": "L2_LINES_OUT.USELESS_HWPF", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.RFO_MISS", + "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of lines that have been hardware prefetched but not used and now evicted by L2 cache", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x22" }, { - "PublicDescription": "Counts the number of cache line split locks sent to the uncore.", - "EventCode": "0xF4", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x10", - "EventName": "SQ_MISC.SPLIT_LOCK", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400040001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", "SampleAfterValue": "100003", - "BriefDescription": "Number of cache line split locks sent to uncore.", - "CounterHTOff": "0,1,2,3,4,5,6,7" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0408000", + "BriefDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF2", + "EventName": "L2_LINES_OUT.NON_SILENT", + "SampleAfterValue": "200003", + "UMask": "0x2" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000408000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040028000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400408000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200040002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200408000", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200408000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100408000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080408000", + "BriefDescription": "Counts the number of lines that have been hardware prefetched but not used and now evicted by L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF2", + "EventName": "L2_LINES_OUT.USELESS_HWPF", + "SampleAfterValue": "200003", + "UMask": "0x4" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040408000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200040001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC01C8000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200100001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x10001C8000", + "BriefDescription": "Counts all demand data writes (RFOs)have any response type.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)have any response type.", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x04001C8000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x04001C0002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x02001C8000", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00401C0004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x01001C8000", + "BriefDescription": "All requests that miss L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.MISS", + "PublicDescription": "All requests that miss L2 cache.", + "SampleAfterValue": "200003", + "UMask": "0x3f" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00801C8000", + "BriefDescription": "L2 code requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.ALL_CODE_RD", + "PublicDescription": "Counts the total number of L2 code requests.", + "SampleAfterValue": "200003", + "UMask": "0xe4" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00401C8000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0108000", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400100004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000108000", + "BriefDescription": "RFO requests that hit L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.RFO_HIT", + "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.", + "SampleAfterValue": "200003", + "UMask": "0xc2" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400108000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200108000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100108000", + "BriefDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD2", + "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", + "PEBS": "1", + "PublicDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache.", + "SampleAfterValue": "20011", + "UMask": "0x2" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080108000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040108000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0088000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000040002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000088000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0028000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400088000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200088000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400080001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100088000", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080088000", + "BriefDescription": "Retired load instructions missed L1 cache as data sources", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L1_MISS", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache.", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x8" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040088000", + "BriefDescription": "L2 cache misses when fetching instructions", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.CODE_RD_MISS", + "PublicDescription": "Counts L2 cache misses when fetching instructions.", + "SampleAfterValue": "200003", + "UMask": "0x24" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0048000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01001C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000048000", + "BriefDescription": "Offcore outstanding Demand Data Read transactions in uncore queue.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", + "PublicDescription": "Counts the number of offcore outstanding Demand Data Read transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor. See the corresponding Umask under OFFCORE_REQUESTS.Note: A prefetch promoted to Demand is counted from the promotion point.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400048000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200048000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC01C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100048000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400028000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080048000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040048000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0028000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000028000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080400001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400028000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080400002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200028000", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts any other requests", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x02001C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100028000", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100020001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080028000", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts any other requests", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040028000", + "BriefDescription": "Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD", + "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", + "SampleAfterValue": "2000003", + "UMask": "0x2" }, { - "PublicDescription": "Counts any other requests have any response type.", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0000018000", + "BriefDescription": "Demand requests to L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.OTHER.ANY_RESPONSE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts any other requests have any response type.", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES", + "PublicDescription": "Demand requests to L2 cache.", + "SampleAfterValue": "200003", + "UMask": "0xe7" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0400004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000400004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400400004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000020001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200400004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040020002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100400004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080400004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040400004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0040002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC01C0004", + "AnyThread": "1", + "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x48", + "EventName": "L1D_PEND_MISS.PENDING_CYCLES_ANY", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x10001C0004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC01C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x04001C0004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x02001C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x02001C0004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x01001C0004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000100001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00801C0004", + "BriefDescription": "Core-originated cacheable demand requests that refer to L3", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "Errata": "SKL057", + "EventCode": "0x2E", + "EventName": "LONGEST_LAT_CACHE.REFERENCE", + "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2. It does not include all accesses to the L3.", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x4f" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00401C0004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0100004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0400001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000100004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400100004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200100004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040080001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100100004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080100004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040100004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040040001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0080004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000080004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400080004", + "BriefDescription": "Retired load instructions that miss the STLB.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS", + "PEBS": "1", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x11" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200080004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100080004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200400001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080080004", + "BriefDescription": "Counts demand data readshave any response type.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data readshave any response type.", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040080004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0040004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080080004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000040004", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400040004", + "BriefDescription": "L1D data line replacements", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x51", + "EventName": "L1D.REPLACEMENT", + "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200040004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100040004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0400002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080040004", + "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD4", + "EventName": "MEM_LOAD_MISC_RETIRED.UC", + "PEBS": "1", + "SampleAfterValue": "100007", + "UMask": "0x4" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040040004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0020004", + "BriefDescription": "Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.FB_HIT", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready.", + "SampleAfterValue": "100007", + "UMask": "0x40" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000020004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0020001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400020004", + "BriefDescription": "This event is deprecated. Refer to new event L2_LINES_OUT.USELESS_HWPF", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF2", + "EventName": "L2_LINES_OUT.USELESS_PREF", + "SampleAfterValue": "200003", + "UMask": "0x4" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200020004", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000020002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100020004", + "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.PF_HIT", + "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache.", + "SampleAfterValue": "200003", + "UMask": "0xd8" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080020004", + "BriefDescription": "Demand Data Read miss L2, no rejects", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS", + "PublicDescription": "Counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted.", + "SampleAfterValue": "200003", + "UMask": "0x21" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040020004", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any response type.", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0000010004", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.ANY_RESPONSE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any response type.", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400100001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0400002", + "BriefDescription": "Retired load instructions which data sources were hits in L3 without snoops required", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD2", + "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", + "PEBS": "1", + "PublicDescription": "Retired load instructions which data sources were hits in L3 without snoops required.", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x8" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000400002", + "BriefDescription": "All retired load instructions.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.ALL_LOADS", + "PEBS": "1", + "SampleAfterValue": "2000003", + "UMask": "0x81" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400400002", + "BriefDescription": "Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD2", + "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", + "PEBS": "1", + "SampleAfterValue": "20011", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200400002", + "BriefDescription": "Demand Data Read requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD", + "PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted.", + "SampleAfterValue": "200003", + "UMask": "0xe1" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080020002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100400002", + "BriefDescription": "All L2 requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.REFERENCES", + "PublicDescription": "All L2 requests.", + "SampleAfterValue": "200003", + "UMask": "0xff" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080400002", + "BriefDescription": "Cycles with L1D load Misses outstanding.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x48", + "EventName": "L1D_PEND_MISS.PENDING_CYCLES", + "PublicDescription": "Counts duration of L1D miss outstanding in cycles.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040400002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC01C0002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200400004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x10001C0002", + "BriefDescription": "Cycles with offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO", + "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", + "SampleAfterValue": "2000003", + "UMask": "0x4" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x04001C0002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x02001C0002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00401C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x01001C0002", + "BriefDescription": "Number of cache line split locks sent to uncore.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xF4", + "EventName": "SQ_MISC.SPLIT_LOCK", + "PublicDescription": "Counts the number of cache line split locks sent to the uncore.", "SampleAfterValue": "100003", + "UMask": "0x10" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC01C0002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00801C0002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040408000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00401C0002", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001C0002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0100002", + "BriefDescription": "Retired load instructions with L2 cache hits as data sources", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L2_HIT", + "PEBS": "1", + "PublicDescription": "Retired load instructions with L2 cache hits as data sources.", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x2" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000100002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0040001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400100002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100100001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200100002", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100100002", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080100002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040100002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0080002", + "BriefDescription": "L1D miss outstandings duration in cycles", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x48", + "EventName": "L1D_PEND_MISS.PENDING", + "PublicDescription": "Counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000080002", + "BriefDescription": "Demand Data Read requests that hit L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT", + "PublicDescription": "Counts the number of demand Data Read requests, initiated by load instructions, that hit L2 cache", + "SampleAfterValue": "200003", + "UMask": "0xc1" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040400002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400080002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x04001C0004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200080002", + "BriefDescription": "Retired load instructions which data sources were HitM responses from shared L3", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD2", + "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", + "PEBS": "1", + "PublicDescription": "Retired load instructions which data sources were HitM responses from shared L3.", + "SampleAfterValue": "20011", + "UMask": "0x4" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100080002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0100001", + "Offcore": "1", + "PublicDescription": "Counts demand data reads", "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01001C0002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080080002", + "BriefDescription": "Retired store instructions that split across a cacheline boundary.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.SPLIT_STORES", + "L1_Hit_Indication": "1", + "PEBS": "1", + "PublicDescription": "Counts retired store instructions that split across a cacheline boundary.", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x42" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040080002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L4_HIT_LOCAL_L4.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080400004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0040002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000100004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000040002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00801C0004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { "BriefDescription": "Counts all demand data writes (RFOs)", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0020002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400040002", + "BriefDescription": "Any memory transaction that reached the SQ.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB0", + "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS", + "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x80" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200040002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040400001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100040002", + "BriefDescription": "Counts any other requestshave any response type.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000018000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requestshave any response type.", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080040002", + "BriefDescription": "Cacheable and noncachaeble code read requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB0", + "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD", + "PublicDescription": "Counts both cacheable and non-cacheable code read requests.", "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x2" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040040002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0020002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100408000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000020002", + "BriefDescription": "Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "1", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD", + "PublicDescription": "Counts cycles when offcore outstanding Demand Data Read transactions are present in the super queue (SQ). A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation).", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400020002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200020002", + "BriefDescription": "L2 cache hits when fetching instructions, code reads.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.CODE_RD_HIT", + "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.", + "SampleAfterValue": "200003", + "UMask": "0xc4" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100020002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080040001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080020002", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100040004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs)", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040020002", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs)", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts all demand data writes (RFOs) have any response type.", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0000010002", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_RESPONSE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts all demand data writes (RFOs) have any response type.", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000040001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0400001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040088000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000400001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200020002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400400001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100100004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200400001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040100004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100400001", + "BriefDescription": "Number of times a request needed a FB entry but there was no entry available for it. That is the FB unavailability was dominant reason for blocking the request. A request includes cacheable/uncacheable demands that is load, store or SW prefetch.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x48", + "EventName": "L1D_PEND_MISS.FB_FULL", + "PublicDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry available for it. A request includes cacheable/uncacheable demands that are load, store or SW prefetch instructions.", + "SampleAfterValue": "2000003", + "UMask": "0x2" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080400001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040400001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0040108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC01C0001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0108000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x10001C0001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000048000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x04001C0001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400080004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x02001C0001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100080004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x01001C0001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200100004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00801C0001", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00801C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x00401C0001", + "BriefDescription": "Retired load instructions with L1 cache hits as data sources", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L1_HIT", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0100001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_HITM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000408000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000100001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400020004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400100001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0100004", + "Offcore": "1", + "PublicDescription": "Counts all demand code reads", "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { "BriefDescription": "Counts demand data reads", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L4_HIT_LOCAL_L4.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400400001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200100001", + "BriefDescription": "Retired load instructions with locked access.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.LOCK_LOADS", + "PEBS": "1", + "SampleAfterValue": "100007", + "UMask": "0x21" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100100001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00801C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080100001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080040002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040100001", + "BriefDescription": "Counts all demand code reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01001C0004", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand code reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0080001", + "BriefDescription": "Demand and prefetch data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB0", + "EventName": "OFFCORE_REQUESTS.ALL_DATA_RD", + "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x8" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000080001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L4_HIT_LOCAL_L4.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080408000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400080001", + "BriefDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE", + "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200080001", + "BriefDescription": "Retired load instructions that split across a cacheline boundary.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.SPLIT_LOADS", + "PEBS": "1", + "PublicDescription": "Counts retired load instructions that split across a cacheline boundary.", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x41" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100080001", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100080001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080080001", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040080001", + "BriefDescription": "Offcore requests buffer cannot take more entries for this thread core.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0xB2", + "EventName": "OFFCORE_REQUESTS_BUFFER.SQ_FULL", + "PublicDescription": "Counts the number of cases when the offcore requests buffer cannot take more entries for the core. This can happen when the superqueue does not contain eligible entries, or when L1D writeback pending FIFO requests is full.Note: Writeback pending FIFO has six entries.", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0040001", + "BriefDescription": "Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "CounterMask": "6", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000040001", + "BriefDescription": "Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", + "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.", + "SampleAfterValue": "2000003", + "UMask": "0x2" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400040001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200040001", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400020001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" - }, - { "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100040001", - "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080040001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080100002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040040001", + "BriefDescription": "Retired store instructions that miss the STLB.", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD0", + "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES", + "L1_Hit_Indication": "1", + "PEBS": "1", "SampleAfterValue": "100003", + "UMask": "0x12" + }, + { "BriefDescription": "Counts demand data reads", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200080001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x3FC0020001", + "BriefDescription": "Counts any other requests", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NOT_NEEDED", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01001C8000", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts any other requests", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x1000020001", + "BriefDescription": "RFO requests to L2 cache", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_HITM", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x24", + "EventName": "L2_RQSTS.ALL_RFO", + "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.", + "SampleAfterValue": "200003", + "UMask": "0xe2" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0400020001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L4_HIT_LOCAL_L4.SNOOP_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0200400002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0200020001", + "BriefDescription": "Retired load instructions missed L2 cache as data sources", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3", + "Data_LA": "1", + "EventCode": "0xD1", + "EventName": "MEM_LOAD_RETIRED.L2_MISS", + "PEBS": "1", + "PublicDescription": "Retired load instructions missed L2 cache as data sources.", + "SampleAfterValue": "50021", + "UMask": "0x10" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0100020001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NOT_NEEDED", - "MSRIndex": "0x1a6, 0x1a7", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_HIT_NO_FWD", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0400020002", + "Offcore": "1", + "PublicDescription": "Counts all demand data writes (RFOs)", "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { "BriefDescription": "Counts demand data reads", + "Counter": "0,1,2,3", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080080001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0080020001", + "BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", - "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "CounterHTOff": "0,1,2,3,4,5,6,7", + "EventCode": "0x60", + "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", + "PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.", + "SampleAfterValue": "2000003", + "UMask": "0x8" }, { - "PublicDescription": "Counts demand data reads", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0040020001", + "BriefDescription": "Counts all demand data writes (RFOs)", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SPL_HIT", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.ANY_SNOOP", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FC0080002", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts all demand data writes (RFOs)", + "SampleAfterValue": "100003", + "UMask": "0x1" }, { - "PublicDescription": "Counts demand data reads have any response type.", - "EventCode": "0xB7, 0xBB", - "MSRValue": "0x0000010001", + "BriefDescription": "Counts demand data reads", "Counter": "0,1,2,3", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_RESPONSE", - "MSRIndex": "0x1a6, 0x1a7", - "SampleAfterValue": "100003", - "BriefDescription": "Counts demand data reads have any response type.", + "CounterHTOff": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SPL_HIT", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00401C0001", "Offcore": "1", - "CounterHTOff": "0,1,2,3" + "PublicDescription": "Counts demand data reads", + "SampleAfterValue": "100003", + "UMask": "0x1" } ]
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