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2023-03-27pinctrl: s32: refine error/return/config checks and simplify driver codesChester Lin
Improve error/return code handlings and config checks in order to have better reliability and simplify driver codes such as removing/changing improper macros, blanks, print formats and helper calls. Signed-off-by: Chester Lin <clin@suse.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230327062754.3326-2-clin@suse.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27Merge tag 'renesas-pinctrl-for-v6.4-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.4 - Add pin groups for audio on R-Car V4H, - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC, - Miscellaneous fixes and improvements.
2023-03-23pinctrl: Use of_property_present() for testing DT property presenceRob Herring
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230310144721.1544669-1-robh@kernel.org [Dropped hunk hitting drivers/pinctrl/renesas/pinctrl.c] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: mlxbf3: Add pinctrl driver supportAsmaa Mnebhi
NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or take the default hardware functionality. Add a driver for the pin muxing. Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230315215027.30685-3-asmaa@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: qcom,sc8280xp-tlmm: allow 'bias-bus-hold'Johan Hovold
The controller supports 'bias-bus-hold' so add it to the binding. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230316105800.18751-1-johan+linaro@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: qcom,qcm2290-tlmm: Allow input-enableKonrad Dybcio
Allow the common input-enable. This was missed with the initial submission. Fixes: 5147022214db ("dt-bindings: pinctrl: qcom: Add QCM2290 pinctrl bindings") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230314222705.2940258-1-konrad.dybcio@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: qcom: Add IPQ9574 pinctrl driverDevi Priya
Add pinctrl definitions for the TLMM of IPQ9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: qcom: Add support for IPQ9574Devi Priya
Add new binding document for pinctrl on IPQ9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230316072940.29137-4-quic_devipriy@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: qcom: Add SM7150 pinctrl driverDanila Tikhonov
Add pinctrl driver for TLMM block found in SM7150 SoC. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: qcom: Add SM7150 pinctrl bindingDanila Tikhonov
Add device tree binding Documentation details for Qualcomm SM7150 TLMM device Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230311212114.108870-2-danila@jiaxyga.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19MAINTAINERS: move ralink pinctrl to mediatek mips pinctrlArınç ÜNAL
The Ralink pinctrl driver is now under the name of MediaTek MIPS pin controller. Move the maintainer information accordingly. Add dt-binding schema files. Add linux-mediatek@lists.infradead.org as an associated mailing list. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-22-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt7620: split bindingArınç ÜNAL
The MT7628 and MT7688 SoCs contain different pin muxing information, therefore, should be split. This can be done now that there are compatible strings to distinguish them from other SoCs. Split the schema out to mediatek,mt76x8-pinctrl.yaml. Remove mediatek,mt76x8-pinctrl from mt7620. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-21-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: ralink: rt305x: split bindingArınç ÜNAL
The RT3352 and RT5350 SoCs each contain different pin muxing information, therefore, should be split. This can be done now that there are compatible strings to distinguish them from other SoCs. Split the schema out to ralink,rt3352-pinctrl.yaml and ralink,rt5350-pinctrl.yaml. Remove ralink,rt3352-pinctrl and ralink,rt5350-pinctrl from rt305x. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-20-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt7986: fix patternProperties regexArınç ÜNAL
Set second level patternProperties to '^.*mux.*$' and '^.*conf.*$' on mediatek,mt7986-pinctrl.yaml to be on par with other schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-19-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: drop quotes from referred schemasArınç ÜNAL
Drop the quotes from the referred schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-18-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: fix pinmux header locationArınç ÜNAL
Fix the location of the pinmux header files mentioned on the schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-17-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: {mediatek,ralink}: fix formattingArınç ÜNAL
Change the style of description properties to plain style where there's no need to preserve the line endings, and vice versa. Fix capitalisation and indentation. Fit the schemas to 80 columns for each line. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-16-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: fix naming inconsistencyArınç ÜNAL
Some schemas include "MediaTek", some "Mediatek". Rename all to "MediaTek" to address the naming inconsistency. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-15-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt8195: rename to mediatek,mt8195-pinctrlArınç ÜNAL
Rename pinctrl-mt8195.yaml to mediatek,mt8195-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-14-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt8192: rename to mediatek,mt8192-pinctrlArınç ÜNAL
Rename pinctrl-mt8192.yaml to mediatek,mt8192-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-13-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt8186: rename to mediatek,mt8186-pinctrlArınç ÜNAL
Rename pinctrl-mt8186.yaml to mediatek,mt8186-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-12-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: mediatek: mt6795: rename to mediatek,mt6795-pinctrlArınç ÜNAL
Rename mediatek,pinctrl-mt6795.yaml to mediatek,mt6795-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-11-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: ralink: {mt7620,mt7621}: rename to mediatekArınç ÜNAL
Rename schemas of pin controllers for MediaTek MT7620 and MT7621 SoCs to be on par with other pin controllers for MediaTek SoCs. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-10-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: ralink: add new compatible stringsArınç ÜNAL
Add the new compatible strings for mt7620, mt76x8, and rt305x to be able to properly document the pin muxing information of each SoC, or SoCs that use the same pinmux data. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-9-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: ralink: drop quotes from referred schemasArınç ÜNAL
Drop the quotes from the referred schemas. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-8-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19dt-bindings: pinctrl: ralink: move additionalProperties to topArınç ÜNAL
Move additionalProperties to the top. It's easier to read than after a long indented section. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230317213011.13656-7-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: mediatek: remove OF_GPIO as reverse dependencyArınç ÜNAL
The OF_GPIO option is enabled by default when GPIOLIB is enabled, and cannot be disabled. Remove it as a reverse dependency where GPIOLIB is also set as a reverse dependency. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-6-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: ralink: move to mediatek as mtmipsArınç ÜNAL
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced new SoCs which utilise this platform. Move the driver to mediatek pinctrl directory. Rename the ralink core driver to mtmips. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: ralink: mt7620: split out to mt76x8Arınç ÜNAL
Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary headers since is_mt76x8() is not being used anymore. Introduce a new compatible string to be able to document the pin muxing information properly. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-4-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: ralink: rt305x: add new compatible string for every SoCArınç ÜNAL
Add new compatible strings to make every SoC, or SoCs that use the same pinmux data have a unique compatible string. This ensures that the pin muxing information of every SoC, or a set of SoCs that use the same pinmux data can be properly documented. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-3-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: ralink: reintroduce ralink,rt2880-pinmux compatible stringArınç ÜNAL
There have been stable releases with the ralink,rt2880-pinmux compatible string included. Having it removed breaks the ABI. Reintroduce it. Fixes: e5981cd46183 ("pinctrl: ralink: add new compatible strings for each pinctrl subdriver") Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-2-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-16pinctrl: renesas: Drop support for Renesas-specific propertiesGeert Uytterhoeven
The last user of the Renesas-specific properties was converted to the standard properties in commit af897250ea54c6f2 ("ARM: dts: gose: use generic pinctrl properties in SDHI nodes") in v4.10. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/ff9c14781110bbf19b56b45dd1f01e6da90319ad.1678704441.git.geert+renesas@glider.be
2023-03-13pinctrl: qcom: sm8550-lpass-lpi: allow GPIO functionKrzysztof Kozlowski
All LPASS pins have basic GPIO function and most of the code is ready for that. Add missing glue pieces to allow LPASS pins to work as GPIO, which is going to be used on MTP8550 and QRD8550 boards. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-4-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: allow glitch-free output GPIOKrzysztof Kozlowski
When choosing GPIO function for pins, use the same glitch-free method as main TLMM pinctrl-msm.c driver in msm_pinmux_set_mux(). This replicates the commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output") to LPASS pin controller with same justification. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: use consistent name for "group" variableKrzysztof Kozlowski
The set_mux callback in SoC TLMM driver (pinctrl-msm.c) uses "group", not "group_num" for the number of the pin group. Other places of lpass-lpi also use "group", so let's be consistent for code readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: set output value before enabling outputKrzysztof Kozlowski
As per Hardware Programming Guide, when configuring pin as output, set the pin value before setting output-enable (OE). Similar approach is in main SoC TLMM pin controller. Cc: <stable@vger.kernel.org> Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: msm8998: Add MPM pin mappingsKonrad Dybcio
Add MPM <-> TLMM pin mappings to allow for waking up the AP from sleep through MPM-connected pins. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230308213651.647098-1-konrad.dybcio@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: at91: Remove pioc_index from struct at91_gpio_chipMark Brown
The pioc_idx member of struct at91_gpio_chip is write only, just remove it. Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230216-gpio-at91-immutable-v2-2-326ef362dbc7@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: at91: Make the irqchip immutableMark Brown
To help gpiolib not fiddle around with the internals of the irqchip flag the chip as immutable, adding the calls into the gpiolib core required to do so. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230216-gpio-at91-immutable-v2-1-326ef362dbc7@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: s32cc: fix !CONFIG_PM_SLEEP build errorArnd Bergmann
The declaration of s32_pinctrl_suspend/s32_pinctrl_resume is hidden in an #ifdef, causing a compilation failure when CONFIG_PM_SLEEP is disabled: drivers/pinctrl/nxp/pinctrl-s32g2.c:754:38: error: 's32_pinctrl_suspend' undeclared here (not in a function); did you mean 's32_pinctrl_probe'? drivers/pinctrl/nxp/pinctrl-s32g2.c:754:9: note: in expansion of macro 'SET_LATE_SYSTEM_SLEEP_PM_OPS' 754 | SET_LATE_SYSTEM_SLEEP_PM_OPS(s32_pinctrl_suspend, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ Remove the bogus #ifdef and __maybe_unused annation on the global functions, and instead use the proper LATE_SYSTEM_SLEEP_PM_OPS() macro to pick set the function pointer. As the function definition is still in the #ifdef block, this leads to the correct code in all configurations. Fixes: fd84aaa8173d ("pinctrl: add NXP S32 SoC family support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230310140250.359147-1-arnd@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: sx150x: drop of_match_ptr for ID tableKrzysztof Kozlowski
The driver will match mostly by DT table (even thought there is regular ID table) so there is little benefit in of_match_ptr (this also allows ACPI matching via PRP0001, even though it might not be relevant here). This also fixes !CONFIG_OF error: drivers/pinctrl/pinctrl-sx150x.c:833:34: error: ‘sx150x_of_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230312132702.352832-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-10pinctrl: renesas: Remove R-Car H3 ES1.* handlingWolfram Sang
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230307105645.5285-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-10pinctrl: renesas: r8a779g0: Fix ERROROUTC function namesGeert Uytterhoeven
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, the ERROROUTC signal is active-low. Hence add the missing "_N" suffix to the pin function's names. Resize column 2 of all IPxSR* definitions to accomodate the longer names. Fixes: b811062e5fd0343c ("pinctrl: renesas: r8a779g0: Add missing ERROROUTC_A") Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1774303989e7d61f08fa81f1c2fa1b394505645f.1669036423.git.geert+renesas@glider.be
2023-03-10pinctrl: renesas: r8a779g0: Fix Group 6/7 pin functionsGeert Uytterhoeven
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, pin groups 6 and 7 do not use Module Select Registers to configure pin functions. Hence: - Remove the non-existent Module Select Registers (MODSEL[67]), - Correct the affected PINMUX definitions. Fixes: 36611d28f5130d8b ("pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBx") Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/06972cafd0efa4cfb395cfa76000a1bdae5e9e73.1669036423.git.geert+renesas@glider.be
2023-03-10pinctrl: renesas: r8a779g0: Fix Group 4/5 pin functionsGeert Uytterhoeven
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, pin groups 4 and 5 do not use Module Select Registers to configure pin functions, but use Peripheral Function Select Registers instead. Hence: - Remove the non-existent Module Select Registers (MODSEL[45]), - Add the missing Peripheral Function Select Registers (IPxSR[45]), - Correct the GPIO / Peripheral Function Select Register definitions (GPSR]45_*), - Correct the affected PINMUX definitions. Fixes: 36611d28f5130d8b ("pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBx") Fixes: 36fb7b8af55b83e0 ("pinctrl: renesas: r8a779g0: Add missing MODSELx for TSN0") Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/3d3833d1738f5e8fcc4c1002aa93832464d129a0.1669036423.git.geert+renesas@glider.be
2023-03-09pinctrl: qcom: Use devm_platform_get_and_ioremap_resource()Md Sadre Alam
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20230306144641.21955-1-quic_mdalam@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-09dt-bindings: pinctrl: qcom: lpass-lpi: correct description of second regKrzysztof Kozlowski
The description of second IO address is a bit confusing. It is supposed to be the MCC range which contains the slew rate registers, not the slew rate register base. The Linux driver then accesses slew rate register with hard-coded offset (0xa000). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230302155255.857065-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07pinctrl: freescale: remove generic pin config core supportRasmus Villemoes
No instance of "struct imx_pinctrl_soc_info" sets '.generic_pinconf = true', so all of this is effectively dead code. To make it easier to understand the actual code, remove all the unused cruft. This effectively reverts a5cadbbb081c ("pinctrl: imx: add generic pin config core support"). It was only in use by a single SOC (imx7ulp) for a few releases, and the commit message of dbffda08f0e9 ("pinctrl: fsl: imx7ulp: change to use imx legacy binding") suggests that it won't be used in the future. Certainly no new user has appeared in 20+ releases, and should the need arise, this can be dug out of git history again. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20230302072132.1051590-1-linux@rasmusvillemoes.dk Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07pinctrl: at91-pio4: use proper format specifier for unsigned intClaudiu Beznea
Use %u instead of %d as line is unsigned int. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230302110116.342486-5-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07pinctrl: at91-pio4: use dev_err_probe()Claudiu Beznea
Use dev_err_probe() to simplify the code. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230302110116.342486-4-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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