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2022-01-18net: add qsfp support [*experimental*]Russell King
Add experimental QSFP+ support for the SolidRun Clearfog-CX platform. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: sfp: clean up sfp-bus buildingRussell King
Use a Kconfig symbol to control the build of sfp-bus.c Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18dpaa2-eth: do not hold rtnl_lock on phylink_create() or _destroy()Ioana Ciornei
The rtnl_lock should not be held when calling phylink_create() or phylink_destroy() since it leads to the deadlock listed below: [ 18.656576] rtnl_lock+0x18/0x20 [ 18.659798] sfp_bus_add_upstream+0x28/0x90 [ 18.663974] phylink_create+0x2cc/0x828 [ 18.667803] dpaa2_mac_connect+0x14c/0x2a8 [ 18.671890] dpaa2_eth_connect_mac+0x94/0xd8 Fix this by moving the _lock() and _unlock() calls just outside of phylink_of_phy_connect() and phylink_disconnect_phy(). Fixes: 719479230893 ("dpaa2-eth: add MAC/PHY support through phylink") Reported-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18ahci: qoriq: workaround for errata A-379364 on lx2160aPeng Ma
There is a erratum on lx2160a which is: "SATA link is going down sometime during sata initialization" The workaround for it is to reset the lane. This patch implements this workaround. This erratum only exists on lx2160 Rev1, will be addressed on Rev2 and later. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18bus: fsl-mc: fix dprc object reading raceRussell King
When modifying the objects attached to a DPRC, we may end up reading the list of objects from the firmware while another thread is changing changing the list. Since we read the objects via: - Read the number of DPRC objects - Iterate over this number of objects retrieving their details and objects can be added in the middle of the list, this causes the last few objects to unexpectedly disappear. The side effect of this is if network interfaces are added after boot, they come and go. This can result in already configured interfaces unexpectedly disappearing. This has been easy to provoke with the restool interface added, and a script which adds network interfaces one after each other; the kernel rescanning runs asynchronously to restool. NXP's approach to fixing this was to introduce a sysfs "attribute" in their vendor tree, /sys/bus/fsl-mc/rescan, which userspace poked at to request the kernel to rescan the DPRC object tree each time the "restool" command completed (whether or not the tool changed anything.) This has the effect of making the kernel's rescan synchronous with a scripted restool, but still fails if we have multiple restools running concurrently. This patch takes a different approach: - Read the number of DPRC objects - Iterate over this number of objects retrieving their details - Re-read the number of DPRC objects - If the number of DPRC objects has changed while reading, repeat. This solves the issue where network interfaces unexpectedly disappear while adding others via ls-addni, because they've fallen off the end of the object list. This does *not* solve the issue that if an object is deleted while another is added while we are reading the objects - that requires firmware modification, or a more elaborate solution on the Linux side (e.g., CRCing the object details and reading all objects at least twice to check the CRC is stable.) However, without firmware modification, this is probably the best way to ensure that we read all the objects. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18bus: fsl-mc: add IOMMU mappings for MC firmware and DCFGRussell King (Oracle)
The MC firmware (which runs the networking subsystem) is loaded into RAM by U-Boot, and this region is omitted from the memory passed to the kernel via DT. Prior to booting the kernel, the MC processing is halted to allow IOMMU setup. When booting the kernel with IOMMU support enabled and without using both bypass and passthrough mode, the MC firmware crashes as soon as it is released, as the MC is unable to access the RAM that has been assigned to it for both the firmware image and other purposes, and also the DCFG to retrieve the SoC version. In order to avoid this, we need to setup identity mappings in the MC domain. For the MC RAM region, we read the firmware base address registers which tell us where the firmware is located. According to the MC design document, the firmware is loaded within the upper 512M of the MC RAM region, aligned to 512M, and the RAM region is also aligned to 512M. The lower 8 bits of the firmware base address low register tells us how large the RAM region is. Use this to calculate its size and location in order to create an indentity mapping. We also search DT for the DCFG node to retrieve its address, and create a read-only identity mapping to allow the MC firmware to read the SoC version. If we are unable to find the DCFG node, we use a default address for this. [XXX This needs to be improved XXX] This allows "arm-smmu.disable_bypass=1" to be dropped from the kernel command line for LX2160A platforms. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18arm64: dts: lx2160a: add iommus property for mc nodeLaurentiu Tudor
Enable SMMU management for the MC firmware by adding the required iommus property in the device tree node. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
2022-01-18Merge branches 'net-queue' and 'pci-mobiveil' into cex7Russell King (Oracle)
2022-01-18net: phylink: remove phylink_set_pcs()Russell King (Oracle)
As phylink_set_pcs() is now unused, remove this function. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: generate PHY mdio modaliasRussell King (Oracle)
The modalias string provided in the uevent sysfs file does not conform to the format used in PHY driver modules. One of the reasons is that udev loading of PHY driver modules has not been an expected use case. This patch changes the MODALIAS entry for only PHY devices from: MODALIAS=of:Nethernet-phyT(null) to: MODALIAS=mdio:00000000001000100001010100010011 Other MDIO devices (such as DSA) remain as before. However, having udev automatically load the module has the advantage of making use of existing functionality to have the module loaded before the device is bound to the driver, thus taking advantage of multithreaded boot systems, potentially decreasing the boot time. However, this patch will not solve any issues with the driver module not being loaded prior to the network device needing to use the PHY. This is something that is completely out of control of any patch to change the uevent mechanism. Reported-by: Yinbo Zhu <zhuyinbo@loongson.cn> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: sfp: fix high power modules without diag modeRussell King (Oracle)
Commit 7cfa9c92d0a3 ("net: sfp: avoid power switch on address-change modules") changed semantics for high power modules without diag mode. We repeatedly try to read the current power status from the non- existing 0x51 address, in the futile hope this failure is temporary: [ 8.856051] sfp sfp-eth3: module NTT 0000000000000000 rev 0000 sn 0000000000000000 dc 160408 [ 8.865843] mvpp2 f4000000.ethernet eth3: switched to inband/1000base-x link mode [ 8.873469] sfp sfp-eth3: Failed to read EEPROM: -5 [ 8.983251] sfp sfp-eth3: Failed to read EEPROM: -5 [ 9.103250] sfp sfp-eth3: Failed to read EEPROM: -5 Previously we assumed such modules were powered up in the correct mode, continuing without further configuration as long as the required power class was supported by the host. Restore this behaviour by detecting the lack of diagnostic address support prior to setting the module power or checking for the address change sequence. Fixes: 7cfa9c92d0a3 ("net: sfp: avoid power switch on address-change modules") Reported-by: 照山周一郎 <teruyama@springboard-inc.jp> Reported-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: all drivers updateRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: pass mode into pcs_validate()Russell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: pass mode into phylink_validate()Russell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: split PCS in-band from inband modeRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: use phylink_mode_*() helpersRussell King (Oracle)
Use the phylink_mode_*() helpers in all drivers so we can change the definition of the "mode" argument. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: add helpers for decoding modeRussell King (Oracle)
Add helpers to decode the mode argument passed to the various MAC and PCS functions. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: allow PCS to override MAC validationRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: validate only used interfaces for c45 PHYsRussell King (Oracle)
Some clause 45 PHYs such as Marvell 88X33x0 and Broadcom 84881 switch between a set of interface types depending on the negotiated media speed. We currently validate this kind of PHY using all MAC capabilities, which is not correct if that would give a superset of the ethtool link modes. This commit uses the previously introduced phy possible_interfaces, and the recently introduced supported_interfaces to calculate the union of interface support, and then validates only those interfaces. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: split out PHY validation from phylink_bringup_phy()Russell King (Oracle)
When bringing up a PHY, we need to work out which ethtool link modes it should support and advertise. Clause 22 PHYs operate in a single interface mode, which can be easily dealt with. However, clause 45 PHYs tend to switch interface mode depending on the media. We need more flexible validation at this point, so this patch splits out that code in preparation to changing it. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: add ability to validate a set of interface modesRussell King (Oracle)
Rather than having the ability to validate all supported interface modes or a single interface mode, introduce the ability to validate a subset of supported modes. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: bcm84881: fill in possible_interfacesRussell King (Oracle)
Fill in the possible_interfaces member. This PHY driver only supports a single configuration found on SFPs. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: marvell10g: fill in possible_interfacesRussell King (Oracle)
Fill in the possible_interfaces member according to the selected mactype mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: marvell10g: table driven mactype decodeRussell King (Oracle)
Replace the code-based mactype decode with a table driven approach. This will allow us to fill in the possible_interfaces cleanly. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add possible interfacesRussell King (Oracle)
Add a possible_interfaces member to struct phy_device to indicate which interfaces a clause 45 PHY may switch between depending on the media. This must be populated by the PHY driver by the time the .config_init() method completes according to the PHYs host-side configuration. For example, the Marvell 88x3310 PHY can switch between 10GBASE-R, 5GBASE-R, 2500BASE-X, and SGMII on the host side depending on the media side speed, so all these interface modes are set in the possible_interfaces member. This allows phylib users (such as phylink) to know in advance which interface modes to expect, which allows them to appropriately restrict the advertised link modes according to the capabilities of other parts of the link. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: dsa: sja1105: use .mac_select_pcs() interfaceRussell King (Oracle)
Convert the PCS selection to use mac_select_pcs, which allows the PCS to perform any validation it needs, and removes the need to set the PCS in the mac_config() callback, delving into the higher DSA levels to do so. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: dsa: sja1105: convert to phylink_generic_validate()Russell King (Oracle)
Populate the supported interfaces and MAC capabilities for the SJA1105 DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. This switch only supports a static model of configuration, so we restrict the interface modes to the configured setting, and pass the MAC capabilities. As it is unclear which interface modes support 1G speeds, we keep the setting of MAC_1000FD conditional on the configured interface mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: dsa: ocelot: convert to mac_select_pcs()Russell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: dsa: ocelot: convert to phylink_generic_validate()Russell King (Oracle)
Populate the supported interfaces and MAC capabilities for the Ocelot DSA switches and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. The felix_vsc9959 and seville_vsc9953 sub-drivers only supports a single interface mode, defined by ocelot_port->phy_mode, so we indicate only this interface mode to phylink. Since phylink restricts the ethtool link modes based on interface, we do not need to make the MAC capabilities dependent on the interface mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: use phy interface mode bitmapsRussell King
Use the phy interface mode bitmaps for SFP modules and PHYs to select the operating interface for SFPs and PHYs with SFPs. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add supported_interfaces to phylibRussell King
Add a supported_interfaces member to phylib so we know which interfaces a PHY supports. Currently, set any unconverted driver to indicate all interfaces are supported. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: sfp: display SFP module information [*not for mainline*]Russell King
Display SFP module information verbosely, splitting the generic parts into a separate file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2022-01-18net: sfp: add sfp+ compatible [*not for mainline*]Russell King
Add a compatible for SFP+ cages. SFP+ cages are backwards compatible, but the ethernet device behind them may not support the slower speeds of SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: sfp: add support for cooled SFP+ transceiversRussell King
Cooled SFP+ transceivers need a longer initialisation (startup) time. Select the initialisation time depending on the cooled option bit. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: make phy_error() report which PHY has failedRussell King
phy_error() is called from phy_interrupt() or phy_state_machine(), and uses WARN_ON() to print a backtrace. The backtrace is not useful when reporting a PHY error. However, a system may contain multiple ethernet PHYs, and phy_error() gives no clue which one caused the problem. Replace WARN_ON() with a call to phydev_err() so that we can see which PHY had an error, and also inform the user that we are halting the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: marvell10g: allow PHY to probe without firmwareRussell King
Allow the PHY to probe when there is no firmware, but do not allow the link to come up by forcing the PHY state to PHY_HALTED in a similar way to phy_error(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: provide phy driver start/stop hooksRussell King
Provide phy driver start/stop hooks so that the PHY driver knows when the network driver is starting or stopping. This will be used for the Marvell 10G driver so that we can sanely refuse to start if the PHYs firmware is not present, and also so that we can sanely support SFPs behind the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: marvell*: add support for hw resolved pause modesRussell King
Support reporting the hardware resolved pause enablement states via phylib, overriding our software implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add resolved pause support [*not for mainline*]Russell King
Allow phylib drivers to pass the hardware-resolved pause state to MAC drivers, rather than using the software-based pause resolution code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18arm64: dts: configure Macchiatobin 10G PHY LED modesRussell King
Configure the Macchiatobin 10G PHY LED modes to correct their polarity. We keep the existing LED behaviours, but switch their polarity to reflect how they are connected. Tweak the LED modes as well to be: left: off = no link solid green = RJ45 link up (not SFP+ cage) flash green = traffic right: off = no link solid green = 10G solid yellow = 1G flash green = 100M flash yellow = 10M Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: marvell10g: add support for configuring LEDsRussell King
Add support for configuring the LEDs. Macchiatobin has an oddity in that the left LED goes out when the cable is connected, and flashes when there's link activity. This is because the reset default for the LED outputs assume that the LED is connected to supply, not to ground. Add support for configuring the LED modes and polarities. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18dt-bindings: net: add dt bindings for marvell10g driverRussell King
Add a DT bindings document for the Marvell 10G driver, which will augment the generic ethernet PHY binding by having LED mode configuration. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phy: add helpers for comparing phy IDsRussell King
There are several places which open code comparing PHY IDs. Provide a couple of helpers to assist with this, using a slightly simpler test than the original: - phy_id_compare() compares two arbitary PHY IDs and a mask of the significant bits in the ID. - phydev_id_compare() compares the bound phydev with the specified PHY ID, using the bound driver's mask. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: mtk_eth_soc: use resolved link config for PCS PHYRussell King
The SGMII PCS PHY needs to be updated with the link configuration in the mac_link_up() call rather than in mac_config(). However, mtk_sgmii_setup_mode_force() programs the SGMII block during mac_config() when using 802.3z interface modes with the link configuration. Split that functionality from mtk_sgmii_setup_mode_force(), moving it to a new mtk_sgmii_link_up() function, and call it from mac_link_up(). This does not look correct to me: 802.3z modes operate at a fixed speed. The contents of mtk_sgmii_link_up() look more appropriate for SGMII mode, but the original code definitely did not call mtk_sgmii_setup_mode_force() for SGMII mode but only 802.3z mode. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: phylink: use phy_interface_t bitmaps for optical modulesRussell King
Where a MAC provides a phy_interface_t bitmap, use these bitmaps to select the operating interface mode for optical SFP modules, rather than using the linkmode bitmaps. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: sfp: augment SFP parsing with phy_interface_t bitmapRussell King
We currently parse the SFP EEPROM to a bitmap of ethtool link modes, and then attempt to convert the link modes to a PHY interface mode. While this works at present, there are cases where this is sub-optimal. For example, where a module can operate with several different PHY interface modes. To start addressing this, arrange for the SFP EEPROM parsing to also provide a bitmap of the possible PHY interface modes. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2022-01-18net: dsa: bcm_sf2: fix pause mode validationRussell King
The implementation appears not to appear to support pause modes on anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let phylink know that detail. Moreover, RGMII_RXID and RGMII_ID appears to be unsupported. (This may not be correct; particularly see the FIXMEs in this patch.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>