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2022-08-31thunderbolt: Show link type for XDomain connections tooMika Westerberg
Following what we do for routers already, extend this to XDomain connections as well. This will show in sysfs whether the link is in USB4 or Thunderbolt mode. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: thunderbolt: Enable DMA paths only after rings are enabledMika Westerberg
If the other host starts sending packets early on it is possible that we are still in the middle of populating the initial Rx ring packets to the ring. This causes the tbnet_poll() to mess over the queue and causes list corruption. This happens specifically when connected with macOS as it seems start sending various IP discovery packets as soon as its side of the paths are configured. To prevent this we move the DMA path enabling to happen after we have primed the Rx ring. This makes sure no incoming packets can arrive before we are ready to handle them. Fixes: e69b6c02b4c3 ("net: Add support for networking over Thunderbolt cable") Cc: stable@vger.kernel.org Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31phy: lan966x: add support for QUSGMIIMaxime Chevallier
Makes so that the serdes driver also takes QUSGMII in consideration. It's configured exactly as QSGMII as far as the serdes driver is concerned. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31Merge branch 'net-dsa-microchip-error-hndling-reg-access-validation'David S. Miller
Oleksij Rempel says: ==================== net: dsa: microchip: add error handling and register access validation changes v4: - add Reviewed-by: Vladimir Oltean <olteanv@gmail.com> to all patches - fix checkpatch warnings. changes v3: - fix build error in the middle of the patch stack. changes v2: - add regmap_ranges for KSZ9477 - drop output clock devicetree in driver validation patches. DTs need some more refactoring and can be done in a separate patch set. - remove some unused variables. This patch series adds error handling for the PHY read/write path and optional register access validation. After adding regmap_ranges for KSZ8563 some bugs was detected, so critical bug fixes are sorted before ragmap_range patch. Potentially this bug fixes can be ported to stable kernels, but need to be reworked. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove IS_9893 flagOleksij Rempel
Use chip_id as other places of this code do it Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove unused sgmii variableOleksij Rempel
This variable is not used. So, remove it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: ksz9477: remove unused "on" variableOleksij Rempel
This variable is not used on ksz9477 side. Remove it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove unused port phy variableOleksij Rempel
This variable is unused. So, drop it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: ksz9477: use internal_phy instead of phy_port_cntOleksij Rempel
With code refactoring was introduced new variable internal_phy. Let's use it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add regmap_range for KSZ9477 chipOleksij Rempel
Add register validation for KSZ9477 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: ksz9477: remove MII_CTRL1000 check from ksz9477_w_phy()Oleksij Rempel
The reason why PHYlib may access MII_CTRL1000 on the chip without GBit support is only if chip provides wrong information about extended caps register. This issue is now handled by ksz9477_r_phy_quirks() With proper regmap_ranges provided for all chips we will be able to catch this kind of bugs any way. So, remove this sanity check. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add regmap_range for KSZ8563 chipOleksij Rempel
Add register validation for KSZ8563. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add support for regmap_access_tablesOleksij Rempel
This is complex driver with support for different chips with different layouts. To detect at least some bugs earlier, we should validate register accesses by using regmap_access_table support. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: KSZ9893: do not write to not supported Output Clock ↵Oleksij Rempel
Control Register This issue was detected after adding regmap register access validation. KSZ9893 compatible chips do not have "Output Clock Control Register 0x0103". So, avoid writing to it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: ksz8795: add error handling to ksz8_r/w_phyOleksij Rempel
Now ksz_pread/ksz_pwrite can return error value. So, make use of it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: ksz9477: add error handling to ksz9477_r/w_phyOleksij Rempel
Now ksz_pread/ksz_pwrite can return error value. So, make use of it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: forward error value on all ksz_pread/ksz_pwrite functionsOleksij Rempel
ksz_read*/ksz_write* are able to return errors, so forward it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: allow to pass return values for PHY read/write accessesOleksij Rempel
PHY access may end with errors on different levels. So, allow to forward return values where possible. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: don't announce extended register support on non Gbit chipsOleksij Rempel
This issue was detected after adding support of regmap_ranges for KSZ8563R chip. This chip is reporting extended registers support without having actual extended registers. This made PHYlib request not existing registers. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: do per-port Gbit detection instead of per-chipOleksij Rempel
KSZ8563 has two 100Mbit PHYs and CPU port with RGMII support. Since 1000Mbit configuration for the RGMII capable MAC is present, we should use per port validation. As main part of migration to per-port validation we need to rework ksz9477_switch_init() function. Which is using undocumented REG_GLOBAL_OPTIONS register to detect per-chip Gbit support. So, it is related to some sort of risk for regressions. To reduce this risk I compared the code with publicly available documentations. This function will executed on following currently supported chips: struct ksz_chip_data OF compatible KSZ9477 KSZ9477 KSZ9897 KSZ9897 KSZ9893 KSZ9893, KSZ9563 KSZ8563 KSZ8563 KSZ9567 KSZ9567 Only KSZ9893, KSZ9563, KSZ8563 document existence of 0xf == REG_GLOBAL_OPTIONS register with bit field description "SKU ID": KSZ9893 0x0C KSZ9563 0x1C KSZ8563 0x3C The existence of hidden flags is not documented. KSZ9477, KSZ9897, KSZ9567 do not document this register at all. Only KSZ8563 is documented as non Gbit chip: 100Mbit PHYs and RGMII CPU port. So, this change should not introduce a regression for configurations with properly used OF compatibles. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add separate struct ksz_chip_data for KSZ8563 chipOleksij Rempel
Add separate entry for the KSZ8563 chip. According to the documentation it can support Gbit only on RGMII port. So, we will need to be able to describe in the followup patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31core: Variable type completionXin Gao
'unsigned int' is better than 'unsigned'. Signed-off-by: Xin Gao <gaoxin@cdjrlc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-30Revert "net: devlink: add RNLT lock assertion to devlink_compat_switch_id_get()"Vlad Buslov
This reverts commit 6005a8aecee8afeba826295321a612ab485c230e. The assertion was intentionally removed in commit 043b8413e8c0 ("net: devlink: remove redundant rtnl lock assert") and, contrary what is described in the commit message, the comment reflects that: "Caller must hold RTNL mutex or reference to dev...". Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Tested-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/20220829121324.3980376-1-vladbu@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30Merge branch 'mlxsw-configure-max-lag-id-for-spectrum-4'Jakub Kicinski
Petr Machata says: ==================== mlxsw: Configure max LAG ID for Spectrum-4 Amit Cohen writes: In the device, LAG identifiers are stored in the port group table (PGT). During initialization, firmware reserves a certain amount of entries at the beginning of this table for LAG identifiers. In Spectrum-4, the size of the PGT table did not increase, but the maximum number of LAG identifiers was doubled, leaving less room for others entries (e.g., flood entries) that also reside in the PGT. Therefore, in order to avoid a regression and as long as there is no explicit requirement to support 256 LAGs, configure the firmware to allocate the same amount of LAG entries (128) as in Spectrum-{2,3}. This can be done via the 'max_lag' field in CONFIG_PROFILE command. Patch set overview: Patch #1 edits the comment of the existing 'max_lag' field. Patch #2 adds support for configuring 'max_lag' field via CONFIG_PROFILE command. Patch #3 adds an helper function to get the actual 'max_lag' in the device. Patch #4 adjusts Spectrum-4 to configure 'max_lag' field. ==================== Link: https://lore.kernel.org/r/cover.1661527928.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30mlxsw: spectrum: Add a copy of 'struct mlxsw_config_profile' for Spectrum-4Amit Cohen
Starting from Spectrum-4, the maximum number of LAG IDs can be configured by software via CONFIG_PROFILE command during driver initialization. Add a dedicated instance of 'struct mlxsw_config_profile' for Spectrum-4 and set the 'max_lag' field to 128, which is the same amount of LAG entries as in Spectrum-{2,3}. Without this configuration, firmware reserves 256 (the value of 'cap_max_lag' resource) entries at beginning of PGT table for LAG identifiers, which means that less entries in PGT will be available. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30mlxsw: Add a helper function for getting maximum LAG IDAmit Cohen
Currently the driver queries the maximum supported LAG ID from firmware. This will not be accurate anymore once the driver will configure 'max_lag' via CONFIG_PROFILE command. For resource query, firmware returns the maximum LAG ID which is supported by hardware. Software can configure firmware to do not allocate entries for all the supported LAGs, and to limit LAG IDs. In this case, the resource query will not return the actual maximum LAG ID. Add a helper function for getting this value. In case that 'max_lag' field was set during initialization, return the value which was used, otherwise, query firmware for the maximum supported ID. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30mlxsw: Support configuring 'max_lag' via CONFIG_PROFILEAmit Cohen
In the device, LAG identifiers are stored in the port group table (PGT). During initialization, firmware reserves a certain amount of entries at the beginning of this table for LAG identifiers. In Spectrum-4, the size of the PGT table did not increase, but the maximum number of LAG identifiers was doubled, leaving less room for others entries (e.g., flood entries) that also reside in the PGT. Therefore, in order to avoid a regression and as long as there is no explicit requirement to support 256 LAGs, mlxsw driver will configure the firmware to allocate the same amount of LAG entries (128) as in Spectrum-{2,3}. This configuration is done using 'max_lag' field in CONFIG_PROFILE command. Extend 'struct mlxsw_config_profile' to support 'max_lag' field and configure firmware accordingly. A next patch will adjust Spectrum-4 to configure 'max_lag' field. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30mlxsw: cmd: Edit the comment of 'max_lag' field in CONFIG_PROFILEAmit Cohen
Starting from Spectrum-4, the maximum number of LAG IDs can be configured by software via CONFIG_PROFILE command during driver initialization. Edit the comment of 'max_lag' field to mention that this field is reserved in Spectrum-1/2/3 and describe firmware behavior. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30Documentation: bonding: clarify supported modes for tlb_dynamic_lbFernando Fernandez Mancera
tlb_dynamic_lb bonding option is compatible with balance-tlb and balance-alb modes. In order to be consistent with other option documentation, it should mention both modes not only balance-tlb. Signed-off-by: Fernando Fernandez Mancera <ffmancera@riseup.net> Acked-by: Jay Vosburgh <jay.vosburgh@canonical.com> Link: https://lore.kernel.org/r/20220826154738.4039-1-ffmancera@riseup.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30mlxsw: minimal: Return -ENOMEM on allocation failureDan Carpenter
These error paths return success but they should return -ENOMEM. Fixes: 01328e23a476 ("mlxsw: minimal: Extend module to port mapping with slot index") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Link: https://lore.kernel.org/r/YwjgwoJ3M7Kdq9VK@kili Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30net/mlx5e: Do not use err uninitialized in mlx5e_rep_add_meta_tunnel_rule()Nathan Chancellor
Clang warns: drivers/net/ethernet/mellanox/mlx5/core/en_rep.c:481:6: error: variable 'err' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized] if (IS_ERR(flow_rule)) { ^~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlx5/core/en_rep.c:489:9: note: uninitialized use occurs here return err; ^~~ drivers/net/ethernet/mellanox/mlx5/core/en_rep.c:481:2: note: remove the 'if' if its condition is always true if (IS_ERR(flow_rule)) { ^~~~~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlx5/core/en_rep.c:474:9: note: initialize the variable 'err' to silence this warning int err; ^ = 0 1 error generated. There is little reason to have the 'goto + error variable' construct in this function. Get rid of it and just return the PTR_ERR value in the if statement and 0 at the end. Fixes: 430e2d5e2a98 ("net/mlx5: E-Switch, Move send to vport meta rule creation") Link: https://github.com/ClangBuiltLinux/linux/issues/1695 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Link: https://lore.kernel.org/r/20220825180607.2707947-1-nathan@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30funeth: remove pointless check of devlink pointer in create/destroy_netdev() ↵Jiri Pirko
flows Once devlink port is successfully registered, the devlink pointer is not NULL. Therefore, the check is going to be always true and therefore pointless. Remove it. Signed-off-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Dimitris Michailidis <dmichail@fungible.com> Link: https://lore.kernel.org/r/20220826110411.1409446-1-jiri@resnulli.us Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30Merge branch 'completely-rework-mediatek-mt7530-binding'Jakub Kicinski
Arınç ÜNAL says: ==================== completely rework mediatek,mt7530 binding This patch series brings complete rework of the mediatek,mt7530 binding. The binding is checked with "make dt_binding_check DT_SCHEMA_FILES=mediatek,mt7530.yaml". If anyone knows the GIC bit for interrupt for multi-chip module MT7530 in MT7623AI SoC, let me know. I'll add it to the examples. If anyone got a Unielec U7623 or another MT7623AI board, please reach out. ==================== Link: https://lore.kernel.org/r/20220825082301.409450-1-arinc.unal@arinc9.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: update binding descriptionArınç ÜNAL
Update the description of the binding. - Describe the switches, which SoCs they are in, or if they are standalone. - Explain the various ways of configuring MT7530's port 5. - Remove phy-mode = "rgmii-txid" from description. Same code path is followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: define phy-mode per switchArınç ÜNAL
Define acceptable phy-mode values for the CPU ports of mt7530 and mt7531 switches. Remove relevant information from the description of the binding. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: update examplesArınç ÜNAL
Update the examples on the binding. - Add examples which include a wide variation of configurations. - Make example comments YAML comment instead of DT binding comment. - Add interrupt controller to the examples. Include header file for interrupt. - Change reset line for MT7621 examples. - Pretty formatting for the examples. - Change switch reg to 0. - Change port labels to fit the example, change port 4 label to wan. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: fix reset linesArınç ÜNAL
- Add description for reset-gpios. - Invalidate reset-gpios if mediatek,mcm is used. We cannot use multiple reset lines at the same time. - Invalidate mediatek,mcm if the compatible device is mediatek,mt7531. There is no multi-chip module version of mediatek,mt7531. - Require mediatek,mcm for mediatek,mt7621 as the compatible string is only used for the multi-chip module version of MT7530. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: fix description of mediatek,mcmArınç ÜNAL
Fix the description of mediatek,mcm. mediatek,mcm is not used on MT7623NI. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30dt-bindings: net: dsa: mediatek,mt7530: make trivial changesArınç ÜNAL
Make trivial changes on the binding. - Update title to include MT7531 switch. - Add me as a maintainer. List maintainers in alphabetical order by first name. - Add description to compatible strings. - Stretch descriptions up to the 80 character limit. - Remove lists for single items. - Remove requiring reg as it's already required by dsa-port.yaml. - Define acceptable reg values for the CPU ports. - Remove quotes from $ref: "dsa.yaml#". Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-30net: devlink: stub port params cmds for they are unused internallyJiri Pirko
Follow-up the removal of unused internal api of port params made by commit 42ded61aa75e ("devlink: Delete not used port parameters APIs") and stub the commands and add extack message to tell the user what is going on. If later on port params are needed, could be easily re-introduced, but until then it is a dead code. Signed-off-by: Jiri Pirko <jiri@nvidia.com> Reviewed-by: Jakub Kicinski <kuba@kernel.org> Link: https://lore.kernel.org/r/20220826082730.1399735-1-jiri@resnulli.us Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30net: sched: using TCQ_MIN_PRIO_BANDS in prio_tune()Zhengchao Shao
Using TCQ_MIN_PRIO_BANDS instead of magic number in prio_tune(). Signed-off-by: Zhengchao Shao <shaozhengchao@huawei.com> Acked-by: Cong Wang <xiyou.wangcong@gmail.com> Link: https://lore.kernel.org/r/20220826041035.80129-1-shaozhengchao@huawei.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30net: ngbe: Add build support for ngbeMengyuan Lou
Add build options and guidance doc. Initialize pci device access for Wangxun Gigabit Ethernet devices. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Mengyuan Lou <mengyuanlou@net-swift.com> Link: https://lore.kernel.org/r/20220826034609.51854-1-mengyuanlou@net-swift.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30Merge branch 'netlink-support-reporting-missing-attributes'Paolo Abeni
Jakub Kicinski says: ==================== netlink: support reporting missing attributes This series adds support for reporting missing attributes in a structured way. We communicate the type of the missing attribute and if it was missing inside a nest the offset of that nest. Example of (YAML-based) user space reporting ethtool header missing: Kernel error: missing attribute: .header I was tempted to integrate the check with the policy but it seems tricky without doing a full scan, and there may be a ton of attrs in the policy. So leaving that for later. ==================== Link: https://lore.kernel.org/r/20220826030935.2165661-1-kuba@kernel.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30ethtool: report missing header via ext_ack in the default handlerJakub Kicinski
The actual presence check for the header is in ethnl_parse_header_dev_get() but it's a few layers in, and already has a ton of arguments so let's just pick the low hanging fruit and check for missing header in the default request handler. Reviewed-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30ethtool: strset: report missing ETHTOOL_A_STRINGSET_ID via ext_ackJakub Kicinski
Strset needs ETHTOOL_A_STRINGSET_ID, use it as an example of reporting attrs missing in nests. Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30devlink: use missing attribute ext_ackJakub Kicinski
Devlink with its global attr policy has a lot of attribute presence check, use the new ext ack reporting when they are missing. Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30netlink: add helpers for extack attr presence checkingJakub Kicinski
Being able to check attribute presence and set extack if not on one line is handy, add helpers. Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30netlink: add support for ext_ack missing attributesJakub Kicinski
There is currently no way to report via extack in a structured way that an attribute is missing. This leads to families resorting to string messages. Add a pair of attributes - @offset and @type for machine-readable way of reporting missing attributes. The @offset points to the nest which should have contained the attribute, @type is the expected nla_type. The offset will be skipped if the attribute is missing at the message level rather than inside a nest. User space should be able to figure out which attribute enum (AKA attribute space AKA attribute set) the nest pointed to by @offset is using. Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30netlink: factor out extack compositionJakub Kicinski
The ext_ack writing code looks very "organically grown". Move the calculation of the size and writing out to helpers. This is more idiomatic and gives us the ability to return early avoiding the long (and randomly ordered) "if" conditions. Reviewed-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-08-30net: unify alloclen calculation for paged requestsPavel Begunkov
Consolidate alloclen and pagedlen calculation for zerocopy and normal paged requests. The current non-zerocopy paged version can a bit overallocate and unnecessary copy a small chunk of data into the linear part. Cc: Willem de Bruijn <willemb@google.com> Link: https://lore.kernel.org/netdev/CA+FuTSf0+cJ9_N_xrHmCGX_KoVCWcE0YQBdtgEkzGvcLMSv7Qw@mail.gmail.com/ Signed-off-by: Pavel Begunkov <asml.silence@gmail.com> Link: https://lore.kernel.org/r/b0e4edb7b91f171c7119891d3c61040b8c56596e.1661428921.git.asml.silence@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
generated by cgit (git 2.34.1) at 2025-04-05 21:05:24 +0000