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AgeCommit message (Expand)Author
2022-03-18drm/i915: Probe whether SAGV works on pre-iclVille Syrjälä
2022-03-18drm/i915: Rework SAGV block time probingVille Syrjälä
2022-03-18drm/i915: Treat SAGV block time 0 as SAGV disabledVille Syrjälä
2022-03-17drm/i915: include uapi/drm/i915_drm.h directly where neededJani Nikula
2022-03-17drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]Jani Nikula
2022-03-16drm/i915: Reject unsupported TMDS rates on ICL+Ville Syrjälä
2022-03-16drm/i915: Deal with bigjoiner vs. DRRSVille Syrjälä
2022-03-16drm/i915: Do DRRS disable/enable during pre/post_plane_update()Ville Syrjälä
2022-03-16drm/i915: Schedule DRRS work from intel_drrs_enable()Ville Syrjälä
2022-03-16drm/i915: Don't cancel/schedule drrs work if the pipe wasn't affectedVille Syrjälä
2022-03-16drm/i915: Determine DRRS frontbuffer_bits ahead of timeVille Syrjälä
2022-03-16drm/i915: Fix DRRS frontbuffer_bits handlingVille Syrjälä
2022-03-16drm/i915: Add missing tab to DRRS debugfsVille Syrjälä
2022-03-16drm/i915: Put the downclock_mode check back into can_enable_drrs()Ville Syrjälä
2022-03-16drm/i915: Use drm_mode_copy()Ville Syrjälä
2022-03-15drm/i915/display: Do not re-enable PSR after it was marked as not reliableJosé Roberto de Souza
2022-03-15drm/i915/display: Fix HPD short pulse handling for eDPJosé Roberto de Souza
2022-03-15drm/i915: Convert fixed_mode/downclock_mode into a listVille Syrjälä
2022-03-15drm/i915: Implement static DRRSVille Syrjälä
2022-03-15drm/i915: Enable eDP DRRS on ilk/snb port AVille Syrjälä
2022-03-15drm/i915: Move DRRS enable/disable higher upVille Syrjälä
2022-03-15drm/i915: Stash DRRS state under intel_crtcVille Syrjälä
2022-03-15drm/i915: Eliminate the intel_dp dependency from DRRSVille Syrjälä
2022-03-15drm/i915: Introduce intel_drrs_type_str()Ville Syrjälä
2022-03-15drm/i915: Introduce intel_panel_drrs_type()Ville Syrjälä
2022-03-15drm/i915: Introduce intel_panel_preferred_fixed_mode()Ville Syrjälä
2022-03-15drm/i915: Introduce intel_panel_get_modes()Ville Syrjälä
2022-03-15drm/i915: Introduce intel_panel_{fixed,downclock}_mode()Ville Syrjälä
2022-03-15drm/i915: Nuke dev_priv->drrs.typeVille Syrjälä
2022-03-15drm/i915: Simplify intel_panel_info()Ville Syrjälä
2022-03-15drm/i915/lvds: Pass fixed_mode to compute_is_dual_link_lvds()Ville Syrjälä
2022-03-15drm/i915/sdvo: Pass the requesed mode to intel_sdvo_create_preferred_input_ti...Ville Syrjälä
2022-03-15drm/i915/dsi: Pass fixed_mode to *_dsi_add_properties()Ville Syrjälä
2022-03-14drm/i915/display/adlp: Update eDP voltage swing tableJosé Roberto de Souza
2022-03-14x86/gpu: include drm/i915_pciids.h directly in early quirksJani Nikula
2022-03-10drm/i915: Rename PIPECONF refresh select bitsVille Syrjälä
2022-03-10drm/i915: Clean up DRRS refresh rate enumVille Syrjälä
2022-03-10drm/i915: Polish drrs type enumVille Syrjälä
2022-03-10drm/i915: Program MSA timing delay on ilk/snb/ivbVille Syrjälä
2022-03-10drm/i915: Read DRRS MSA timing delay from VBTVille Syrjälä
2022-03-10drm/i915: Pimp DRRS debugsVille Syrjälä
2022-03-10drm/i915: Constify intel_drrs_init() argsVille Syrjälä
2022-03-10drm/i915: Fix up some DRRS type checksVille Syrjälä
2022-03-10drm/i915: Remove struct dp_link_dpllVille Syrjälä
2022-03-10drm/i915: Populate bxt/glk DPLL clock limits a bit moreVille Syrjälä
2022-03-10drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params()Ville Syrjälä
2022-03-10drm/i915: Replace bxt_clk_div with struct dpllVille Syrjälä
2022-03-10drm/i915: Store the m2 divider as a whole in bxt_clk_divVille Syrjälä
2022-03-10drm/i915: Clean up bxt/glk PLL registersVille Syrjälä
2022-03-10drm/i915: Remove redundant/wrong commentsVille Syrjälä
generated by cgit (git 2.34.1) at 2025-04-11 17:16:03 +0000