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2015-01-30drm/i915: Update DRIVER_DATE to 20150130Daniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Use pipe_config's cpu_transcoder for reading encoder hw stateAnder Conselvan de Oliveira
The get_config() functions for ddi and dp_mst, used to read the value of cpu_transcoder from the crtc->config instead of the state passed as an argument. On the hardware state readout path, that happens to work since the proper value is written to it before encoder->get_config() is called. However, in the check_crtc() path, the state will be read from the cpu_transcoder in the software tracking, instead of the one just read out from hw. Using the field in the supplied intel_crtc_state should do the right thing in both cases. v2: Fix intel_ddi_get_config() too. (Ander) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Fix a use-after-free in intel_execlists_retire_requestsNick Hoath
Remove request from list before unreferencing it, in case it's actually the only reference. (Found by Tvrtko Ursulin) This issue has been most likely introduced in commit 6d3d8274bc45de4babb62d64562d92af984dd238 Author: Nick Hoath <nicholas.hoath@intel.com> Date: Thu Jan 15 13:10:39 2015 +0000 drm/i915: Subsume intel_ctx_submit_request in to drm_i915_gem_request Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Split shared dpll setup out of __intel_set_mode()Ander Conselvan de Oliveira
This simplifies __intel_set_mode() a little. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Don't do posting reads on getting forcewakeMika Kuoppala
The checking for ack and also any subsequent mmio access will serialize with setting the forcewake bit. Drop the posting read as superfluous. Note that in the put side we still want to keep the posting read as it will ensure that the hw sees our forcewake release in a timely manner and doesn't keep the hw powered up. Comment from Chris: On Wed, Jan 28, 2015 at 05:54:14PM +0200, Mika Kuoppala wrote: > Ville Syrjälä <ville.syrjala@linux.intel.com> writes: > > IIRC the posting read from same cache line actually fixed real bugs. So > > I'm a bit worried about dropping them. But I suppose it's possible only > > the _put side was important for those bugs. > > I found these: > > commit 6af2d180f82151cf3d58952e35a4f96e45bc453a > Author: Daniel Vetter <daniel.vetter@ffwll.ch> > Date: Thu Jul 26 16:24:50 2012 +0200 > > drm/i915: fix forcewake related hangs on snb > > commit 8dee3eea3ccd3b6c00a8d3a08dd715d6adf737dd > Author: Ben Widawsky <ben@bwidawsk.net> > Date: Sat Sep 1 22:59:50 2012 -0700 > > drm/i915: Never read FORCEWAKE > > https://bugs.freedesktop.org/show_bug.cgi?id=51738 > https://bugs.freedesktop.org/show_bug.cgi?id=52424 > > The snb here seems to survive gem_dummy_reloc_loop and > gem_ring_sync_loop in here with the get side posting removed. Note that we kept the once associated with #52424, but judging by my comments in #51738 the posting read is just a band aid anyway as a full mb() itself was not adequate. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: paste relevant review discussion in.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Do uncore early sanitize after domain initMika Kuoppala
intel_uncore_early_sanitize() will reset the forcewake registers. When forcewake domains were introduced, the domain init was done after the sanitization of the forcewake registers. And as the resetting of registers use the domain accessors, we tried to reset the forcewake registers with unitialized forcewake domains and failed. Fix this by sanitizing after all the domains have been initialized. Do per domain clearing of forcewake register on domain init so that IVB can do early access to ECOBUS do determine the final configuration. This regression was introduced in commit 05a2fb157e44a53c79133805d30eaada43911941 Author: Mika Kuoppala <mika.kuoppala@linux.intel.com> Date: Mon Jan 19 16:20:43 2015 +0200 drm/i915: Consolidate forcewake code v2: Carve out ellc detect, fw_domain_reset for ivb/ecobus (Chris) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88805 Cc: Chris Wilson <chris@chris-wilson.co.uk> Reported-by: Olof Johansson <olof@lixom.net> Tested-by: Darren Hart <dvhart@linux.intel.com> (v1) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-30drm/i915: Handle CHV in vlv_set_rps_idle()Ville Syrjälä
Move the CHV check into vlv_set_rps_idle() to simplify the caller a bit. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915: Remove nested work in gpu error handlingMika Kuoppala
Now when we declare gpu errors only through our own dedicated hangcheck workqueue there is no need to have a separate workqueue for handling the resetting and waking up the clients as the deadlock concerns are no more. The only exception is i915_debugfs::i915_set_wedged, which triggers error handling through process context. However as this is only used through test harness it is responsibility for test harness not to introduce hangs through both debug interface and through hangcheck mechanism at the same time. Remove gpu_error.work and let the hangcheck work do the tasks it used to. v2: Add a big warning sign into i915_debugfs::i915_set_wedged (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/documentation: Add intel_uncore.c to drm.tmplMika Kuoppala
Include intel_uncore.c in template for it to include d documentation for intel_uncore_forcewake_get and *_put. Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: remove intel_dsi_cmd.c and the unused functions thereinJani Nikula
The removed functions can be resurrected in intel_dsi.c as need arises. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: move dpi_send_cmd() to intel_dsi.c and make it staticJani Nikula
No functional changes. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: remove old read/write functions in favor of new stuffJani Nikula
All of these are replaced by the drm core mipi dsi functions. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: make the vbt panel driver use mipi_dsi_device for transfersJani Nikula
Use the drm core interfaces in preparation of removing our homebrew. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: add drm mipi dsi host supportJani Nikula
Add basic support for using the drm mipi dsi framework for DSI. We don't use device tree which is pretty much required by mipi_dsi_host_register and friends, and we don't have the kind of device model the functions expect either. So we cheat and use it as a library to abstract what we need: a nice, clean interface for DSI transfers. This means we will have to be careful with what functions we call, as the driver model devices in mipi_dsi_host and mipi_dsi_device will *not* be initialized. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29drm/i915/dsi: switch to drm_panel interfaceJani Nikula
Replace intel_dsi_device and intel_dsi_dev_ops with drm_panel and drm_panel_funcs. They are adequate for what we have now, and if we end up needing more than this we should improve drm_panel. This will keep us better aligned with the drm core infrastructure. The panel driver initialization changes a bit. It still remains hideous, but fixing that is beyond the scope here. v2: extend mode config mutex to cover drm_panel_get_modes (Shobhit) vbt_panel->intel_dsi = intel_dsi in vbt panel init (Shobhit) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-29agp: change agp_free_page_array to use kvfreeWang, Yalin
Change agp_free_page_array to use kvfree function, remove the duplicated code. Signed-off-by: Yalin Wang <yalin.wang@sonymobile.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-01-29Merge branch 'master' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next This backmerges drm-fixes into drm-next mainly for the amdkfd stuff, I'm not 100% confident, but it builds and the amdkfd folks can fix anything up. Signed-off-by: Dave Airlie <airlied@redhat.com> Conflicts: drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
2015-01-29Merge tag 'drm/panel/for-3.20-rc1' of ↵Dave Airlie
git://anongit.freedesktop.org/tegra/linux into drm-next drm/panel: Changes for v3.20-rc1 This contains the long-awaited drm_bridge series that makes Chromebooks work for people. I had thought this would've been perfect by now, but then I go and build test it and the first thing it does is yell about a recursive dependency. I fixed that up because I was feeling bad for not getting around to look at this earlier. Biseds that there is new support for two more panels, a couple of fixup patches to the Sharp LQ101R1SX01 dual-channel DSI panel driver and a potential NULL pointer dereference fix. * tag 'drm/panel/for-3.20-rc1' of git://anongit.freedesktop.org/tegra/linux: (23 commits) drm/bridge: dw-hdmi: Adapt to bridge API change drm/sti: fixup for bridge interface drm/bridge: dw-hdmi: Fix return error path drm: Check the right variable when setting formats Documentation: bridge: Add documentation for ps8622 DT properties Documentation: devicetree: Add vendor prefix for parade Documentation: drm: bridge: move to video/bridge drm/bridge: ptn3460: use gpiod interface drm/bridge: ptn3460: probe connector at the end of bridge attach drm/bridge: ptn3460: support drm_panel drm/exynos: dp: support drm_bridge drm/bridge: ptn3460: Convert to I2C driver model drm/bridge: make bridge registration independent of drm flow drm/bridge: do not pass drm_bridge_funcs to drm_bridge_init drm/bridge: ptn3460: Few trivial cleanups drm/panel: simple: Add AVIC TM070DDH03 panel support of: Add vendor prefix for Shanghai AVIC Optoelectronics Co., Ltd. drm/panel: sharp: lq101r1sx01: Remove unneeded include drm/panel: sharp: lq101r1sx01: Respect power timings drm/panel: sharp: lq101r1sx01: Add delay after display on ...
2015-01-28drm/i915/skl: Enabling PSR on SkylakeSonika Jindal
Mainly taking care of some register offsets, otherwise things are similar to hsw. Also, programming ddi aux to use hardcoded values for psr data select. v2: introduce EDP_PSR_AUX_BASE macro (Chris) v3: Moving to HW tracking for SKL+ platforms, so activating source psr during psr_enabling and then avoiding psr entries and exits for each frontbuffer updates. v4: Using SKL DDI AUX regs instead of changing PSR_AUX regs definition (Rodrigo) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> [danvet: Drop the hunks to short-circuit sw tracking: We'd need to push this down one level, and I don't fully trust the test coverage yet to do so. So much prefer we pick a whitelist approach for the cases we know work correctly.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28Revert "drm/i915: Fix mutex->owner inspection race under DEBUG_MUTEXES"Chris Wilson
The core fix was applied in commit a63b03e2d2477586440741677ecac45bcf28d7b1 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Jan 6 10:29:35 2015 +0000 mutex: Always clear owner field upon mutex_unlock() (note the absence of stable@ tag) so we can now revert our band-aid commit 226e5ae9e5f910 for -next. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28drm/i915: Be consistent on printing seqnosMika Kuoppala
We have had %x and %u intermixed. Bring everything in line and use %x Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28drm/i915: Display current hangcheck status in debugfsChris Wilson
For example, /sys/kernel/debug/dri/0/i915_hangcheck_info: Hangcheck active, fires in 15887800ms render ring: seqno = -4059 [current -583] action = 2 score = 0 ACTHD = 1ee8 [current 21f980] max ACTHD = 0 v2: Include expiration ETA. Can anyone spot a problem? v3: Convert for workqueued hangcheck (Mika) v4: Print seqnos as unsigned ints (Ville) v5: Print seqnos as hex (Chris) Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) (v2) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (v2) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28drm/i915: Convert hangcheck from a timer into a delayed work itemChris Wilson
When run as a timer, i915_hangcheck_elapsed() must adhere to all the rules of running in a softirq context. This is advantageous to us as we want to minimise the risk that a driver bug will prevent us from detecting a hung GPU. However, that is irrelevant if the driver bug prevents us from resetting and recovering. Still it is prudent not to rely on mutexes inside the checker, but given the coarseness of dev->struct_mutex doing so is extremely hard. Give in and run from a work queue, i.e. outside of softirq. v2: Use own workqueue to avoid deadlocks (Daniel) Cleanup commit msg and add comment to i915_queue_hangcheck() (Chris) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Daniel Vetter <dnaiel.vetter@ffwll.chm> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (v1) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> [danvet: Remove accidental kerneldoc comment starter, to appease the 0 day builder.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28agp/intel: Serialise after GTT updatesChris Wilson
An interesting bug occurs on Pineview through which the root cause is that the writes of the PTE values into the GTT is not serialised with subsequent memory access through the GTT (when using WC updates of the PTE values). This is despite there being a posting read after the GTT update. However, by changing the address of the posting read, the memory access is indeed serialised correctly. Whilst we are manipulating the memory barriers, we can remove the compiler :memory restraint on the intermediate PTE writes knowing that we explicitly perform a posting read afterwards. v2: Replace posting reads with explicit write memory barriers - in particular this is advantages in case of single page objects. Update comments to mention this issue is only with WC writes. Testcase: igt/gem_exec_big #pnv Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88191 Tested-by: huax.lu@intel.com (v1) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-28drm/bridge: dw-hdmi: Adapt to bridge API changeFabio Estevam
Commit fbc4572e9c48e45b ("drm/bridge: make bridge registration independent of drm flow") introduced some drm/bridge API modifications. Make the necessary changes so that we can avoid the build breakage: drivers/gpu/drm/bridge/dw_hdmi.c: In function 'dw_hdmi_bridge_destroy': drivers/gpu/drm/bridge/dw_hdmi.c:1378:2: error: implicit declaration of function 'drm_bridge_cleanup' [-Werror=implicit-function-declaration] drivers/gpu/drm/bridge/dw_hdmi.c: At top level: drivers/gpu/drm/bridge/dw_hdmi.c:1471:2: error: unknown field 'destroy' specified in initializer drivers/gpu/drm/bridge/dw_hdmi.c: In function 'dw_hdmi_register': drivers/gpu/drm/bridge/dw_hdmi.c:1535:2: error: implicit declaration of function 'drm_bridge_init' [-Werror=implicit-function-declaration] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/sti: fixup for bridge interfaceDave Airlie
So sti doesn't build because the bridge interfaces changes didn't catch up to its new DVO driver. Now I might just carry this patch, but I might just push the bridge pull into a side-pull until someone resolves it. So this might not be the right solution to the problem, so please figure it out and let me know ASAP. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: dw-hdmi: Fix return error pathFabio Estevam
If devm_request_threaded_irq() fails we should jump to 'err_iahb' label that will disable the clocks that were previously enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm: Check the right variable when setting formatsDan Carpenter
When setting the video bus supported formats for a display device using drm_display_info_set_bus_formats(), check for the proper variable after duplicating memory. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28Documentation: bridge: Add documentation for ps8622 DT propertiesAjay Kumar
Add documentation for DT properties supported by ps8622/ps8625 eDP-LVDS converter. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28Documentation: devicetree: Add vendor prefix for paradeAjay Kumar
ps8622 eDP-LVDS converter bridge chip is from parade technologies Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28Documentation: drm: bridge: move to video/bridgeAjay Kumar
Move drm/bridge documentation to video/bridge. Also, add proper documentation for gpios used by ptn3460. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: ptn3460: use gpiod interfaceAjay Kumar
Modify driver to support gpiod interface. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: ptn3460: probe connector at the end of bridge attachAjay Kumar
Force bridge connector detection at the end of the bridge attach. This is needed to detect the bridge connector early. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: ptn3460: support drm_panelAjay Kumar
Add drm_panel calls to the driver to make the panel and bridge work together in tandem. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/exynos: dp: support drm_bridgeAjay Kumar
Modify driver to support drm_bridge. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: ptn3460: Convert to I2C driver modelAjay Kumar
Use drm_bridge helpers to modify the driver to support I2C driver model. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> [treding@nvidia.com: remove recursive dependency on I2C] Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: make bridge registration independent of drm flowAjay Kumar
Currently, third party bridge drivers(ptn3460) are dependent on the corresponding encoder driver init, since bridge driver needs a drm_device pointer to finish drm initializations. The encoder driver passes the drm_device pointer to the bridge driver. Because of this dependency, third party drivers like ptn3460 doesn't adhere to the driver model. In this patch, we reframe the bridge registration framework so that bridge initialization is split into 2 steps, and bridge registration happens independent of drm flow: --Step 1: gather all the bridge settings independent of drm and add the bridge onto a global list of bridges. --Step 2: when the encoder driver is probed, call drm_bridge_attach for the corresponding bridge so that the bridge receives drm_device pointer and continues with connector and other drm initializations. The old set of bridge helpers are removed, and a set of new helpers are added to accomplish the 2 step initialization. The bridge devices register themselves onto global list of bridges when they get probed by calling "drm_bridge_add". The parent encoder driver waits till the bridge is available in the lookup table(by calling "of_drm_find_bridge") and then continues with its initialization. The encoder driver should also call "drm_bridge_attach" to pass on the drm_device to the bridge object. drm_bridge_attach inturn calls "bridge->funcs->attach" so that bridge can continue with drm related initializations. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: do not pass drm_bridge_funcs to drm_bridge_initAjay Kumar
Assign the pointer to bridge ops structure(drm_bridge_funcs) in the bridge driver itself, instead of passing it to drm_bridge_init. This will allow bridge driver developer to pack bridge private information inside the bridge object and pass only the drm-relevant information to drm_bridge_init. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/bridge: ptn3460: Few trivial cleanupsAjay Kumar
This patch does the following changes: -- Use usleep_range instead of udelay. -- Remove driver_private member from ptn3460 structure. -- Make all possible functions and structures static. -- Use dev_err for non-DRM errors. -- Arrange header files alphabetically. -- s/edid/EDID in all error messages. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Rahul Sharma <rahul.sharma@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/panel: simple: Add AVIC TM070DDH03 panel supportPhilipp Zabel
The Shanghai AVIC Optoelectronics TM070DDH03 is a 7" 1024x600 TFT LCD panel connecting to a 24-bit RGB LVDS interface. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28of: Add vendor prefix for Shanghai AVIC Optoelectronics Co., Ltd.Philipp Zabel
Shanghai AVIC Optoelectronics Co., Ltd. is a subsidiary of Tianma Microelectronics Co., Ltd. and designs and manufactures TFT LCDs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/panel: sharp: lq101r1sx01: Remove unneeded includeThierry Reding
Nothing in the file needs symbols from include/linux/host1x.h, so remove the include. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/panel: sharp: lq101r1sx01: Respect power timingsThierry Reding
Before shutting down the display using the DCS display_off command, wait for 4 frames according to the datasheet. Furthermore, after enabling the power supply, the supply voltage needs around 10 ms to settle. After that, another 120 ms is required before a DCS exit_sleep_mode command can be sent. While at it, no longer send the DCS soft_reset command. This is totally unnecessary because we've just powered up the display, hence it will be in a reset state already. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/panel: sharp: lq101r1sx01: Add delay after display onThierry Reding
After switching the display on (using the DCS display_on command), wait for 6 frames (100ms at 60 Hz) to give the display more time to prepare. Failing to do this results in the panel not initializing properly in a large number of cases. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/panel: simple: Add support for Giantplus GPG482739QS5Philipp Zabel
This patch adds support for the GiantPlus GPG48273QS5 4.3" WQVGA TFT LCD panel to the simple-panel driver. This panel is connected via a parallel bus and uses both HSYNC and VSYNC, whose lengths are unfortunately not clearly defined. The datasheet only specifies the front- and backporch length, but the timing diagram suggests that both sync signals should be asserted for exactly one clock cycle. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28of: Add vendor prefix for Giantplus Technology Co., Ltd.Philipp Zabel
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-28drm/mipi-dsi: Avoid potential NULL pointer dereferenceThierry Reding
The mipi_dsi_packet_create() function dereferences the msg pointer before checking that it's valid. Move the dereference down to where it is required to avoid potentially dereferencing a NULL pointer. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull drm fixes from Dave Airlie: "This feels larger than I'd like but its for three reasons. a) amdkfd finalising the API more, this is a new feature introduced last merge window, and I'd prefer to make the tweaks to the API before it first gets into a stable release. b) radeon regression required splitting an internal API to fix properly, so it just changed a few more lines c) vmwgfx fix changes a lock from a mutex->spin lock, this is fallout from the new sleep checking. Otherwise there is just some tda998x fixes" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/radeon: Remove rdev->gart.pages_addr array drm/radeon: Restore GART table contents after pinning it in VRAM v3 drm/radeon: Split off gart_get_page_entry ASIC hook from set_page_entry drm/amdkfd: Fix bug in call to init_pipelines() drm/amdkfd: Fix bug in pipelines initialization drm/radeon: Don't increment pipe_id in kgd_init_pipeline drm/i2c: tda998x: set the CEC I2C address based on the slave I2C address drm/vmwgfx: Replace the hw mutex with a hw spinlock drm/amdkfd: Allow user to limit only queues per device drm/amdkfd: PQM handle queue creation fault drm: tda998x: Fix EDID read timeout on HDMI connect drm: tda998x: Protect the page register
2015-01-28Merge tag 'topic/atomic-core-2015-01-27' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next * tag 'topic/atomic-core-2015-01-27' of git://anongit.freedesktop.org/drm-intel: drm/atomic: Fix potential use of state after free drm/atomic-helper: debug output for modesets drm/atomic-helpers: Saner encoder/crtc callbacks drm/atomic-helpers: Recover full cursor plane behaviour drm/atomic-helper: add connector->dpms() implementation drm/atomic: Add drm_crtc_state->active drm: Add standardized boolean props drm/plane-helper: Fix transitional helper kerneldocs drm/plane-helper: Skip prepare_fb/cleanup_fb when newfb==oldfb Conflicts: include/drm/drm_crtc_helper.h
2015-01-28Merge tag 'drm/tegra/for-3.20-rc1' of ↵Dave Airlie
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v3.20-rc1 The biggest part of these changes is the conversion to atomic mode- setting. A lot of cleanup and demidlayering was required before the conversion, with the result being a whole lot of changes. Besides the atomic mode-setting support, the host1x bus now has the proper infrastructure to support suspend/resume for child devices. Finally, a couple of smaller cleanup patches round things off. * tag 'drm/tegra/for-3.20-rc1' of git://anongit.freedesktop.org/tegra/linux: (54 commits) drm/tegra: Use correct relocation target offsets drm/tegra: Add minimal power management drm/tegra: dc: Unify enabling the display controller drm/tegra: Track tiling and format in plane state drm/tegra: Track active planes in CRTC state drm/tegra: Remove unused ->mode_fixup() callbacks drm/tegra: Atomic conversion, phase 3, step 3 drm/tegra: Atomic conversion, phase 3, step 2 drm/tegra: dc: Use atomic clock state in modeset drm/tegra: sor: Implement ->atomic_check() drm/tegra: hdmi: Implement ->atomic_check() drm/tegra: dsi: Implement ->atomic_check() drm/tegra: rgb: Implement ->atomic_check() drm/tegra: dc: Store clock setup in atomic state drm/tegra: Atomic conversion, phase 3, step 1 drm/tegra: Atomic conversion, phase 2 drm/tegra: Atomic conversion, phase 1 drm/tegra: dc: Do not needlessly deassert reset drm/tegra: Output cleanup functions cannot fail drm/tegra: Remove remnants of the output midlayer ...
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