summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2023-11-16drm/msm/dp: don't touch DP subconnector property in eDP caseAbel Vesa
In case of the eDP connection there is no subconnetor and as such no subconnector property. Put drm_dp_set_subconnector_property() calls under the !is_edp condition. Fixes: bfcc3d8f94f4 ("drm/msm/dp: support setting the DP subconnector type") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # SC7280 Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/564284/ Link: https://lore.kernel.org/r/20231025092711.851168-2-dmitry.baryshkov@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2023-11-16drm/msm/dpu: Add missing safe_lut_tbl in sc8280xp catalogBjorn Andersson
During USB transfers on the SC8280XP __arm_smmu_tlb_sync() is seen to typically take 1-2ms to complete. As expected this results in poor performance, something that has been mitigated by proposing running the iommu in non-strict mode (boot with iommu.strict=0). This turns out to be related to the SAFE logic, and programming the QOS SAFE values in the DPU (per suggestion from Rob and Doug) reduces the TLB sync time to below 10us, which means significant less time spent with interrupts disabled and a significant boost in throughput. Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP") Cc: stable@vger.kernel.org Suggested-by: Doug Anderson <dianders@chromium.org> Suggested-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Tested-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/565094/ Link: https://lore.kernel.org/r/20231030-sc8280xp-dpu-safe-lut-v1-1-6d485d7b428f@quicinc.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2023-11-16drm/msm: remove exra drm_kms_helper_poll_init() callDmitry Baryshkov
It seems during rebases I have left a call to drm_kms_helper_poll_init() which is not guarded by the (priv->kms_init) check. This leads to the crash for the boards which don't have KMS output. Drop this call, as there is a correctly guarded one next to the one being removed. Fixes: 506efcba3129 ("drm/msm: carve out KMS code from msm_drv.c") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/566299/ Link: https://lore.kernel.org/r/20231107111413.2212942-1-dmitry.baryshkov@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2023-11-16drm/msm/dsi: use the correct VREG_CTRL_1 value for 4nm cphyJonathan Marek
Use the same value as the downstream driver. This change is needed for CPHY mode to work correctly. Fixes: 8b034e677111 ("drm/msm/dsi: add support for DSI-PHY on SM8550") Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/566987/ Link: https://lore.kernel.org/r/20231110000216.29979-1-jonathan@marek.ca Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2023-10-16drm/msm/a7xx: actually use a7xx state registersDmitry Baryshkov
Make a6xx_get_registers() use a7xx registers instead of a6xx ones if the detected Adreno is from the A7xx family. Fixes: e997ae5f45ca ("drm/msm/a6xx: Mostly implement A7xx gpu_state") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562233/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dpu: enable writeback on SM8550Neil Armstrong
Enable WB2 hardware block, enabling writeback support on this platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562328/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dpu: sm8550: remove unused VIG and DMA clock controls entriesNeil Armstrong
The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the duplicate clock controls from the MDP top. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562330/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dpu: move setup_force_clk_ctrl handling into plane and wbNeil Armstrong
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call them from the plane and wb code and call into the mdp ops if not present. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562325/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dpu: add setup_clk_force_ctrl() op to sspp & wbNeil Armstrong
Starting from SM8550, the SSPP & WB clock controls are moved the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT" downstream. Implement setup_clk_force_ctrl() only starting from major version 9 which corresponds to SM8550 MDSS. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562322/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dpu: create a dpu_hw_clk_force_ctrl() helperNeil Armstrong
Add an helper to setup the force clock control as it will be used in multiple HW files. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562323/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/a6xx: Fix up QMP handlingKonrad Dybcio
The commit referenced in the Fixes tag had a couple problems (as pointed out by Dan): - qmp_put was never called, resulting in refcnt leaks - failling to acquire the QMP mailbox on A7xx would not undo the probe function properly - the qmp_put call present in the code was unreachable Fix all of these issues. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Fixes: 88a0997f2f94 ("drm/msm/a6xx: Send ACD state to QMP at GMU resume") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562761/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dsi: free TX buffer in unbindDmitry Baryshkov
If the drm/msm init code gets an error during output modeset initialisation, the kernel will report an error regarding DRM memory manager not being clean during shutdown. This is because msm_dsi_modeset_init() allocates a piece of GEM memory for the TX buffer, but destruction of the buffer happens only at msm_dsi_host_destroy(), which is called during DSI driver's remove() time, much later than the DRM MM shutdown. To solve this issue, move the TX buffer destruction to dsi_unbind(), so that the buffer is destructed at the correct time. Note, we also have to store a reference to the address space, because priv->kms->aspace is cleared before components are unbound. Reported-by: Bjorn Andersson <andersson@kernel.org> Fixes: 8f59ee9a570c ("drm/msm/dsi: Adjust probe order") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562238/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-16drm/msm/dsi: use msm_gem_kernel_put to free TX bufferDmitry Baryshkov
Use exiting function to free the allocated GEM object instead of open-coding it. This has a bonus of internally calling msm_gem_put_vaddr() to compensate for msm_gem_get_vaddr() in msm_get_kernel_new(). Fixes: 1e29dff00400 ("drm/msm: Add a common function to free kernel buffer objects") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/562239/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-12drm/msm/dp: use correct lifetime device for devm_drm_bridge_addDmitry Baryshkov
The lifetime of the created drm_bridge is attached to the drm_device rather than the DP's platform_device. Use correct lifetime for devm_drm_bridge_add() call. Fixes: 61a72d5efce5 ("drm/msm/dp: switch to devm_drm_bridge_add()") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562203/ Link: https://lore.kernel.org/r/20231011214705.375738-4-dmitry.baryshkov@linaro.org
2023-10-12drm/msm/hdmi: use correct lifetime device for devm_drm_bridge_addDmitry Baryshkov
The lifetime of the created drm_bridge is attached to the drm_device rather than the HDMI's platform_device. Use correct lifetime for devm_drm_bridge_add() call. Fixes: 719093a67c7f ("drm/msm/hdmi: switch to devm_drm_bridge_add()") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562201/ Link: https://lore.kernel.org/r/20231011214705.375738-3-dmitry.baryshkov@linaro.org
2023-10-12drm/msm/dsi: use correct lifetime device for devm_drm_bridge_addDmitry Baryshkov
The lifetime of the created drm_bridge is attached to the drm_device rather than the DSI's platform_device. Use correct lifetime for devm_drm_bridge_add() call. Fixes: 5f403fd7d5c2 ("drm/msm/dsi: switch to devm_drm_bridge_add()") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/562200/ Link: https://lore.kernel.org/r/20231011214705.375738-2-dmitry.baryshkov@linaro.org
2023-10-10drm/msm: fix fault injection supportDmitry Baryshkov
Readd the header that was erroneously dropped during KMS code refactoring. Fixes: 506efcba3129 ("drm/msm: carve out KMS code from msm_drv.c") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202310100836.6E6zjEcE-lkp@intel.com/ Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561739/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: carve out KMS code from msm_drv.cDmitry Baryshkov
The msm_drv.c contains generic code intermixed with KMS handling code. Move all KMS-related code to a separate msm_kms.c file, cleaning up init code while doing this move. This also prevents msm driver from registering modesetting / atomic interfaces in the headless case. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561648/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: make fb debugfs file available only in KMS caseDmitry Baryshkov
Don't register the 'fb' debugfs file, if there is no KMS (and so no framebuffers). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561650/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: only register 'kms' debug file if KMS is usedDmitry Baryshkov
There is little point in having the empty debugfs file which always returns -ENODEV. Change this file to be created only if KMS is actually used. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561656/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: switch to drmm_mode_config_init()Dmitry Baryshkov
Switch to drmm_mode_config_init() instead of drm_mode_config_init(). Drop drm_mode_config_cleanup() calls. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561654/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: rename msm_drv_shutdown() to msm_kms_shutdown()Dmitry Baryshkov
The msm_drv_shutdown function should only be used in the KMS case. Rename it accordingly. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561652/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: remove shutdown callback from msm_platform_driverDmitry Baryshkov
The msm_drv_shutdown only makes sense for the KMS-enabled devices, while msm_platform_driver is only used in the headless case. Remove the shutdown callback from the driver structure. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561644/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: rename msm_pm_prepare/complete to note the KMS natureDmitry Baryshkov
Rename the msm_pm_prepare() and msm_pm_complete() to msm_kms_pm_prepare() and msm_kms_pm_complete() consequently. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561646/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: drop pm ops from the headless msm driverDmitry Baryshkov
The msm_pm_prepare()/msm_pm_complete() only make sense for the KMS-enabled devices, they have priv->kms guards inside. Drop global msm_pm_ops, which were used only by the headless msm device. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561643/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: remove msm_drm_private::bridges fieldDmitry Baryshkov
As all output devices have switched to devm_drm_bridge_add(), we can drop the bridges array from struct msm_drm_private. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561641/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dp: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM DP driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561639/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dp: move pdev from struct dp_display_private to struct msm_dpDmitry Baryshkov
The dp_drm needs accessing the DP's platform device. Move pdev to the public structure. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561642/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/hdmi: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM HDMI driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561635/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dsi: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM DSI driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561636/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/mdp5: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561630/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/mdp4: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. While we are at it, replace irq_of_parse_and_map() with platform_get_irq(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561628/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dpu: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. While we are at it, replace irq_of_parse_and_map() with platform_get_irq(). This also drops devm_iounmap() calls. It is too early to have them _dpu_kms_hw_destroy() (or it will break if for some reason DPU device is rebound into the composite device) and it doesn't make sense to have them in dpu_dev_remove (as everything will be torn down by the devres anyway after the device is unbound from the driver). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561629/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: allow passing struct msm_kms to msm_drv_probe()Dmitry Baryshkov
In preparation of moving resource allocation to the probe time, allow MSM KMS drivers to pass struct msm_kms pointer via msm_drv_probe(). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561627/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Add A635 speedbin 0xac (A643)Konrad Dybcio
Downstream calls this the "speedbin 1", but that number is already occupied. Use index two. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559607/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Add ZAP firmware name to A635Konrad Dybcio
Some (many?) devices with A635 expect a ZAP shader to be loaded. Set the file name to allow for that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559605/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Fix unknown speedbin caseKonrad Dybcio
When opp-supported-hw is present under an OPP node, but no form of opp_set_supported_hw() has been called, that OPP is ignored by the API and marked as unsupported. Before Commit c928a05e4415 ("drm/msm/adreno: Move speedbin mapping to device table"), an unknown speedbin would result in marking all OPPs as available, but it's better to avoid potentially overclocking the silicon - the GMU will simply refuse to power up the chip. Currently, the Adreno speedbin code does just that (AND returns an invalid error, (int)UINT_MAX). Fix that by defaulting to speedbin 0 (which is conveniently always bound to fuseval == 0). Fixes: c928a05e4415 ("drm/msm/adreno: Move speedbin mapping to device table") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559604/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Fix SM6375 GPU IDKonrad Dybcio
SM6375 comes with a patchlevel=1. Fix the chipid up to reflect that. Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554527/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Poll for GBIF unhalt status in hw_initKonrad Dybcio
Some GPUs - particularly A7xx ones - are really really stubborn and sometimes take a longer-than-expected time to finish unhalting GBIF. Note that this is not caused by the request a few lines above. Poll for the unhalt ack to make sure we're not trying to write bits to an essentially dead GPU that can't receive data on its end of the bus. Failing to do this will result in inexplicable GMU timeouts or worse. This is a rather ugly hack which introduces a whole lot of latency. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559292/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add A740 supportKonrad Dybcio
A740 builds upon the A730 IP, shuffling some values and registers around. More differences will appear when things like BCL are implemented. adreno_is_a740_family is added in preparation for more A7xx GPUs, the logic checks will be valid resulting in smaller diffs. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559291/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add A730 supportKonrad Dybcio
Add support for Adreno 730, also known as GEN7_0_x, found on SM8450. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559290/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Mostly implement A7xx gpu_stateKonrad Dybcio
Provide the necessary alternations to mostly support state dumping on A7xx. Newer GPUs will probably require more changes here. Crashdumper and debugbus remain untested. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559289/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Send ACD state to QMP at GMU resumeKonrad Dybcio
The QMP mailbox expects to be notified of the ACD (Adaptive Clock Distribution) state. Get a handle to the mailbox at probe time and poke it at GMU resume. Since we don't fully support ACD yet, hardcode the message to "val: 0" (state = disabled). Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559287/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add skeleton A7xx supportKonrad Dybcio
A7xx GPUs are - from kernel's POV anyway - basically another generation of A6xx. They build upon the A650/A660_family advancements, skipping some writes (presumably more values are preset correctly on reset), adding some new ones and changing others. One notable difference is the introduction of a second shadow, called BV. To handle this with the current code, allocate it right after the current RPTR shadow. BV handling and .submit are mostly based on Jonathan Marek's work. All A7xx GPUs are assumed to have a GMU. A702 is not an A7xx-class GPU, it's a weird forked A610. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559285/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add missing regs for A7XXKonrad Dybcio
Add some missing definitions required for A7 support. This may be substituted with a mesa header sync. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559282/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gpu: Allow A7xx SKUsKonrad Dybcio
Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends. They use GMU for all things DVFS, just like most A6xx GPUs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559281/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gmu: Allow passing QMP handleKonrad Dybcio
When booting the GMU, the QMP mailbox should be pinged about some tunables (e.g. adaptive clock distribution state). To achieve that, a reference to it is necessary. Allow it and require it with A730. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559279/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gmu: Add Adreno 7[34]0 GMUKonrad Dybcio
The GMU on the A7xx series is pretty much the same as on the A6xx parts. It's now "smarter", needs a bit less register writes and controls more things (like inter-frame power collapse) mostly internally (instead of us having to write to G[PM]U_[CG]X registers from APPS) The only difference worth mentioning is the now-required DEMET clock, which is strictly required for things like asserting reset lines, not turning it on results in GMU not being fully functional (all OOB requests would fail and HFI would hang after the first submitted OOB). Describe the A730 and A740 GMU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559278/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display: msm: Make "additionalProperties: true" explicitRob Herring
Make it explicit that child nodes have additional properties and the child node schema is not complete. The complete schemas are applied separately based the compatible strings. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Patchwork: https://patchwork.freedesktop.org/patch/559387/ Link: https://lore.kernel.org/r/20230925212434.1972368-2-robh@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09dt-bindings: display: msm: Add missing unevaluatedProperties on child node ↵Rob Herring
schemas Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Patchwork: https://patchwork.freedesktop.org/patch/559385/ Link: https://lore.kernel.org/r/20230925212434.1972368-1-robh@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>