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Document Ufispace NCPLite board compatible.
Signed-off-by: Jordan Chang <jordan.chang@ufispace.com>
Link: https://lore.kernel.org/r/20230119102102.73414-3-jordan.chang@ufispace.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Document the new compatibles used on Facebook Greatlakes
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@Wiwynn.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221111034828.2377-2-Delphine_CC_Chiu@Wiwynn.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt
ASPEED device tree updates for 6.2
- New machines
* IBM Bonnell AST2600 BMC, for a Power10 server
* Delta AHE-50DC AST1250 BMC, for a 1U Open19 power shelf
- Removed machines
* IBM Mihawk AST2500 BMC, a Power9 server similar to Witherspoon
- Fixes and updates for bletchley, mtjade/mtmitchell, rainier/everest
* tag 'aspeed-6.2-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: aspeed: mtjade: Add SMPro nodes
ARM: dts: aspeed: mtjade,mtmitchell: Add BMC SSIF nodes
ARM: dts: aspeed: Add Delta AHE-50DC BMC
dt-bindings: arm: aspeed: document Delta AHE-50DC BMC
ARM: dts: aspeed: rainier: Fix pca9551 nodes
ARM: dts: aspeed: p10bmc: Add occ-hwmon nodes
ARM: dts: aspeed-g6: Add aliases for mdio nodes
ARM: dts: aspeed: Remove Mihawk
ARM: dts: aspeed: rainier,everest: Move reserved memory regions
ARM: dts: aspeed: Add IBM Bonnell system BMC devicetree
ARM: dts: aspeed: bletchley: Enable emmc and ehci1
ARM: dts: aspeed: bletchley: Update and fix gpio-line-names
ARM: dts: aspeed: bletchley: Update fusb302 nodes
ARM: dts: aspeed: bletchley: Bind presence-sledX pins via gpio-keys
ARM: dts: aspeed: bletchley: Disable GPIOV2 pull-down
ARM: dts: aspeed: bletchley: Change LED sys_log_id to active low
Link: https://lore.kernel.org/r/CACPK8Xfsc8BaL_qAgV+3Rk-AFcQoDVfTpMzHvq_rR-UYqwpNNQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Document Delta AHE-50DC BMC board compatible.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221108001551.18175-2-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The Nuvia DC-SCM BMC board compatible was renamed in commit
7f058112873e ("ARM: dts: aspeed: nuvia: rename vendor nuvia to qcom"),
so adjust the bindings as well.
Fixes: f77024c80147 ("dt-bindings: arm: aspeed: document board compatibles")
Acked-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220811062953.5976-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Document AMD DaytonaX board compatible.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220921210950.10568-2-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Document Ampere Mt.Mitchell BMC board compatible.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220817071539.176110-2-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Document the new compatibles used on Aspeed Evaluation boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220529104928.79636-3-krzysztof.kozlowski@linaro.org
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Document jabil board compatible.
Signed-off-by: David Wang <David_Wang6097@jabil.com>
Link: https://lore.kernel.org/r/20220531011100.882643-2-David_Wang6097@jabil.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Document all compatibles used in existing upstreamed Aspeed AST2400,
AST2500 and AST2600 based boards.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220529104928.79636-2-krzysztof.kozlowski@linaro.org
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The secure boot controller was first introduced in the AST2600.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211117035106.321454-2-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
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