summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/arm/ti
AgeCommit message (Collapse)Author
2023-06-15dt-bindings: arm: ti: add toradex,verdin-am62 et al.Francesco Dolcini
Add toradex,verdin-am62 for Toradex Verdin AM62 SoM, its nonwifi and wifi variants and the carrier boards (Dahlia, Verdin Development Board and Yavia) they may be mated in. Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/ Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230615095058.33890-2-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardwareWadim Egorov
Add devicetree bindings for AM62x based phyCORE-AM62 SoM and phyBOARD-Lyra RDK. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20230504140143.1425951-1-w.egorov@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-03-30dt-bindings: arm: ti: k3: Add compatible for AM62x LP SKVignesh Raghavendra
Add compatible for AM62x SoC based Low Power Starter Kit board[1] [1] https://www.ti.com/tool/SK-AM62-LP Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230321-am62-lp-sk-v2-1-0a56e1694804@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-03-20dt-bindings: arm: ti: Add BeaglePlayRobert Nelson
This board is based on ti,am625 https://beagleplay.org/ https://git.beagleboard.org/beagleplay/beagleplay Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230316152143.2438928-2-nm@ti.com Co-developed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
2023-02-01dt-bindings: arm: ti: Add binding for AM69 Starter KitDasnavis Sabiya
AM69 Starter Kit is a single board designed for TI AM69 SoC. The AM69 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive ADAS applications, autonomous mobile robot and edge AI applications. Add DT binding for AM69 Starter Kit. Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230119132958.124435-2-sabiya.d@ti.com
2023-01-26dt-bindings: arm: ti: Add binding for Siemens IOT2050 M.2 variantJan Kiszka
This new variant is derived from the Advanced PG2 board, replacing the MiniPCI slot with B and E-keyed M.2 slots. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/e49b4451b6c85ba28bdbbe42b25d9eeecebbe2d7.1674110442.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-01-22dt-bindings: arm: ti: Add binding for AM68 SKSinthu Raja
AM68 Starter Kit is a low cost, small form factor board designed for TI's AM68 SoC which is optimized to provide best in class performance for industrial applications and add binding for the same. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230116071446.28867-2-sinthu.raja@ti.com
2023-01-16dt-bindings: arm: ti: Add bindings for PHYTEC AM64x based hardwareWadim Egorov
Add devicetree bindings for AM64x based phyCORE-AM64 SoM and phyBOARD-Electra RDK. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230104162927.1215033-1-w.egorov@phytec.de
2023-01-15dt-bindings: arm: ti: Add bindings for J784s4 SoCApurva Nandan
Add binding for J784S4 SoC Signed-off-by: Apurva Nandan <a-nandan@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230112142725.77785-2-a-nandan@ti.com
2022-12-16dt-bindings: drop redundant part of title (end)Krzysztof Kozlowski
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop trailing "Devicetree bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-21dt-bindings: arm: ti: Add bindings for BeagleBone AI-64Robert Nelson
This board is based on the ti,j721e https://beagleboard.org/ai-64 https://git.beagleboard.org/beagleboard/beaglebone-ai-64 Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Acked-by: Rob Herring <robh@kernel.org> CC: Nishanth Menon <nm@ti.com> CC: Jason Kridner <jkridner@beagleboard.org> CC: Drew Fustini <drew@beagleboard.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20221118163139.3592054-1-robertcnelson@gmail.com
2022-09-13dt-bindings: arm: ti: Add bindings for AM62A7 SoCVignesh Raghavendra
This adds bindings for TI's AM62A7 family of devices. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Devarsh Thakkar <devarsht@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220901141328.899100-3-vigneshr@ti.com
2022-08-31dt-bindings: arm: ti: k3: Sort the SoC definitions alphabeticallyNishanth Menon
Use alphabetical sort to organize the SoCs Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220830160507.7726-3-nm@ti.com
2022-08-31dt-bindings: arm: ti: k3: Sort the am654 board enumsNishanth Menon
Use alphabetical sort to organize the am654 board names. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220830160507.7726-2-nm@ti.com
2022-02-28dt-bindings: arm: ti: Add bindings for AM625 SoCNishanth Menon
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-3-vigneshr@ti.com
2021-12-13dt-bindings: arm: ti: Add bindings for J721s2 SoCAswath Govindraju
Add binding for J721S2 SoC Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211207080904.14324-2-a-govindraju@ti.com
2021-10-05dt-bindings: arm: ti: Add compatible for J721E SKSinthu Raja
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed for TI’s J721E SoC. Add j721e-sk into compatible enum. [1]https://www.ti.com/tool/SK-TDA4VM Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210929081333.26454-2-sinthu.raja@ti.com
2021-10-05dt-bindings: arm: ti: Add bindings for Siemens IOT2050 PG2 boardsJan Kiszka
Product Generation 2 (PG2) boards are based on SR2.x SoCs and will be released soon. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/5d99e69ff1e2fb78f51f03c351eff1fe1f6c3a71.1632657917.git.jan.kiszka@web.de
2021-10-05dt-bindings: arm: ti: Add missing compatibles for j721e/j7200 evmsNishanth Menon
Add compatibles for j721e and j7200 evms to allow for newer platforms to distinguish themselves. While doing this, maintain support for older style of description where the board compatibility was not required. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210925201430.11678-2-nm@ti.com
2021-03-11dt-bindings: arm: ti: Add bindings for Siemens IOT2050 boardsJan Kiszka
These boards are based on AM6528 GP and AM6548 HS SOCs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/173ce7d928ed9f352af7673dd44c6c76a1466eb5.1615473223.git.jan.kiszka@siemens.com
2021-03-09dt-bindings: arm: ti: Add bindings for AM642 SKLokesh Vutla
AM642 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM642 SoC. Add DT binding documentation for AM642 SK. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210226184251.26451-2-lokeshvutla@ti.com
2021-03-09dt-bindings: arm: ti: Add bindings for AM642 SoCDave Gerlach
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20210226144257.5470-2-d-gerlach@ti.com
2020-10-26dt-bindings: Explicitly allow additional properties in board/SoC schemasRob Herring
In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As the top-level board/SoC schemas always have additional properties, add 'additionalProperties: true'. Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201005183830.486085-4-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-09-23dt-bindings: arm: ti: Add bindings for J7200 SoCLokesh Vutla
The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-4-lokeshvutla@ti.com
2020-09-23dt-bindings: arm: ti: Convert K3 board/soc bindings to DT schemaLokesh Vutla
Convert TI K3 Board/SoC bindings to DT schema format. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-3-lokeshvutla@ti.com
2019-07-26dt-bindings: Fix more $id value mismatches filenamesRob Herring
The path in the schema '$id' values are wrong. Fix them. Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-19dt-bindings: arm: ti: Add bindings for J721E SoCNishanth Menon
The J721E SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable lower system costs of automotive applications such as infotainment, cluster, premium Audio, Gateway, industrial and a range of broad market applications. This SoC is designed around reducing the system cost by eliminating the need of an external system MCU and is targeted towards ASIL-B/C certification/requirements in addition to allowing complex software and system use-cases. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP, Two C66x floating point DSPs. * 3D GPU PowerVR Rogue 8XE GE8430 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and up to two DPI interfaces. * Integrated Ethernet switch supporting up to a total of 8 external ports in addition to legacy Ethernet switch of up to 2 ports. * System MMU (SMMU) Version 3.0 and advanced virtualisation capabilities. * Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems, 16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS * Centralized System Controller for Security, Power, and Resource Management (DMSC) See J721E Technical Reference Manual (SPRUIL1, May 2019) for further details: http://www.ti.com/lit/pdf/spruil1 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-13dt-bindings: arm: Convert TI nspire board/soc bindings to json-schemaRob Herring
Convert TI NSpire SoC bindings to DT schema format using json-schema. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2018-12-13dt-bindings: arm: Convert TI davinci board/soc bindings to json-schemaRob Herring
Convert TI Davinci SoC bindings to DT schema format using json-schema. Reviewed-by: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2018-07-18dt-bindings: arm: ti: Add bindings for AM654 SoCNishanth Menon
The AM654 SoC is a lead device of the K3 Multicore SoC architecture platform, targeted for broad market and industrial control with aim to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Quad ARMv8 A53 cores split over two clusters * GICv3 compliant GIC500 * Configurable L3 Cache and IO-coherent architecture * Dual lock-step capable R5F uC for safety-critical applications * High data throughput capable distributed DMA architecture under NAVSS * Three Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL * Centralized System Controller for Security, Power, and Resource management. * Dual ADCSS, eQEP/eCAP, eHRPWM, dual CAN-FD * Flash subsystem with OSPI and Hyperbus interfaces * Multimedia capability with CAL, DSS7-UL, SGX544, McASP * Peripheral connectivity including USB3, PCIE, MMC/SD, GPMC, I2C, SPI, GPIO See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit (git 2.34.1) at 2025-03-31 06:23:22 +0000