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sm8150 has an smmu-500 specifically for Adreno, where the GPU is allowed
to switch pagetables. Document the allowed 3-compatibles for this,
similar to sc7280 and sm8250.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221213002626.260267-1-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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The SMMU on SM6375 requires 3 power domains to be active. Add an
appropriate description of that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20221115152727.9736-2-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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SM6350 has a qcom,smmu-v2-style SMMU just for Adreno and friends.
Document it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221117094422.11000-2-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.
Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Cheza fw does not properly program the GPU aperture to allow the
GPU to update the SMMU pagetables for context switches. The board file
works around this by dropping the "qcom,adreno-smmu" compat string.
Add this usecase to arm,smmu.yaml schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-4-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Rework clocks/clock-names properties schema to properly describe
possible usage cases.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-3-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add missing compatibles used for Adreno SMMU on sc7280 and sm8450
platforms and for the Qualcomm v2 SMMU used on SDM630 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-2-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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The Snapdragon 670 needs the IOMMU for GENI I2C. Add a compatible string in
the documentation to represent its support.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221111003606.126795-2-mailingradian@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible for the Qualcomm SM6115 platform to the ARM SMMU
DeviceTree binding.
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221030094258.486428-5-iskren.chernev@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible bindings for Qualcomm QDU1000 and QRU1000 platforms.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20221026190534.4004945-2-quic_molvera@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add a compatible for Qualcomm SM6375's broken-as-usual MMU500 impl.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220716193223.455859-1-konrad.dybcio@somainline.org
Signed-off-by: Will Deacon <will@kernel.org>
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The NVIDIA Tegra234 SoC comes with one single-instance ARM SMMU used by
isochronous memory clients and two dual-instance ARM SMMUs used by non-
isochronous memory clients.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-3-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
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On NVIDIA SoC's the ARM SMMU needs to interact with the memory
controller in order to map memory clients to the corresponding stream
IDs. Document how the nvidia,memory-controller property can be used to
achieve this.
Note that this is a backwards-incompatible change that is, however,
necessary to ensure correctness. Without the new property, most of the
devices would still work but it is not guaranteed that all will.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible for the Qualcomm SC8280XP platform to the ARM SMMU
DeviceTree binding.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503163429.960998-2-bjorn.andersson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add devicetree binding for Qualcomm SDX65 SMMU.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1649670615-21268-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add the SoC specific compatible for SM8450 implementing
arm,mmu-500.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211201073943.3969549-2-vkoul@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add missing compatible for the SDX55 SoC.
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20211020231701.278846-1-david@ixit.cz
Signed-off-by: Will Deacon <will@kernel.org>
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Add the SoC specific compatible for QCM2290 implementing arm,mmu-500.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1633096832-7762-2-git-send-email-loic.poulain@linaro.org
[will: Sort by alphabetical order, rewrite commit message]
Signed-off-by: Will Deacon <will@kernel.org>
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Add the SoC specific compatible for SM6350 implementing
arm,mmu-500.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210820202906.229292-1-konrad.dybcio@somainline.org
Signed-off-by: Will Deacon <will@kernel.org>
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Commit 4287861dca9d ("dt-bindings: arm-smmu: Add Tegra186 compatible
string") introduced a jsonschema syntax error as a result of a rebase
gone wrong. Fix it.
Fixes: 4287861dca9d ("dt-bindings: arm-smmu: Add Tegra186 compatible string")
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210621140036.2879563-1-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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The ARM SMMU instantiations found on Tegra186 and later need inter-
operation with the memory controller in order to correctly program
stream ID overrides.
Furthermore, on Tegra194 multiple instances of the SMMU can gang up
to achieve higher throughput. In order to do this, they have to be
programmed identically so that the memory controller can interleave
memory accesses between them.
Add the Tegra186 compatible string to make sure the interoperation
with the memory controller can be enabled on that SoC generation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Add the SoC specific compatible for SC7280 implementing
arm,mmu-500.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1615788144-29508-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible string for sm8350 iommu to documentation.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210115090322.2287538-1-vkoul@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible for the ARM SMMU found in the Qualcomm SC8180x platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210121014005.1612382-1-bjorn.andersson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
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Every Qcom Adreno GPU has an embedded SMMU for its own use. These
devices depend on unique features such as split pagetables,
different stall/halt requirements and other settings. Identify them
with a compatible string so that they can be identified in the
arm-smmu implementation specific code.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201109184728.2463097-4-jcrouse@codeaurora.org
Signed-off-by: Will Deacon <will@kernel.org>
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Add binding for NVIDIA's Tegra194 SoC SMMU.
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200718193457.30046-5-vdumpa@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add specific compatible string for Marvell usage due to errata of
accessing 64bits registers of ARM SMMU, in AP806.
AP806 SoC uses the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200715070649.18733-4-tn@semihalf.com
Signed-off-by: Will Deacon <will@kernel.org>
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Add compatible strings for sm8150 and sm8250 iommus to documentation.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200609194030.17756-2-jonathan@marek.ca
Signed-off-by: Will Deacon <will@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
"A big part of this is a change in how devices get connected to IOMMUs
in the core code. It contains the change from the old add_device() /
remove_device() to the new probe_device() / release_device()
call-backs.
As a result functionality that was previously in the IOMMU drivers has
been moved to the IOMMU core code, including IOMMU group allocation
for each device. The reason for this change was to get more robust
allocation of default domains for the iommu groups.
A couple of fixes were necessary after this was merged into the IOMMU
tree, but there are no known bugs left. The last fix is applied on-top
of the merge commit for the topic branches.
Other than that change, we have:
- Removal of the driver private domain handling in the Intel VT-d
driver. This was fragile code and I am glad it is gone now.
- More Intel VT-d updates from Lu Baolu:
- Nested Shared Virtual Addressing (SVA) support to the Intel VT-d
driver
- Replacement of the Intel SVM interfaces to the common IOMMU SVA
API
- SVA Page Request draining support
- ARM-SMMU Updates from Will:
- Avoid mapping reserved MMIO space on SMMUv3, so that it can be
claimed by the PMU driver
- Use xarray to manage ASIDs on SMMUv3
- Reword confusing shutdown message
- DT compatible string updates
- Allow implementations to override the default domain type
- A new IOMMU driver for the Allwinner Sun50i platform
- Support for ATS gets disabled for untrusted devices (like
Thunderbolt devices). This includes a PCI patch, acked by Bjorn.
- Some cleanups to the AMD IOMMU driver to make more use of IOMMU
core features.
- Unification of some printk formats in the Intel and AMD IOMMU
drivers and in the IOVA code.
- Updates for DT bindings
- A number of smaller fixes and cleanups.
* tag 'iommu-updates-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (109 commits)
iommu: Check for deferred attach in iommu_group_do_dma_attach()
iommu/amd: Remove redundant devid checks
iommu/amd: Store dev_data as device iommu private data
iommu/amd: Merge private header files
iommu/amd: Remove PD_DMA_OPS_MASK
iommu/amd: Consolidate domain allocation/freeing
iommu/amd: Free page-table in protection_domain_free()
iommu/amd: Allocate page-table in protection_domain_init()
iommu/amd: Let free_pagetable() not rely on domain->pt_root
iommu/amd: Unexport get_dev_data()
iommu/vt-d: Fix compile warning
iommu/vt-d: Remove real DMA lookup in find_domain
iommu/vt-d: Allocate domain info for real DMA sub-devices
iommu/vt-d: Only clear real DMA device's context entries
iommu: Remove iommu_sva_ops::mm_exit()
uacce: Remove mm_exit() op
iommu/sun50i: Constify sun50i_iommu_ops
iommu/hyper-v: Constify hyperv_ir_domain_ops
iommu/vt-d: Use pci_ats_supported()
iommu/arm-smmu-v3: Use pci_ats_supported()
...
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Convert various DT (non-binding) doc files to ReST
- Various improvements to device link code
- Fix __of_attach_node_sysfs refcounting bug
- Add support for 'memory-region-names' with reserved-memory binding
- Vendor prefixes for Protonic Holland, BeagleBoard.org, Alps, Check
Point, Würth Elektronik, U-Boot, Vaisala, Baikal Electronics,
Shanghai Awinic Technology Co., MikroTik, Silex Insight
- A bunch more binding conversions to DT schema. Only 3K to go.
- Add a minimum version check for schema tools
- Treewide dropping of 'allOf' usage with schema references. Not needed
in new json-schema spec.
- Some formatting clean-ups of schemas
* tag 'devicetree-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (194 commits)
dt-bindings: clock: Add documentation for X1830 bindings.
dt-bindings: mailbox: Convert imx mu to json-schema
dt-bindings: power: Convert imx gpcv2 to json-schema
dt-bindings: power: Convert imx gpc to json-schema
dt-bindings: Merge gpio-usb-b-connector with usb-connector
dt-bindings: timer: renesas: cmt: Convert to json-schema
dt-bindings: clock: Convert i.MX8QXP LPCG to json-schema
dt-bindings: timer: Convert i.MX GPT to json-schema
dt-bindings: thermal: rcar-thermal: Add device tree support for r8a7742
dt-bindings: serial: Add binding for UART pin swap
dt-bindings: geni-se: Add interconnect binding for GENI QUP
dt-bindings: geni-se: Convert QUP geni-se bindings to YAML
dt-bindings: vendor-prefixes: Add Silex Insight vendor prefix
dt-bindings: input: touchscreen: edt-ft5x06: change reg property
dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver
dt-bindings: timer: renesas: mtu2: Convert to json-schema
of/fdt: Remove redundant kbasename function call
dt-bindings: clock: Convert i.MX1 clock to json-schema
dt-bindings: clock: Convert i.MX21 clock to json-schema
dt-bindings: clock: Convert i.MX25 clock to json-schema
...
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This patch simply adds a new compatible string for SC7180 platform.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Link: https://lore.kernel.org/r/1588329036-18732-2-git-send-email-smasetty@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
arm,smmu-v1, even though the MMU-400 is compatible as well.
Allow this combination as well to let the Arm Juno board pass the test.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200507112430.183940-2-andre.przywara@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
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json-schema versions draft7 and earlier have a weird behavior in that
any keywords combined with a '$ref' are ignored (silently). The correct
form was to put a '$ref' under an 'allOf'. This behavior is now changed
in the 2019-09 json-schema spec and '$ref' can be mixed with other
keywords. The json-schema library doesn't yet support this, but the
tooling now does a fixup for this and either way works.
This has been a constant source of review comments, so let's change this
treewide so everyone copies the simpler syntax.
Scripted with ruamel.yaml with some manual fixups. Some minor whitespace
changes from the script.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio
Reviewed-by: Stephen Boyd <sboyd@kernel.org> # clock
Signed-off-by: Rob Herring <robh@kernel.org>
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Add the soc specific compatible for sc7180 smmu-500
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
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Convert the Arm SMMU binding to DT schema.
The existing binding doc doesn't cover the number of variations of
compatible properties found in .dts files. "qcom,msm8998-smmu-v2" was
also missing, so add it.
SoCFPGA Stratix10 has a single clock defined which doesn't match the
binding. This issue remains.
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Robin Murphy <Robin.Murphy@arm.com>
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring <robh@kernel.org>
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