summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/pinctrl
AgeCommit message (Collapse)Author
2021-12-05dt-bindings: pinctrl: use pinctrl.yamlRafał Miłecki
Also fix some examples to avoid warnings like: brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$' Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-02dt-bindings: pinctrl: convert controller description to the json-schemaRafał Miłecki
This helps validating DTS and writing YAML files. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211110165720.30242-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-02dt-bindings: pinctrl: add i.MXRT1050 pinctrl binding docJesse Taube
Add i.MXRT1050 pinctrl binding doc Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211125211443.1150135-3-Mr.Bossman075@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-27Revert "dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings"Linus Walleij
This reverts commit 3fe59cc4ff641b106cc24930204d4cd2c82f318f. The bindings were not properly reviewed and were also causing errors in the automatic checkers once applied. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-26dt-bindings: pinctrl: qcom: pmic-gpio: Document pm8226 compatibleDominik Kobinski
Suggested-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com> Link: https://lore.kernel.org/r/20211125215626.62447-1-dominikkobinski314@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-22dt-bindings: pinctrl: uniphier: Add child node definitions to describe pin ↵Kunihiko Hayashi
mux and configuration In arch/arm/boot/dts/uniphier-pinctrl.dtsi, there are child nodes of pinctrl that defines pinmux and pincfg, however, there are no rules about that in dt-bindings. 'make dtbs_check' results an error with the following message: pinctrl: 'ain1', 'ain2', 'ainiec1', 'aout', 'aout1', 'aout2', ... ... 'usb2', 'usb3' do not match any of the regexes: 'pinctrl-[0-9]+' To avoid the issue, add the rules of pinmux and pincfg in each child node and grandchild node. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1636416699-21033-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-22dt-bindings: qcom,pmic-gpio: Add pm2250 compatible stringLoic Poulain
Add compatible strings for pm2250 SPMI GPIO to documentation. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1637076915-3280-2-git-send-email-loic.poulain@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-22dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM8019Konrad Dybcio
Add pmic-gpio compatible string for pm8019 pmic. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211112115342.17100-1-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-21dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindingsVamsi Krishna Lanka
Add device tree binding Documentation details for Qualcomm SDX65 pinctrl driver. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/06234768890dc7572226f23d432e5a69a4d5b305.1637048107.git.quic_vamslank@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-21dt-bindings: pinctrl: ocelot: add lan966x SoC supportKavyasree Kotagiri
Add documentation for the compatible designated for lan966x. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211118112548.14582-2-kavyasree.kotagiri@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-11dt-bindings: treewide: Update @st.com email address to @foss.st.comPatrice Chotard
Not all @st.com email address are concerned, only people who have a specific @foss.st.com email will see their entry updated. For some people, who left the company, remove their email. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Lionel Debieve <lionel.debieve@foss.st.com> Cc: Amelie Delaunay <amelie.delaunay@foss.st.com> Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Cc: Ludovic Barre <ludovic.barre@foss.st.com> Cc: Christophe Kerello <christophe.kerello@foss.st.com> Cc: pascal Paillet <p.paillet@foss.st.com> Cc: Erwan Le Ray <erwan.leray@foss.st.com> Cc: Philippe CORNU <philippe.cornu@foss.st.com> Cc: Yannick Fertre <yannick.fertre@foss.st.com> Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: Olivier Moysan <olivier.moysan@foss.st.com> Cc: Hugues Fruchet <hugues.fruchet@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com Signed-off-by: Rob Herring <robh@kernel.org>
2021-11-05Merge tag 'pinctrl-v5.16-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "The most interesting aspect is that we now have initial support for the Apple pin controller as used in the M1 laptops and the iPhones which is a step forward for using Linux efficiently on this Apple silicon. Core changes: - Add infrastructure for per-parent interrupt data to support the Apple pin controller. New drivers: - New combined pin control and GPIO driver for the Apple SoC. This is used in all modern Apple silicon such as the M1 laptops but also in at least recent iPhone variants. - New subdriver for the Qualcomm SM6350 - New subdriver for the Qualcomm QCM2290 - New subdriver for the Qualcomm PM6350 - New subdriver for the Uniphier NX1 - New subdriver for the Samsung ExynosAutoV9 - New subdriver for the Mediatek MT7986 - New subdriver for the nVidia Tegra194 Improvements: - Improve power management in the Mediatek driver. - Improvements to the Renesas internal consistency checker. - Convert the Rockchip pin control device tree bindings to YAML. - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO driver to use hierarchical interrupts. - Convert the Qualcomm PMIC MPP device tree bindings to YAML" * tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (55 commits) pinctrl: add pinctrl/GPIO driver for Apple SoCs dt-bindings: pinctrl: Add apple,npins property to apple,pinctrl dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrl gpio: Allow per-parent interrupt data pinctrl: tegra: Fix warnings and error pinctrl: intel: Kconfig: Add configuration menu to Intel pin control pinctrl: tegra: Use correct offset for pin group pinctrl: core: fix possible memory leak in pinctrl_enable() pinctrl: bcm2835: Allow building driver as a module pinctrl: equilibrium: Fix function addition in multiple groups pinctrl: tegra: Add pinmux support for Tegra194 pinctrl: tegra: include lpdr pin properties pinctrl: mediatek: add support for MT7986 SoC dt-bindings: pinctrl: update bindings for MT7986 SoC pinctrl: microchip sgpio: use reset driver dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset binding dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cells pinctrl: qcom: spmi-mpp: add support for hierarchical IRQ chip pinctrl: qcom: spmi-mpp: hardcode IRQ counts pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip ...
2021-10-27dt-bindings: pinctrl: Add apple,npins property to apple,pinctrlJoey Gouly
This property is used to describe the total number of pins on this particular pinctrl hardware block. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211026175815.52703-4-joey.gouly@arm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-27dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrlJoey Gouly
The GPIO/pinctrl hardware can act as an interrupt-controller, so add the #interrupt-cells property to the binding. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Sven Peter <sven@svenpeter.dev> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211026175815.52703-3-joey.gouly@arm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-24dt-bindings: pinctrl: update bindings for MT7986 SoCSam Shih
This updates bindings for MT7986 pinctrl driver. The difference of pinctrl between mt7986a and mt7986b is that pin-41 to pin-65 do not exist on mt7986b Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211022124036.5291-2-sam.shih@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-24dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset bindingHoratiu Vultur
This describes the new binding which allows to call a reset driver from the pinctrl-microchip-sgpio driver. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211018085754.1066056-2-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-17dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cellsDmitry Baryshkov
Stop specifying individual interrupts properties. Use #interrupt-cells instead as we are switching qcom,spmi-mpp and qcom,ssbi-mpp to hierarchical IRQ setup. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211008012524.481877-18-dmitry.baryshkov@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-17dt-bindings: pinctrl: qcom,pmic-mpp: Convert qcom pmic mpp bindings to YAMLDmitry Baryshkov
Convert Qualcomm PMIC MPP bindings from .txt to .yaml format. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211008012524.481877-2-dmitry.baryshkov@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-17pinctrl: samsung: support ExynosAutov9 SoC pinctrlChanho Park
Add pinctrl data for ExynosAuto v9 SoC. - GPA0, GPA1: 10, External wake up interrupt - GPQ0: 2, XbootLDO, Speedy PMIC I/F - GPB0, GPB1, GPB2, GPB3: 29, I2S 7 CH - GPF0, GPF1, GPF2, GPF3,GPF4, GPF5, GPF6, GPF8: 52, FSYS - GPG0, GPG1, GPG2, GPG3: 25, GPIO x 24, SMPL_INT - GPP0, GPP1, GPP2, GPP3, GPP4, GPP5: 48, USI 12 CH Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211008091443.44625-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211017171912.5044-1-krzysztof.kozlowski@canonical.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-17dt-bindings: pinctrl: convert rockchip,pinctrl.txt to YAMLJohan Jonker
Convert rockchip,pinctrl.txt to YAML Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20211007144019.7461-1-jbx6244@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-14dt-bindings: pinctrl: brcm,ns-pinmux: drop unneeded CRU from exampleRafał Miłecki
There is no need to include CRU in example of this binding. It wasn't complete / correct anyway. The proper binding can be find in the mfd/brcm,cru.yaml . Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211008205938.29925-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-14Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"Rafał Miłecki
This reverts commit 2ae80900f239484069569380e1fc4340fd6e0089. My rework was unneeded & wrong. It replaced a clear & correct "reg" property usage with a custom "offset" one. Back then I didn't understand how to properly handle CRU block binding. I heard / read about syscon and tried to use it in a totally invalid way. That change also missed Rob's review (obviously). Northstar's pin controller is a simple consistent hardware block that can be cleanly mapped using a 0x24 long reg space. Since the rework commit there wasn't any follow up modifying in-kernel DTS files to use the new binding. Broadcom also isn't known to use that bugged binding. There is close to zero chance this revert may actually cause problems / regressions. This commit is a simple revert. Example binding may (should) be updated / cleaned up but that can be handled separately. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-13dt-bindings: pinctrl: uniphier: Add NX1 pinctrl bindingKunihiko Hayashi
Update pinctrl binding document for UniPhier NX1 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1633518606-8298-3-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-13dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM6350Luca Weiss
Add pmic-gpio compatible string for pm6350 pmic. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20211007212444.328034-5-luca@z3ntu.xyz Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03dt-bindings: pinctrl: mt8195: change pull up/down descriptionZhiyong Tao
For supporting SI units in "bias-pull-down" & "bias-pull-up", change pull up/down description and add "mediatek,rsel_resistance_in_si_unit" description. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Link: https://lore.kernel.org/r/20210924080632.28410-3-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23dt-bindings: pinctrl: qcom-pmic-gpio: Add output-{enable,disable} propertiesSubbaraman Narayanamurthy
Add support for the pinconf DT property output-enable, output-disable so that output can be enabled/disabled. Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1631588246-4811-2-git-send-email-quic_subbaram@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23dt-bindings: pinctrl: qcom: Add QCM2290 pinctrl bindingsShawn Guo
Add device tree bindings for QCM2290 pinctrl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210923033224.29719-2-shawn.guo@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23dt-bindings: pinctrl: qcom: Add SM6350 pinctrl bindingsKonrad Dybcio
Add device tree binding Documentation details for Qualcomm SM6350 pinctrl driver. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210923161450.15278-1-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-17Merge tag 'samsung-pinctrl-5.15' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.15 1. Fix number of pins in one GPIO pin bank. 2. Add support for Exynos850 SoC (Exynos3830).
2021-08-14Merge tag 'renesas-pinctrl-for-v5.15-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.15 (take two) - Add pin control and GPIO support for the new RZ/G2L SoC.
2021-08-13dt-bindings: pinctrl: samsung: Add Exynos850 docSam Protsenko
Document compatible string for Exynos850 SoC. Nothing else is changed, as Exynos850 SoC uses already existing samsung pinctrl driver. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20210811114827.27322-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-08-11dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driverLakshmi Sowjanya D
Add Device Tree bindings documentation for Intel Keem Bay SoC's pin controller. Add entry for INTEL Keem Bay pinctrl driver in MAINTAINERS file Co-developed-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Co-developed-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Acked-by: Mark Gross <mgross@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210806142527.29113-2-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts propertysatya priya
Remove the interrupts property as we no longer specify it. Signed-off-by: satya priya <skakit@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1627910464-19363-4-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAMLsatya priya
Convert Qualcomm PMIC GPIO bindings from .txt to .yaml format. Signed-off-by: satya priya <skakit@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1627910464-19363-3-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: mt8195: Use real world values for drive-strength argumentsChen-Yu Tsai
The original binding submission for MT8195 pinctrl described the possible drive strength values in micro-amps in its description, but then proceeded to list register values in its device tree binding constraints. However, the macros used with the Mediatek pinctrl bindings directly specify the drive strength in micro-amps, instead of hardware register values. The current driver implementation in Linux does convert the value from micro-amps to hardware register values. This implementation is also used with MT7622 and MT8183, which use real world values in their device trees. Given the above, it was likely an oversight to use the raw register values in the binding. Correct the values in the binding. Also drop the description since the binding combined with its parent, pinctrl/pincfg.yaml, the binding is now self-describing. Fixes: 7f7663899d94 ("dt-bindings: pinctrl: mt8195: add pinctrl file and binding document") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210726111941.1447057-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11Merge branch 'ib-mt8135' into develLinus Walleij
2021-08-11dt-bindings: mediatek: convert pinctrl to yamlHsin-Yi Wang
Convert mt65xx, mt6796, mt7622, mt8183 bindings to yaml. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210804044033.3047296-3-hsinyi@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: Add bindings for Ingenic X2100.周琰杰 (Zhou Yanjie)
Add the pinctrl bindings for the X2100 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1627108604-91304-4-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10dt-bindings: pinctrl: stm32: add new compatible for STM32MP135 SoCAlexandre Torgue
New compatible to manage ball out and pin muxing of STM32MP135 SoC. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de Link: https://lore.kernel.org/r/20210723132810.25728-2-alexandre.torgue@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10pinctrl: qcom: spmi-gpio: Add pmc8180 & pmc8180cBjorn Andersson
The SC8180x platform comes with PMC8180 and PMC8180c, add support for the GPIO controller in these PMICs. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210629003851.1787673-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10dt-bindings: pinctrl: renesas: Add DT bindings for RZ/G2L pinctrlLad Prabhakar
Add device tree binding documentation and header file for Renesas RZ/G2L pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210727112328.18809-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-31dt-bindings: pinctrl: qcom: Add SM6115 pinctrl bindingsIskren Chernev
Add device tree binding Documentation details for Qualcomm SM6115 and SM4250 pinctrl. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210723192352.546902-2-iskren.chernev@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-30dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'Sai Krishna Potthuri
Replace custom pin configuration option 'io-standard' with generic property 'power-source' for Zynq pinctrl also add dt-binding file contains pin configuration defines for Zynq pinctrl. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-30dt-bindings: pinctrl: pinctrl-zynq: Convert to yamlSai Krishna Potthuri
Convert the Zynq pinctrl binding file to yaml. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1626868353-96475-2-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adpBhupesh Sharma
Add pmic-gpio compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210629123407.82561-3-bhupesh.sharma@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom,pmic-gpio: Arrange compatibles alphabeticallyBhupesh Sharma
Arrange the compatibles inside qcom-pmic gpio device tree bindings alphabetically. While at it, also make some minor cosmetic changes to allow future compatible addition to the bindings simpler. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210629123407.82561-2-bhupesh.sharma@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: imx8ulp: Add pinctrl bindingJacky Bai
Add pinctrl binding doc for i.MX8ULP Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20210607061041.2654568-1-ping.bai@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23pinctrl: armada-37xx: Correct PWM pins definitionsMarek Behún
The PWM pins on North Bridge on Armada 37xx can be configured into PWM or GPIO functions. When in PWM function, each pin can also be configured to drive low on 0 and tri-state on 1 (LED mode). The current definitions handle this by declaring two pin groups for each pin: - group "pwmN" with functions "pwm" and "gpio" - group "ledN_od" ("od" for open drain) with functions "led" and "gpio" This is semantically incorrect. The correct definition for each pin should be one group with three functions: "pwm", "led" and "gpio". Change the "pwmN" groups to support "led" function. Remove "ledN_od" groups. This cannot break backwards compatibility with older device trees: no device tree uses it since there is no PWM driver for this SOC yet. Also "ledN_od" groups are not even documented. Fixes: b835d6953009 ("pinctrl: armada-37xx: swap polarity on LED group") Signed-off-by: Marek Behún <kabel@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom: Add bindings for MDM9607Konrad Dybcio
Document the newly added MDM9607 pinctrl driver. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210624191743.617073-1-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-03Merge tag 'devicetree-for-5.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Refine reserved memory nomap handling - Merge some PCI and non-PCI address handling implementations - Simplify of_address.h header ifdefs - Improve printk handling of some 64-bit types - Convert adi,adv7511, Arm ccree, Arm SCMI, Arm SCU, Arm TWD timer, Arm VIC, arm,sbsa-gwdt, Arm/Amlogic SCPI, Aspeed I2C, Broadcom iProc PWM, linaro,optee-tz, MDIO GPIO, Mediatek RNG, MTD physmap, NXP pcf8563/pcf85263/pcf85363, Renesas TPU, renesas,emev2-smu, renesas,r9a06g032-sysctrl, sysc-rmobile, Tegra20 EMC, TI AM56 PCI, TI OMAP mailbox, TI SCI bindings, virtio-mmio, Zynq FPGA, and ZynqMP RTC to DT schema - Convert mux and mux controller bindings to schema. This includes MDIO IIO, and I2C muxes. - Add Arm PL031 RTC binding schema - Add vendor prefixes for StarFive Technology Co. Ltd. and Insignal Ltd - Fix some stale doc references - Remove stale property-units.txt. Superseded by schema in dt-schema repo. - Fixes for 'unevaluatedProperties' handling (enabled with experimental json-schema support) - Drop redundant usage of minItems and maxItems across the tree - Update some examples to use bindings with a schema * tag 'devicetree-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (83 commits) dt-bindings: Fix 'unevaluatedProperties' errors in DT graph users dt-bindings: display: renesas,du: Fix 'ports' reference dt-bindings: media: adv7180: Add missing video-interfaces.yaml reference dt-bindings: crypto: ccree: Convert to json-schema dt-bindings: fpga: zynq: convert bindings to YAML dt-bindings: rtc: zynqmp: convert bindings to YAML dt-bindings: interrupt-controller: Convert ARM VIC to json-schema of: of_reserved_mem: mark nomap memory instead of removing of: of_reserved_mem: only call memblock_free for normal reserved memory dt-bindings: Drop redundant minItems/maxItems dt-bindings: spmi: Correct 'reg' schema of: reserved-memory: Add stub for RESERVEDMEM_OF_DECLARE() dt-bindings: clk: vc5: Fix example dt-bindings: timer: renesas,tmu: add r8a779a0 TMU support dt-bindings: drm: bridge: adi,adv7511.txt: convert to yaml dt-bindings: PCI: ti,am65: Convert PCIe host/endpoint mode dt-bindings to YAML of: Remove superfluous casts when printing u64 values of: Fix truncation of memory sizes on 32-bit platforms dt-bindings: rtc: nxp,pcf8563: Absorb pcf85263/pcf85363 bindings dt-bindings: pwm: Use examples with documented/matching schema ...
generated by cgit (git 2.34.1) at 2025-04-02 16:51:05 +0000