summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/timer
AgeCommit message (Collapse)Author
2023-04-24dt-bindings: timer: rockchip: Drop superfluous rk3288 compatibleCristian Ciocaltea
The compatible string for Rockchip RK3288 is wrongly provided in the 'enum' item, in addition to the subsequent 'const', which allows the usage of an incorrect specification: compatible = "rockchip,rk3288-timer", "rockchip,rk3288-timer"; As the rk3288 string is also specified in the top-most 'const' item, the binding already allows the usage of the correct variant: compatible = "rockchip,rk3288-timer"; Drop the unwanted rk3288 entry from the enum. Fixes: faa186adbd06 ("dt-bindings: timer: convert rockchip,rk-timer.txt to YAML") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230419181309.338354-2-cristian.ciocaltea@collabora.com
2023-04-18dt-bindings: timer: Drop unneeded quotesRob Herring
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20230327170146.4104556-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-04-05dt-bindings: timer: Add StarFive JH7110 clintEmil Renner Berthing
Add compatible string for the StarFive JH7110 clint. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-04dt-bindings: timer: convert timer/amlogic,meson6-timer.txt to dt-schemaNeil Armstrong
Convert the Amlogic Meson6 SoCs Timer Controller bindings to dt-schema. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20221117-b4-amlogic-bindings-convert-v5-1-63781bed4452@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-03-02Merge tag 'linux-watchdog-6.3-rc1' of ↵Linus Torvalds
git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - qcom-wdt dt-bindings improvements and additions (like MSM8994 and MDM9615) - mtk_wdt: Add reset_by_toprgu support - devm_clk_get_enabled() helper changes - Fix kmemleak in watchdog_cdev_register - watchdog sysfs improvements - Other fixes and small improvements * tag 'linux-watchdog-6.3-rc1' of git://www.linux-watchdog.org/linux-watchdog: (52 commits) watchdog: at91rm9200: Only warn once about problems in .remove() watchdog: mt7621-wdt: avoid ralink architecture dependent code watchdog: mt7621-wdt: avoid static global declarations dt-bindings: watchdog: mt7621-wdt: add phandle to access system controller registers watchdog: sbsa_wdog: Make sure the timeout programming is within the limits dt-bindings: watchdog: qcom-wdt: add qcom,apss-wdt-sa8775p compatible watchdog: report options in sysfs watchdog: report fw_version in sysfs dt-bindings: watchdog: fsl-imx: document suspend in wait mode watchdog: imx2_wdg: suspend watchdog in WAIT mode watchdog: pcwd_usb: Fix attempting to access uninitialized memory dt-bindings: watchdog: qcom-wdt: merge MSM timer dt-bindings: watchdog: qcom-wdt: allow interrupts dt-bindings: watchdog: qcom-wdt: add qcom,kpss-wdt-mdm9615 dt-bindings: watchdog: qcom-wdt: fix list of MSM timer compatibles dt-bindings: watchdog: qcom-wdt: do not allow fallback alone dt-bindings: watchdog: qcom-wdt: require fallback for IPQ4019 watchdog: Fix kmemleak in watchdog_cdev_register watchdog: Include <linux/kstrtox.h> when appropriate watchdog: at91sam9_wdt: use devm_request_irq to avoid missing free_irq() in error path ...
2023-02-18dt-bindings: watchdog: qcom-wdt: merge MSM timerKrzysztof Kozlowski
Merge Qualcomm MSM timer bindings into watchdog, because the timer compatibles are already included here and the hardware is quite similar. While converting the MSM timer bindings, adjust clock-frequency property to take only one frequency, instead of two, because: 1. DT schema does not allow to frequencies, 2. The Linux timer driver reads only first frequency. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221212163532.142533-6-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-02-13dt-bindings: timer: sifive,clint: add comaptibles for T-Head's C9xxIcenowy Zheng
T-Head C906/C910 CLINT is not compliant to SiFive ones (and even not compliant to the newcoming ACLINT spec) because of lack of mtime register. Add a compatible string formatted like the C9xx-specific PLIC compatible, and do not allow a SiFive one as fallback because they're not really compliant. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230202072814.319903-1-uwu@icenowy.me Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2023-02-13dt-bindings: timer: mediatek,mtk-timer: add MT8365Bernhard Rosenkränzer
Add binding description for mediatek,mt8365-systimer Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230125143503.1015424-8-bero@baylibre.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2023-02-13dt-bindings: timer: Add bindings for the RISC-V timer deviceAnup Patel
We add DT bindings for a separate RISC-V timer DT node which can be used to describe implementation specific behaviour (such as timer interrupt not triggered during non-retentive suspend). Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20230103141102.772228-3-apatel@ventanamicro.com Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2023-02-13dt-bindings: timer: rk-timer: Add rktimer for rv1126Jagan Teki
Add rockchip timer compatible string for rockchip rv1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221123183124.6911-3-jagan@edgeble.ai Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2022-12-21Merge tag 'mfd-next-6.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add support for Ampere Computing SMpro - Add support for TI TPS65219 PMIC New Functionality: - Add support for multiple devices of the same type; rk808 Fix-ups: - Convert a bunch of I2C class drivers over to .probe_new() - Remove superfluous includes; mc13xxx-*, palmas, timberdale - Use correct includes for GPIO handling; madera-core - Convert to GPIOD; twl6040 - Remove unused platform data handling; twl6040 - Device Tree changes; many - Remove unused drivers; dm355evm_msp, davinci_voicecodec, htc-i2cpld - Add support for modules; palmas - Enable COMPILE_TEST support; intel_soc_pmic* - Trivial: spelling / whitespace fixes; mc13xxx-spi - Replace old PM helpers with new ones; many - Convert deprecated mask_invert usage to unmask_base; many - Use devm_*() calls; qcom_rpm - MAINTAINER fix-ups - Make use of improved / replaced APIs; palmas, fsl-imx25-tsadc, stm32-lptimer, qcom_rpm, rohm-* Bug Fixes: - Add bounds / error checking; mt6360-core - No sleeping inside critical sections; axp20x - Fix missing dependencies; ROHM_BD957XMUF - Repair error paths; qcom-pm8008" * tag 'mfd-next-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (161 commits) dt-bindings: mfd: da9062: Correct file name for watchdog mfd: pm8008: Fix return value check in pm8008_probe() mfd: rohm: Use dev_err_probe() mfd: Drop obsolete dependencies on COMPILE_TEST dt-bindings: mfd: da9062: Move IRQ to optional properties mfd: qcom_rpm: Use devm_of_platform_populate() to simplify code mfd: qcom_rpm: Fix an error handling path in qcom_rpm_probe() mfd: stm32-lptimer: Use devm_platform_get_and_ioremap_resource() mfd: rohm-bd9576: Convert to i2c's .probe_new() mfd: fsl-imx25-tsadc: Use devm_platform_get_and_ioremap_resource() dt-bindings: Fix maintainer email for a few ROHM ICs mfd: palmas: Use device_get_match_data() to simplify the code Input: Add tps65219 interrupt driven powerbutton mfd: tps65219: Add driver for TI TPS65219 PMIC mfd: bd957x: Fix Kconfig dependency on REGMAP_IRQ mfd: wcd934x: Convert irq chip to config regs mfd: tps65090: Replace irqchip mask_invert with unmask_base mfd: sun4i-gpadc: Replace irqchip mask_invert with unmask_base mfd: stpmic1: Fix swapped mask/unmask in irq chip mfd: sprd-sc27xx-spi: Replace irqchip mask_invert with unmask_base ...
2022-12-16dt-bindings: drop redundant part of title (beginning)Krzysztof Kozlowski
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop beginning "Devicetree bindings" in various forms: find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -exec sed -i -e 's/^title: [dD]evice[ -]\?[tT]ree [bB]indings\? for \([tT]he \)\?\(.*\)$/title: \u\2/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -exec sed -i -e 's/^title: [bB]indings\? for \([tT]he \)\?\(.*\)$/title: \u\2/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -exec sed -i -e 's/^title: [dD][tT] [bB]indings\? for \([tT]he \)\?\(.*\)$/title: \u\2/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Sebastian Reichel <sre@kernel.org> # power Link: https://lore.kernel.org/r/20221216163815.522628-8-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-16dt-bindings: drop redundant part of title (end, part three)Krzysztof Kozlowski
The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-16dt-bindings: drop redundant part of title (end)Krzysztof Kozlowski
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop trailing "Devicetree bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-13Merge tag 'pinctrl-v6.2-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "The two large chunks is the header clean-up from Andy and the Qualcomm DT bindings clean-up from Krzysztof. Each which could give rise to conflicts, but I haven't seen any. The YAML conversions happening around the device tree is the biggest item in the series and is the result of Rob Herrings ambition to autovalidate these trees against strict schemas and it is paying off in lots of bugs found and ever prettier device trees. Sooner or later the transition will be complete, Krzysztof is fixing up all of the Qualcomm stuff, which is pretty voluminous. Core changes: - minor but nice and important documentation clean-ups New drivers: - subdriver for the Qualcomm SDM670 SoC - subdriver for the Intel Moorefield SoC - trivial support for the NXP Freescale i.MXRT1170 SoC Other changes and improvements - major clean-up of the Qualcomm pin control device tree bindings by Krzysztof - major header clean-up by Andy - some immutable irqchip clean-up for the Actions Semiconductor and Nuvoton drivers - GPIO helpers for The Cypress cy8c95x0 driver - bias handling in the Mediatek MT7986 driver - remove the unused pins-are-numbered concept that never flew" * tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits) pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions() dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered pinctrl: stm32: Remove check for pins-are-numbered pinctrl: mediatek: common: Remove check for pins-are-numbered pinctrl: qcom: remove duplicate included header files pinctrl: sunxi: d1: Add CAN bus pinmuxes pinctrl: loongson2: Fix some const correctness pinctrl: pinconf-generic: add missing of_node_put() pinctrl: intel: Enumerate PWM device when community has a capability pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe() pwm: lpss: Allow other drivers to enable PWM LPSS pwm: lpss: Include headers we are the direct user of pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS pwm: Add a stub for devm_pwmchip_add() pinctrl: k210: call of_node_put() pinctrl: starfive: Use existing variable gpio dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching pinconf-generic: fix style issues in pin_config_param doc pinctrl: pinctrl-loongson2: fix Kconfig dependency ...
2022-12-07dt-bindings: timer: Add Broadcom's BCMBCA timersRafał Miłecki
BCA is a big set / family of Broadcom devices sharing multiple hardware blocks. One of them is timer that actually exists in two versions. It's a part of TWD MFD block. Add binding for it so SoCs can be properly described. Linux (and probably any other OS) doesn't really seem to need a driver for it. it may be needed for bootloaders (e.g. U-Boot) though. Especially for SoCs with CPUs other than Cortex-A9 (which contains arch timers). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20221028115353.13881-1-zajec5@gmail.com
2022-12-02dt-bindings: timer: renesas,cmt: Add r8a779g0 CMT supportWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20221104150642.4587-1-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2022-12-02dt-bindings: timer: renesas,tmu: Add r8a779g0 supportWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221103204859.24667-1-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2022-12-02dt-bindings: timer: nuvoton,npcm7xx-timer: Allow specifying all clocksJonathan Neuschäfer
The timer module contains multiple timers. In the WPCM450 SoC, each timer runs off a clock can be gated individually. To model this correctly, the timer node in the devicetree needs to take multiple clock inputs. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20221104161850.2889894-2-j.neuschaefer@gmx.net Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2022-12-02dt-bindings: timer: rockchip: Add rockchip,rk3128-timerJohan Jonker
Add rockchip,rk3128-timer compatible string. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Link: https://lore.kernel.org/r/0e57f38f-bace-8556-7258-aa0b3c0ac103@gmail.com
2022-11-10dt-bindings: timer: gpt: Add i.MXRT compatible DocumentationJesse Taube
Both the i.MXRT1170 and 1050 have the same GPT timer as "fsl,imx6dl-gpt" Add i.MXRT to the compatible list. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20221107071511.2764628-4-Mr.Bossman075@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-14Merge tag 'riscv-for-linus-6.1-mw2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull more RISC-V updates from Palmer Dabbelt: - DT updates for the PolarFire SOC - a fix to correct the handling of write-only mappings - m{vetndor,arcd,imp}id is now in /proc/cpuinfo - the SiFive L2 cache controller support has been refactored to also support L3 caches - misc fixes, cleanups and improvements throughout the tree * tag 'riscv-for-linus-6.1-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (42 commits) MAINTAINERS: add RISC-V's patchwork RISC-V: Make port I/O string accessors actually work riscv: enable software resend of irqs RISC-V: Re-enable counter access from userspace riscv: vdso: fix NULL deference in vdso_join_timens() when vfork riscv: Add cache information in AUX vector soc: sifive: ccache: define the macro for the register shifts soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes soc: sifive: ccache: reduce printing on init soc: sifive: ccache: determine the cache level from dts soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache riscv: check for kernel config option in t-head memory types errata riscv: use BIT() marco for cpufeature probing riscv: use BIT() macros in t-head errata init riscv: drop some idefs from CMO initialization riscv: cleanup svpbmt cpufeature probing riscv: Pass -mno-relax only on lld < 15.0.0 RISC-V: Avoid dereferening NULL regs in die() dt-bindings: riscv: add new riscv,isa strings for emulators ...
2022-10-12dt-bindings: timer: sifive,clint: add legacy riscv compatibleConor Dooley
While "real" hardware might not use the compatible string "riscv,clint0" it is present in the driver & QEMU uses it for automatically generated virt machine dtbs. To avoid dt-validate problems with QEMU produced dtbs, such as the following, add it to the binding. riscv-virt.dtb: clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'starfive,jh7100-clint', 'canaan,k210-clint'] Reported-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/ Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220823183319.3314940-2-mail@conchuod.ie Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-10-10Merge tag 'devicetree-for-6.1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Fix node refcounting in of_find_last_cache_level() - Constify device_node in of_device_compatible_match() - Fix 'dma-ranges' handling in bus controller nodes - Fix handling of initrd start > end - Improve error reporting in of_irq_init() - Taint kernel on DT unittest running - Use strscpy instead of strlcpy - Add a build target, dt_compatible_check, to check for compatible strings used in kernel sources against compatible strings in DT schemas. - Handle DT_SCHEMA_FILES changes when rebuilding DT bindings: - LED bindings for MT6370 PMIC - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller, mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc, and arm,versatile-sysreg to DT schema format - Add nvmem cells to u-boot,env schema - Add more LED_COLOR_ID definitions - Require 'opp-table' uses to be a node - Various schema fixes to match QEMU 'virt' DT usage - Tree wide dropping of redundant 'Device Tree Binding' in schema titles - More (unevaluated|additional)Properties fixes in schema child nodes - Drop various redundant minItems equal to maxItems" * tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits) of: base: Shift refcount decrement in of_find_last_cache_level() dt-bindings: leds: Add MediaTek MT6370 flashlight dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator dt-bindings: mailbox: Convert mtk-gce to DT schema of: base: make of_device_compatible_match() accept const device node of: Fix "dma-ranges" handling for bus controllers of: fdt: Remove unused struct fdt_scan_status dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node dt-bindings: timer: Add power-domains for TI timer-dm on K3 dt: Add a check for undocumented compatible strings in kernel kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML dt-bindings: i2c: migrate mt7621 text bindings to YAML dt-bindings: power: gpcv2: correct patternProperties dt-bindings: virtio: Convert virtio,pci-iommu to DT schema dt-bindings: timer: arm,arch_timer: Allow dual compatible string dt-bindings: arm: cpus: Add kryo240 compatible dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema dt-bindings: nvmem: u-boot,env: add basic NVMEM cells dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema ...
2022-10-10Merge tag 'timers-core-2022-10-05' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer updates from Thomas Gleixner: "A boring time, timekeeping, timers update: - No core code changes - No new clocksource/event driver - Cleanup of the TI DM clocksource/event driver - The usual set of device tree binding updates - Small improvement, fixes and cleanups all over the place" * tag 'timers-core-2022-10-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits) clocksource/drivers/arm_arch_timer: Fix CNTPCT_LO and CNTVCT_LO value clocksource/drivers/imx-sysctr: handle nxp,no-divider property dt-bindings: timer: nxp,sysctr-timer: add nxp,no-divider property clocksource/drivers/timer-ti-dm: Get clock in probe with devm_clk_get() clocksource/drivers/timer-ti-dm: Add flag to detect omap1 clocksource/drivers/timer-ti-dm: Move struct omap_dm_timer fields to driver clocksource/drivers/timer-ti-dm: Use runtime PM directly and check errors clocksource/drivers/timer-ti-dm: Move private defines to the driver clocksource/drivers/timer-ti-dm: Simplify register access further clocksource/drivers/timer-ti-dm: Simplify register writes with dmtimer_write() clocksource/drivers/timer-ti-dm: Simplify register reads with dmtimer_read() clocksource/drivers/timer-ti-dm: Drop unused functions clocksource/drivers/timer-gxp: Add missing error handling in gxp_timer_probe clocksource/drivers/arm_arch_timer: Fix handling of ARM erratum 858921 clocksource/drivers/exynos_mct: Enable building on ARTPEC clocksource/drivers/exynos_mct: Support local-timers property clocksource/drivers/exynos_mct: Support frc-shared property dt-bindings: timer: exynos4210-mct: Add ARTPEC-8 MCT support clocksource/drivers/sun4i: Add definition of clear interrupt clocksource/drivers/renesas-ostm: Add support for RZ/V2L SoC ...
2022-09-29dt-bindings: timer: Add power-domains for TI timer-dm on K3Tony Lindgren
On K3 SoCs, the power-domains property is needed. On the earlier SoCs, the power-domains property is handled by the interconnect target module parent device. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220919112357.64997-1-tony@atomide.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-26dt-bindings: timer: arm,arch_timer: Allow dual compatible stringJean-Philippe Brucker
Since the Armv7 and Armv8 architected timers are compatible, it is valid to expose a devicetree node with compatible string "arm,armv8-timer" followed by "arm,armv7-timer". For example a 32-bit guest running on a 64-bit machine may look for the v7 string even though the hardware is v8. VMMs such as QEMU and kvmtool have been using this compatible string for some time. Clean up the compatible list a little and add the dual option. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220922161149.371565-1-jean-philippe@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-20dt-bindings: timer: nxp,sysctr-timer: add nxp,no-divider propertyPeng Fan
The base clock input to system counter is internally divided by 3 in previous design, but there is change that no divider now. So add a property to indicate that. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220902111207.2902493-2-peng.fan@oss.nxp.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-09-20dt-bindings: timer: exynos4210-mct: Add ARTPEC-8 MCT supportVincent Whitchurch
The ARTPEC-8 has an MCT with 4 global and 8 local timer interrupts. The SoC has a quad-core Cortex-A53 and a single-core Cortex-A5 which share one MCT with one global and eight local timers. The Cortex-A53 and Cortex-A5 do not have cache-coherency between them, and therefore run two separate kernels. The Cortex-A53 boots first and starts the global free-running counter and also registers a clock events device using the global timer. (This global timer clock events is usually replaced by arch timer clock events for each of the cores.) When the A5 boots (via the A53), it should not use the global timer interrupts or write to the global timer registers. This is because even if there are four global comparators, the control bits for all four are in the same registers, and we would need to synchronize between the cpus. Instead, the global timer FRC (already started by the A53) should be used as the clock source, and one of the local timers which are not used by the A53 can be used for clock events on the A5. To support this hardware, add a compatible for the MCT as well as two new properties to describe the hardware-mandated sharing of the FRC and dedicating local timers to specific processors. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20220609112738.359385-2-vincent.whitchurch@axis.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-08-31dt-bindings: timer: Add missing (unevaluated|additional)Properties on child ↵Rob Herring
nodes In order to ensure only documented properties are present, node schemas must have unevaluatedProperties or additionalProperties set to false (typically). Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220823145649.3118479-16-robh@kernel.org
2022-08-25dt-bindings: Remove 'Device Tree Bindings' from end of title:Andrew Lunn
As indicated in link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/ DT schema files should not have 'Device Tree Binding' as part of there title: line. Remove this in most .yaml files, so hopefully preventing developers copying it into new .yaml files, and being asked to remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch Signed-off-by: Rob Herring <robh@kernel.org>
2022-08-19dt-bindings: timer: renesas,tmu: Add r8a779f0 supportWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220726205858.1199-1-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-08-19dt-bindings: timer: Add compatible for MediaTek MT8188Johnson Wang
Add dt-binding documentation of timer for MediaTek MT8188 SoC platform. Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220818124602.20394-1-johnson.wang@mediatek.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-08-02Merge tag 'arm-newsoc-6.0' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same" * tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver ...
2022-08-02Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM DT updates from Arnd Bergmann: "As usual, the bulk of the changes for the SoC tree are devicetree file updates, and most of these changes are for 64-bit embedded machines. As before, there are a ton of style cleanups, and additional hardware support for existing machines. Looking only at the new SoC, the notable additions are: - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit: BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146, BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes with a corresponding reference board. - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65 NPU. - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets added here in addition to the reference boards. - Allwinner H616, a newer version of the H6 SoC, targeted at Set-top-box applications. It comes with dts files for the Orange Pi zero2 single-board computer and the X96 Mate set-top-box - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the Armada SoC family based on the Cortex-A55 core. New machines based on previously supported SoCs include: - Several new machines on NXP i.MX platforms: multiple Toradex Colibri boards using the "Iris" and "Ixora" carriers, DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM. - Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix 10 Software Virtual platform, both in the SoCFPGA platform. - Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point - Improved Chromebook support for both the Mediatek and Qualcomm SoC families brought added machines: Acer Chromebook 514 (MT8192), Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines including the Lenovo IdeaPad Chromebook Duet 3. - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on Qualcomm SDM845, while Mi 5s Plus is based on MSM8996. - Finally, there are a few development board on other chips: PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)" * tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits) dt-bindings: soc: bcm: use absolute path to other schema dt-bindings: soc: bcm: drop quotes when not needed dt-bindings: soc: microchip: use absolute path to other schema dt-bindings: soc: microchip: drop quotes when not needed ARM: dts: lan966x: keep lan966 entries alphabetically sorted ARM: dts: lan966x: add support for pcb8309 dt-bindings: arm: at91: add lan966 pcb8309 board ARM: dts: lan966x: Enable network driver on pcb8291 ARM: dts: lan966x: Disable can0 on pcb8291 ARM: dts: lan966x: Add gpio-restart dt-bindings: arm: aspeed: add Aspeed Evaluation boards arm64: dts: qcom: Add support for Xiaomi Mi Mix2s dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices dt-bindings: arm: qcom: add missing SM6350 board compatibles dt-bindings: arm: qcom: add missing SM6125 board compatibles dt-bindings: arm: qcom: add missing SDM845 board compatibles dt-bindings: arm: qcom: add missing SDM636 board compatibles dt-bindings: arm: qcom: add missing SDM630 board compatibles dt-bindings: arm: qcom: add missing QCS404 board compatibles ...
2022-07-28Merge tag 'timers-v5.20-rc1' of ↵Thomas Gleixner
https://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clockevent/source updates from Daniel Lezcano: - Add the missing DT bindings for the MTU nomadik timer (Linus Walleij) - Fix grammar typo in the ARM global timer Kconfig option (Randy Dunlap) - Add the tegra186 timer and use it on the tegra234 board (Thierry Reding) - Add the 'CPUXGPT' CPU timer for Mediatek MT6795 and implement a workaround to overcome an ATF bug where the timer is not correctly initialized (AngeloGioacchino Del Regno) - Rework the suspend/resume approach to enable the feature on the timer even it is not an active clock and fix a compilation warning (Claudiu Beznea) - Add the Add R-Car Gen4 timer support along with the DT bindings (Wolfram Sang) - Add compatible for ti,am654-timer to support AM6 SoC (Tony Lindgren) - Fix Kconfig option to put it back to 'bool' instead of 'tristate' for the tegra186 (Daniel Lezcano) - Sort 'family,type' DT bindings for the Renesas timers (Geert Uytterhoeven) - Add compatible 'allwinner,sun20i-d1-timer' for Allwinner D1 (Samuel Holland) - Remove unnecessary (void*) conversions for sun4i (XU pengfei) - Remove unnecessary (void*) conversions for sun5i (Li zeming) Link: https://lore.kernel.org/all/7472984e-f502-5f27-82bf-070127dd85a5@linaro.org
2022-07-27dt-bindings: timer: allwinner,sun4i-a10-timer: Add D1 compatibleSamuel Holland
Allwinner D1 contains the usual sun4i MMIO timer device. It contains two timers like other recent SoCs, so it is compatible with the A23 variant. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220725051715.56427-1-samuel@sholland.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-27dt-bindings: timer: ingenic,tcu: use absolute path to other schemaKrzysztof Kozlowski
Absolute path to other DT schema is preferred over relative one. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220726115937.101432-1-krzysztof.kozlowski@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-27dt-bindings: timer: renesas,cmt: Fix R-Car Gen4 fall-outGeert Uytterhoeven
Restore sort order (by family, followed by type). Update the conditional sections specifying the number of interrupts. Fixes: 525b296185b4b0ab ("dt-bindings: timer: renesas,cmt: Add r8a779f0 and generic Gen4 CMT support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/2e3863ae32e17d49f41111580f195dd34e2b769d.1658303544.git.geert+renesas@glider.be Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-19dt-bindings: timer: npcm: Add npcm845 compatible stringTomer Maimon
Add a compatible string for Nuvoton BMC NPCM845 timer. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-18dt-bindings: timer: renesas,cmt: R-Car V3U is R-Car Gen4Wolfram Sang
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence move its compatible value to the R-Car Gen4 section. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220713100603.3391-3-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-18dt-bindings: timer: renesas,cmt: Add r8a779f0 and generic Gen4 CMT supportWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220713100603.3391-2-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-16dt-bindings: timer: mediatek: Add CPUX System Timer and MT6795 compatibleAngeloGioacchino Del Regno
Document the "CPUXGPT" CPU General Purpose Timer, used as ARM/ARM64 System Timer on MediaTek platforms and add the MT6795 compatible for it. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220613133819.35318-2-angelogioacchino.delregno@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-07-08dt-bindings: timer: Add Tegra186 & Tegra234 TimerKartik
The Tegra186 timer provides ten 29-bit timer counters and one 32-bit timestamp counter. The Tegra234 timer provides sixteen 29-bit timer counters and one 32-bit timestamp counter. Each NV timer selects its timing reference signal from the 1 MHz reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be programmed to generate one-shot, periodic, or watchdog interrupts. Signed-off-by: Kartik <kkartik@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-06-14dt-bindings: timer: Add Nomadik MTU bindingLinus Walleij
The Nomadik MTU timer has been used in devicetrees forever but somehow we missed to add a binding for it. Fix it by simply adding it. Cc: Lee Jones <lee.jones@linaro.org> Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220526213621.373727-1-linus.walleij@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2022-06-05Merge tag 'timers-core-2022-06-05' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull clockevent/clocksource updates from Thomas Gleixner: - Device tree bindings for MT8186 - Tell the kernel that the RISC-V SBI timer stops in deeper power states - Make device tree parsing in sp804 more robust - Dead code removal and tiny fixes here and there - Add the missing SPDX identifiers * tag 'timers-core-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/oxnas-rps: Fix irq_of_parse_and_map() return value clocksource/drivers/timer-ti-dm: Remove unnecessary NULL check clocksource/drivers/timer-sun5i: Convert to SPDX identifier clocksource/drivers/timer-sun4i: Convert to SPDX identifier clocksource/drivers/pistachio: Convert to SPDX identifier clocksource/drivers/orion: Convert to SPDX identifier clocksource/drivers/lpc32xx: Convert to SPDX identifier clocksource/drivers/digicolor: Convert to SPDX identifier clocksource/drivers/armada-370-xp: Convert to SPDX identifier clocksource/drivers/mips-gic-timer: Convert to SPDX identifier clocksource/drivers/jcore: Convert to SPDX identifier clocksource/drivers/bcm_kona: Convert to SPDX identifier clocksource/drivers/sp804: Avoid error on multiple instances clocksource/drivers/riscv: Events are stopped during CPU suspend clocksource/drivers/ixp4xx: Drop boardfile probe path dt-bindings: timer: Add compatible for Mediatek MT8186
2022-06-02Merge tag 'arm-late-5.19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull more ARM SoC updates from Arnd Bergmann: "This is the second part of the general SoC updates, containing everything that did not make it in the initial pull request, or that came in as a bugfix later. - Devicetree updates for SoCFPGA, ASPEED, AT91 and Rockchip, including a new machine using an ASPEED BMC. - More DT fixes from Krzysztof Kozlowski across platforms - A new SoC platform for the GXP baseboard management controller, used in current server products from HPE" * tag 'arm-late-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (56 commits) ARM: configs: Enable more audio support for i.MX tee: optee: Pass a pointer to virt_addr_valid() arm64: dts: rockchip: rename Quartz64-A bluetooth gpios arm64: dts: rockchip: add clocks property to cru node rk3368 arm64: dts: rockchip: add clocks property to cru node rk3308 arm64: dts: rockchip: add clocks to rk356x cru ARM: dts: rockchip: add clocks property to cru node rk3228 ARM: dts: rockchip: add clocks property to cru node rk3036 ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188 ARM: dts: rockchip: add clocks property to cru node rk3288 ARM: dts: rockchip: Remove "amba" bus nodes from rv1108 ARM: dts: rockchip: add clocks property to cru node rv1108 arm64: dts: sprd: use new 'dma-channels' property ARM: dts: da850: use new 'dma-channels' property ARM: dts: pxa: use new 'dma-channels/requests' properties soc: ixp4xx/qmgr: Fix unused match warning ARM: ep93xx: Make ts72xx_register_flash() static ARM: configs: enable support for Kontron KSwitch D10 ep93xx: clock: Do not return the address of the freed memory arm64: dts: intel: add device tree for n6000 ...
2022-06-01Merge tag 'pwm/for-5.19-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "Quite a large number of conversions this time around, courtesy of Uwe who has been working tirelessly on these. No drivers of the legacy API are left at this point, so as a next step the old API can be removed. Support is added for a few new devices such as the Xilinx AXI timer- based PWMs and the PWM IP found on Sunplus SoCs. Other than that, there's a number of fixes, cleanups and optimizations" * tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (43 commits) pwm: pwm-cros-ec: Add channel type support dt-bindings: google,cros-ec-pwm: Add the new -type compatible dt-bindings: Add mfd/cros_ec definitions pwm: Document that the pinstate of a disabled PWM isn't reliable pwm: twl-led: Implement .apply() callback pwm: lpc18xx: Implement .apply() callback pwm: mediatek: Implement .apply() callback pwm: lpc32xx: Implement .apply() callback pwm: tegra: Implement .apply() callback pwm: stmpe: Implement .apply() callback pwm: sti: Implement .apply() callback pwm: pwm-mediatek: Add support for MediaTek Helio X10 MT6795 dt-bindings: pwm: pwm-mediatek: Add documentation for MT6795 SoC pwm: tegra: Optimize period calculation pwm: renesas-tpu: Improve precision of period and duty_cycle calculation pwm: renesas-tpu: Improve maths to compute register settings pwm: renesas-tpu: Rename variables to match the usual naming pwm: renesas-tpu: Implement .apply() callback pwm: renesas-tpu: Make use of devm functions pwm: renesas-tpu: Make use of dev_err_probe() ...
2022-05-27Merge branch 'hpe/gxp-soc' into arm/lateArnd Bergmann
Patch series from Nick Hawkins: "The GXP is the HPE BMC SoC that is used in the majority of HPE current generation servers. Traditionally the asic will last multiple generations of server before being replaced. Info about SoC: HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC features at HPE. It supports ARMv7 architecture based on the Cortex A9 core. It is capable of using an AXI bus to which a memory controller is attached. It has multiple SPI interfaces to connect boot flash and BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple i2c engines to drive connectivity with a host infrastructure. The initial patches enable the watchdog and timer enabling the host to be able to boot." * hpe/gxp-soc: MAINTAINERS: Introduce HPE GXP Architecture ARM: dts: Introduce HPE GXP Device tree dt-bindings: arm: hpe: add GXP Support dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog clocksource/drivers/timer-gxp: Add HPE GXP Timer watchdog: hpe-wdt: Introduce HPE GXP Watchdog ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH ARM: hpe: Introduce the HPE GXP architecture Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-26Merge tag 'asm-generic-5.19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree contains three separate changes for linux-5.19: - The h8300 architecture is retired after it has been effectively unmaintained for a number of years. This is the last architecture we supported that has no MMU implementation, but there are still a few architectures (arm, m68k, riscv, sh and xtensa) that support CPUs with and without an MMU. - A series to add a generic ticket spinlock that can be shared by most architectures with a working cmpxchg or ll/sc type atomic, including the conversion of riscv, csky and openrisc. This series is also a prerequisite for the loongarch64 architecture port that will come as a separate pull request. - A cleanup of some exported uapi header files to ensure they can be included from user space without relying on other kernel headers" * tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: h8300: remove stale bindings and symlink sparc: add asm/stat.h to UAPI compile-test coverage powerpc: add asm/stat.h to UAPI compile-test coverage mips: add asm/stat.h to UAPI compile-test coverage riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h> agpgart.h: do not include <stdlib.h> from exported header csky: Move to generic ticket-spinlock RISC-V: Move to queued RW locks RISC-V: Move to generic spinlocks openrisc: Move to ticket-spinlock asm-generic: qrwlock: Document the spinlock fairness requirements asm-generic: qspinlock: Indicate the use of mixed-size atomics asm-generic: ticket-lock: New generic ticket-based spinlock remove the h8300 architecture
generated by cgit (git 2.34.1) at 2024-06-12 00:30:57 +0000