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2025-06-15dt-bindings: phy: Convert img,pistachio-usb-phy to DT schemaRob Herring (Arm)
Convert the Imagination Pistachio USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212531.742082-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,inno-usb2-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon INNO USB2 PHY binding to DT schema format. It's a straight forward conversion. Add the undocumented "hisilicon,hi3798mv100-usb2-phy" compatible. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212527.741915-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,hi6220-usb-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon HI6220 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212524.741770-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,hix5hd2-sata-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon HIX5HD2 SATA PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212520.741588-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert brcm,sr-pcie-phy to DT schemaRob Herring (Arm)
Convert the Broadcom Stingray PCIe PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212508.741193-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert brcm,ns2-drd-phy to DT schemaRob Herring (Arm)
Convert the Broadcom NS2 USB2 PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212456.740697-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert apm,xgene-phy to DT schemaRob Herring (Arm)
Convert the APM X-Gene PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212424.739972-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: samsung,mipi-video-phy: document exynos7870 MIPI phyKaustabh Chakraborty
The Exynos7870 MIPI PHY device contains one DSIM PHY block and three CSIS PHY blocks. It also requires two sysregs, one for display, and the other for cameras. Document this device. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250612-exynos7870-mipi-phy-v1-1-3fff0b62d9d3@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-14dt-bindings: phy: samsung,usb3-drd-phy: Add exynos990 compatibleIgor Belwon
Add a compatible for the exynos990-usbdrd-phy. The PHY is compatible with the older exynos5420 design (two clocks) when running in highspeed mode. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20250515-usb-resends-may-15-v3-1-ad33a85b6cee@mentallysanemainliners.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-13dt-bindings: pci: Add Sophgo SG2044 PCIe hostInochi Amaoto
The PCIe controller on the SG2044 is Designware based with custom app registers. Add binding document for SG2044 PCIe host controller. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250504004420.202685-2-inochiama@gmail.com
2025-06-12dt-bindings: net: renesas-gbeth: Add support for RZ/G3E (R9A09G047) SoCJohn Madieu
Document support for the GBETH IP found on the Renesas RZ/G3E (R9A09G047) SoC. The GBETH block on RZ/G3E is equivalent in functionality to the GBETH found on RZ/V2H(P) (R9A09G057). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250611061204.15393-1-john.madieu.xa@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-12dt-bindings: clock: exynosautov920: add hsi2 clock definitionsRaghav Sharma
Add device tree clock binding definitions for CMU_HSI2 Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250529112640.1646740-3-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12dt-bindings: clock: exynosautov920: sort clock definitionsRaghav Sharma
Sort all the clock compatible strings in alphabetical order Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250529112640.1646740-2-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12dt-bindings: arm: samsung: document g0s board bindingIvaylo Ivanov
Add binding for the Samsung Galaxy S22+ (SM-S906B) board, codenamed G0S, which is based on the Samsung Exynos2200 SoC. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250504145907.1728721-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ASoC: dt-bindings: mt8192-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-6-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8186-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-5-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8173-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-4-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8173-afe-pcm: Add power domainChen-Yu Tsai
The audio subsystem sits under a controllable power domain. Add it to the binding. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-3-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: Convert MT8173 AFE binding to dt-schemaChen-Yu Tsai
Convert the MT8173 AFE (audio frontend) binding from text to dt-schema in YAML. "clocks" is added to the list of required properties to match "clock-names". And the example was slightly fixed up in style. Otherwise everything is as before. A contributer and maintainer for a recently added MediaTek audio binding was chosen instead of the original submitter. Cc: Trevor Wu <trevor.wu@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-2-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-11dt-bindings: arm: qcom: Add Sony Xperia Z Ultra (togari)Kevin Widjaja
Based on the msm8974. Signed-off-by: Kevin Widjaja <kevin.widjaja21@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-togari-v2-3-10e7b53b87c1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-12dt-bindings: i2c: nvidia,tegra20-i2c: Specify the required propertiesAkhil R
Specify the properties which are essential and which are not for the Tegra I2C driver to function correctly. This was not added correctly when the TXT binding was converted to yaml. All the existing DT nodes have these properties already and hence this does not break the ABI. dmas and dma-names which were specified as a must in the TXT binding is now made optional since the driver can work in PIO mode if dmas are missing. Fixes: f10a9b722f80 ("dt-bindings: i2c: tegra: Convert to json-schema”) Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Cc: <stable@vger.kernel.org> # v5.17+ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andi Shyti <andi@smida.it> Link: https://lore.kernel.org/r/20250603153022.39434-1-akhilrajeev@nvidia.com
2025-06-11dt-bindings: serial: Convert altr,uart-1.0 to DT schemaRob Herring (Arm)
Convert the Altera JTAG UART binding to DT schema. The "ALTR,uart-1.0" compatible has long been deprecated, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-11dt-bindings: serial: Convert altr,juart-1.0 to DT schemaRob Herring (Arm)
Convert the Altera JTAG UART binding to DT schema. The "ALTR,juart-1.0" compatible has long been deprecated, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-11dt-bindings: pmem: Convert binding to YAMLDrew Fustini
Convert the PMEM device tree binding from text to YAML. This will allow device trees with pmem-region nodes to pass dtbs_check. [iweiny: fix ups from Rob/Drew] Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Drew Fustini <drew@pdp7.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Link: https://patch.msgid.link/20250606184405.359812-4-drew@pdp7.com Signed-off-by: Ira Weiny <ira.weiny@intel.com>
2025-06-11dt-bindings: clock: Convert brcm,bcm63xx-clocks to DT schemaRob Herring (Arm)
Convert the Broadcom BCM63xx clock bindings to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250521004610.1791426-1-robh@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-06-11dt-bindings: clock: ti: add ti,autoidle.yaml referenceSukrut Bellary
ti,divider-clock uses properties from ti,autoidle. As we are converting autoidle binding to ti,autoidle.yaml, fix the reference here. Signed-off-by: Sukrut Bellary <sbellary@baylibre.com> Link: https://lore.kernel.org/r/20250516081612.767559-4-sbellary@baylibre.com Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-06-11dt-bindings: clock: ti: Convert fixed-factor-clock to yamlSukrut Bellary
This uses the ti,autoidle.yaml for clock autoidle support. Clean up the example to meet the current standards. Add the creator of the original binding as a maintainer. Signed-off-by: Sukrut Bellary <sbellary@baylibre.com> Link: https://lore.kernel.org/r/20250516081612.767559-3-sbellary@baylibre.com Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-06-11dt-bindings: clock: ti: Convert autoidle binding to yamlSukrut Bellary
Autoidle clock is not an individual clock; it is always a derivate of some basic clock like a gate, divider, or fixed-factor. This binding will be referred in ti,divider-clock.yaml, and ti,fixed-factor-clock.yaml. As all clocks don't support the autoidle feature e.g., in DRA77xx/AM57xx[1], dpll_abe_x2* and dpll_per_x2 don't have autoidle, remove required properties from the binding. Add the creator of the original binding as a maintainer. [1] https://www.ti.com/lit/ug/spruhz6l/spruhz6l.pdf Signed-off-by: Sukrut Bellary <sbellary@baylibre.com> Link: https://lore.kernel.org/r/20250516081612.767559-2-sbellary@baylibre.com Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-06-11spi: dt-bindings: mediatek,spi-mt65xx: Add support for MT6991/MT8196 SPIAngeloGioacchino Del Regno
Add support for the SPI IPM controller found on MediaTek's MT6991 (Dimensity) and MT8196 (Kompanio) SoCs, with both having the same controller IP, hence being fully compatible with each other. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20250611110747.458090-1-angelogioacchino.delregno@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-11Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging to forward to v6.16-rc1 Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2025-06-11dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMCWillie Thai
Add Nvidia's GB200NVL BMC board compatible. Co-developed-by: Mars Yang <maryang@nvidia.com> Signed-off-by: Mars Yang <maryang@nvidia.com> Signed-off-by: Willie Thai <wthai@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250401153955.314860-2-wthai@nvidia.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11dt-bindings: ipmi: Add binding for IPMB deviceNinad Palsule
Add device tree binding document for the IPMB device interface. This device is already in use in both driver and .dts files. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Acked-by: Corey Minyard <corey@minyard.net> Link: https://patch.msgid.link/20250204194115.3899174-2-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-10dt-bindings: remoteproc: qcom,sm8150-pas: Document QCS615 remoteprocLijuan Gao
Document the components used to boot the ADSP and CDSP on the Qualcomm QCS615 SoC. Use fallback to indicate the compatibility of the remoteproc on the QCS615 with that on the SM8150. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-1-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10Merge branch '20250512-sc8180x-camcc-support-v4-2-8fb1d3265f52@quicinc.com' ↵Bjorn Andersson
into clk-for-6.17 Merge topic branch with missing GCC clocks and the camera clock controller for SC8180X through a topic branch, to make it available for DeviceTree inclusion as well.
2025-06-10dt-bindings: clock: Add Qualcomm SC8180X Camera clock controllerSatya Priya Kakitapalli
Add device tree bindings for the camera clock controller on Qualcomm SC8180X platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-2-8fb1d3265f52@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10dt-bindings: clock: qcom,sm8450-camcc: Move sc8280xp camcc to sa8775p camccJagadeesh Kona
SC8280XP camcc only requires the MMCX power domain, unlike SM8450 camcc which now supports both MMCX and MXC power domains. Hence move SC8280XP camcc from SM8450 to SA8775P camcc, to have single power domain support. SA8775P camcc doesn't support required-opps property currently but SC8280XP camcc need that property, so add required-opps based on SC8280XP camcc conditional check in SA8775P camcc bindings. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-3-02303b3a582d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domainsVladimir Zapolskiy
To configure the camera PLLs and enable the camera GDSCs on SM8450, SM8475, SM8550 and SM8650 platforms, the MXC rail must be ON along with MMCX. Therefore, update the camcc bindings to include the MXC power domain on these platforms. Fixes: 9cbc64745fc6 ("dt-bindings: clock: qcom: Add SM8550 camera clock controller") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-2-02303b3a582d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domainJagadeesh Kona
To configure the video PLLs and enable the video GDSCs on SM8450, SM8475, SM8550 and SM8650 platforms, the MXC rail must be ON along with MMCX. Therefore, update the videocc bindings to include the MXC power domain on these platforms. Fixes: 1e910b2ba0ed ("dt-bindings: clock: qcom: Add SM8450 video clock controller") Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-1-02303b3a582d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10dt-bindings: pinctrl: rockchip: increase max amount of device functionsNicolas Frattaroli
With the introduction of the RK3576, the maximum device function ID used increased to 14, as anyone can easily verify for themselves with: rg -g '*-pinctrl.dtsi' '<\d+\s+RK_P..\s+(?<func>\d+)\s.*>;$' --trim \ -NI -r '$func' arch/arm64/boot/dts/rockchip/ | sort -g | uniq Unfortunately, this wasn't caught by dt-validate as those pins are omit-if-no-ref and we had no reference to them in any tree so far. Once again kick the can down the road by increasing the limit to 14. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/20250602-rk3576-pwm-v2-1-a6434b0ce60c@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-10dt-bindings: ili9881c: Document 7" Raspberry Pi 720x1280Marek Vasut
Document the 7" Raspberry Pi 720x1280 DSI panel based on ili9881. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250608142908.54121-1-marek.vasut+renesas@mailbox.org
2025-06-10dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for S7/S7D/S6Xianwei Zhao
Update dt-binding document for pinctrl of Amlogic S7/S7D/S6. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20250527-s6-s7-pinctrl-v3-1-44f6a0451519@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-10dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panelStefan Eichenberger
The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a resolution of 480x480 pixels. Signed-off-by: Stefan Eichenberger <eichest@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250606114644.105371-3-eichest@gmail.com
2025-06-10dt-bindings: display: visionox-rm69299: document new compatible stringCaleb Connolly
Document a new compatible string for the second panel variant. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250509-topic-misc-shift6-panel-v2-1-c2c2d52abd51@linaro.org
2025-06-10dt-bindings: arm: rockchip: Add Luckfox Omni3576 and Core3576 bindingsJohn Clark
Add device tree binding for Luckfox Core3576 Module based boards, specifically the Luckfox Omni3576, with compatibility for the Rockchip RK3576 SoC. Signed-off-by: John Clark <inindev@gmail.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250516002713.145026-3-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-10dt-bindings: vendor-prefixes: Add luckfox prefixJohn Clark
Add vendor prefix for Shenzhen Luckfox Technology Co., Ltd., which produces development boards like the Luckfox Omni3576. Signed-off-by: John Clark <inindev@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250516002713.145026-2-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-10Revert "dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = ↵Claudiu Beznea
<1> for RZ/G3S" This reverts commit f33dca9ed6f41c8acf2c17c402738deddb7d7c28. Since the configuration order between the individual MSTOP and CLKON bits cannot be preserved with the power domain abstraction, drop the power domain IDs. Currently, there are no device tree users for #power-domain-cell = <1>. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20250527112403.1254122-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-10Merge tag 'renesas-r9a09g077-dt-binding-defs-tag' into renesas-clk-for-v6.17Geert Uytterhoeven
Renesas RZ/T2H DT Binding Definitions DT bindings and binding definitions for the Renesas RZ/T2H (R9A09G077) SoC, shared by driver and DT source files.
2025-06-10dt-bindings: memory-controllers: convert arm,pl172.txt to yaml formatFrank Li
Convert arm,pl172.txt to yaml format. Additional changes: - add mpmc,read-enable-delay property. - allow gpio@addr and sram@addr as child node to match existed dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250602141246.941448-1-Frank.Li@nxp.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-10dt-bindings: soc: samsung: exynos-pmu: Constrain google,pmu-intr-gen-sysconKrzysztof Kozlowski
PMU interrupt generation block is not present in older Samsung Exynos SoCs, so restrict the property to Google GS101 only. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250525190630.41858-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-10dt-bindings: gpio: convert nxp,lpc1850-gpio.txt to yaml formatFrank Li
Convert nxp,lpc1850-gpio.txt to yaml format. Additional changes: - remove interrupt-controller and #interupt-cells from required list to match existed dts files. - remove gpio consumer in examples. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250602144259.944257-1-Frank.Li@nxp.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-21 23:30:28 +0000