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2025-05-19Merge tag 'drm-msm-next-2025-05-16' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-next Updates for v6.16 CI: - uprev mesa GPU: - ACD (Adaptive Clock Distribution) support for X1-85. This is required enable the higher frequencies. - Drop fictional `address_space_size`. For some older devices, the address space size is limited to 4GB to avoid potential 64b rollover math problems in the fw. For these, an `ADRENO_QUIRK_4GB_VA` quirk is added. For everyone else we get the address space size from the SMMU `ias` (input address sizes), which is usually 48b. - Improve robustness when GMU HFI responses time out - Fix crash when throttling GPU immediately during boot - Fix for rgb565_predicator on Adreno 7c3 - Remove `MODULE_FIRMWARE()`s for GPU, the GPU can load the firmware after probe and having partial set of fw (ie. sqe+gmu but not zap) causes problems MDSS: - Added SAR2130P support to MDSS driver DPU: - Changed to use single CTL path for flushing on DPU 5.x+ - Improved SSPP allocation code to allow sharing of SSPP between planes - Enabled SmartDMA on SM8150, SC8180X, SC8280XP, SM8550 - Added SAR2130P support - Disabled DSC support on MSM8937, MSM8917, MSM8953, SDM660 - Misc fixes DP: - Switch to use new helpers for DP Audio / HDMI codec handling - Fixed LTTPR handling DSI: - Added support for SA8775P - Added SAR2130P support MDP4: - Fixed LCDC / LVDS controller on HDMI: - Switched to use new helpers for ACR data - Fixed old standing issue of HPD not working in some cases Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/CAF6AEGv2Go+nseaEwRgeZbecet-h+Pf2oBKw1CobCF01xu2XVg@mail.gmail.com
2025-05-19dt-bindings: riscv: sophgo: Add SG2044 compatible stringInochi Amaoto
Add compatible string for the Sophgo SG2044 SoC and the SRD3-10 board. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20250413223507.46480-10-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-19dt-bindings: interrupt-controller: Add Sophgo SG2044 PLICInochi Amaoto
The SG2044 implement a standard T-HEAD C900 PLIC, which is already supported by the kernel. Add compatible string for Sophgo SG2044 plic. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-5-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-19dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswiInochi Amaoto
As SG2044 also implements an enhanced ACLINT as SG2042, add necessary compatible string for SG2044 SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-16dt-bindings: PCI: microchip,pcie-host: Fix DMA coherency propertyConor Dooley
PolarFire SoC may be configured in a way that requires non-coherent DMA handling. On RISC-V, buses are coherent by default & the dma-noncoherent property is required to denote buses or devices that are non-coherent. For some reason, instead of adding dma-noncoherent to the binding the pointless, NOP, property dma-coherent was. Swap dma-coherent for dma-noncoherent. Fixes: 04aa999eb96fd ("dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://lore.kernel.org/r/20250516-datebook-senator-ff7a1c30cbd5@spud
2025-05-16dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) supportLad Prabhakar
Document support for the Renesas OS Timer (OSTM) found on the Renesas RZ/V2N (R9A09G056) SoC. The OSTM IP on RZ/V2N is identical to that on other RZ families, so no driver changes are required as `renesas,ostm` will be used as fallback compatible. Also update the bindings to require the "resets" property for RZ/V2N by inverting the logic: all SoCs except RZ/A1 and RZ/A2 now require the "resets" property. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250515182207.329176-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: thermal: qcom-tsens: Add ipq5018 compatibleSricharan Ramabadhran
IPQ5018 has tsens v1.0 block with 5 sensors of which 4 are in use and 1 interrupt. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/DS7PR19MB88835BD1063C4D5451E14B0E9DCC2@DS7PR19MB8883.namprd19.prod.outlook.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: thermal: Add support for Airoha EN7581 thermal sensorChristian Marangi
Add support for Airoha EN7581 thermal sensor and monitor. This is a simple sensor for the CPU or SoC Package that provide thermal sensor and trip point for hot low and critical condition to fire interrupt and react on the abnormal state. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250511185003.3754495-1-ansuelsmth@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert marvell,armada-370-timer to DT schemaRob Herring (Arm)
Convert the Marvell Armada 37x/380/XP Timer binding to DT schema format. Update the compatible entries to match what is in use. "marvell,armada-380-timer" in particular was missing. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250506022301.2588282-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert ti,keystone-timer to DT schemaRob Herring (Arm)
Convert the TI Keystone Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022330.2589598-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert st,spear-timer to DT schemaRob Herring (Arm)
Convert the ST SPEAr Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022326.2589389-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert socionext,milbeaut-timer to DT schemaRob Herring (Arm)
Convert the Socionext Milbeaut Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022322.2589193-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,arc-timer to DT schemaRob Herring (Arm)
Convert the Synopsys ARC Local Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022317.2589010-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,archs-rtc to DT schemaRob Herring (Arm)
Convert the Synopsys ARC HS RTC Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022313.2588796-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,archs-gfrc to DT schemaRob Herring (Arm)
Convert the Synopsys ARC HS 64-bit Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022309.2588605-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert lsi,zevio-timer to DT schemaRob Herring (Arm)
Convert the TI NSPIRE Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022257.2588136-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert jcore,pit to DT schemaRob Herring (Arm)
Convert the J-Core PIT Timer binding to DT schema format. It's a straight-forward conversion. Since the 'reg' entries are based on number of cores, we can't put constraints on it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022253.2587999-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert img,pistachio-gptimer to DT schemaRob Herring (Arm)
Convert the ImgTec Pistachio Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022249.2587839-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert ezchip,nps400-timer to DT schemaRob Herring (Arm)
Convert the EZChip NPS400 Timer bindings to DT schema format. It's a straight-forward conversion. The 2 bindings only differ in compatible and one required property, so the schemas can be combined. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022237.2587355-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert cirrus,clps711x-timer to DT schemaRob Herring (Arm)
Convert the Cirrus CLPS711x timer binding to DT schema format. It's a straight-forward conversion. Drop the aliases node and second example which aren't relevant. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022215.2586595-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert altr,timer-1.0 to DT schemaRob Herring (Arm)
Convert the Altera Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022202.2586157-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add ESWIN EIC7700 CLINTDarshan Prajapati
Add compatible string for ESWIN EIC7700 CLINT. Signed-off-by: Darshan Prajapati <darshan.prajapati@einfochips.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250410152519.1358964-9-pinkesh.vaghela@einfochips.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU TimerCaleb James DeLisle
Add device tree bindings for the so-called high-precision timer (HPT) in the EcoNet EN751221 SoC. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250507134500.390547-2-cjd@cjdns.fr Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert arm,mps2-timer to DT schemaRob Herring (Arm)
Convert the Arm MPS2 Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://lore.kernel.org/r/20250506022210.2586404-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add Sophgo SG2044 ACLINT timerInochi Amaoto
Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-3-inochiama@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert cnxt,cx92755-timer to DT schemaRob Herring (Arm)
Convert the Conexant Digicolor SoCs Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20250506022232.2587186-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert csky,gx6605s-timer to DT schemaRob Herring (Arm)
Convert the C-SKY gx6605s timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Guo Ren <guoren@kernel.org> Link: https://lore.kernel.org/r/20250506022224.2586860-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert csky,mptimer to DT schemaRob Herring (Arm)
Convert the C-SKY Multi-processor timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Guo Ren <guoren@kernel.org> Link: https://lore.kernel.org/r/20250506022228.2587029-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert marvell,orion-timer to DT schemaRob Herring (Arm)
Convert the Marvell Orion Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250506022305.2588431-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert fsl,gtm to YAMLJ. Neuschäfer
Convert fsl,gtm.txt to YAML so that device trees using a Freescale General-purpose Timers Module can be properly validated. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250412-gtm-yaml-v2-1-e4d2292ffefc@posteo.net Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add NXP System Timer ModuleDaniel Lezcano
Add the System Timer Module description found on the NXP s32 platform and the compatible for the s32g2 variant. Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> Cc: Thomas Fossati <thomas.fossati@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250417151623.121109-2-daniel.lezcano@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16Merge branch 'for-linus' into for-nextTakashi Iwai
Back-merge of 6.15 devel branch for further development of HD-audio stuff. Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-05-15Merge tag 'v6.15-rc6' into nextDmitry Torokhov
Sync up with mainline to bring in xpad controller changes.
2025-05-16Merge tag 'mediatek-drm-next-20250515' of ↵Dave Airlie
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next - 20250515 1. Prepare for support MT8195/88 HDMIv2 and DDCv2 2. DPI: Cleanups and add support for more formats 3. Cleanups and sanitization 4. Replace custom compare_dev with component_compare_of Signed-off-by: Dave Airlie <airlied@redhat.com> From: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20250514233647.15907-1-chunkuang.hu@kernel.org
2025-05-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.15-rc7). Conflicts: tools/testing/selftests/drivers/net/hw/ncdevmem.c 97c4e094a4b2 ("tests/ncdevmem: Fix double-free of queue array") 2f1a805f32ba ("selftests: ncdevmem: Implement devmem TCP TX") https://lore.kernel.org/20250514122900.1e77d62d@canb.auug.org.au Adjacent changes: net/core/devmem.c net/core/devmem.h 0afc44d8cdf6 ("net: devmem: fix kernel panic when netlink socket close after module unload") bd61848900bf ("net: devmem: Implement TX path") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-15dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma SystemsHeiko Stuebner
PP1516 are Touchscreen devices built around the PX30 SoC and companion devices to PX30-Cobra, again with multiple display options. The devices feature an EMMC, OTG port and a 720x1280 display with a touchscreen and camera Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-6-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma SystemsHeiko Stuebner
Cobra are Touchscreen devices built around the PX30 SoC using a variety of display options. The devices feature an EMMC, network port, usb host + OTG ports and a 720x1280 display with a touchscreen. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15dt-bindings: usb: cypress,hx3: Add support for all variantsLukasz Czechowski
The Cypress HX3 hubs use different default PID value depending on the variant. Update compatibles list. Becasuse all hub variants use the same driver data, allow the dt node to have two compatibles: leftmost which matches the HW exactly, and the second one as fallback. Fixes: 1eca51f58a10 ("dt-bindings: usb: Add binding for Cypress HX3 USB 3.0 family") Cc: stable@vger.kernel.org # 6.6 Cc: stable@vger.kernel.org # Backport of the patch ("dt-bindings: usb: usb-device: relax compatible pattern to a contains") from list: https://lore.kernel.org/linux-usb/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de/ Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-2-4a76a474a010@thaumatec.com [taken with Greg's blessing] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15dt-bindings: ata: Convert arasan,cf-spear1340 to DT schemaRob Herring (Arm)
Convert the Arasan/SPEAr Compact Flash Controller to DT schema format. The "clock-frequency" property isn't actually used. Add a single "clocks" entry as the Linux driver supports a single clock though the platform still doesn't have clocks in DT. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-05-15dt-bindings: ata: Convert marvell,orion-sata to DT schemaRob Herring (Arm)
Convert the Marvell Orion SATA Controller to DT schema format. The clocks and clock-names properties were missing. The names for phy-names were incorrect. The maximum "nr-ports" was determined from the Linux driver. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-05-15dt-bindings: ata: Convert cavium,ebt3000-compact-flash to DT schemaRob Herring (Arm)
Convert the Cavium Compact Flash Controller to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-05-15dt-bindings: ata: Convert apm,xgene-ahci to DT schemaRob Herring (Arm)
Convert the APM X-Gene AHCI SATA Controller to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-05-15dt-bindings: ata: Convert st,ahci to DT schemaRob Herring (Arm)
Convert the ST AHCI SATA Controller to DT schema format. The phy-names changes from "ahci_phy" to "sata-phy" with the inclusion of ahci-common.yaml. That's an ABI change, but the Linux driver at least ignores the names. The binding uses "ports-implemented" property, so including ahci-common.yaml is required. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-05-15dt-bindings: Document Tegra264 HDA SupportSheetal
For Tegra264 device there is one clock, two resets and no power-domain. Add the Tegra264 compatible and necessary logic to the binding doc to determine appropriate clocks, resets and power-domain properties based on the compatible string. Signed-off-by: Sheetal <sheetal@nvidia.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20250512064258.1028331-3-sheetal@nvidia.com
2025-05-15dt-bindings: Update Tegra194 and Tegra234 HDA bindingsSheetal
- Tegra194 and Tegra234 HDA is not compatible with Tegra30, hence update them as standalone compatibles. Also, add necessary logic to the binding doc as HDA clocks and resets for Tegra194 and Tegra234 are different from Tegra30. This fixes below dtbs_check errors: - compatible: 'oneOf' conditional failed, one must be fixed: ['nvidia,tegra194-hda'] is too short 'nvidia,tegra30-hda' was expected 'nvidia,tegra132-hda' was expected - compatible: 'oneOf' conditional failed, one must be fixed: ['nvidia,tegra234-hda'] is too short 'nvidia,tegra30-hda' was expected 'nvidia,tegra132-hda' was expected - hda@3510000: clock-names:1: 'hda2hdmi' was expected - hda@3510000: reset-names:1: 'hda2hdmi' was expected Signed-off-by: Sheetal <sheetal@nvidia.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20250512064258.1028331-2-sheetal@nvidia.com
2025-05-15ASoC: codecs: add support for ES8389Mark Brown
Merge series from Zhang Yi <zhangyi@everest-semi.com>: The driver is for codec ES8389 of everest-semi.
2025-05-15spi: dt-bindings: tegra: Document IOMMU property for Tegra234 QSPIVishwaroop A
Add the 'iommus' property to the Tegra QSPI device tree binding. The property is needed for Tegra234 when using the internal DMA controller, and is not supported on other Tegra chips, as DMA is handled by an external controller. Signed-off-by: Vishwaroop A <va@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Link: https://patch.msgid.link/20250513200043.608292-1-va@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-14dt-bindings: net: snps,dwmac: Align mdio node in example with bindingsGeert Uytterhoeven
According to the bindings, the MDIO subnode should be called "mdio". Update the example to match this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/308d72c2fe8e575e6e137b99743329c2d53eceea.1747121550.git.geert+renesas@glider.be Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-14media: dt-bindings: renesas,vsp1: add top-level constraintsKrzysztof Kozlowski
Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks and clock-names. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250501173411.134130-4-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-14media: dt-bindings: renesas,fcp: add top-level constraintsKrzysztof Kozlowski
Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks and clock-names. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250501173411.134130-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-22 21:03:11 +0000