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2025-05-05dt-bindings: rng: rockchip,rk3588-rng: add rk3576-rng compatibleNicolas Frattaroli
The RK3576 SoC contains another standalone TRNG implementation. While the register map and hardware is different, it has the same clocks/interrupts/resets as the RK3588's TRNG, so can go in the same binding. Add the compatible and generalise the title/description of the binding some more. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05dt-bindings: display: panel: Add BOE TD4320Barnabás Czémán
Document BOE TD4320 6.3" 2340x1080 panel found in Xiaomi Redmi Note 7 smartphone. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org
2025-05-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux v6.15-rc5Herbert Xu
Merge mainline to pick up bcachefs poly1305 patch 4bf4b5046de0 ("bcachefs: use library APIs for ChaCha20 and Poly1305"). This is a prerequisite for removing the poly1305 shash algorithm.
2025-05-04dt-bindings: hwinfo: Add VIA/WonderMedia SoC identificationAlexey Charkov
VIA/WonderMedia SoC's have a chip ID register inside their system configuration controller space, which can be used to identify appropriate hardware quirks at runtime. Add binding for it. Signed-off-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-1-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-04dt-bindings: opp: Add v2-qcom-adreno vendor bindingsAkhil P Oommen
Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com> Tested-by: Anthony Ruhier <aruhier@mailbox.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649351/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2025-05-04dt-bindings: display: rockchip,inno-hdmi: Document GRF for RK3036 HDMIAndy Yan
HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part is missing when it first landing upstream. Document that it is mandatory for RK3036 HDMI. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250422070455.432666-3-andyshrk@163.com
2025-05-04dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatibleAndy Yan
The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Therefore, both RK3036 and RK3128 HDMI require two identical clocks. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250422070455.432666-2-andyshrk@163.com
2025-05-03dt-bindings: display: ltk500hd1829: add port propertyHeiko Stuebner
The panel can be connected to via graph nodes, so allow the port property. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430082850.244199-3-heiko@sntech.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-03dt-bindings: display: ltk050h3146w: add port propertyHeiko Stuebner
The panel can be connected to via graph nodes, so allow the port property. This fixes dtc checker warnings like: >> arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: panel@0 (leadtek,ltk050h3148w): 'port' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/display/panel/leadtek,ltk050h3146w.yaml# arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: /edp@fdec0000: failed to match any schema with compatible: ['rockchip,rk3588-edp'] Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202504300218.VDqQqGTT-lkp@intel.com/ Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430082850.244199-2-heiko@sntech.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02Merge tag 'spi-fix-v6.15-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A fairly small pile of fixes, plus one new compatible string addition to the Synopsis driver for a new platform. The most notable thing is the fix for divide by zeros in spi-mem if an operation has no dummy bytes" * tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: tegra114: Don't fail set_cs_timing when delays are zero spi: spi-qpic-snand: fix NAND_READ_LOCATION_2 register handling spi: spi-mem: Add fix to avoid divide error spi: dt-bindings: snps,dw-apb-ssi: Add compatible for SOPHGO SG2042 SoC spi: dt-bindings: snps,dw-apb-ssi: Merge duplicate compatible entry spi: spi-qpic-snand: propagate errors from qcom_spi_block_erase() spi: stm32-ospi: Fix an error handling path in stm32_ospi_probe()
2025-05-03dt-bindings: sram: sunxi-sram: Add A523 compatibleYixun Lan
The Allwinner A523 family of SoCs have their "system control" registers compatible to the A64 SoC, so add the new SoC specific compatible string. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Yixun Lan <dlan@gentoo.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-1-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-02dt-bindings: pwm: add support for MC33XS2410Dimitri Fedrau
Adding documentation for NXPs MC33XS2410 high side switch. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://lore.kernel.org/r/20250407-mc33xs2410-v9-1-57adcb56a6e4@liebherr.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-05-02dt-bindings: arm: ti: Add Toradex Verdin AM62PFrancesco Dolcini
Add toradex,verdin-am62p for Toradex Verdin AM62 SoM, its nonwifi and wifi variants, and the Toradex carrier board they may be mated in. Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430102815.149162-2-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02dt-bindings: media: renesas,isp: Add ISP core function blockNiklas Söderlund
Some R-Car ISP instances have in addition to the channel selector (CS) an ISP core (CORE) to perform operations on an image stream. The core function is mapped to a different memory region and has a separate interrupt than CS, extend the bindings to allow describing this. On the same SoC different instances of the ISP IP may have, or not have, the CORE functionality. The CS function on all instances on the SoC are the same and the documentation describes the full ISP (CS + CORE) as a single IP block. Where instances not having the CORE function simply lack the functionality to modify the image data. There are dependencies on the CS functionality while operating the CORE functionality. In order for the ISP core to function in memory-to-memory mode it needs to be feed input data from a Streaming Bridge interface. This interface is provided thru the VSP-X device. Add an optional new property "renesas,vspx" to provide a phandle to describe this relationship. While adding mandatory reg-names and interrupt-names breaks existing bindings the driver itself remains backward compatible and provides CS functionality if a single unnamed reg and interrupt property is present. Furthermore all existing users of the bindings are updated in following work to add these new mandatory properties. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250423163113.2961049-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-02dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS acceleratorVikash Garodia
Document the IRIS video decoder/encoder accelerator found in the QCS8300 platform. It belongs to same iris v3 family as that of SM8550 but is a downscaled version of SM8550. It has 2 frame processing hardware blocks while SM8550 has 4. Thereby QCS8300 have fewer capabilities than those of SM8550. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-02dt-bindings: media: qcom,sm8550-iris: document SM8650 IRIS acceleratorNeil Armstrong
Document the IRIS video decoder and encoder accelerator found in the SM8650 platform, it requires 2 more reset lines in addition to the properties required for the SM8550 platform. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-01dt-bindings: arm: psci: change labels to lower-case in exampleKrzysztof Kozlowski
DTS coding style expects labels to be lowercase, so adjust the example code. No functional impact. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250501150934.77317-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-01dt-bindings: net: via-rhine: Convert to YAMLAlexey Charkov
Rewrite the textual description for the VIA Rhine platform Ethernet controller as YAML schema, and switch the filename to follow the compatible string. These are used in several VIA/WonderMedia SoCs Signed-off-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250430-rhine-binding-v2-1-4290156c0f57@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-02dt-bindings: display: msm: document DSI controller and phy on SA8775PAyushi Makhija
Document DSI controller and phy on SA8775P platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649839/ Link: https://lore.kernel.org/r/20250424062431.2040692-4-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: msm: dsi-controller-main: document the SA8775P DSI CTRLAyushi Makhija
Document the DSI CTRL on the SA8775P Platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649855/ Link: https://lore.kernel.org/r/20250424062431.2040692-3-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display: msm-dsi-phy-7nm: document the SA8775P DSI PHYAyushi Makhija
Document the DSI PHY on the SA8775P Platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649838/ Link: https://lore.kernel.org/r/20250424062431.2040692-2-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc pathKonrad Dybcio
There's a separate path that allows register access from CPUSS. Describe it. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/641464/ Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-2-0c84aceb0ef9@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: Add Qualcomm SAR2130PDmitry Baryshkov
Describe the Mobile Display SubSystem (MDSS) device present on the Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the system level. SAR2130P features two DSI hosts and single DisplayPort controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649265/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-5-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-01dt-bindings: net: sun8i-emac: Add A523 EMAC0 compatibleYixun Lan
Allwinner A523 SoC variant (A527/T527) contains an "EMAC0" Ethernet MAC compatible to the A64 version. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-2-6fc000bbccbd@gentoo.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-02dt-bindings: display/msm: qcom,sc7280-dpu: describe SAR2130PDmitry Baryshkov
Describe DPU controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649254/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-4-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: dsi-phy-7nm: describe SAR2130PDmitry Baryshkov
Describe MIPI DSI PHY present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649252/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-3-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: dsi-controller-main: describe SAR2130PDmitry Baryshkov
Describe MIPI DSI controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649250/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-2-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: dp-controller: describe SAR2130PDmitry Baryshkov
Describe DisplayPort controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649263/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-1-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display: msm: mdp4: add LCDC clock and PLL sourceDmitry Baryshkov
Add the LCDC / LVDS clock input and the XO used to drive internal LVDS PLL to MDP4 controller bindings. The controller also provides LVDS PHY PLL, so add optional #clock-cells to the device. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/650278/ Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-1-6b212160b44c@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: msm: qcom,mdss: Document interconnect pathsLuca Weiss
Document two interconnect paths found on the MDSS on MSM8953. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/649391/ Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-1-828715dcb674@lucaweiss.eu Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.15-rc5). No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-01dt-bindings: power: supply: Document Maxim MAX8971 chargerSvyatoslav Ryhel
Add bindings for Maxim MAX8971 charger. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250430055114.11469-2-clamor95@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-05-02spi: dt-bindings: spi-qpic-snand: Add IPQ5018 compatibleGeorge Moussalem
IPQ5018 contains the QPIC-SPI-NAND flash controller which is the same as the one found in IPQ9574. So let's document the IPQ5018 compatible and use IPQ9574 as the fallback. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://patch.msgid.link/20250501-ipq5018-spi-qpic-snand-v1-1-31e01fbb606f@outlook.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-01dt-bindings: usb: realtek,rts5411: Adapt usb-hub.yamlPin-yen Lin
Inherit usb-hub.yaml and remove duplicated schemas. Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250422082957.2058229-4-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-01dt-bindings: usb: Add binding for PS5511 hub controllerPin-yen Lin
Parade PS5511 is USB hub with 4 USB 3.2 compliant 5Gbps downstream(DS) ports, and 1 extra USB 2.0 downstream port. The hub has one reset pin control and two power supplies (3V3 and 1V1). Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250422082957.2058229-3-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-01dt-bindings: usb: Introduce usb-hub.yamlPin-yen Lin
Introduce a general USB hub binding that describes downstream ports and hard wired USB devices for on-board USB hubs. Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250422082957.2058229-2-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-01dt-bindings: arm: samsung: add compatibles for exynos7870 devicesKaustabh Chakraborty
Document the compatible string for Exynos7870 - "samsung,exynos7870". The following devices are also added: - Galaxy A2 Core ("samsung,a2corelte") - Galaxy J6 ("samsung,j6lte") - Galaxy J7 Prime ("samsung,on7xelte") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250501-exynos7870-v7-1-bb579a27e5eb@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-01dt-bindings: memory: Document RZ/G3E supportBiju Das
Document support for the Expanded Serial Peripheral Interface (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20250424090000.136804-2-biju.das.jz@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-01ASoC: codec: twl4030: Convert to GPIO descriptorsMark Brown
Merge series from "Peng Fan (OSS)" <peng.fan@oss.nxp.com>: This is separated from [1]. With an update that sorting the headers in a separate patch. No other changes, so I still keep Linus' R-b for Patch 2. [1] https://lore.kernel.org/all/20250408-asoc-gpio-v1-3-c0db9d3fd6e9@nxp.com/
2025-04-30dt-bindings: crypto: fsl,sec-v4.0-mon: Add "power-off-time-sec"Ian Ray
Update to reference the input.yaml schema, thus enabling the use of the common 'power-off-time' property. The hardware supports one of four fixed values, and the new property is optional. Signed-off-by: Ian Ray <ian.ray@gehealthcare.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250315093455.1100-2-ian.ray@gehealthcare.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-05-01dt-bindings: reset: syscon-reboot: add google,gs101-rebootAndré Draszik
GS101 supports a couple different reset types via certain registers in the SYSCON register map. Add a compatible for it. When in effect, all register values and offsets are implied, hence they shall not be specified in that case. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250401-syscon-reboot-reset-mode-v5-1-5b9357442363@linaro.org Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-04-30spi: axi-spi-engine: offload instruction optimizationMark Brown
Merge series from David Lechner <dlechner@baylibre.com>: In order to achieve a 4 MSPS rate on a 16-bit ADC with a 80 MHz SCLK using the SPI offload feature of the AXI SPI Engine, we need to shave off some time that is spent executing unnecessary instructions. There are a few one-time setup instructions that can be moved so that they execute only once when the SPI offload trigger is enabled rather than repeating each time the offload is triggered. Additionally, a recent change to the IP block allows dropping the SYNC instruction completely. With these changes, we are left with only the 3 instructions that are needed to to assert CS, transfer the data, and deassert CS. This makes 3 + 16 * 12.5 ns = 237.5 ns < 250 ns which is comfortably within the available time period.
2025-04-30dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitionsShin Son
Add cpucl1 and cpucl2 clock definitions. CPUCL1/2 refer to CPU Cluster 1 and CPU Cluster 2, which provide clock support for the CPUs on Exynosauto V920 SoC. Signed-off-by: Shin Son <shin.son@samsung.com> Link: https://lore.kernel.org/r/20250428113517.426987-2-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-29dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor supportInochi Amaoto
The MCU device on SG2044 exposes the same interface as SG2042, which is already supported by the kernel. Add compatible string for monitor device of SG2044. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-7-inochiama@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-04-30dt-bindings: power: supply: Document Pegatron Chagall fuel gaugeSvyatoslav Ryhel
Add binding for Pegatron Chagall tablets battery monitor. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250429061803.9581-3-clamor95@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-04-30dt-bindings: vendor-prefixes: add prefix for Pegatron CorporationSvyatoslav Ryhel
PEGATRON Corporation is a Taiwanese electronics manufacturing company that mainly develops computing, communications and consumer electronics for branded vendors. Link https://www.pegatroncorp.com/ Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250429061803.9581-2-clamor95@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-04-29dt-bindings: clock: convert vf610-clock.txt to yaml formatFrank Li
Convert vf610-clock.txt to yaml format. Additional changes: - swap audio_ext and enet_ext to match existed dts order - remove clock consumer in example Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250411212339.3273202-1-Frank.Li@nxp.com Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-04-29dt-bindings: arm: arm,coresight-static-replicator: add optional clocksDmitry Baryshkov
As most other CoreSight devices the replicator can use either of the optional clocks. Document those optional clocks in the schema. Additionally document the one-off case of Zynq-7000 platforms which uses apb_pclk and two additional debug clocks. Fixes: 3c15fddf3121 ("dt-bindings: arm: Convert CoreSight bindings to DT schema") Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250425-fix-nexus-4-v3-6-da4e39e86d41@oss.qualcomm.com
2025-04-29dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND controllerKaushal Kumar
Add new compatible for the QPIC NAND controller v2.1.1 used for SDX75 SoC. SDX75 NAND controller has iommu support so define it in the properties section. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-29dt-bindings: power: reset: add toradex,smarc-ecEmanuele Ghidoli
The Toradex Embedded Controller provides system power-off and restart functionalities. The two variants, SMARC iMX95 and SMARC iMX8P, have a compatible I2C interface. Besides this, different compatible values are defined to allow for future implementation differences. Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250414171455.155155-2-francesco@dolcini.it Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
generated by cgit (git 2.34.1) at 2025-09-23 16:48:40 +0000