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2025-06-29dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uartFrank Li
Allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart to align existed driver and dts. It is really old platform. Keep the same restriction for others. Allow dmas and dma-names property, which allow maxItems 4 because very old platform (arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi) use duplicate "tx", "rx", "tx", "rx" as dma-names. Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dtb: serial@40081000 (nxp,lpc1850-uart): clock-names: ['uartclk', 'reg'] is too long Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250602142745.942568-1-Frank.Li@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-28dt-bindings: usb: genesys,gl850g: add downstream facing portsDmitry Baryshkov
In order to describe connections between Genesys GL850G hub and corresponding Type-C connectors, follow example of RTS5411 and describe downstream facing ports. Unline normal case of ports being connected to a USB device, hotplug ports use OF graph representation. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250608-genesys-ports-v1-2-09ca19f6838e@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-28dt-bindings: usb: genesys,gl850g: use usb-hub.yamlDmitry Baryshkov
In order to reduce duplication, switch GL850G to use USB hub bindings instead of using simple usb-device.yaml Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250608-genesys-ports-v1-1-09ca19f6838e@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-27dt-bindings: dsa: Rewrite Micrel KS8995 in schemaLinus Walleij
After studying the datasheets for some of the KS8995 variants it becomes pretty obvious that this is a straight-forward and simple MII DSA switch with one port in (CPU) and four outgoing ports, and it even supports custom tags by setting a bit in a special register, and elaborate VLAN handling as all DSA switches do. What is a bit odd with KS8995 is that it uses an extra MII-P5 port to access one of the PHYs separately, on the side of the switch fabric, such as when using a WAN port separately from a LAN switch in a home router. Rewrite the terse bindings to YAML, and move to the proper subdirectory. Include a verbose example to make things clear. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250625-ks8995-dsa-bindings-v2-1-ce71dce9be0b@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-27dt-bindings: net: sun8i-emac: Add A100 EMAC compatiblePaul Kocialkowski
The Allwinner A100/A133 has an Ethernet MAC (EMAC) controller that is compatible with the A64 one. It features the same syscon registers for control of the top-level integration of the unit. Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250626080923.632789-4-paulk@sys-base.io Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-27dt-bindings: net/nfc: ti,trf7970a: Add ti,rx-gain-reduction-db optionPaul Geurts
Add option to reduce the RX antenna gain to be able to reduce the sensitivity. Signed-off-by: Paul Geurts <paul.geurts@prodrive-technologies.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250626141242.3749958-2-paul.geurts@prodrive-technologies.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-27dt-bindings: net: convert lpc-eth.txt yaml formatFrank Li
Convert lpc-eth.txt yaml format. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250624202028.2516257-1-Frank.Li@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-27dt-bindings: reset: sophgo: Add CV1800B supportInochi Amaoto
Add bindings for the reset generator on the SOPHGO CV1800B RISC-V SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250617070144.1149926-2-inochiama@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-06-27dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/V2N SoC supportLad Prabhakar
Document support for the USB2PHY reset controller found on the Renesas RZ/V2N (R9A09G056) SoC. The reset controller IP is functionally identical to that on the RZ/V2H(P) SoC, so no driver changes are needed. The existing `renesas,r9a09g057-usb2phy-reset` compatible will be used as a fallback for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250528133031.167647-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-06-27dt-bindings: reset: convert nxp,lpc1850-rgu.txt to yaml formatFrank Li
Convert nxp,lpc1850-rgu.txt to yaml format. Additional changes: - remove label in example. - remove reset consumer in example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250602144046.943982-1-Frank.Li@nxp.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-06-27dt-bindings: reset: add support for canaan,k230-rstJunhui Liu
Introduces a reset controller driver for the Kendryte K230 SoC, resposible for managing the reset functionality of the CPUs and various sub-modules. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Link: https://lore.kernel.org/r/20250613-k230-reset-v4-1-e5266d2be440@pigmoral.tech Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-06-27dt-bindings: leds: lp50xx: Document child reg, fix exampleJohan Adolfsson
The led child reg node is the index within the bank, document that and update the example accordingly. The reg property in child node is limited to 0-2 since there are 3 leds per bank, previous value in example was speculative. Signed-off-by: Johan Adolfsson <johan.adolfsson@axis.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250617-led-fix-v7-2-cdbe8efc88fa@axis.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-06-27dt-bindings: net: Document support for Airoha AN7583 MDIO ControllerChristian Marangi
Airoha AN7583 SoC have 3 different MDIO Controller. One comes from the intergated Switch based on MT7530. The other 2 live under the SCU register and expose 2 dedicated MDIO controller. Document the schema for the 2 dedicated MDIO controller. Each MDIO controller can be independently reset with the SoC reset line. Each MDIO controller have a dedicated clock configured to 2.5MHz by default to follow MDIO bus IEEE 802.3 standard. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2025-06-27dt-bindings: memory-controller: Define fallback compatibleFlorian Fainelli
All of the DDR controllers beyond revision b.2.1 have had a consistent layout, therefore define a "brcm,brcmstb-memc-ddr-rev-b.2.1" fallback compatible string to match them all rather than having to continuously add to the list. Link: https://lore.kernel.org/all/20241217194439.929040-2-florian.fainelli@broadcom.com/ Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250609212356.2264244-2-florian.fainelli@broadcom.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-26dt-bindings: interrupt-controller: Add arm,armv7m-nvic and fix #interrupt-cellsFrank Li
According to existed dts arch/arm/boot/dts/armv7-m.dtsi and driver drivers/irqchip/irq-nvic.c, compatible string should be arm,armv7m-nvic, Fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dtb: /interrupt-controller@e000e100: failed to match any schema with compatible: ['arm,armv7m-nvic'] Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250624224630.2518776-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-26dt-bindings: trivial-devices: add compatible string nxp,isp1301 from isp1301.txtFrank Li
Delete isp1301.txt and add compatible string nxp,isp1301 to trivial-devices because this i2c device have only reg propepty. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250623204048.2493819-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-26dt-bindings: net: Rename renesas,r9a09g057-gbeth.yamlGeert Uytterhoeven
The DT bindings file "renesas,r9a09g057-gbeth.yaml" applies to a whole family of SoCs, and uses "renesas,rzv2h-gbeth" as a fallback compatible value. Hence rename it to the more generic "renesas,rzv2h-gbeth.yaml". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Simon Horman <horms@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/721f6e0e09777e0842ecaca4578bc50c953d2428.1750838954.git.geert+renesas@glider.be Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-27Merge tag 'drm-misc-next-2025-06-26' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 6.17: UAPI Changes: Cross-subsystem Changes: Core Changes: - ci: Add Device tree validation and kunit - connector: Move HDR sink metadat to drm_display_info Driver Changes: - bochs: drm_panic Support - panfrost: MT8370 Support - bridge: - tc358767: Convert to devm_drm_bridge_alloc() Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://lore.kernel.org/r/20250626-sincere-loon-of-effort-6dbdf9@houat
2025-06-26dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning valuesLuca Weiss
The reset default tuning value depends on the PMIC, so remove them from the doc since they're not accurate for all PMICs. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250617-eusb2-repeater-tuning-v2-1-ed6c484f18ee@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-26dt-bindings: phy: apm,xgene-phy: Remove trailing whitespaceGeert Uytterhoeven
Remove trailing whitespace which hurts my eyes. Fixes: 65ad0d068c426c2f ("dt-bindings: phy: Convert apm,xgene-phy to DT schema") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5b8e9b4f645bcac9d50059e513abba4db7e1aaea.1750771156.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-27spi: dt-bindings: add nxp,lpc3220-spi.yamlFrank Li
Add lpc3220 spi controller binding doc to fix below CHECK_DTBS warning: arch/arm/boot/dts/nxp/lpc/lpc3250-ea3250.dtb: /ahb/apb/spi@20088000: failed to match any schema with compatible: ['nxp,lpc3220-spi'] Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250625215255.2640538-1-Frank.Li@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-26dt-bindings: net: wireless: ath11k-pci: describe firmware-name propertyMiaoqing Pan
Introduce 'firmware-name' property to allow end-users and/or integrators to decide which usecase-specific firmware to run on the WCN6855. This is necessary due to resource limitations such as memory capacity and CPU capability, or performance and power optimization for different application scenarios. Two firmwares are supported: 'WCN6855/hw2.0' and 'WCN6855/hw2.0/nfa765'. The former is the default firmware, suitable for most WiFi 6 STA functions. The latter adds support for commercial-quality SAP and optimizes power consumption for IoT applications. Signed-off-by: Miaoqing Pan <miaoqing.pan@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250522013444.1301330-2-miaoqing.pan@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-06-26dt-bindings: net: wireless: ath9k: add WIFI bindingsRosen Penev
These are for the wireless chips that come built in with various Atheros/QCA SoCs. dts wise, the difference between pcie and the wmac is AHB > PCIE > WIFI AHB > WIFI Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Toke Høiland-Jørgensen <toke@toke.dk> Link: https://patch.msgid.link/20250609030851.17739-4-rosenp@gmail.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-06-26Merge tag 'devicetree-fixes-for-6.16-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Convert altr,uart-1.0 and altr,juart-1.0 to DT schema. These were applied for nios2, but never sent upstream. - Fix extra '/' in fsl,ls1028a-reset '$id' path - Fix warnings in ti,sn65dsi83 schema due to unnecessary $ref. * tag 'devicetree-fixes-for-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: serial: Convert altr,uart-1.0 to DT schema dt-bindings: serial: Convert altr,juart-1.0 to DT schema dt-bindings: soc: fsl,ls1028a-reset: Drop extra "/" in $id dt-bindings: drm/bridge: ti-sn65dsi83: drop $ref to fix lvds-vod* warnings
2025-06-26dt-bindings: iio: adc: ad7768-1: add trigger-sources propertyJonathan Santos
In addition to GPIO synchronization, The AD7768-1 also supports synchronization over SPI, which use is recommended when the GPIO cannot provide a pulse synchronous with the base MCLK signal. It consists of looping back the SYNC_OUT to the SYNC_IN pin and send a command via SPI to trigger the synchronization. Introduce the 'trigger-sources' property to enable SPI-based synchronization via SYNC_OUT pin, along with additional optional entries for GPIO3 and DRDY pins. Also create #trigger-source-cells property to differentiate the trigger sources provided by the ADC. To improve readability, create a adi,ad7768-1.h header with the macros for the cell values. While at it, add description to the interrupts property. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: David Lechner <dlechner@baylirbe.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/713fd786010c75858700efaec8bb285274e7057e.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26dt-bindings: iio: adc: ad7768-1: Document GPIO controllerJonathan Santos
The AD7768-1 ADC exports four bidirectional GPIOs accessible via register map. Document GPIO properties necessary to enable GPIO controller for this device. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/2ac34fc1e0b02886073ae0bb196c7e8d4d442c3f.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26dt-bindings: iio: adc: ad7768-1: document regulator provider propertyJonathan Santos
The AD7768-1 provides a buffered common-mode voltage output on the VCM pin that can be used to bias analog input signals. Add regulators property to enable the use of the VCM output, referenced here as vcm-output, by any other device. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/33c02a1fb9d839f62da5237f9476ccbf14271b6d.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26dt-bindings: trigger-source: add generic GPIO trigger sourceJonathan Santos
Inspired by pwm-trigger, create a new binding for using a GPIO line as a trigger source. Link: https://lore.kernel.org/linux-iio/20250207-dlech-mainline-spi-engine-offload-2-v8-3-e48a489be48c@baylibre.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/c4a3a7c828c711b439d1893271b8376823176ea6.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26dt-bindings: iio: adc: add ad7405Pop Ioan Daniel
Add devicetree bindings for ad7405/adum770x family. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Pop Ioan Daniel <pop.ioan-daniel@analog.com> Link: https://patch.msgid.link/20250605150948.3091827-5-pop.ioan-daniel@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.16-rc4). Conflicts: Documentation/netlink/specs/mptcp_pm.yaml 9e6dd4c256d0 ("netlink: specs: mptcp: replace underscores with dashes in names") ec362192aa9e ("netlink: specs: fix up indentation errors") https://lore.kernel.org/20250626122205.389c2cd4@canb.auug.org.au Adjacent changes: Documentation/netlink/specs/fou.yaml 791a9ed0a40d ("netlink: specs: fou: replace underscores with dashes in names") 880d43ca9aa4 ("netlink: specs: clean up spaces in brackets") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-26dt-bindings: interrupt-controller: Add MIPS P8700 aclint-sswiVladimir Kondratiev
Add ACLINT-SSWI variant for the MIPS P8700 SoC. This CPU has a SSWI device compliant with the RISC-V draft spec (see [1]). CPU indexes on this platform are not continuous, instead it uses bit-fields to encode hart,core,cluster numbers, thus the DT property "riscv,hart-indexes" is mandatory for it. Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/all/20250612143911.3224046-4-vladimir.kondratiev@mobileye.com Link: https://github.com/riscvarchive/riscv-aclint [1]
2025-06-26dt-bindings: net: ti: k3-am654-cpsw-nuss: update phy-mode in exampleMatthias Schiffer
k3-am65-cpsw-nuss controllers have a fixed internal TX delay, so RXID mode is not actually possible and will result in a warning from the driver going forward. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/f9b5e84fcaf565506ed86cf1838444c2bc47334f.1750756583.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-06-26dt-bindings: display: ti: Add schema for AM625 OLDI TransmitterAradhya Bhatia
The OLDI transmitters (TXes) do not have registers of their own, and are dependent on the source video-ports (VPs) from the DSS to provide configuration data. This hardware doesn't directly sit on the internal bus of the SoC, but does so via the DSS. Hence, the OLDI TXes are supposed to be child nodes under the DSS, and not independent devices. Two of the OLDI TXes can function in tandem to output dual-link OLDI output, or cloned single-link outputs. In these cases, one OLDI will be the primary OLDI, and the other one, a companion. The following diagram represents such a configuration. +-----+-----+ +-------+ | | | | | | | VP1 +----+--->+ OLDI0 | (Primary - may need companion) | | | | | | | DSS +-----+ | +-------+ | | | | | | VP2 | | +-------+ | | | | | | +-----+-----+ +--->+ OLDI1 | (Companion OLDI) | | +-------+ The DSS in AM625 SoC has a configuration like the one above. The AM625 DSS VP1 (port@0) can connect and control 2 OLDI TXes, to use them in dual-link or cloned single-link OLDI modes. It is only the VP1 that can connect to either OLDI TXes for the AM625 DSS, and not the VP2. Alternatively, on some future TI SoCs, along with the above configuration, the OLDI TX can _also_ connect to separate video sources, making them work entirely independent of each other. In this case, neither of the OLDIs are "companion" or "secondary" OLDIs, and nor do they require one. They both are independent and primary OLDIs. The following diagram represents such a configuration. +-----+-----+ +-------+ | | | | | | | VP1 +--+----------->+ OLDI0 | (Primary - may need companion) | | | | | | | +-----+ | +-------+ | | | | | | VP2 | | | | | | | DSS +-----+ | +---+ +-------+ | | | +-->+ M | | | | | VP3 +----->+ U +--->+ OLDI1 | (Companion or Primary) | | | | X | | | | +-----+ +---+ +-------+ | | | | | VP4 | | | | +-----+-----+ Note that depending on the mux configuration, the OLDIs can either be working together in tandem - sourced by VP1, OR, they could be working independently sourced by VP1 and VP3 respectively. The idea is to support all the configurations with this OLDI TX schema. The OLDI functionality is further supported by a system-control module, which contains a few registers to control OLDI IO power and other electrical characteristics of the IO lanes. Add devicetree binding schema for the OLDI TXes to support various configurations, and extend their support to the AM625 DSS. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://lore.kernel.org/r/20250528122544.817829-3-aradhya.bhatia@linux.dev Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-06-26dt-bindings: display: ti,am65x-dss: Re-indent the exampleAradhya Bhatia
Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> Link: https://lore.kernel.org/r/20250528122544.817829-2-aradhya.bhatia@linux.dev Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-06-25dt-bindings: trivial-devices: Add Analog Devices ADT7411Wolfram Sang
Describe this SPI-/I2C-Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC. The driver is in hwmon for ages. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250608162240.3023-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-25Add few updates to the STM32 SPI driverMark Brown
Merge series from Clément Le Goffic <clement.legoffic@foss.st.com>: This series aims to improve the STM32 SPI driver in different areas. It adds SPI_READY mode, fixes an issue raised by a kernel bot, add the ability to use DMA-MDMA chaining for RX and deprecate an ST bindings vendor property.
2025-06-25ASoC: Standardize ASoC menuMark Brown
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>: Current Kconfig menu at [ALSA for SoC audio support] has no rules. So, some venders are using menu style, some venders are listed each drivers on top page, etc. It is difficult to find target vender and/or drivers because it is very random. Let's standardize ASoC menu, like below --- ALSA for SoC audio support Analog Devices ---> AMD ---> Apple ---> Atmel ---> Au1x ---- Broadcom ---> Cirrus Logic ---> DesignWare ---> Freescale ---> Google ---> Hisilicon ---> ... One concern is *vender folder* alphabetical order vs *vender name* alphabetical order were different. For example "sunxi" menu is "Allwinner". Link: https://lore.kernel.org/r/8734c8bf3l.wl-kuninori.morimoto.gx@renesas.com
2025-06-25dt-bindings: firmware: thead,th1520: Add resets for GPU clkgenMichal Wilczynski
Extend the TH1520 AON to describe the GPU clkgen reset line, required for proper GPU clock and reset sequencing. The T-HEAD TH1520 GPU requires coordinated management of two clocks (core and sys) and two resets (GPU core reset and GPU clkgen reset). Only the clkgen reset is exposed at the AON level, to support SoC specific initialization handled through a dedicated auxiliary power sequencing driver. The GPU core reset remains described in the GPU device node, as from the GPU driver's perspective, there is only a single reset line [1]. This follows upstream maintainers' recommendations [2] to abstract SoC specific details into the PM domain layer rather than exposing them to drivers directly. Link: https://lore.kernel.org/all/816db99d-7088-4c1a-af03-b9a825ac09dc@imgtec.com/ - [1] Link: https://lore.kernel.org/all/38d9650fc11a674c8b689d6bab937acf@kernel.org/ - [2] Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Drew Fustini <drew@pdp7.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250623-apr_14_for_sending-v6-2-6583ce0f6c25@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-06-24dt-bindings: net: cdns,macb: add sama7d65 ethernet interfaceRyan Wanner
This patch set adds all the supported FLEXCOMs for the SAMA7D65 SoC. This also adds the GMAC interfaces and enables GMAC0 interface for the SAMA7D65 SoC. With the FLEXCOMs added to the SoC the MCP16502 and the MAC address EEPROM are both added to flexcom10. The dt-binding for USART is here [1]. And the dt-binding for DMA has been applied here [2]. The original thread for this is here [3]. The applied changes have been removed for this resend [1] https://lore.kernel.org/20250306160318.vhPzJLjl19Vq9am9RRbuv5ddmQ6GCEND-YNvPKKtAtU@z [2] https://lore.kernel.org/174065806827.367410.5368210992879330466.b4-ty@kernel.org [3] https://lore.kernel.org/392b078b38d15f6adf88771113043044f31e8cd6.1743523114.git.Ryan.Wanner@microchip.com Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/35808b7cee5ba5b2ce55d741ae1ada0f1cd2f7cb.1750694691.git.Ryan.Wanner@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-24spi: dt-bindings: stm32: deprecate `st,spi-midi-ns` propertyClément Le Goffic
The vendor `st,spi-midi-ns` property is no longer needed and has been deprecated in favor of a generic solution. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://patch.msgid.link/20250616-spi-upstream-v1-6-7e8593f3f75d@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-24spi: dt-bindings: stm32: update bindings with SPI Rx DMA-MDMA chainingClément Le Goffic
Add MDMA channel, and new sram property which are mandatory to enable SPI Rx DMA-MDMA chaining. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://patch.msgid.link/20250616-spi-upstream-v1-3-7e8593f3f75d@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-24dt-bindings: usb: dwc2: rename sophgo usb compatible stringInochi Amaoto
The support for Sophgo CV1800 series SoC introduces a wildcard compatible string "sophgo,cv1800-usb", rename it to sophgo,cv1800b-usb to match a real world SoC. As the compatible string is not used in any board dts. It is safe to rename it. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250618031132.373216-2-inochiama@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-24dt-bindings: serial: 8250: Make clocks and clock-frequency exclusiveYao Zi
The 8250 binding before converting to json-schema states, - clock-frequency : the input clock frequency for the UART or - clocks phandle to refer to the clk used as per Documentation/devicetree for clock-related properties, where "or" indicates these properties shouldn't exist at the same time. Additionally, the behavior of Linux's driver is strange when both clocks and clock-frequency are specified: it ignores clocks and obtains the frequency from clock-frequency, left the specified clocks unclaimed. It may even be disabled, which is undesired most of the time. But "anyOf" doesn't prevent these two properties from coexisting, as it considers the object valid as long as there's at LEAST one match. Let's switch to "oneOf" and disallows the other property if one exists, precisely matching the original binding and avoiding future confusion on the driver's behavior. Fixes: e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to json-schema") Cc: stable <stable@kernel.org> Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250623093445.62327-1-ziyao@disroot.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-24dt-bindings: gnss: u-blox: add u-blox,neo-9m compatibleAlejandro Enrique
Add compatible for u-blox NEO-9M GPS module. Signed-off-by: Alejandro Enrique <alejandroe1@geotab.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Johan Hovold <johan@kernel.org>
2025-06-24dt-bindings: mmc: cdns: add Mobileye EyeQ MMC/SDHCI controllerBenoît Monin
The MMC/SD controller from Mobileye is compatible with cdns,sd4hc, but will need the preset broken value quirk for speed slower than HS200. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Link: https://lore.kernel.org/r/9b34b471d1e71cf47c503aed7145fab896767ba7.1750156323.git.benoit.monin@bootlin.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-06-24dt-bindings: mmc: mxs-mmc: change ref to mmc-controller-common.yaml from ↵Frank Li
mmc-controller.yaml Change ref to mmc-controller-common.yaml from mmc-controller.yaml because imx23/imx28 use dual mode controller (spi and mmc). So default dts node name use spi instead of mmc. The legacy reason, it use difference compatible string to distringuish work mode (spi / mmc). Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dtb: spi@80010000 (fsl,imx23-mmc): $nodename:0: 'spi@80010000' does not match '^mmc(@.*)?$' Additional add clocks property. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250603152245.1068740-1-Frank.Li@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-06-24dt-bindings: pse: tps23881: Clarify channels property descriptionKory Maincent
Improve the channels property description to better explain the relationship between physical delivery channels and PSE PI pairsets. The previous description was unclear about how channels are referenced and used in the port matrix mapping. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20250620-poe_doc_improve-v1-1-96357bb95d52@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-06-24dt-bindings: soc: renesas: Document RZ/T2H Evaluation Board part numberGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/0703ecbc355164e35b90a9fe088438c821f13cd3.1749741263.git.geert+renesas@glider.be
2025-06-23dt-bindings: net: convert qca,qca7000.txt yaml formatFrank Li
Convert qca,qca7000.txt yaml format. Additional changes: - add refs: spi-peripheral-props.yaml, serial-peripheral-props.yaml and ethernet-controller.yaml. - simple spi and uart node name. - use low case for mac address in examples. - add check reg choose spi-peripheral-props.yaml or spi-peripheral-props.yaml. Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250618184417.2169745-1-Frank.Li@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-23spi: microchip-core-qspi: Add regular transfersMark Brown
Merge series from Conor Dooley <conor@kernel.org>: This is a v2 of a patchset I sent about this time last year, adding the regular transfer_one_message op to the microchip-core-qspi driver. In that v1 Mark expressed his dislike for that op, so v2 is using prepare/unprepare/transfer_one instead. The unprepare implementation still contains the 750 us delay that the driver had back in v1. I've heard a suggestion internally as to why this is needed, but it was unsubstantiated, so I still have no justification for it. I held off on sending a v2 because of a lack of explanation for the delay, but I don't wanna hold off forever for something I might never understand.
generated by cgit (git 2.34.1) at 2025-09-20 02:46:35 +0000