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Document the IPQ5018 Internal Gigabit Ethernet PHY found in the IPQ5018
SoC. Its output pins provide an MDI interface to either an external
switch in a PHY to PHY link scenario or is directly attached to an RJ45
connector.
The PHY supports 10/100/1000 mbps link modes, CDT, auto-negotiation and
802.3az EEE.
For operation, the LDO controller found in the IPQ5018 SoC for which
there is provision in the mdio-4019 driver.
Two common archictures across IPQ5018 boards are:
1. IPQ5018 PHY --> MDI --> RJ45 connector
2. IPQ5018 PHY --> MDI --> External PHY
In a phy to phy architecture, the DAC needs to be configured to
accommodate for the short cable length. As such, add an optional boolean
property so the driver sets preset DAC register values accordingly.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250613-ipq5018-ge-phy-v5-1-9af06e34ea6b@outlook.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>:
This series adds support for the DVFSRC regulators found on the MediaTek
MT8196 Chromebook SoC and the (unrelated) MT6893 Dimensity 1200.
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Add a compatible for the MediaTek MT8196 Chromebook SoC's
regulators over DVFSRC.
This SoC has only one regulator "dvfsrc-vcore" and different
values for vsel compared to the others.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20250623120144.109359-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC's
regulators over DVFSRC.
This SoC uses different values for the vsel, hence it is not
compatible with the currently supported ones.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://patch.msgid.link/20250623120144.109359-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add optional num-lanes property Broadcom STB PCIe host controllers.
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20250530224035.41886-2-james.quinlan@broadcom.com
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The TBU clock belongs to the Translation Buffer Unit, part of the SMMU.
The ref clock is already being driven upstream through some of the
branches.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250521-topic-8150_pcie_drop_clocks-v1-2-3d42e84f6453@oss.qualcomm.com
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The TBU clock belongs to the Translation Buffer Unit, part of the SMMU.
The ref clock is already being driven upstream through some of the
branches.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250521-topic-8150_pcie_drop_clocks-v1-1-3d42e84f6453@oss.qualcomm.com
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Convert the TI OMAP DES binding to DT schema format.
Drop "ti,hwmods" as it is not actually used for this binding. Only
OMAP2 platforms are using it.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Convert the TI OMAP AES binding to DT schema format. It's a straight
forward conversion.
Make "ti,hwmods" not required as it is deprecated and only used on
OMAP2.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add compatible for Microchip SAMA7D65 SoC TRNG.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add DT bindings for SAMA7D65 SoC Atmel TDES.
The SAMA7D65 SoC has the same capability as the SAM9x75 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add DT bindings for SAMA7D65 SoC Atmel SHA.
The SAMA7D65 similar to the SAM9x75 SoC supports SHA1/224/256/384/512
and supports HMAC for the same hashes. They both also support automatic
padding as well as double buffering.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add DT bindings for SAMA7D65 SoC in atmel AES.
The SAMA7D65 similar to the SAM9x75 SoC supports HMAC, dual buffer, and
GCM. And similar all 3 it supports CBC, CFB, CTR, ECB, and XTS.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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NXP SoCs like the iMX8QM, iMX8QXP or iMX8DXP use power domains for
resource management.
Add compatible strings for these SoCs (QXP and DXP gets to share as their
only difference is a core-count, Q=Quad core and D=Dual core), and allow
power-domains for them only. Keep the old restriction for others.
Signed-off-by: John Ernberg <john.ernberg@actia.se>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
- subsystem: convert drivers to use recent callbacks of struct
i2c_algorithm A typical after-rc1 cleanup, which I couldn't send in
time for rc2
- tegra: fix YAML conversion of device tree bindings
- k1: re-add a check which got lost during upstreaming
* tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: k1: check for transfer error
i2c: use inclusive callbacks in struct i2c_algorithm
dt-bindings: i2c: nvidia,tegra20-i2c: Specify the required properties
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Bindings reference the common power supply schema, which already defines
the type (ref) for "monitored-battery" property. Drop the redundant ref
from individual device schemas along with obvious description also
duplicating what is in power-supply.yaml.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-6-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reference the common power supply schema to bring the definition of
monitored-battery property. Drop also the obvious description because
it is duplicating what is in power-supply.yaml.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-5-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reference the common power supply schema to bring the definition of
monitored-battery property.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-4-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reference the common power supply schema to bring the definition of
monitored-battery property. Drop also the obvious description because
it is duplicating what is in power-supply.yaml.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-3-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reference the common power supply schema to bring the definition of
monitored-battery property. Drop also the obvious description because
it is duplicating what is in power-supply.yaml.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-2-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reference the common power supply schema to bring the definition of
monitored-battery property. Drop also the obvious description because
it is duplicating what is in power-supply.yaml.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250604-dt-bindings-psy-monitored-battery-v1-1-7f755ff75218@linaro.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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This documents Firefly ROC-RK3588S-PC which is a SBC based on RK3588S SoC.
Link: https://wiki.t-firefly.com/en/Station-M3/index.html
Signed-off-by: Hsun Lai <i@chainsx.cn>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250609113044.8846-2-i@chainsx.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The '#reset-cells' property is permitted for some of the MT8188
clock controllers, but not listed as a valid property.
Fixes: 9a5cd59640ac ("dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-1-fb60bef1b8e1@collabora.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add a compatible for the MediaTek MT8370 SoC, with an
integrated ARM Mali G57 MC2 GPU (Valhall-JM, dual core).
None of the already existing SoC specific compatibles is usable as
fallback, as those either do not match the number of cores (and number
of power domains), or are for a different GPU architecture.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20250509-mt8370-enable-gpu-v6-1-2833888cb1d3@collabora.com
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Add compatible strings "nxp,imx95-jpgdec" and "nxp,imx95-jpgenc", which
are backward compatible with "nxp,imx8qxp-jpgdec" and
"nxp,imx8qxp-jpegenc". i.MX95 just need one power domain which combine
wrap and all slots together. Reduce minItems of power-domains to 1 for
i.MX95 and keep the same restriction for others.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
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Convert fsl-vdoa.txt to yaml format.
Additional changes:
- Add irq.h and imx6qdl-clock.h in example.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
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Document the GPI DMA engine on the sc8280xp platform.
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250617090032.1487382-2-mitltlatltl@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Convert lpc1850-ccu.txt to yaml format.
Additional changes:
- remove label in examples.
- remove clock consumer in examples.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250602141937.942091-1-Frank.Li@nxp.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Cross-merge networking fixes after downstream PR (net-6.16-rc3).
No conflicts or adjacent changes.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Renesas RZ/N2H DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/N2H (R9A09G087)
SoC, shared by driver and DT source files.
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Document support for Module Standby and Software Reset found on the
Renesas RZ/N2H (R9A09G087) SoC. The Module Standby and Software Reset
IP is similar to that found on the RZ/T2H SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250609203656.333138-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add RZ/N2H (R9A09G087), its variants, and the rzn2h-evk evaluation board
in documentation.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250609203656.333138-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add documentation for the serial communication interface (RSCI) found on
the Renesas RZ/N2H (R9A09G087) SoC. The RSCI IP on this SoC is identical
to that on the RZ/T2H (R9A09G077) SoC. Therefore, "renesas,r9a09g077-rsci"
is used as a fallback compatible string for RZ/N2H.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250609192344.293317-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Document the Renesas USBHS controller found on the Renesas RZ/V2N
(R9A09G056) SoC. The USBHS block on RZ/V2N is functionally identical to
the one on the RZ/G2L family, so no driver changes are needed. The
existing "renesas,rzg2l-usbhs" fallback compatible will continue to be
used for handling this IP.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250528133440.168133-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Document the compatible strings for the Moduline Display controller.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add an interrupt property to the device tree bindings for the TI TPS23881
PSE controller. The interrupt is primarily used to detect classification
and disconnection events, which are essential for managing the PSE
controller in compliance with the PoE standard.
Interrupt support is essential for the proper functioning of the TPS23881
controller. Without it, after a power-on (PWON), the controller will
no longer perform detection and classification. This could lead to
potential hazards, such as connecting a non-PoE device after a PoE device,
which might result in magic smoke.
Signed-off-by: Kory Maincent (Dent Project) <kory.maincent@bootlin.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250617-feature_poe_port_prio-v14-13-78a1a645e2ee@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Adds the regulator supply parameter of the managers.
Update also the example as the regulator supply of the PSE PIs
should be the managers itself and not an external regulator.
Signed-off-by: Kory Maincent (Dent Project) <kory.maincent@bootlin.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250617-feature_poe_port_prio-v14-11-78a1a645e2ee@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Convert the Alphascale Clock Controller binding to DT schema format.
Add the undocumented 'clocks' property which is used in DTS. Drop the
clock defines and consumer examples from the old binding.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521004712.1793193-1-robh@kernel.org
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Armada 3xx Core Divider clock binding to DT schema
format.
Add the missing "marvell,armada-390-corediv-clock" compatible and
"clock-output-names" property.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521211840.77487-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Armada 3700 peripheral clock binding to DT schema
format. The north bridge is also a "syscon", so add the compatible to
it.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521211826.77098-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell SoC core clock binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210844.62613-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Berlin2 clock binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210839.62409-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Dove PLL divider clock binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210832.62177-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Armada 3700 TBG clock binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210826.61957-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell gating clock binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210813.61484-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Marvell Armada XP CPU clock binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210806.61286-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the TI-NSPIRE clock bindings to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210750.60759-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Intel/LSI AXM5516 clock binding to DT schema format. It's
a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210741.60467-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521210712.59742-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Convert the Broadcom BCM2835 CPRMAN clock binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250521004625.1791913-1-robh@kernel.org
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
[sboyd@kernel.org: Add list to maintainers]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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