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2024-12-30docs: mm: fix the incorrect 'FileHugeMapped' fieldBaolin Wang
The '/proc/PID/smaps' does not have the 'FileHugeMapped' field to count the file transparent huge pages, instead, the 'FilePmdMapped' field should be used. Fix it. Link: https://lkml.kernel.org/r/d520ce3aba2b03b088be30bece732426a939049a.1734425264.git.baolin.wang@linux.alibaba.com Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com> Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-12-30Merge tag 'platform-drivers-x86-v6.13-4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform drivers fixes from Ilpo Järvinen: "hp-wmi: - mark 8A15 board for timed OMEN thermal profile mlx-platform: - call pci_dev_put() to balance the refcount thinkpad-acpi: - Add support for hotkey 0x1401" * tag 'platform-drivers-x86-v6.13-4' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: platform/x86: thinkpad-acpi: Add support for hotkey 0x1401 platform/x86: hp-wmi: mark 8A15 board for timed OMEN thermal profile platform/x86: mlx-platform: call pci_dev_put() to balance the refcount
2024-12-30Align git commit ID abbreviation guidelines and checksGeert Uytterhoeven
The guidelines for git commit ID abbreviation are inconsistent: some places state to use 12 characters exactly, while other places recommend 12 characters or more. The same issue is present in the checkpatch.pl script. E.g. Documentation/dev-tools/checkpatch.rst says: **GIT_COMMIT_ID** The proper way to reference a commit id is: commit <12+ chars of sha1> ("<title line>") However, scripts/checkpatch.pl has two different checks: one warning check accepting 12 characters exactly: # Check Fixes: styles is correct Please use correct Fixes: style 'Fixes: <12 chars of sha1> (\"<title line>\")' and a second error check accepting 12-40 characters: # Check for git id commit length and improperly formed commit descriptions # A correctly formed commit description is: # commit <SHA-1 hash length 12+ chars> ("Complete commit subject") Please use git commit description style 'commit <12+ chars of sha1> Hence patches containing commit IDs with more than 12 characters are flagged by checkpatch, and sometimes rejected by maintainers or reviewers. This is becoming more important with the growth of the repository, as git may decide to use more characters in case of local conflicts. Fix this by settling on at least 12 characters, in both the documentation and in the checkpatch.pl script. Fixes: bd17e036b495bebb ("checkpatch: warn for non-standard fixes tag style") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1c244040bf6ce304656e31036e5178b4b9dfb719.1733421037.git.geert+renesas@glider.be Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2024-12-30docs: process: submitting-patches: split canonical patch format sectionAhmad Fatoum
To make it easier to reference specific parts of the patch format, let's add some headings for different parts. Doing that, it becomes clear that backtraces in commit message is out of place being after Reply-To Headers, so move it next to the commit message body subsubsection. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20241220-submitting-patches-imperative-v1-1-ee874c1859b3@pengutronix.de Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2024-12-30docs/zh_CN: Add security lsm Chinese translationYuehui Zhao
Translate .../security/lsm.rst into Chinese. Update the translation through commit 6d2ed653185b ("lsm: move hook comments docs to security/security.c") Signed-off-by: Yuehui Zhao <zhaoyuehui@cqsoftware.com.cn> Reviewed-by: Yanteng Si <si.yanteng@linux.dev> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/r/d7582527ff42abf20b56ca6b145bfb91873c9ded.1734575890.git.zhaoyuehui@cqsoftware.com.cn
2024-12-30docs/zh_CN: Add security index Chinese translationYuehui Zhao
Translate .../security/index.rst into Chinese. Reviewed-by: Yanteng Si <si.yanteng@linux.dev> Signed-off-by: Yuehui Zhao <zhaoyuehui@cqsoftware.com.cn> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/r/89ad67b4b4e12a52581cfa0f87f194e1aee3e526.1734575890.git.zhaoyuehui@cqsoftware.com.cn
2024-12-30Documentation/kernel-parameters: Fix a typo in kvm.enable_virt_at_load textBorislav Petkov (AMD)
s/lode/load/ Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20241202120416.6054-5-bp@kernel.org
2024-12-30dt-bindings: display: mediatek: dp: Reference common DAI propertiesFei Shao
The MediaTek DP hardware supports audio and exposes a DAI, so the '#sound-dai-cells' property is needed for describing the DAI links. Reference the dai-common.yaml schema to allow '#sound-dai-cells' to be used, and filter out non-DP compatibles as MediaTek eDP in the same binding doesn't support audio. This fixes dtbs_check error: '#sound-dai-cells' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patchwork.kernel.org/project/dri-devel/patch/20241105090207.3892242-1-fshao@chromium.org/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2024-12-30dt-bindings: nvmem: qfprom: Add compatible for QCS8300Jingyi Wang
Document QFPROM compatible for Qualcomm QCS8300. It provides access functions for QFPROM data to rest of the drivers via nvmem interface. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-12-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: Add compatible for IPQ5424Manikanta Mylavarapu
Document the QFPROM block found on IPQ5424 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: Add compatible for MS8917Barnabás Czémán
Document the QFPROM block found on MSM8917. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: rmem: Add mobileye,eyeq5-bootloader-configThéo Lebrun
On Mobileye EyeQ5, the bootloader will put MAC addresses into memory. Declare that as reserved memory to be used by the kernel, exposing nvmem cells. That region has a 12-byte header and a 4-byte trailing CRC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30Merge branch 'for-v6.14/dt-bindings-clk-samsung' into next/dt64Krzysztof Kozlowski
2024-12-30dt-bindings: cros-ec: Remove google,cros-kbd-led-backlightTzung-Bi Shih
After applying 4c03a44e2668 ("arm64: dts: mediatek: mt8195-cherry: Remove keyboard-backlight node"), there are no users for using the OF match. Instead, the device is added via drivers/mfd/cros_ec_dev.c by 970c3a6b7aa3 ("mfd: cros_ec: Register keyboard backlight subdevice"). Remove the DT bindings. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20241206031405.1711996-3-tzungbi@kernel.org Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2024-12-29platform/x86: thinkpad-acpi: Add support for hotkey 0x1401Vishnu Sankar
F8 mode key on Lenovo 2025 platforms use a different key code. Adding support for the new keycode 0x1401. Tested on X1 Carbon Gen 13 and X1 2-in-1 Gen 10. Signed-off-by: Vishnu Sankar <vishnuocv@gmail.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Link: https://lore.kernel.org/r/20241227231840.21334-1-vishnuocv@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-12-28dt-bindings: iio: accel: adxl345: add interrupt-namesLothar Rubusch
Add interrupt-names INT1 and INT2 for the two interrupt lines of the sensor. When one of the two interrupt lines is connected, the interrupt as its interrupt-name, need to be declared in the devicetree. The driver then configures the sensor to indicate its events on either INT1 or INT2. If no interrupt is configured, then no interrupt-name should be configured, and vice versa. In this case the sensor runs in FIFO BYPASS mode. This allows sensor measurements, but none of the sensor events. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20241225181338.69672-4-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: accel: adxl345: make interrupts not a required propertyLothar Rubusch
Remove interrupts from the list of required properties. The ADXL345 does not need interrupts for basic accelerometer functionality. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20241225181338.69672-3-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi323: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-4-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi270: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Reviewed-by: Alex Lanzano <lanzano.alex@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi160: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: ABI: combine current input sectionsDavid Lechner
Combine two duplicate sections describing in_currentY_raw. This went unnoticed until we renamed in_currentX_raw to in_currentY_raw and the kernel test robot found the duplication. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202412200256.OB5Hmw5Q-lkp@intel.com/ Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241219-iio-abi-combine-current-input-sections-v1-1-8dcd8221d469@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: Add ROHM BD79703Matti Vaittinen
The ROHM BD79703 is a 8-bit, 6 channel DAC. Describe the dt-bindings. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/51ed31c494ea7385940b59500e8592d12558e291.1734608215.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: ABI: document in_illuminance_hardwaregainJavier Carrasco
This attribute is used for the vl6180 (see vl6180.c), but it is still not documented. Add it to the _hardwaregain list. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://patch.msgid.link/20241215-iio_abi_in_illuminance_hardwaregain-v1-1-d94a59efb937@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: ABI: use Y consistently as channel numberDavid Lechner
Change X to Y when referring to channel number in the ABI documentation. There were only a few cases using X (and one using Z). By far, most documented attributes are using Y for the channel number placeholder. For consistency, we should follow the same convention throughout. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241216-doc-iio-use-voltagey-consistently-v1-1-9e34a72133bc@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: light: Add support for TI OPT4060 color sensorPer-Daniel Olsson
Add support for Texas Instruments OPT4060 RGBW Color sensor. Signed-off-by: Per-Daniel Olsson <perdaniel.olsson@axis.com> Link: https://patch.msgid.link/20241218104836.2784523-3-perdaniel.olsson@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: light: Document TI OPT4060 RGBW sensorPer-Daniel Olsson
Add devicetree bindings for the OPT4060 RGBW color sensor. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Per-Daniel Olsson <perdaniel.olsson@axis.com> Link: https://patch.msgid.link/20241218104836.2784523-2-perdaniel.olsson@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: pressure: bmp085: Add SPI interfaceVasileios Amoiridis
The BMP{2,3,5}80 and BME280 devices have an SPI interface, so include it in the device-tree. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241209233845.29539-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28crypto: iaa - Fix IAA disabling that occurs when sync_mode is set to 'async'Kanchana P Sridhar
With the latest mm-unstable, setting the iaa_crypto sync_mode to 'async' causes crypto testmgr.c test_acomp() failure and dmesg call traces, and zswap being unable to use 'deflate-iaa' as a compressor: echo async > /sys/bus/dsa/drivers/crypto/sync_mode [ 255.271030] zswap: compressor deflate-iaa not available [ 369.960673] INFO: task cryptomgr_test:4889 blocked for more than 122 seconds. [ 369.970127] Not tainted 6.13.0-rc1-mm-unstable-12-16-2024+ #324 [ 369.977411] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 369.986246] task:cryptomgr_test state:D stack:0 pid:4889 tgid:4889 ppid:2 flags:0x00004000 [ 369.986253] Call Trace: [ 369.986256] <TASK> [ 369.986260] __schedule+0x45c/0xfa0 [ 369.986273] schedule+0x2e/0xb0 [ 369.986277] schedule_timeout+0xe7/0x100 [ 369.986284] ? __prepare_to_swait+0x4e/0x70 [ 369.986290] wait_for_completion+0x8d/0x120 [ 369.986293] test_acomp+0x284/0x670 [ 369.986305] ? __pfx_cryptomgr_test+0x10/0x10 [ 369.986312] alg_test_comp+0x263/0x440 [ 369.986315] ? sched_balance_newidle+0x259/0x430 [ 369.986320] ? __pfx_cryptomgr_test+0x10/0x10 [ 369.986323] alg_test.part.27+0x103/0x410 [ 369.986326] ? __schedule+0x464/0xfa0 [ 369.986330] ? __pfx_cryptomgr_test+0x10/0x10 [ 369.986333] cryptomgr_test+0x20/0x40 [ 369.986336] kthread+0xda/0x110 [ 369.986344] ? __pfx_kthread+0x10/0x10 [ 369.986346] ret_from_fork+0x2d/0x40 [ 369.986355] ? __pfx_kthread+0x10/0x10 [ 369.986358] ret_from_fork_asm+0x1a/0x30 [ 369.986365] </TASK> This happens because the only async polling without interrupts that iaa_crypto currently implements is with the 'sync' mode. With 'async', iaa_crypto calls to compress/decompress submit the descriptor and return -EINPROGRESS, without any mechanism in the driver to poll for completions. Hence callers such as test_acomp() in crypto/testmgr.c or zswap, that wrap the calls to crypto_acomp_compress() and crypto_acomp_decompress() in synchronous wrappers, will block indefinitely. Even before zswap can notice this problem, the crypto testmgr.c's test_acomp() will fail and prevent registration of "deflate-iaa" as a valid crypto acomp algorithm, thereby disallowing the use of "deflate-iaa" as a zswap compress (zswap will fall-back to the default compressor in this case). To fix this issue, this patch modifies the iaa_crypto sync_mode set function to treat 'async' equivalent to 'sync', so that the correct and only supported driver async polling without interrupts implementation is enabled, and zswap can use 'deflate-iaa' as the compressor. Hence, with this patch, this is what will happen: echo async > /sys/bus/dsa/drivers/crypto/sync_mode cat /sys/bus/dsa/drivers/crypto/sync_mode sync There are no crypto/testmgr.c test_acomp() errors, no call traces and zswap can use 'deflate-iaa' without any errors. The iaa_crypto documentation has also been updated to mention this caveat with 'async' and what to expect with this fix. True iaa_crypto async polling without interrupts is enabled in patch "crypto: iaa - Implement batch_compress(), batch_decompress() API in iaa_crypto." [1] which is under review as part of the "zswap IAA compress batching" patch-series [2]. Until this is merged, we would appreciate it if this current patch can be considered for a hotfix. [1]: https://patchwork.kernel.org/project/linux-mm/patch/20241221063119.29140-5-kanchana.p.sridhar@intel.com/ [2]: https://patchwork.kernel.org/project/linux-mm/list/?series=920084 Fixes: 09646c98d ("crypto: iaa - Add irq support for the crypto async interface") Signed-off-by: Kanchana P Sridhar <kanchana.p.sridhar@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-12-27netlink: specs: mptcp: fix missing docMatthieu Baerts (NGI0)
Two operations didn't have a small description. It looks like something that has been missed in the original commit introducing this file. Replace the two "todo" by a small and simple description: Create/Destroy subflow. While at it, also uniform the capital letters, avoid double spaces, and fix the "announce" event description: a new "address" has been announced, not a new "subflow". Reviewed-by: Geliang Tang <geliang@kernel.org> Signed-off-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/20241221-net-mptcp-netlink-specs-pm-doc-fixes-v2-3-e54f2db3f844@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-27netlink: specs: mptcp: clearly mention attributesMatthieu Baerts (NGI0)
The rendered version of the MPTCP events [1] looked strange, because the whole content of the 'doc' was displayed in the same block. It was then not clear that the first words, not even ended by a period, were the attributes that are defined when such events are emitted. These attributes have now been moved to the end, prefixed by 'Attributes:' and ended with a period. Note that '>-' has been added after 'doc:' to allow ':' in the text below. The documentation in the UAPI header has been auto-generated by: ./tools/net/ynl/ynl-regen.sh Link: https://docs.kernel.org/networking/netlink_spec/mptcp_pm.html#event-type [1] Reviewed-by: Geliang Tang <geliang@kernel.org> Signed-off-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/20241221-net-mptcp-netlink-specs-pm-doc-fixes-v2-2-e54f2db3f844@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-27netlink: specs: mptcp: add missing 'server-side' attrMatthieu Baerts (NGI0)
This attribute is added with the 'created' and 'established' events, but the documentation didn't mention it. The documentation in the UAPI header has been auto-generated by: ./tools/net/ynl/ynl-regen.sh Reviewed-by: Geliang Tang <geliang@kernel.org> Signed-off-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/20241221-net-mptcp-netlink-specs-pm-doc-fixes-v2-1-e54f2db3f844@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-27dt-bindings: pinctrl: Add rk3562 pinctrl supportKever Yang
Add the compatible string for the rk3562 SoC. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/20241224093522.3815562-1-kever.yang@rock-chips.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindingsKrishna Kurapati
Update dt-bindings to add primary controller of QCS615 to USB DWC3 controller list. Although this controller has a QUSB2 Phy, it belongs to a generation of SoCs like SDM670/SDM845/SM6350 where DP/DM is used for wakeup instead of qusb2_phy interrupt. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241224084621.4139021-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-27USB: usbip: Update USB/IP OP_REP_IMPORT documentation.Gordon Ou
This is to correct the mistaken byte offset of the field bDeviceClass in OP_REP_IMPORT documentation. The previous field bcdDevice has length 2 and the offset for bDeviceClass should be 0x138 + 2 = 0x13A instead of 0x139. Offsets for subsequent fields are also affected and fixed in this patch. Signed-off-by: Gordon Ou <gordon.xwj@gmail.com> Reviewed-by: Shuah Khan <skhan@linuxfoundation.org> Link: https://lore.kernel.org/r/20241224062336.63215-1-gordon.xwj@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-27dt-bindings: pinctrl: add binding for MT7988 SoCFrank Wunderlich
This adds bindings for MT7988 pinctrl driver. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20241217085435.9586-4-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-26dt-bindings: arm: qcom: Document Huawei Matebook E Go (sc8280xp)Pengyu Luo
Add compatible for the SC8280XP-based Huawei Matebook E Go, using its codename, gaokun3, which means it is the 3rd gen gaokun. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Link: https://lore.kernel.org/r/20241220160530.444864-2-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add Xiaomi Redmi 5ABarnabás Czémán
Document Xiaomi Remi 5A (riva). Add qcom,msm8917 for msm-id, board-id allow-list. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20241221-msm8917-v11-3-901a74db4805@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add Microsoft Windows Dev Kit 2023Jens Glathe
Add compatible values for the Microsoft Windows Dev Kit (WDK2023) with its codename "blackrock". The Dev kit is a small desktop box based on the mainboard of the Surface pro 9 5G, intended for developers to test/build arm64-based Windows software. Link: https://learn.microsoft.com/en-us/windows/arm/dev-kit/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-jg-blackrock-for-upstream-v9-1-385bb46ca122@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add HP Omnibook X 14Jens Glathe
Add compatible values for the HP Omnibook X Laptop 14-fe0750ng, using "hp,omnibook-x14" The laptop is based on the Snapdragon X Elite (x1e80100) SoC. PDF link: https://www8.hp.com/h20195/V2/GetPDF.aspx/c08989140 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-hp-omnibook-x14-v3-1-0fcd96483723@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: soc: ti: pruss: Add clocks for ICSSGMD Danish Anwar
The ICSSG module has 7 clocks for each instance. These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK, ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK These clocks are described in AM64x TRM Section 6.4.3 Table 6-398. Add these clocks to the dt binding of ICSSG. Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM) Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241113110955.3876045-2-danishanwar@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-12-26Merge tag 'sound-6.13-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "A collection of small fixes. Nothing really stands out, fortunately. - Follow-up fixes for the new compress offload API extension - A few ASoC SOF, AMD and Mediatek quirks and fixes - A regression fix in legacy SH driver cleanup - Fix DMA mapping error handling in the helper code - Fix kselftest dependency" * tag 'sound-6.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: sh: Fix wrong argument order for copy_from_iter() selftests/alsa: Fix circular dependency involving global-timer ALSA: memalloc: prefer dma_mapping_error() over explicit address checking ALSA: compress_offload: improve file descriptors installation for dma-buf ALSA: compress_offload: use safe list iteration in snd_compr_task_seq() ALSA: compress_offload: avoid 64-bit get_user() ALSA: compress_offload: import DMA_BUF namespace ASoC: mediatek: disable buffer pre-allocation ASoC: rt722: add delay time to wait for the calibration procedure ASoC: SOF: Intel: hda-dai: Do not release the link DMA on STOP ASoC: dt-bindings: realtek,rt5645: Fix CPVDD voltage comment ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21QA and 21QB ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21Q6 and 21Q7 ASoC: amd: ps: Fix for enabling DMIC on acp63 platform via _DSD entry
2024-12-26Documentation: probes: Update fprobe on function-graph tracerMasami Hiramatsu (Google)
Update fprobe documentation for the new fprobe on function-graph tracer. This includes some bahvior changes and pt_regs to ftrace_regs interface change. Cc: Alexei Starovoitov <alexei.starovoitov@gmail.com> Cc: Florent Revest <revest@chromium.org> Cc: Martin KaFai Lau <martin.lau@linux.dev> Cc: bpf <bpf@vger.kernel.org> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Alan Maguire <alan.maguire@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/173519010442.391279.10732749889346824783.stgit@devnote2 Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2024-12-25dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS615Taniya Das
Add bindings and update documentation for clock rpmh driver on QCS615 SoCs. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241022-qcs615-clock-driver-v4-1-3d716ad0d987@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: clock: qcom,x1e80100-gcc: Add X1P42100Konrad Dybcio
X1P42100 is based on X1E80100 and largely reuses the X1E80100's GCC block, adding a couple wires here and there. Add a compatible for the X1P4 with a fallback to X1E80100. There are some additions in the smaller one, that will be added in the future. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-1-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25Merge branch '20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com' ↵Bjorn Andersson
into clk-for-6.14 Merge the X1P42100 GPUCC binding through a topic branch to make available for the DeviceTree branch as well.
2024-12-25dt-bindings: clock: qcom,x1e80100-gpucc: Extend for X1P42100Konrad Dybcio
To make it easier for X1P4 and X1E to share a common device tree base, extend the existing latter's GPUCC bindings and reuse them on the former platform. While not in the same file, it only makes sense to introduce the new compatible in this commit as well. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: arm: qcom: Add X1P42100 SoC & CRDKonrad Dybcio
The X1 family is split into two parts: the 10- and 12-core parts are variants of the same silicon with different fusing, whereas the 8-core ones are a separate design. Thankfully, the software interface is only barely different, letting us reuse much of the existing X1 work. Add X1P42100 SoC (and the CRD based on it) as a representative of the 8-core series. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-2-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: arm: qcom-soc: Extend X1E prefix match for X1PKonrad Dybcio
The X1 series includes SoCs like X1P42100. Extend the pattern x1e match to x1[ep] to also include these. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-1-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: phy: qcom,qmp-pcie: document the SM8350 two lanes PCIe PHYNeil Armstrong
Document the two lanes PCIe PHY found on SM8350 SoCs along the already documented single lane PCIe PHY. This fixes: /soc@0/phy@1c0e000: failed to match any schema with compatible: ['qcom,sm8350-qmp-gen3x2-pcie-phy'] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241204-topic-misc-sm8350-pcie-bindings-fix-v1-1-e8eaff1699d7@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-25dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ5424 QMP PCIe PHYsManikanta Mylavarapu
Document the PCIe phy on the IPQ5424 platform using the IPQ9574 bindings as a fallback, since the PCIe phy on the IPQ5424 is similar to IPQ9574. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241213134950.234946-3-quic_mmanikan@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>