| Age | Commit message (Collapse) | Author |
|---|
|
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for 6.17:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
- atomic-helpers: Tune the enable / disable sequence
- bridge: Add destroy hook
- color management: Add helpers for hardware gamma LUT handling
- HDMI: Add CEC handling, YUV420 output support
- sched: tracing improvements
Driver Changes:
- hyperv: Move out of simple-kms, drm_panic support
- i915: drm_panel_follower support
- imx: Add IMX8qxq Display Controller Support
- lima: Add Rockchip RK3528 GPU Support
- nouveau: fence handling cleanup
- panfrost: Add BO labeling, 64-bit registers access
- qaic: Add RAS Support
- rz-du: Add RZ/V2H(P) Support, MIPI-DSI DCS Support
- sun4i: Add H616 Support
- tidss: Add TI AM62L Support
- vkms: YUV and R* formats support
- bridges:
- Switched to reference counted drm_bridge allocations
- panels:
- Switched to reference counted drm_panel allocations
- Add support for fwnode-based panel lookup
- himax-hx8394: Support for Huiling hl055fhv028c
- ilitek-ili9881c: Support for 7" Raspberry Pi 720x1280
- panel-edp: Support for KDC KD116N3730A05, N160JCE-ELL CMN,
- panel-simple: Support for AUO P238HAN01
- st7701: Support for Winstar wf40eswaa6mnn0
- visionox-rm69299: Support for rm69299-shift
- New panels: Renesas R61307, Renesas R69328
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <mripard@redhat.com>
Link: https://lore.kernel.org/r/20250612-coucal-of-impossible-cleaning-a5eecf@houat
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
Pull libnvdimm fix from Ira Weiny:
"This converts the pmem-region device tree bindings to YAML to fix
errors and bring it up to date"
* tag 'libnvdimm-fixes-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
dt-bindings: pmem: Convert binding to YAML
|
|
Document Kryo 470 CPUs found in Qualcomm Snapdragon 730/730G/732G
(SM7150).
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-1-bf9a9081631d@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Add compatible for SM7150 SoC IMEM.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-5-bf9a9081631d@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Document the AOSS QMP compatible for SM7150.
Signed-off-by: David Wronek <david@mainlining.org>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-6-bf9a9081631d@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Document DDC compatible for SM7150.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-12-bf9a9081631d@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Document qcom,qcs615-imem compatible. It has a child node for debugging
purposes.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-2-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
The Elan eKTH8D18 touchscreen controller is an I2C HID device with a
longer boot-up time. Power sequence timing wise it is compatible with
the eKTH6A12NAY, with a power-on delay of at least 5ms, 20ms
out-of-reset for I2C ack response, and 150ms out-of-reset for I2C HID
enumeration, both shorter than what the eKTH6A12NAY requires.
Enumeration and subsequent operation follows the I2C HID standard.
Add a compatible string for it with the ekth6a12nay one as a fallback.
No enum was used as it is rare to actually add new entries. These
chips are commonly completely backward compatible, and unless the
power sequencing delays change, there is no real effort being made to
keep track of new parts, which come out constantly.
Also drop the constraints on the I2C address since it's not really
part of the binding.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-2-wenst@chromium.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
|
|
|
|
Currently if a user enqueue a work item using schedule_delayed_work() the
used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
schedule_work() that is using system_wq and queue_work(), that makes use
again of WORK_CPU_UNBOUND.
This lack of consistentcy cannot be addressed without refactoring the API.
This patch adds a new WQ_PERCPU flag to explicitly request the use of
the per-CPU behavior. Both flags coexist for one release cycle to allow
callers to transition their calls.
Once migration is complete, WQ_UNBOUND can be removed and unbound will
become the implicit default.
tj: Merged doc patch.
Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
|
|
Update the PCI Endpoint (EP) device tree binding documentation to
include PCIe Gen5 and Gen6 support for the `max-link-speed` property.
Similar to the Host Controller binding, the original EP binding
limited this value to 1~4 (Gen1~Gen4). With current SoCs requiring
Gen5/Gen6 support (e.g., Synopsys/Cadence IP), this change aligns
the EP binding with the kernel's PCIe 6.0 capabilities.
Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250529021026.475861-3-18255117159@163.com
|
|
QCS8300 is derived from SA8775p. Hence, add the callback with SA8775p as
the fallback.
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250529035635.4162149-3-quic_ziyuzhan@quicinc.com
|
|
QCS615 is derived from SM8150. Hence, add the callback with SM8150 as the
fallback.
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
[mani: commit message rewording]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250527072036.3599076-3-quic_ziyuzhan@quicinc.com
|
|
Add the required features detection glue to bugs.c et all in order to
support the TSA mitigation.
Co-developed-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
|
|
The argument should be the string "EXPORTED_FOR_KUNIT_TESTING", not a
bare identifier.
Link: https://lore.kernel.org/r/20250616211637.111358-1-briannorris@chromium.org
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: David Gow <davidgow@google.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
|
|
Add a section about "Task information" for the wedge API.
Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/r/20250617124949.2151549-5-andrealmeid@igalia.com
Signed-off-by: André Almeida <andrealmeid@igalia.com>
|
|
The phy_id field only shows the PHY ID of the C22 device, and the C45
device did not store its PHY ID in this field.
Add a new phy_mmd_group, and export the mmd<n>_device_id for the C45
device. These files are invisible to the C22 device.
Signed-off-by: Yajun Deng <yajun.deng@linux.dev>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250613131903.2961-1-yajun.deng@linux.dev
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
|
Correct the interrupt number of ready and handover in the DTS example.
Fixes: af5da7b0944c ("dt-bindings: remoteproc: qcom,sa8775p-pas: Document the SA8775p ADSP, CDSP and GPDSP")
Signed-off-by: Lijuan Gao <lijuan.gao@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250612-correct_interrupt_for_remoteproc-v1-1-490ee6d92a1b@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
On Microblaze platforms there is no need to handle clocks because the
system is starting with clocks enabled (can be described via fixed clock
node or clock-frequency property or not described at all).
With using soft IPs with SOC platforms there is mandatory to handle clocks
as is explained in commit 60dbdc6e08d6 ("dt-bindings: net: emaclite: Add
clock support").
That's why make clock as required in dt binding because it is present in
both configurations and should be described even there is no way how to
handle it on Microblaze systems.
There is also need to describe missing axi gpio clock in fpga-region.yaml
not to introduce new error when make dt_binding_check runs.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Xu Yilun <yilun.xu@intel.com> # fpga
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/94151cfbcff5e4ae05894981c7e398b605d4b00a.1750059796.git.michal.simek@amd.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
|
|
The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with
an additional channel remap register located in the top system control
area. The DMA channel is exclusive to each core.
In addition, the DMA multiplexer is a subdevice of system controller,
so this binding only contains necessary properties for the multiplexer
itself.
Add the dmamux binding for CV18XX/SG200X series SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250611081000.1187374-2-inochiama@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Add device tree bindings for the clock generator found in RP1 multi
function device, and relative entries in MAINTAINERS file.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-1-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
|
|
It will be used by other x86 mitigations.
No functional changes.
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
|
|
Align the naming with the rest of our helpers exposed
outside of core vfs.
Link: https://lore.kernel.org/20250612-work-coredump-massage-v1-9-315c0c34ba94@kernel.org
Signed-off-by: Christian Brauner <brauner@kernel.org>
|
|
Kdump kernel doesn't need IMA functionality, and enabling IMA will cost
extra memory. It would be very helpful to allow IMA to be disabled for
kdump kernel.
Hence add a knob ima=on|off here to allow turning IMA off in kdump
kernel if needed.
Note that this IMA disabling is limited to kdump kernel, please don't
abuse it in other kernel and thus serious consequences are caused.
Signed-off-by: Baoquan He <bhe@redhat.com>
Signed-off-by: Mimi Zohar <zohar@linux.ibm.com>
|
|
Firmware-based thermal temperature control loops may aggressively
throttle performance to prevent temperature overshoots relative to the
defined target temperature. This can negatively impact performance. User
space may prefer to prioritize performance, even if it results in
temperature overshoots with in acceptable range.
For example, user space might tolerate temperature overshoots when the
device is placed on a desk, as opposed to when it's on a lap. To
accommodate such scenarios, an optional attribute is provided to specify
a tolerance level for temperature overshoots while maintaining acceptable
performance.
Attribute:
thermal_tolerance: This attribute ranges from 0 to 7, where 0 represents
the most aggressive control to avoid any temperature overshoots, and 7
represents a more graceful approach, favoring performance even at the
expense of temperature overshoots.
Note: This level may not scale linearly. For example, a value of 3 does not
necessarily imply a 50% improvement in performance compared to a value of 0.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Link: https://patch.msgid.link/20250613214923.2910397-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
The VSPD block on the RZ/V2N SoC is identical to the one found on the
RZ/G2L SoC.
No driver changes are required, as `renesas,r9a07g044-vsp2` will be used
as a fallback compatible string on the RZ/V2N SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250530154148.374663-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
|
|
The FCPVD block on the RZ/V2N SoC is identical to the one found on the
RZ/G2L SoC.
No driver changes are required, as `renesas,fcpv` will be used as a
fallback compatible string on the RZ/V2N SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250530154148.374663-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
|
|
On SM8750, the M31 eUSB2 PHY is being used to support USB2. Add the
binding definition for the PHY driver.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-2-d58de3b41d34@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Add an entry to the compatible field for SM8750 for the QMP combo PHY.
This handles the USB3 path for SM8750.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-1-d58de3b41d34@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Document support for the USB2.0 phy found on the Renesas RZ/V2N
(R9A09G056) SoC. The USB2.0 phy is functionally identical to that on the
RZ/V2H(P) SoC, so no driver changes are needed. The existing
`renesas,usb2-phy-r9a09g057` compatible will be used as a fallback
for the RZ/V2N SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250528133858.168582-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell Armada-375 USB and MVEBU SATA PHY binding to DT
schema format. It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250607212609.743346-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell Armada 38x combo PHY binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250607212541.742427-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the TI Keystone USB PHY binding to DT schema format. Drop the
"#address-cells" and "#size-cells" properties which don't make sense
without any child nodes.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212641.744683-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the TI DM816x USB PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212634.744373-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212629.744191-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Qualcomm-Atheros AR7100 USB PHY binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212625.744008-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Motorola Mapphone MDM6600 USB PHY binding to DT schema
format. It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212621.743859-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Motorola CPCAP PMIC USB PHY binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212616.743674-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell MMP2 USB PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212613.743515-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell CP110 combo PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212605.743176-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell Berlin2 USB PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212554.742884-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Marvell Berlin2 SATA PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212545.742617-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Lantiq XWAY USB PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212537.742287-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Imagination Pistachio USB PHY binding to DT schema format.
It's a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212531.742082-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the HiSilicon INNO USB2 PHY binding to DT schema format. It's a
straight forward conversion.
Add the undocumented "hisilicon,hi3798mv100-usb2-phy" compatible.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212527.741915-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the HiSilicon HI6220 USB PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212524.741770-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the HiSilicon HIX5HD2 SATA PHY binding to DT schema format. It's
a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212520.741588-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Broadcom Stingray PCIe PHY binding to DT schema format. It's
a straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212508.741193-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the Broadcom NS2 USB2 PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212456.740697-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Convert the APM X-Gene PHY binding to DT schema format. It's a straight
forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212424.739972-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
