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path: root/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
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2017-04-07ARM: dts: aspeed: Add a fastread propertyCédric Le Goater
All chips on OpenPOWER platforms support the fastread SPI command. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-03-06ARM: dts: aspeed: add SPI controller bindingsCédric Le Goater
Let's define the SPI controllers in the Aspeed SoCs AST2500 and AST2400 and also enable these, as well as the chips, on the associated platforms. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platformsJoel Stanley
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10ARM: dts: aspeed: Correct palmetto device treeCyril Bur
Palmettos have 512MB of memory as opposed to the previously thought 256MB. Update the device trees accordingly. We run the uart at 115200. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10ARM: dts: aspeed: Reserve framebuffer memoryCyril Bur
When used as a BMC, the host expects to be able to use 16MB of framebuffer memory at the top of RAM. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2016-05-09arm/dts: Add Aspeed ast2400 device treeJoel Stanley
A common device tree for all forth gen/ast2400 systems and a board specific dts for the Palmetto OpenPower developemnt machine which was used for testing. Signed-off-by: Joel Stanley <joel@jms.id.au>