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Enable the aspeed-p2a-ctrl node and configure with memory-region to
enable mmap access.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable the uart1 node such that the clock will be enabled.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable the lpc_ctrl node in the quanta-q71l dts such that the LPC_CLK is
enabled.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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This machine uses the ADC and iBT devices.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Enable the four PSUs via generic PMBUS.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Provide aliases to each i2c bus per labels added for
each PCIe slot, etc, that are downstream beyond a mux.
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The Qanta Q71L BMC is an ASPEED ast2400 based BMC that is part of a
Qanta x86 server.
This adds the device tree description for most upstream components. It
is a squashed commit from the OpenBMC kernel tree.
Signed-off-by: Peter Hanson <peterh@google.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Rick Altherr <raltherr@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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