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path: root/arch/arm/boot/dts/meson8b-mxq.dts
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2019-12-11ARM: dts: meson: provide the XTAL clock using a fixed-clockMartin Blumenstingl
The clock controller driver has provided the XTAL clock so far. This does not match how the hardware actually works because the XTAL clock is an actual crystal which is mounted on the PCB. Add the "xtal" clock to meson.dtsi and replace all references to the clock controller's CLKID_XTAL with the new xtal clock node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05ARM: dts: meson8b: mxq: add the VDDEE regulatorMartin Blumenstingl
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE supplies for example the Mali GPU and is controlled by PWM_D instead of PWM_C. Add the VDDEE PWM regulator and make it the supply of the Mali GPU. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-20ARM: dts: meson: switch to the generic Ethernet PHY reset bindingsMartin Blumenstingl
The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the &ethmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register"). The old settings used 10ms for assert and 1000ms for deassert. - IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms")). The old settings used 10ms for assert and 1000ms for deassert. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03ARM: dts: meson8b-mxq: update with SPDX Licence identifierNeil Armstrong
While the text specifies "of the GPL or the X11 license" the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03ARM: dts: meson8b: mxq: improve support for the TRONFY MXQ S805Martin Blumenstingl
The TRONFY MXQ comes with either 1GB or 2GB RAM. Both variants share (like most boards based on Amlogic reference designs): - 10/100 PHY (IC Plus IP101GR) with GPIOH_4 being the reset line and GPIOH_3 the interrupt line - SD card slot with the card detection GPIO at CARD_6 - VCCK is generated by PWM_C with a period of 1148ns and XTAL as input clock - USB OTG exposed on one of the USB-A connectors - 4-port USB hub with 3 ports exposed to the outside There seem the multiple board revision out there according to various forum posts: - storage: eMMC or NAND flash - wifi: Ampak AP6210 or Realtek 8189 Add support for the following functionality: - SoC temperature (hwmon) - changing the CPU voltage - Ethernet connectivity - SD card - USB Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: hexdump <hexdump0815@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-01-30ARM: dts: Kill off skeleton{64}.dtsiRob Herring
Remove the usage of skeleton.dtsi in the remaining dts files. It was deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). This will make adding a unit-address to memory nodes easier. The main tricky part to removing skeleton.dtsi is we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition. Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-11-15ARM: dts: meson8b: mxq: add the /chosen/stdout-path propertyMartin Blumenstingl
Support for this board is currently very limited. To debug any potential issues on this board the "earlycon" kernel parameter can be used (without any arguments). However, this requires the board to define a /chosen/stdout-path property in it's .dts. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2015-10-08ARM: meson: Add DTS for Odroid-C1 and Tronfy MXQ boardsCarlo Caione
Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>