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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.16
* r8a7745 (RZ/G1E) SoC
- Enable SMP
Fabrizio Castro says "Add DT node for the Advanced Power Management
Unit (APMU), add the second CPU core, and use "renesas,apmu" as
"enable-method"."
* r8a7743 (RZ/G1M) SoC
- Add node for thermal sensor module with thermal-zone support
* r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs
- Add:
+ Renesas Core Match Timer (CMT) support
+ Renesas Timer Pulse Unit PWM Controller (TPU) support
+ Renesas PWM Timer Controller (PWM) support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven and
r8a7745 (RZ/G1E) iW-RainboW-G22D development platforms
- Add sound support
* r8a7743 (RZ/G1M), r8a7745 (RZ/G1E) and r8a7792 (R-Car V2H) SoCs
- Allow DTBs of boards of these SoCs to build without any warnings when
compiled with W=1 using gcc-linaro-5.4.1-2017.05
+ Move nodes which have no reg property out of bus, they don't belong there
+ Also sort sub-nodes of root node to allow for easier maintenance
* r8a7790 (R-Car H2), r8a7791 (R-Car M2-W) and r8a7793 (R-Car M2-N) SoCs
- Correct critical CPU temperature
Chris Paterson says "The current R-Car Gen2 device trees define the CPU
critical temperature as 115°C.
The R-Car hardware manuals state that Tc = –40°C to +105°C. The thermal
sensor has an accuracy of ±5°C and there can be a temperature
difference of 1 or 2 degrees between Tjmax and the thermal sensor due
to the location of the latter.
This means that 95°C is a safer value to use.
This value should also apply to r8a7792 but thermal sensor support has
not been added yet."
* r8a7740 (R-Mobile A1) SoC
- Correct TPU register block size
Geert Uytterhoven says "The Timer Pulse Unit has registers that lie
outside the declared register block. Enlarge the register block size to
fix this.
This was probably based on the old platform code, which also assumed a
register block size of 0x100."
* tag 'renesas-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (37 commits)
ARM: dts: r8a7745: Add missing clock for secondary CA7 CPU core
ARM: dts: iwg22d-sodimm: Sound DMA support via DVC on DTS
ARM: dts: iwg22d-sodimm: Sound DMA support via SRC on DTS
ARM: dts: iwg22d-sodimm: Sound DMA support via BUSIF on DTS
ARM: dts: iwg22d-sodimm: Sound DMA support on DTS
ARM: dts: iwg22d-sodimm: Sound PIO support
ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec
ARM: dts: r8a7745: Add sound support
ARM: dts: r8a7745: Add audio DMAC support
ARM: dts: r8a7745: Add audio clocks
ARM: dts: r8a7740: Correct TPU register block size
ARM: dts: r8a7743: move timer and thermal-zones nodes out of bus
ARM: dts: r8a7743: sort root sub-nodes alphabetically
ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support on DTS
ARM: dts: iwg20d-q7-common: Sound PIO support
ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec
ARM: dts: r8a7792: move timer node out of bus
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v4.16" from Simon Horman:
* Convert to named i2c-gpio bindings
Geert Uytterhoeven says "Commits 7d29f509d2cfd807 ("dt-bindings: i2c:
i2c-gpio: Add support for named gpios") and 05c74778858d7d99 ("i2c: gpio:
Add support for named gpios in DT") introduced named i2c-gpio DT
bindings, and deprecated the more error-prone unnamed variant.
This patch series switches all Renesas boards to the new bindings, and
adds the missing GPIO_OPEN_DRAIN I/O flags, which were implicitly
assumed before..."
... Note that after this series is applied, the i2c-gpio buses are no
longer detected when booting new DTBs on old (v4.14 and older) kernels,
which should not be an issue. Booting old DTBs on new kernels is not
affected."
* Update DTS for CMT DT binding rework
Geert Uytterhoeven says "This patch series updates the CMT device nodes
in the various Renesas DTS files sh_cmt clocksource driver for the recent
DT binding rework that was merged in v4.14-rc1 and v4.15-rc1..."
* Add SMP support to r8a7794 (R-Car E2) SoC
Sergei Shtylyov says "Add the device tree node for the Advanced Power
Management Unit (APMU). Use the "enable-method" prop to point out that
the APMU should be used for the SMP support."
* Correct primary compatible value for eeprom
on r7s72100 (RZ/A1H) genmai and r8a7791 (R-Car M2-W) koelsh boards
Geert Uytterhoeven says "The Renesas part numbers of the two-wire serial
interface EEPROMs do not follow the 24Cxx pattern, but the R1EX24xxx
pattern.
Hence change the primary compatible values to the appropriate variant of
"renesas,r1ex24xxx", like is already done on Gose.""
* Move cec_clock to root node on r8a7791 (R-Car M2-W) koelsh board
r8a7791 (R-Car M2-W) koelsh board
* Use R-Car SDHI and Ether Gen1 and 2 fallback compat strings
Use recently posted R-Car SDHI and Ether Gen 1 and 2 fallback
compat strings in the DT of Renesas ARM based SoCs.
* Add IIC cores to dtsi of r8a7745 (RZ/G1E) SoC
* Rework DT architecture for r8a7745 (RZ/G1E) iW-RainboW-G22D development
platform and add serial support.
Fabrizio Castro says "... define a new DT architecture for the
iW-RainboW-G22D SODIMM Development Platform to include the configuration
with the HDMI daughter board and to define the serial interfaces."
* Add USB function support to
r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
* Add PCIEC and ttySC3 support to r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
* Add VIN support to r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs
* Add CAN and HDMI support to r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven and
r8a7745 (RZ/G1E) iW-RainboW-G22D development platforms
* tag 'renesas-dt-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (61 commits)
ARM: dts: alt: Convert to named i2c-gpio bindings
ARM: dts: koelsch: Convert to named i2c-gpio bindings
ARM: dts: lager: Convert to named i2c-gpio bindings
ARM: dts: armadillo800eva: Convert to named i2c-gpio bindings
ARM: dts: sh73a0: Remove CMT renesas,channels-mask
ARM: dts: r8a7794: Remove CMT renesas,channels-mask
ARM: dts: r8a7793: Remove CMT renesas,channels-mask
ARM: dts: r8a7791: Remove CMT renesas,channels-mask
ARM: dts: r8a7790: Remove CMT renesas,channels-mask
ARM: dts: r8a7740: Remove CMT renesas,channels-mask
ARM: dts: r8a73a4: Remove CMT renesas,channels-mask
ARM: dts: r8a7794: Update CMT compat strings
ARM: dts: r8a7793: Update CMT compat strings
ARM: dts: r8a7791: Update CMT compat strings
ARM: dts: r8a7790: Update CMT compat strings
ARM: dts: r8a73a4: Update CMT compat string
ARM: dts: r8a7794: Add SMP support
ARM: dts: genmai: Correct primary compatible value for eeprom
ARM: dts: koelsch: Correct primary compatible value for eeprom
ARM: dts: r8a7745: add VIN dt support
...
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The R-Car M2N hardware manual states that Tc = –40°C to +105°C. The
thermal sensor has an accuracy of ±5°C and there can be a temperature
difference of 1 or 2 degrees between Tjmax and the thermal sensor due
to the location of the latter.
This means that 95°C is a safer value to use.
Fixes: 57f9156bc620ac56 ("ARM: dts: r8a7793: enable to use thermal-zone")
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Update the DTS to remove the now deprecated "renesas,channels-mask"
property.
The channel information is now kept in the device driver and can easily
be determined based on the compat string.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.
With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7793 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7793 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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With the latest dtc, we get many warnings about the missing
'#reset-cells' property in these controllers, e.g.:
arch/arm/boot/dts/r8a7790-lager.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /can@e6e80000:resets[0])
arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/dma-controller@e6700000:resets[0])
arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/ethernet@e6800000:resets[0])
arch/arm/boot/dts/r8a7793-gose.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /gpio@e6050000:resets[0])
arch/arm/boot/dts/r8a7794-alt.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /i2c@e6500000:resets[0])
arch/arm/boot/dts/r8a7794-silk.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /interrupt-controller@e61c0000:resets[0])
This adds it for the three r8a779x chips that were lacking it. The
binding mandates this as <1>, so this is the value I use.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[geert: Add fix for r8a7793.dtsi]
Fixes: 34fbd2b12761d111 ("ARM: dts: r8a7790: Add reset control properties")
Fixes: 6e11a322f1d7505d ("ARM: dts: r8a7792: Add reset control properties")
Fixes: 84fb19e1d201ba86 ("ARM: dts: r8a7793: Add reset control properties")
Fixes: 615beb759ca494a4 ("ARM: dts: r8a7794: Add reset control properties")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7793 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that resets usually match the corresponding module clocks.
Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Convert the R-Car M2-N SoC from the old "Renesas R-Car Gen2 Clock Pulse
Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
Generator / Module Standby and Software Reset" DT bindings.
This simplifies the DTS files, and allows to add support for reset
control later.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Reserve SRAM for the jump stub for CPU core bringup.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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R-Car M2-N has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e6060000.pfc and pfc@e6060000 to
e6060000.pin-controller and pin-controller@e6060000.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: 072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: ad53f5f00b095a0d ("ARM: dts: r8a7793: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.
Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).
In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7793 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7793 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7793 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7793 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
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Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().
Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
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Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core. Use the enable-method to point out that the APMU
should be used for SMP support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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R-Car Gen2 have two DMA controllers, which are equivalent. Add
references to both dmac0 and dmac1 so the driver can choose which one to
use.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Same as on r8a7791.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"This is a collection of a few late fixes and other misc stuff that had
dependencies on things being merged from other trees.
The Renesas R-Car power domain handling, and the Nvidia Tegra USB
support both hand notable changes that required changing the DT
binding in a way that only provides compatibility with old DT blobs on
new kernels but not vice versa. As a consequence, the DT changes are
based on top of the driver changes and are now in this branch.
For NXP i.MX and Samsung Exynos, the changes in here depend on other
changes that got merged through the clk maintainer tree"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC
ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC
ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3
ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3
ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato
ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250
ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk
ARM: dts: exynos: Add DMC bus node for Exynos3250
ARM: tegra: Enable XUSB on Nyan
ARM: tegra: Enable XUSB on Jetson TK1
ARM: tegra: Enable XUSB on Venice2
ARM: tegra: Add Tegra124 XUSB controller
ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
ARM: dts: r8a7793: Use SYSC "always-on" PM Domain
...
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Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add a device node for the System Controller.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Same as on r8a7791.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add CAN nodes to r8a7793 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The R-Car CAN controllers can derive the CAN bus clock not only from their
peripheral clock input (clkp1) but also from the other internal clock
(clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in
the device tree along with the USB_EXTAL clock from which clkp2 is
derived.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add a device node for the L2 cache, and link the CPU node to it.
The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch enables to use thermal-zone on r8a7793.
This thermal sensor can measure temperature from -40000 to 125000,
but over 117000 can be critical on this chip.
Thus, default critical temperature is now set as 115000 (this driver
is using 5000 steps) (Current critical temperature is using it as
90000, but there is no big reason about it)
And it doesn't check thermal zone periodically (same as current
behavior). You can exchange it by modifying polling-delay[-passive]
property.
You can set trip temp if your kernel has CONFIG_THERMAL_WRITABLE_TRIPS,
but you need to take care to use it, since it will call
orderly_poweroff() it it reaches to the value.
echo $temp > /sys/class/thermal/thermal_zone0/trip_point_0_temp
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Enable audio DMAC (= rcar-dmac) in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v4
* Use GIC_SPI in interrupts properties
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Audio DMAC peri peri is no longer DMAEngine. it is supported by
sound driver. this patch enable it.
Base on work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Instantiate the two Audio DMA controllers in the r8a7791 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Instantiate Audio DMA clocks in the r8a7791 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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