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path: root/arch/arm/boot/dts/rk3066a.dtsi
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2021-06-22ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188Alex Bee
Add the vpu node to the common rk3xxx.dtsi and only the powerdomain property to the SoC specific device trees. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210527154455.358869-12-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-13ARM: dts: rockchip: add labels to the timer nodes on rk3066aJohan Jonker
While the kernel doesn't care so much right now, boot loaders like u-boot need to refine the node on their side, so to make life easier for everyone add the labels to the timer nodes on rk3066a. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210612184733.2331-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-03ARM: dts: rockchip: remove #phy-cells from usbphy node rk3066/rk3188Johan Jonker
The review process of rockchip-usb-phy.yaml was not finished when the patch in the link below was already applied. Remove the unneeded #phy-cells property. https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Fixes: 6e4e4e2a2558 ("ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188") Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210603121010.4315-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-15ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188Johan Jonker
With grf.txt converted to YAML a lot of compatibles did not have 'simple-mfd' added in the old binding. That implies that if you have child nodes they need to be documented. Make the new layout fit for rk3066/rk3188, move and restyle the grf nodes. Remove rockchip,grf from usbphy node. Add "#phy-cells", because it is a required property by phy-provider.yaml With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon" for the grf registers. Add "syscon", "simple-mfd" compatible for rk3066/rk3188 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Changed compatibles: "rockchip,rk3066-grf", "syscon", "simple-mfd" "rockchip,rk3188-grf", "syscon", "simple-mfd" Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10ARM: dts: rockchip: add #power-domain-cells to power domain nodesJohan Jonker
Add #power-domain-cells to power domain nodes, because they are required by power-domain.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-5-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10ARM: dts: rockchip: Fix power-controller node names for rk3066aElaine Zhang
Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-08-30ARM: dts: rockchip: rk3066a: add label to cpu@1Johan Jonker
Add label to cpu@1 for later use. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200813172451.13754-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodesJohan Jonker
An experimental test with the command below gives for example this error: arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+' '#address-cells' and '#size-cells' are not a valid property for i2s nodes, so remove them. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: swap clocks and clock-names values for i2s nodesJohan Jonker
Current dts files with 'i2s' nodes are manually verified. In order to automate this process rockchip-i2s.txt has to be converted to yaml. In the new setup dtbs_check with rockchip-i2s.yaml expect clocks and clock-names values in the same order. Fix this for some older Rockchip models. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-04-11ARM: dts: rockchip: bulk convert gpios to their constant counterpartsHeiko Stuebner
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-31ARM: dts: rockchip: add rk3066 hdmi nodesZheng Yang
This patch adds the hdmi nodes to rk3066. Signed-off-by: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-01-12ARM: dts: rockchip: add rk3066 vop display nodesMark Yao
This patch adds the core display subsystem and vop nodes to rk3066. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-01-07ARM: dts: rockchip: add HCLK_HDMI to rk3066 vio power-domainJohan Jonker
A MK808 TV stick with rk3066 processor boots normal with logo and console, but after booting the monitor remains black. This patch fixes a vblank wait time out by adding HCLK_HDMI to the vio power-domain node. The HCLK_HDMI clock is now part of the logic that enables the RK3066_PD_VIO power domain. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-27ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2sHeiko Stuebner
The Rockchip i2s always just requires a sound-dail-cells value of 0, so add them to the core soc dtsi for convenience. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
2018-11-05ARM: dts: rockchip: add rk3066/rk3188 power-domainsHeiko Stuebner
Add the power-domain nodes to both rk3066 and rk3188 including their clocks and qos connections. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-17ARM: dts: rockchip: use SPDX-License-IdentifierKlaus Goger
Update all 32bit rockchip devicetree files to use SPDX-License-Identifiers. All files except rk3288-veyron-analog-audio.dtsi (which is GPL 2.0 only) claim to be GPL and X11 while the actual license text is MIT. Use the MIT SPDX tag for them. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Brian Norris <briannorris@chromium.org> Acked-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-10ARM: dts: rockchip: fix mali400 ppmmu interrupt namesHeiko Stuebner
The interrupts were wrongly named as ppXmmu while the binding specifies them as ppmmuX. Fix that for the recently added Utgard mali nodes on Rockchip socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-22ARM: dts: rockchip: add gpu nodes on rk3066/rk3188Heiko Stuebner
The old Cortex-A9 socs use Mali400 GPUs with 4 pixel processors. This adds the core gpu nodes with the per-soc interrupts but sharing the core node. Rockchip SoCs use only one clock to supply the GPUs Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-19ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188Heiko Stuebner
The serial IPs in Rockchip socs are based on Designware uarts and thus bind against the snps,dw-apb-uart compatible. On all newer socs we also carry around per-soc compatibles that allow us to have more specific drivers in the future - if needed. The cortex-a9 socs rk3066 and rk3188 that were added first don't have those yet, so add them for completenes sake. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14ARM: dts: rockchip: enable dma for uart and mmc on rk3066aPaweł Jarosz
DMA controller driver is in good shape these days on rockchip platforms. So lets enable DMA for uart and mmc. Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14ARM: dts: rockchip: fix TSADC reset node for rk3066aPaweł Jarosz
This patch fixes incorectly assigned rk3066a TSADC node Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-06ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066aPaweł Jarosz
Currently driver leaves sdmmc frequency at its default. So lets set this to 50MHz. This gives us performance boost in mmc transfers. Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-21ARM: dts: rockchip: initialize rk3066 PLL clock ratePaweł Jarosz
Initialize PLL, cpu bus and peripherial bus rate while kernel init. No other module does than. This gives us performance boost observable for example in mmc transfers. Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-16ARM: dts: rockchip: update compatible strings for Rockchip efuseFinley Xiao
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-08-23arm: dts: rockchip: add reset node for the exist saradc SoCsCaesar Wang
SARADC controller needs to be reset before programming it, otherwise it will not function properly. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-06ARM: dts: rockchip: add missing unitname to cpu_leakage efuseHeiko Stuebner
The cpu_leakage efuse on rk3288 did get it right including the unitname but on both rk3066a and rk3188 it was missing, fix that. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org>
2016-04-06ARM: dts: rockchip: fix missing usbphy unit-namesHeiko Stuebner
The usbphy subnodes do have a reg property but no unitname, add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org>
2016-01-26ARM: dts: rockchip: add tsadc nodePaweł Jarosz
Add the device node for the TSADC found on rk3066. Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-25ARM: dts: rockchip: add clock-cells for usb phy nodesHeiko Stuebner
Add the #clock-cells properties for the usbphy nodes as they provide the pll-clocks now. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-24ARM: dts: rockchip: increase vdd_arm voltage for rk3066a based boardsAndy Yan
The current vdd_arm voltage is too low, increase it will make the system more stable. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-14ARM: dts: rockchip: add eFuse node for rk3066a SoCsCaesar Wang
This patch add the eFuse dt node for rk3066a SoCs. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-20ARM: dts: rockchip: add channels properties for i2sSugar Zhang
add playback and capture properties to compatible various chips. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-08ARM: dts: rockchip: add usb phys to Cortex-A9 socsHeiko Stuebner
This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts in rk3xxx.dtsi and also enables it on boards based around these socs. The usb-phy itself is the same as used on the rk3288 already. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-05-13ARM: dts: rockchip: relicense rk3066a.dtsi under GPLv2/X11Heiko Stuebner
GPLv2-only devicetrees make reuse difficult for software components licensed under a different license. The consensus is that a GPL/X11 dual-license should allow all necessary uses, so relicense the rk3066a.dtsi to this combination. CCs were aquired by git shortlog -sne so it should've hopefully catched every contributor. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
2014-11-02ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCsRomain Perier
This patch adds the right pins topology for the MAC and MDIO found in RK3066 SoCs. Boards based on this SoC have an initial support for the emac-rockchip dt-binding. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-10-20ARM: dts: rockchip: add I2S controllers for rk3066 and rk3188Julien CHAUVEAU
Add the I2S/PCM controller nodes and pin controls for rk3066 and rk3188. Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-10-20ARM: dts: rockchip: add operating points and armclk referencesHeiko Stuebner
Add basic OPP entries for current supported Rockchip SoCs. The operating points are currently very conservative, so individual boards may opt to redefine them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2014-09-13ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188Heiko Stuebner
Add the controller node, pinctrl settings for the customizable pins and sort the controllers like on rk3288 as emmc, sdmmc, sdio for handling convenience. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-13ARM: dts: rockchip: add Cortex-A9 SPI controller nodesHeiko Stuebner
This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188 devicetree files. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-30ARM: dts: rockchip: add watchdog nodeHeiko Stuebner
This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-27ARM: dts: rockchip: add pwm nodesBeniamino Galvani
This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Modified to use the new clock defines and added rk3066 pins. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: add rk3066 and rk3188 i2c device nodes and pinctrl settingsHeiko Stuebner
The core controller settings themself are identical, only the compatible and pinctrl settings differ. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: rockchip: oder nodes by register addressHeiko Stuebner
To create some sort of ordering of nodes, they are suggested to be ordered by their register address. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: rockchip: remove address from pinctrl nodesHeiko Stuebner
The pincontroller uses the GRF and PMU syscons nowadays, so should not contain an address in its device node. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: uses handles to reference nodes for changesHeiko Stuebner
Use the handles for subsequent changes to nodes, similar to like the rk3288 submission does it. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: rockchip: add handles for shared nodes that don't have one yetHeiko Stuebner
Some nodes that are changed in the dtsi hierarchy do not have handles yet. As it was suggested in the rk3288 submission to do subsequent nodes changes through such handle-references, add the missing ones. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26ARM: dts: rockchip: remove soc subnodesHeiko Stuebner
Comments received from the rk3288 submission indicated that a generic subnode to group soc components should not be used. So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26arm: dts: rockchip: remove obsolete clock gate definitionsHeiko Stuebner
The clock and reset unit is now provided by the rk3188-cru clock driver and thus the old style definitions of the gate clocks can go away. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de>
2014-07-26ARM: dts: rockchip: add cru nodes and update device clocks to use itHeiko Stuebner
This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and also updates the device nodes retrieve their clocks from there, instead of the previous gate clock nodes. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de>
2014-06-02Merge tag 'dt-for-3.16' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
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